From: Jeff Law <jeffreyalaw@gmail.com>
To: Vineet Gupta <vineetg@rivosinc.com>
Cc: gcc@gcc.gnu.org, Kito Cheng <kito.cheng@gmail.com>,
Palmer Dabbelt <palmer@rivosinc.com>,
gnu-toolchain <gnu-toolchain@rivosinc.com>,
pinskia@gmail.com, GCC Patches <gcc-patches@gcc.gnu.org>
Subject: Re: Followup on PR/109279: large constants on RISCV
Date: Sat, 17 Jun 2023 16:13:30 -0600 [thread overview]
Message-ID: <ce54067d-1ab5-065f-edce-1f18165969b2@gmail.com> (raw)
In-Reply-To: <00e36310-368d-3435-a4a2-b8afbd6b3bc2@rivosinc.com>
On 6/12/23 13:32, Vineet Gupta wrote:
>
> Gave this a try and it seems to fix Andrew's test, but then regresses
> the actual large const case: 0x1010101_01010101 : the mem to const_int
> transformation was being done in cse1 which no longer happens and the
> const pool from initial expand remains all the way into asm generated. I
> don't think we want to go back to that state
Was that with just -O1/-Og? I have vague memories of seeing that kind
of behavior. If it was just with -O1 that might be a reasonable tradeoff.
>
> Ok. From reading gccint it seems REG_EQUIV is a stronger form of
> equivalence and seems to be prefered by post reload passes, while
> REG_EQUAL is more of use in pre-reload.
That's a reasonable way to look at it. In fact it's the allocators that
promote REG_EQUAL to REG_EQUIV when its's safe to do so.
>
>
>> I would also look at reload_cse_regs which should give us some
>> chance at seeing the value reuse if/when IRA/LRA muck things up.
>
> I'll be out of office for the rest of week, will look into this once I'm
> back.
NP.
jeff
prev parent reply other threads:[~2023-06-17 22:13 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-06-02 2:38 Vineet Gupta
2023-06-07 23:44 ` Jeff Law
2023-06-12 19:32 ` Vineet Gupta
2023-06-17 22:13 ` Jeff Law [this message]
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