From: Xi Ruoyao <xry111@xry111.site>
To: Chenghui Pan <panchenghui@loongson.cn>, gcc-patches@gcc.gnu.org
Cc: i@xen0n.name, chenglulu@loongson.cn, xuchenghua@loongson.cn
Subject: Re: [PATCH v1 2/6] LoongArch: Added Loongson SX base instruction support.
Date: Fri, 30 Jun 2023 14:38:20 +0800 [thread overview]
Message-ID: <cf830fa6b9cb535484faaccb05dfd05fc0140b3a.camel@xry111.site> (raw)
In-Reply-To: <20230630021614.57201-3-panchenghui@loongson.cn>
On Fri, 2023-06-30 at 10:16 +0800, Chenghui Pan wrote:
>
> + int use_vecarg_p = TARGET_VECARG
> + && LSX_SUPPORTED_MODE_P (mode);
> +
> memset (info, 0, sizeof (*info));
> info->gpr_offset = cum->num_gprs;
> info->fpr_offset = cum->num_fprs;
> @@ -535,7 +546,7 @@ loongarch_get_arg_info (struct loongarch_arg_info *info,
>
> /* Pass one- or two-element floating-point aggregates in FPRs. */
> if ((info->num_fprs
> - = loongarch_pass_aggregate_num_fpr (type, fields))
> + = loongarch_pass_aggregate_num_fpr (type, fields, use_vecarg_p))
> && info->fpr_offset + info->num_fprs <= MAX_ARGS_IN_REGISTERS)
> switch (info->num_fprs)
> {
No, this is breaking ABI. use_vecarg_p can be only set if we invent a
new ABI (it won't be LP64D anymore), or we add some special switch for
it (like x86's -msseregparm and sseregparm attribute).
--
Xi Ruoyao <xry111@xry111.site>
School of Aerospace Science and Technology, Xidian University
next prev parent reply other threads:[~2023-06-30 6:38 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-06-30 2:16 [PATCH v1 0/6] Add Loongson SX/ASX instruction support to LoongArch target Chenghui Pan
2023-06-30 2:16 ` [PATCH v1 1/6] LoongArch: Added Loongson SX vector directive compilation framework Chenghui Pan
2023-06-30 2:16 ` [PATCH v1 2/6] LoongArch: Added Loongson SX base instruction support Chenghui Pan
2023-06-30 6:38 ` Xi Ruoyao [this message]
2023-06-30 6:45 ` Xi Ruoyao
2023-06-30 8:41 ` WANG Xuerui
2023-06-30 2:16 ` [PATCH v1 3/6] LoongArch: Added Loongson SX directive builtin function support Chenghui Pan
2023-06-30 2:16 ` [PATCH v1 4/6] LoongArch: Added Loongson ASX vector directive compilation framework Chenghui Pan
2023-06-30 2:16 ` [PATCH v1 5/6] LoongArch: Added Loongson ASX base instruction support Chenghui Pan
2023-06-30 2:16 ` [PATCH v1 6/6] LoongArch: Added Loongson ASX directive builtin function support Chenghui Pan
2023-06-30 6:31 ` [PATCH v1 0/6] Add Loongson SX/ASX instruction support to LoongArch target Xi Ruoyao
2023-07-05 12:57 ` Xi Ruoyao
2023-07-06 14:57 ` Chenghui Pan
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=cf830fa6b9cb535484faaccb05dfd05fc0140b3a.camel@xry111.site \
--to=xry111@xry111.site \
--cc=chenglulu@loongson.cn \
--cc=gcc-patches@gcc.gnu.org \
--cc=i@xen0n.name \
--cc=panchenghui@loongson.cn \
--cc=xuchenghua@loongson.cn \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for read-only IMAP folder(s) and NNTP newsgroup(s).