From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from esa2.mentor.iphmx.com (esa2.mentor.iphmx.com [68.232.141.98]) by sourceware.org (Postfix) with ESMTPS id 9528A385702C for ; Tue, 9 Aug 2022 13:24:09 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 9528A385702C Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=codesourcery.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=mentor.com X-IronPort-AV: E=Sophos;i="5.93,224,1654588800"; d="scan'208";a="80994417" Received: from orw-gwy-01-in.mentorg.com ([192.94.38.165]) by esa2.mentor.iphmx.com with ESMTP; 09 Aug 2022 05:24:07 -0800 IronPort-SDR: 6hdRL9QwpQN4bUj39WK0cDU2qxaMmvkkDSLBn+Jg9ddxUbf00HINORRaG/VAx4MYIatX9aPRx5 w4AaCHcuIipBKKY6CgkprQX5JLf43s4330cjqXLhgDmyg5l0eqfzrWDkGtu06/5KNgfw6S03IS XvzB9nQTyP+bGtgtnAqplBlTK4iccgAMB/yCIdevANLn5EFTH6MoQGZeOnEZktZ14Wl1mATyPq 39hEvgm4jEyK0snQMlR5I6MSLYo6ICZqXXEyNCTk4ZK3T0Ul4L+6k/Dexa4hoA5WvAdJmrehD2 LRM= From: Andrew Stubbs To: Subject: [PATCH 0/3] OpenMP SIMD routines Date: Tue, 9 Aug 2022 14:23:47 +0100 Message-ID: X-Mailer: git-send-email 2.37.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [137.202.0.90] X-ClientProxiedBy: svr-ies-mbx-15.mgc.mentorg.com (139.181.222.15) To svr-ies-mbx-11.mgc.mentorg.com (139.181.222.11) X-Spam-Status: No, score=-5.5 required=5.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS, KAM_DMARC_STATUS, RCVD_IN_MSPIKE_H2, SPF_HELO_PASS, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 09 Aug 2022 13:24:11 -0000 This patch series implements OpenMP "simd" routines for amdgcn, and also adds support for "simd inbranch" routines for amdgcn, x86_64, and aarch64 (probably, I can't easily test it). I can approve patch 2 myself, but it depends on patch 1 so I include it here for context and completeness. I first tried to use "mask_mode = DImode", for amdgcn, but that does not produce great results because it ends up generating code to turn the mask into a vector and then back into the exact same mask, so I have settled on "mask_mode = VOIDmode", for now (in fact that uses fewer argument registers in many cases, so maybe it's better anyway). Additionally, I find that the x86_64 truth vectors cannot always be converted to the mask types specified by the backend, so I have pulled that code out completely. Therefore, this patch includes only "mask_mode == VOIDmode" support, but remains a step forward towards full SIMD clone support. I have not included dump-scans in the testcases for aarch64, but the testcases will still test correctness. The aarch64 maintainers can very easily add those scans if they choose. No other architecture has backend support for the clones at this time. OK for mainline (patches 1 & 3)? Thanks Andrew Andrew Stubbs (3): omp-simd-clone: Allow fixed-lane vectors amdgcn: OpenMP SIMD routine support vect: inbranch SIMD clones gcc/config/gcn/gcn.cc | 63 ++++++++ gcc/doc/tm.texi | 3 + gcc/omp-simd-clone.cc | 21 ++- gcc/target.def | 3 + gcc/testsuite/gcc.dg/vect/vect-simd-clone-1.c | 2 + .../gcc.dg/vect/vect-simd-clone-16.c | 89 ++++++++++++ .../gcc.dg/vect/vect-simd-clone-16b.c | 14 ++ .../gcc.dg/vect/vect-simd-clone-16c.c | 16 +++ .../gcc.dg/vect/vect-simd-clone-16d.c | 16 +++ .../gcc.dg/vect/vect-simd-clone-16e.c | 14 ++ .../gcc.dg/vect/vect-simd-clone-16f.c | 16 +++ .../gcc.dg/vect/vect-simd-clone-17.c | 89 ++++++++++++ .../gcc.dg/vect/vect-simd-clone-17b.c | 14 ++ .../gcc.dg/vect/vect-simd-clone-17c.c | 16 +++ .../gcc.dg/vect/vect-simd-clone-17d.c | 16 +++ .../gcc.dg/vect/vect-simd-clone-17e.c | 14 ++ .../gcc.dg/vect/vect-simd-clone-17f.c | 16 +++ .../gcc.dg/vect/vect-simd-clone-18.c | 89 ++++++++++++ .../gcc.dg/vect/vect-simd-clone-18b.c | 14 ++ .../gcc.dg/vect/vect-simd-clone-18c.c | 16 +++ .../gcc.dg/vect/vect-simd-clone-18d.c | 16 +++ .../gcc.dg/vect/vect-simd-clone-18e.c | 14 ++ .../gcc.dg/vect/vect-simd-clone-18f.c | 16 +++ gcc/testsuite/gcc.dg/vect/vect-simd-clone-2.c | 2 + gcc/testsuite/gcc.dg/vect/vect-simd-clone-3.c | 1 + gcc/testsuite/gcc.dg/vect/vect-simd-clone-4.c | 1 + gcc/testsuite/gcc.dg/vect/vect-simd-clone-5.c | 1 + gcc/testsuite/gcc.dg/vect/vect-simd-clone-8.c | 2 + gcc/tree-if-conv.cc | 39 ++++- gcc/tree-vect-stmts.cc | 134 ++++++++++++++---- 30 files changed, 734 insertions(+), 33 deletions(-) create mode 100644 gcc/testsuite/gcc.dg/vect/vect-simd-clone-16.c create mode 100644 gcc/testsuite/gcc.dg/vect/vect-simd-clone-16b.c create mode 100644 gcc/testsuite/gcc.dg/vect/vect-simd-clone-16c.c create mode 100644 gcc/testsuite/gcc.dg/vect/vect-simd-clone-16d.c create mode 100644 gcc/testsuite/gcc.dg/vect/vect-simd-clone-16e.c create mode 100644 gcc/testsuite/gcc.dg/vect/vect-simd-clone-16f.c create mode 100644 gcc/testsuite/gcc.dg/vect/vect-simd-clone-17.c create mode 100644 gcc/testsuite/gcc.dg/vect/vect-simd-clone-17b.c create mode 100644 gcc/testsuite/gcc.dg/vect/vect-simd-clone-17c.c create mode 100644 gcc/testsuite/gcc.dg/vect/vect-simd-clone-17d.c create mode 100644 gcc/testsuite/gcc.dg/vect/vect-simd-clone-17e.c create mode 100644 gcc/testsuite/gcc.dg/vect/vect-simd-clone-17f.c create mode 100644 gcc/testsuite/gcc.dg/vect/vect-simd-clone-18.c create mode 100644 gcc/testsuite/gcc.dg/vect/vect-simd-clone-18b.c create mode 100644 gcc/testsuite/gcc.dg/vect/vect-simd-clone-18c.c create mode 100644 gcc/testsuite/gcc.dg/vect/vect-simd-clone-18d.c create mode 100644 gcc/testsuite/gcc.dg/vect/vect-simd-clone-18e.c create mode 100644 gcc/testsuite/gcc.dg/vect/vect-simd-clone-18f.c -- 2.37.0