From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from esa1.mentor.iphmx.com (esa1.mentor.iphmx.com [68.232.129.153]) by sourceware.org (Postfix) with ESMTPS id 1F6313858C20 for ; Tue, 11 Oct 2022 11:02:33 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 1F6313858C20 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=codesourcery.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=mentor.com X-IronPort-AV: E=Sophos;i="5.95,176,1661846400"; d="scan'208";a="87280545" Received: from orw-gwy-01-in.mentorg.com ([192.94.38.165]) by esa1.mentor.iphmx.com with ESMTP; 11 Oct 2022 03:02:31 -0800 IronPort-SDR: +F1pE7JiYK6grrU5yJG/eb8YteHKFFWms5J84OK9VhIDNeAdBIVjYZrAP1PHqKSxOxVelKafIf dPzISdEDyKnzPxshlfNpg551VVsZIRcbCtQ/QOOO/gwlrPLFf3dOiII7VPmR5/CfRdQtgQ+ien Mmi+2GpreUMxUnK0UHzSPvk6Eg4kpI9O0giigOb0xKMknvaLc3LRO6cmLMUy9woZ4WKhD0m2qL TQO1zSiIoRKQthbclocxXhNaoWoJ/l69HBw3M+Nb2/FC5vyqrVqRC8Bq32E19AfYa87VSVVR4V ruQ= From: Andrew Stubbs To: Subject: [committed 0/6] amdgcn: Add V32, V16, V8, V4, and V2 vectors Date: Tue, 11 Oct 2022 12:02:02 +0100 Message-ID: X-Mailer: git-send-email 2.37.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [137.202.0.90] X-ClientProxiedBy: svr-ies-mbx-14.mgc.mentorg.com (139.181.222.14) To svr-ies-mbx-11.mgc.mentorg.com (139.181.222.11) X-Spam-Status: No, score=-6.8 required=5.0 tests=BAYES_00,HEADER_FROM_DIFFERENT_DOMAINS,KAM_DMARC_STATUS,SPF_HELO_PASS,SPF_PASS,TXREP autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: This patch series adds additional vector sizes for the amdgcn backend. The hardware supports any arbitrary vector length up to 64-lanes via masking, but GCC cannot (yet) make full use of them due to middle-end limitations. Adding smaller "virtual" vector sizes increases the complexity of the backend a little, but opens up optimization opportunities for the current middle-end implementation somewhat. In particular, it enables many more cases of SLP optimization. The patchset gives aproximately 100 addtional test PASS and a few extra FAIL. However, the failures are not new issues, but rather existing problems that did not show up because the code did not previously vectorize. Expanding the testcase to allow 64-lane vectors shows the same problems there. I shall backport these patches to the OG12 branch shortly. Andrew Andrew Stubbs (6): amdgcn: add multiple vector sizes amdgcn: Resolve insn conditions at compile time amdgcn: Add vec_extract for partial vectors amdgcn: vec_init for multiple vector sizes amdgcn: Add vector integer negate insn amdgcn: vector testsuite tweaks gcc/config/gcn/gcn-modes.def | 82 ++ gcc/config/gcn/gcn-protos.h | 24 +- gcc/config/gcn/gcn-valu.md | 399 +++++-- gcc/config/gcn/gcn.cc | 1063 +++++++++++------ gcc/config/gcn/gcn.h | 24 + gcc/testsuite/gcc.dg/pr104464.c | 2 + gcc/testsuite/gcc.dg/signbit-2.c | 5 +- gcc/testsuite/gcc.dg/signbit-5.c | 1 + gcc/testsuite/gcc.dg/vect/bb-slp-68.c | 5 +- gcc/testsuite/gcc.dg/vect/bb-slp-cond-1.c | 3 +- .../gcc.dg/vect/bb-slp-subgroups-3.c | 5 +- .../gcc.dg/vect/no-vfa-vect-depend-2.c | 3 +- gcc/testsuite/gcc.dg/vect/pr33953.c | 3 +- gcc/testsuite/gcc.dg/vect/pr65947-12.c | 3 +- gcc/testsuite/gcc.dg/vect/pr65947-13.c | 3 +- gcc/testsuite/gcc.dg/vect/pr80631-2.c | 3 +- gcc/testsuite/gcc.dg/vect/slp-reduc-4.c | 3 +- .../gcc.dg/vect/trapv-vect-reduc-4.c | 3 +- gcc/testsuite/lib/target-supports.exp | 3 +- 19 files changed, 1183 insertions(+), 454 deletions(-) -- 2.37.0