From: Andrew Stubbs <ams@codesourcery.com>
To: <gcc-patches@gcc.gnu.org>, <richard.sandiford@arm.com>
Subject: Re: [PATCH 11/25] Simplify vec_merge according to the mask.
Date: Thu, 27 Sep 2018 21:14:00 -0000 [thread overview]
Message-ID: <d5d2761d-08c8-7498-f6f9-b4f793000637@codesourcery.com> (raw)
In-Reply-To: <87h8ia29qr.fsf@arm.com>
[-- Attachment #1: Type: text/plain, Size: 402 bytes --]
On 27/09/18 17:19, Richard Sandiford wrote:
> But we wouldn't recurse for PRE_INC, MEM or ASM_OPERANDS, since they
> have the wrong rtx class. AFAICT no current unary, binary or ternary
> operator has that level of side-effect (and that's a good thing).
OK, in that case I'll remove it and we can cross that bridge if we come
to it.
This patch should also address your other concerns.
OK?
Andrew
[-- Attachment #2: 180927-simplify-merge-mask.patch --]
[-- Type: text/x-patch, Size: 6623 bytes --]
Simplify vec_merge according to the mask.
This patch was part of the original patch we acquired from Honza and Martin.
It simplifies nested vec_merge operations using the same mask.
Self-tests are included.
2018-09-27 Andrew Stubbs <ams@codesourcery.com>
Jan Hubicka <jh@suse.cz>
Martin Jambor <mjambor@suse.cz>
* simplify-rtx.c (simplify_merge_mask): New function.
(simplify_ternary_operation): Use it, also see if VEC_MERGEs with the
same masks are used in op1 or op2.
(test_vec_merge): New function.
(test_vector_ops): Call test_vec_merge.
diff --git a/gcc/simplify-rtx.c b/gcc/simplify-rtx.c
index b4c6883..9bc5386 100644
--- a/gcc/simplify-rtx.c
+++ b/gcc/simplify-rtx.c
@@ -5578,6 +5578,68 @@ simplify_cond_clz_ctz (rtx x, rtx_code cmp_code, rtx true_val, rtx false_val)
return NULL_RTX;
}
+/* Try to simplify X given that it appears within operand OP of a
+ VEC_MERGE operation whose mask is MASK. X need not use the same
+ vector mode as the VEC_MERGE, but it must have the same number of
+ elements.
+
+ Return the simplified X on success, otherwise return NULL_RTX. */
+
+rtx
+simplify_merge_mask (rtx x, rtx mask, int op)
+{
+ gcc_assert (VECTOR_MODE_P (GET_MODE (x)));
+ poly_uint64 nunits = GET_MODE_NUNITS (GET_MODE (x));
+ if (GET_CODE (x) == VEC_MERGE && rtx_equal_p (XEXP (x, 2), mask))
+ {
+ if (side_effects_p (XEXP (x, 1 - op)))
+ return NULL_RTX;
+
+ return XEXP (x, op);
+ }
+ if (UNARY_P (x)
+ && VECTOR_MODE_P (GET_MODE (XEXP (x, 0)))
+ && known_eq (GET_MODE_NUNITS (GET_MODE (XEXP (x, 0))), nunits))
+ {
+ rtx top0 = simplify_merge_mask (XEXP (x, 0), mask, op);
+ if (top0)
+ return simplify_gen_unary (GET_CODE (x), GET_MODE (x), top0,
+ GET_MODE (XEXP (x, 0)));
+ }
+ if (BINARY_P (x)
+ && VECTOR_MODE_P (GET_MODE (XEXP (x, 0)))
+ && known_eq (GET_MODE_NUNITS (GET_MODE (XEXP (x, 0))), nunits)
+ && VECTOR_MODE_P (GET_MODE (XEXP (x, 1)))
+ && known_eq (GET_MODE_NUNITS (GET_MODE (XEXP (x, 1))), nunits))
+ {
+ rtx top0 = simplify_merge_mask (XEXP (x, 0), mask, op);
+ rtx top1 = simplify_merge_mask (XEXP (x, 1), mask, op);
+ if (top0 || top1)
+ return simplify_gen_binary (GET_CODE (x), GET_MODE (x),
+ top0 ? top0 : XEXP (x, 0),
+ top1 ? top1 : XEXP (x, 1));
+ }
+ if (GET_RTX_CLASS (GET_CODE (x)) == RTX_TERNARY
+ && VECTOR_MODE_P (GET_MODE (XEXP (x, 0)))
+ && known_eq (GET_MODE_NUNITS (GET_MODE (XEXP (x, 0))), nunits)
+ && VECTOR_MODE_P (GET_MODE (XEXP (x, 1)))
+ && known_eq (GET_MODE_NUNITS (GET_MODE (XEXP (x, 1))), nunits)
+ && VECTOR_MODE_P (GET_MODE (XEXP (x, 2)))
+ && known_eq (GET_MODE_NUNITS (GET_MODE (XEXP (x, 2))), nunits))
+ {
+ rtx top0 = simplify_merge_mask (XEXP (x, 0), mask, op);
+ rtx top1 = simplify_merge_mask (XEXP (x, 1), mask, op);
+ rtx top2 = simplify_merge_mask (XEXP (x, 2), mask, op);
+ if (top0 || top1 || top2)
+ return simplify_gen_ternary (GET_CODE (x), GET_MODE (x),
+ GET_MODE (XEXP (x, 0)),
+ top0 ? top0 : XEXP (x, 0),
+ top1 ? top1 : XEXP (x, 1),
+ top2 ? top2 : XEXP (x, 2));
+ }
+ return NULL_RTX;
+}
+
\f
/* Simplify CODE, an operation with result mode MODE and three operands,
OP0, OP1, and OP2. OP0_MODE was the mode of OP0 before it became
@@ -5967,6 +6029,16 @@ simplify_ternary_operation (enum rtx_code code, machine_mode mode,
&& !side_effects_p (op2) && !side_effects_p (op1))
return op0;
+ if (!side_effects_p (op2))
+ {
+ rtx top0 = simplify_merge_mask (op0, op2, 0);
+ rtx top1 = simplify_merge_mask (op1, op2, 1);
+ if (top0 || top1)
+ return simplify_gen_ternary (code, mode, mode,
+ top0 ? top0 : op0,
+ top1 ? top1 : op1, op2);
+ }
+
break;
default:
@@ -6856,6 +6928,69 @@ test_vector_ops_series (machine_mode mode, rtx scalar_reg)
constm1_rtx));
}
+/* Verify simplify_merge_mask works correctly. */
+
+static void
+test_vec_merge (machine_mode mode)
+{
+ rtx op0 = make_test_reg (mode);
+ rtx op1 = make_test_reg (mode);
+ rtx op2 = make_test_reg (mode);
+ rtx op3 = make_test_reg (mode);
+ rtx op4 = make_test_reg (mode);
+ rtx op5 = make_test_reg (mode);
+ rtx mask1 = make_test_reg (SImode);
+ rtx mask2 = make_test_reg (SImode);
+ rtx vm1 = gen_rtx_VEC_MERGE (mode, op0, op1, mask1);
+ rtx vm2 = gen_rtx_VEC_MERGE (mode, op2, op3, mask1);
+ rtx vm3 = gen_rtx_VEC_MERGE (mode, op4, op5, mask1);
+
+ /* Simple vec_merge. */
+ ASSERT_EQ (op0, simplify_merge_mask (vm1, mask1, 0));
+ ASSERT_EQ (op1, simplify_merge_mask (vm1, mask1, 1));
+ ASSERT_EQ (NULL_RTX, simplify_merge_mask (vm1, mask2, 0));
+ ASSERT_EQ (NULL_RTX, simplify_merge_mask (vm1, mask2, 1));
+
+ /* Nested vec_merge.
+ It's tempting to make this simplify right down to opN, but we don't
+ because all the simplify_* functions assume that the operands have
+ already been simplified. */
+ rtx nvm = gen_rtx_VEC_MERGE (mode, vm1, vm2, mask1);
+ ASSERT_EQ (vm1, simplify_merge_mask (nvm, mask1, 0));
+ ASSERT_EQ (vm2, simplify_merge_mask (nvm, mask1, 1));
+
+ /* Intermediate unary op. */
+ rtx unop = gen_rtx_NOT (mode, vm1);
+ ASSERT_RTX_EQ (gen_rtx_NOT (mode, op0),
+ simplify_merge_mask (unop, mask1, 0));
+ ASSERT_RTX_EQ (gen_rtx_NOT (mode, op1),
+ simplify_merge_mask (unop, mask1, 1));
+
+ /* Intermediate binary op. */
+ rtx binop = gen_rtx_PLUS (mode, vm1, vm2);
+ ASSERT_RTX_EQ (gen_rtx_PLUS (mode, op0, op2),
+ simplify_merge_mask (binop, mask1, 0));
+ ASSERT_RTX_EQ (gen_rtx_PLUS (mode, op1, op3),
+ simplify_merge_mask (binop, mask1, 1));
+
+ /* Intermediate ternary op. */
+ rtx tenop = gen_rtx_FMA (mode, vm1, vm2, vm3);
+ ASSERT_RTX_EQ (gen_rtx_FMA (mode, op0, op2, op4),
+ simplify_merge_mask (tenop, mask1, 0));
+ ASSERT_RTX_EQ (gen_rtx_FMA (mode, op1, op3, op5),
+ simplify_merge_mask (tenop, mask1, 1));
+
+ /* Side effects. */
+ rtx badop0 = gen_rtx_PRE_INC (mode, op0);
+ rtx badvm = gen_rtx_VEC_MERGE (mode, badop0, op1, mask1);
+ ASSERT_EQ (badop0, simplify_merge_mask (badvm, mask1, 0));
+ ASSERT_EQ (NULL_RTX, simplify_merge_mask (badvm, mask1, 1));
+
+ /* Called indirectly. */
+ ASSERT_RTX_EQ (gen_rtx_VEC_MERGE (mode, op0, op3, mask1),
+ simplify_rtx (nvm));
+}
+
/* Verify some simplifications involving vectors. */
static void
@@ -6871,6 +7006,7 @@ test_vector_ops ()
if (GET_MODE_CLASS (mode) == MODE_VECTOR_INT
&& maybe_gt (GET_MODE_NUNITS (mode), 2))
test_vector_ops_series (mode, scalar_reg);
+ test_vec_merge (mode);
}
}
}
next prev parent reply other threads:[~2018-09-27 21:11 UTC|newest]
Thread overview: 187+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-09-05 11:49 [PATCH 00/25] AMD GCN Port ams
2018-09-05 11:49 ` [PATCH 01/25] Handle vectors that don't fit in an integer ams
2018-09-05 11:54 ` Jakub Jelinek
2018-09-14 16:03 ` Richard Sandiford
2018-11-15 17:20 ` Andrew Stubbs
2018-09-05 11:49 ` [PATCH 05/25] Add sorry_at diagnostic function ams
2018-09-05 13:39 ` David Malcolm
2018-09-05 13:41 ` David Malcolm
2018-09-11 10:30 ` Andrew Stubbs
2018-09-05 11:49 ` [PATCH 04/25] SPECIAL_REGNO_P ams
2018-09-05 12:21 ` Joseph Myers
2018-09-11 22:42 ` Jeff Law
2018-09-12 11:30 ` Andrew Stubbs
2018-09-13 10:03 ` Andrew Stubbs
2018-09-13 14:14 ` Andrew Stubbs
2018-09-13 14:39 ` Paul Koning
2018-09-13 14:49 ` Andrew Stubbs
2018-09-13 14:58 ` Paul Koning
2018-09-13 15:22 ` Andrew Stubbs
2018-09-13 17:13 ` Paul Koning
2018-09-17 22:59 ` Jeff Law
2018-10-04 19:13 ` Jeff Law
2018-09-12 15:31 ` Richard Henderson
2018-09-12 16:14 ` Andrew Stubbs
2018-09-05 11:49 ` [PATCH 02/25] Propagate address spaces to builtins ams
2018-09-20 13:09 ` Richard Biener
2018-09-22 19:22 ` Andreas Schwab
2018-09-24 16:53 ` Andrew Stubbs
2018-09-24 17:40 ` Andreas Schwab
2018-09-25 14:27 ` [patch] Fix AArch64 ILP ICE Andrew Stubbs
2018-09-26 8:55 ` Andreas Schwab
2018-09-26 13:39 ` Richard Biener
2018-09-26 16:17 ` Andrew Stubbs
2019-09-03 14:01 ` [PATCH 02/25] Propagate address spaces to builtins Kyrill Tkachov
2019-09-03 15:00 ` Jeff Law
2019-09-04 14:21 ` Kyrill Tkachov
2019-09-04 15:29 ` Kyrill Tkachov
2019-09-03 15:43 ` Andrew Stubbs
2018-09-05 11:50 ` [PATCH 12/25] Make default_static_chain return NULL in non-static functions ams
2018-09-17 18:55 ` Richard Sandiford
2018-09-28 14:23 ` Andrew Stubbs
2018-09-05 11:50 ` [PATCH 10/25] Convert BImode vectors ams
2018-09-05 11:56 ` Jakub Jelinek
2018-09-05 12:05 ` Richard Biener
2018-09-05 12:40 ` Andrew Stubbs
2018-09-05 12:44 ` Richard Biener
2018-09-11 14:36 ` Andrew Stubbs
2018-09-12 14:37 ` Richard Biener
2018-09-17 8:51 ` Richard Sandiford
2018-09-05 11:50 ` [PATCH 03/25] Improve TARGET_MANGLE_DECL_ASSEMBLER_NAME ams
2018-09-11 22:56 ` Jeff Law
2018-09-12 14:43 ` Richard Biener
2018-09-12 15:07 ` Jeff Law
2018-09-12 15:16 ` Richard Biener
2018-09-12 16:32 ` Andrew Stubbs
2018-09-12 17:39 ` Julian Brown
2018-09-15 6:01 ` Julian Brown
2018-09-19 15:23 ` Julian Brown
2018-09-20 12:36 ` Richard Biener
2018-09-05 11:50 ` [PATCH 08/25] Fix co-array allocation ams
[not found] ` <7f5064c3-afc6-b7b5-cade-f03af5b86331@moene.org>
2018-09-05 18:07 ` Janne Blomqvist
2018-09-19 16:38 ` Andrew Stubbs
2018-09-19 22:27 ` Damian Rouson
2018-09-19 22:55 ` Andrew Stubbs
2018-09-20 1:21 ` Damian Rouson
2018-09-20 20:49 ` Thomas Koenig
2018-09-20 20:59 ` Damian Rouson
2018-09-21 7:38 ` Toon Moene
2018-09-23 11:57 ` Janne Blomqvist
2018-09-21 16:37 ` OpenCoarrays integration with gfortran Jerry DeLisle
2018-09-21 19:37 ` Janne Blomqvist
2018-09-21 19:44 ` Richard Biener
2018-09-21 20:25 ` Damian Rouson
2018-09-22 3:47 ` Jerry DeLisle
2018-09-23 10:41 ` Toon Moene
2018-09-23 18:03 ` Bernhard Reutner-Fischer
2018-09-24 11:14 ` Alastair McKinstry
2018-09-27 12:51 ` Richard Biener
2018-09-20 15:59 ` [PATCH 08/25] Fix co-array allocation Janne Blomqvist
2018-09-20 16:37 ` Andrew Stubbs
2018-09-05 11:50 ` [PATCH 06/25] Remove constant vec_select restriction ams
2018-09-11 22:44 ` Jeff Law
2018-09-05 11:50 ` [PATCH 09/25] Elide repeated RTL elements ams
2018-09-11 22:46 ` Jeff Law
2018-09-12 8:47 ` Andrew Stubbs
2018-09-12 15:14 ` Jeff Law
2018-09-19 17:25 ` Andrew Stubbs
2018-09-20 11:42 ` Andrew Stubbs
2018-09-26 16:23 ` Andrew Stubbs
2018-10-04 18:24 ` Jeff Law
2018-10-11 14:28 ` Andrew Stubbs
2018-09-05 11:50 ` [PATCH 07/25] [pr82089] Don't sign-extend SFV 1 in BImode ams
2018-09-17 8:46 ` Richard Sandiford
2018-09-26 15:52 ` Andrew Stubbs
2018-09-26 16:49 ` Richard Sandiford
2018-09-27 12:20 ` Andrew Stubbs
2018-09-05 11:51 ` [PATCH 16/25] Fix IRA ICE ams
2018-09-17 9:36 ` Richard Sandiford
2018-09-18 22:00 ` Andrew Stubbs
2018-09-20 12:47 ` Richard Sandiford
2018-09-20 13:36 ` Andrew Stubbs
2018-09-05 11:51 ` [PATCH 15/25] Don't double-count early-clobber matches ams
2018-09-17 9:22 ` Richard Sandiford
2018-09-27 22:54 ` Andrew Stubbs
2018-10-04 22:43 ` Richard Sandiford
2018-10-22 15:36 ` Andrew Stubbs
2018-09-05 11:51 ` [PATCH 11/25] Simplify vec_merge according to the mask ams
2018-09-17 9:08 ` Richard Sandiford
2018-09-20 15:44 ` Andrew Stubbs
2018-09-26 16:26 ` Andrew Stubbs
2018-09-26 16:50 ` Richard Sandiford
2018-09-26 17:06 ` Andrew Stubbs
2018-09-27 7:28 ` Richard Sandiford
2018-09-27 14:13 ` Andrew Stubbs
2018-09-27 16:28 ` Richard Sandiford
2018-09-27 21:14 ` Andrew Stubbs [this message]
2018-09-28 8:42 ` Richard Sandiford
2018-09-28 13:50 ` Andrew Stubbs
2019-02-22 3:40 ` H.J. Lu
2018-09-05 11:51 ` [PATCH 18/25] Fix interleaving of Fortran stop messages ams
[not found] ` <994a9ec6-2494-9a83-cc84-bd8a551142c5@moene.org>
2018-09-05 18:11 ` Janne Blomqvist
2018-09-12 13:55 ` Andrew Stubbs
2018-09-05 11:51 ` [PATCH 17/25] Fix Fortran STOP ams
[not found] ` <c0630914-1252-1391-9bf9-f03434d46f5a@moene.org>
2018-09-05 18:09 ` Janne Blomqvist
2018-09-12 13:56 ` Andrew Stubbs
2018-09-05 11:51 ` [PATCH 14/25] Disable inefficient vectorization of elementwise loads/stores ams
2018-09-17 9:16 ` Richard Sandiford
2018-09-17 9:54 ` Andrew Stubbs
2018-09-17 12:40 ` Richard Sandiford
2018-09-17 12:46 ` Andrew Stubbs
2018-09-20 13:01 ` Richard Biener
2018-09-20 13:51 ` Richard Sandiford
2018-09-20 14:14 ` Richard Biener
2018-09-20 14:22 ` Richard Sandiford
2018-09-05 11:51 ` [PATCH 13/25] Create TARGET_DISABLE_CURRENT_VECTOR_SIZE ams
2018-09-17 19:31 ` Richard Sandiford
2018-09-18 9:02 ` Andrew Stubbs
2018-09-18 11:30 ` Richard Sandiford
2018-09-18 20:27 ` Andrew Stubbs
2018-09-19 13:46 ` Richard Biener
2018-09-28 12:48 ` Andrew Stubbs
2018-10-01 8:05 ` Richard Biener
2018-09-05 11:52 ` [PATCH 23/25] Testsuite: GCN is always PIE ams
2018-09-14 16:39 ` Jeff Law
2018-09-05 11:52 ` [PATCH 19/25] GCN libgfortran ams
[not found] ` <41281e27-ad85-e50c-8fed-6f4f6f18289c@moene.org>
2018-09-05 18:14 ` Janne Blomqvist
2018-09-06 12:37 ` Andrew Stubbs
2018-09-11 22:47 ` Jeff Law
2018-09-05 11:52 ` [PATCH 20/25] GCN libgcc ams
2018-09-05 12:32 ` Joseph Myers
2018-11-09 18:49 ` Jeff Law
2018-11-12 12:01 ` Andrew Stubbs
2018-09-05 11:52 ` [PATCH 22/25] Add dg-require-effective-target exceptions ams
2018-09-17 9:40 ` Richard Sandiford
2018-09-17 17:53 ` Mike Stump
2018-09-20 16:10 ` Andrew Stubbs
2018-09-05 11:52 ` [PATCH 24/25] Ignore LLVM's blank lines ams
2018-09-14 16:19 ` Jeff Law
2020-03-23 15:29 ` Thomas Schwinge
2020-03-24 21:05 ` Thomas Schwinge
2018-09-05 11:53 ` [PATCH 25/25] Port testsuite to GCN ams
2018-09-05 13:40 ` [PATCH 21/25] GCN Back-end (part 1/2) Andrew Stubbs
2018-11-09 19:11 ` Jeff Law
2018-11-12 12:13 ` Andrew Stubbs
2018-09-05 13:43 ` [PATCH 21/25] GCN Back-end (part 2/2) Andrew Stubbs
2018-09-05 14:22 ` Joseph Myers
2018-09-05 14:35 ` Andrew Stubbs
2018-09-05 14:44 ` Joseph Myers
2018-09-11 16:25 ` Andrew Stubbs
2018-09-11 16:41 ` Joseph Myers
2018-09-12 13:42 ` Andrew Stubbs
2018-09-12 15:32 ` Joseph Myers
2018-09-12 16:46 ` Andrew Stubbs
2018-09-12 16:50 ` Joseph Myers
2018-11-09 19:40 ` Jeff Law
2018-11-12 12:53 ` Andrew Stubbs
2018-11-12 17:20 ` Segher Boessenkool
2018-11-12 17:52 ` Andrew Stubbs
2018-11-12 18:33 ` Segher Boessenkool
2018-11-12 18:55 ` Jeff Law
2018-11-13 10:23 ` Andrew Stubbs
2018-11-13 10:33 ` Segher Boessenkool
2018-11-16 16:10 ` Segher Boessenkool
2018-11-17 14:07 ` Segher Boessenkool
2018-11-14 22:31 ` Jeff Law
2018-11-15 9:55 ` Andrew Stubbs
2018-11-16 13:33 ` Andrew Stubbs
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