From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [216.205.24.124]) by sourceware.org (Postfix) with ESMTP id 5C0A43854827 for ; Sat, 21 Nov 2020 17:27:07 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.3.2 sourceware.org 5C0A43854827 Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-21-QlCrIK52NKqwD2EfDCRUUA-1; Sat, 21 Nov 2020 12:26:59 -0500 X-MC-Unique: QlCrIK52NKqwD2EfDCRUUA-1 Received: from smtp.corp.redhat.com (int-mx07.intmail.prod.int.phx2.redhat.com [10.5.11.22]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 051068030B1; Sat, 21 Nov 2020 17:26:57 +0000 (UTC) Received: from localhost.localdomain (ovpn-113-152.phx2.redhat.com [10.3.113.152]) by smtp.corp.redhat.com (Postfix) with ESMTP id 8B2CF10013C1; Sat, 21 Nov 2020 17:26:56 +0000 (UTC) Subject: Re: [PATCH 23/31] VAX: Make `extv' an expander matching the remaining bitfield operations To: "Maciej W. Rozycki" , gcc-patches@gcc.gnu.org Cc: Anders Magnusson , Paul Koning , Matt Thomas References: From: Jeff Law Message-ID: Date: Sat, 21 Nov 2020 10:26:56 -0700 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.3.1 MIME-Version: 1.0 In-Reply-To: X-Scanned-By: MIMEDefang 2.84 on 10.5.11.22 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 7bit Content-Language: en-US X-Spam-Status: No, score=-5.5 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, NICE_REPLY_A, RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.2 X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 21 Nov 2020 17:27:08 -0000 On 11/19/20 8:36 PM, Maciej W. Rozycki wrote: > We have matching insns defined for `sign_extract' and `zero_extract' > expressions, so make the three named patterns for bitfield operations > consistent and make `extv' an expander rather than an insn taking a > SImode, a QImode, and a SImode general operand for the LOC, SIZE, and > POS operands respectively, like with the `extzv' and `insv' patterns, > matching the machine instructions and giving the middle end more choice > as to which actual insn to choose in a given situation. > > Given this program: > > typedef struct > { > int f0:1; > int f1:7; > int f8:8; > int f16:16; > } bit_t; > > typedef struct > { > unsigned int f0:1; > unsigned int f1:7; > unsigned int f8:8; > unsigned int f16:16; > } ubit_t; > > typedef union > { > bit_t b; > int i; > } bit_u; > > typedef union > { > ubit_t b; > unsigned int i; > } ubit_u; > > int > ins1 (bit_u x, int y) > { > asm volatile ("" : "+r" (x), "+r" (y)); > x.b.f1 = y; > return x.i; > } > > int > ext1 (bit_u x) > { > asm volatile ("" : "+r" (x)); > return x.b.f1; > } > > unsigned int > extz1 (ubit_u x) > { > asm volatile ("" : "+r" (x)); > return x.b.f1; > } > > int > ins8 (bit_u x, int y) > { > asm volatile ("" : "+r" (x), "+r" (y)); > x.b.f8 = y; > return x.i; > } > > int > ext8 (bit_u x) > { > asm volatile ("" : "+r" (x)); > return x.b.f8; > } > > unsigned int > extz8 (ubit_u x) > { > asm volatile ("" : "+r" (x)); > return x.b.f8; > } > > int > ins16 (bit_u x, int y) > { > asm volatile ("" : "+r" (x), "+r" (y)); > x.b.f16 = y; > return x.i; > } > > int > ext16 (bit_u x) > { > asm volatile ("" : "+r" (x)); > return x.b.f16; > } > > unsigned int > extz16 (ubit_u x) > { > asm volatile ("" : "+r" (x)); > return x.b.f16; > } > > this results in the following code change: > > @@ -16,12 +16,12 @@ ins1: > .globl ext1 > .type ext1, @function > ext1: > - .word 0 # 19 [c=0] procedure_entry_mask > - subl2 $4,%sp # 20 [c=32] addsi3 > + .word 0 # 18 [c=0] procedure_entry_mask > + subl2 $4,%sp # 19 [c=32] addsi3 > movl 4(%ap),%r0 # 2 [c=16] movsi_2 > - cvtbl %r0,%r0 # 7 [c=4] extendqisi2 > - ashl $-1,%r0,%r0 # 14 [c=40] *vax.md:624 > - ret # 24 [c=0] return > + extv $1,$7,%r0,%r0 # 7 [c=60] *extv_non_const > + cvtbl %r0,%r0 # 13 [c=4] extendqisi2 > + ret # 23 [c=0] return > .size ext1, .-ext1 > .align 1 > .globl extz1 > @@ -49,12 +49,12 @@ ins8: > .globl ext8 > .type ext8, @function > ext8: > - .word 0 # 20 [c=0] procedure_entry_mask > - subl2 $4,%sp # 21 [c=32] addsi3 > + .word 0 # 18 [c=0] procedure_entry_mask > + subl2 $4,%sp # 19 [c=32] addsi3 > movl 4(%ap),%r0 # 2 [c=16] movsi_2 > - cvtwl %r0,%r0 # 7 [c=4] extendhisi2 > - ashl $-8,%r0,%r0 # 15 [c=40] *vax.md:624 > - ret # 25 [c=0] return > + rotl $24,%r0,%r0 # 13 [c=60] *extv_non_const > + cvtbl %r0,%r0 > + ret # 23 [c=0] return > .size ext8, .-ext8 > .align 1 > .globl extz8 > > If there is a performance degradation with the replacement sequences, > then it can and should be sorted within `extv_non_const'. > > gcc/ > * config/vax/vax.md (extv): Rename insn to... > (*extv): ... this. > (extv): New expander. OK jeff