From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 80495 invoked by alias); 15 Nov 2016 21:06:34 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 80198 invoked by uid 89); 15 Nov 2016 21:06:31 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-5.1 required=5.0 tests=AWL,BAYES_00,RCVD_IN_DNSWL_LOW,RP_MATCHES_RCVD,SPF_PASS autolearn=ham version=3.3.2 spammy=AX_REG, ax_reg, improperly, symbol_operand X-HELO: sasl.smtp.pobox.com Received: from pb-smtp1.pobox.com (HELO sasl.smtp.pobox.com) (64.147.108.70) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Tue, 15 Nov 2016 21:06:21 +0000 Received: from sasl.smtp.pobox.com (unknown [127.0.0.1]) by pb-smtp1.pobox.com (Postfix) with ESMTP id 07F364E36C for ; Tue, 15 Nov 2016 16:06:18 -0500 (EST) Received: from pb-smtp1.nyi.icgroup.com (unknown [127.0.0.1]) by pb-smtp1.pobox.com (Postfix) with ESMTP id F38A84E36B for ; Tue, 15 Nov 2016 16:06:17 -0500 (EST) Received: from [192.168.1.4] (unknown [76.215.41.237]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by pb-smtp1.pobox.com (Postfix) with ESMTPSA id 85EEF4E36A for ; Tue, 15 Nov 2016 16:06:17 -0500 (EST) Subject: Re: [PATCH 5/9] Add patterns and predicates foutline-msabi-xlouges To: gcc-patches References: <79f0ea00-ed47-1ee3-8efd-f57027426970@pobox.com> <20161115200700.10792-5-daniel.santos@pobox.com> From: Daniel Santos Message-ID: Date: Tue, 15 Nov 2016 21:06:00 -0000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.1.1 MIME-Version: 1.0 In-Reply-To: <20161115200700.10792-5-daniel.santos@pobox.com> Content-Type: text/plain; charset=windows-1252; format=flowed Content-Transfer-Encoding: 7bit X-Pobox-Relay-ID: 59BB8276-AB77-11E6-BC7C-987C12518317-06139138!pb-smtp1.pobox.com X-IsSubscribed: yes X-SW-Source: 2016-11/txt/msg01549.txt.bz2 On 11/15/2016 02:06 PM, Daniel Santos wrote: > +;; Save multiple registers out-of-line after realignment > +(define_insn "save_multiple_realign" > + [(match_parallel 0 "save_multiple" > + [(use (match_operand:P 1 "symbol_operand")) > + (set (reg:P SP_REG) (plus:P (reg:P AX_REG) > + (match_operand:DI 2 "const_int_operand"))) > + ])] > + "TARGET_SSE && TARGET_64BIT" > + "leaq\t%c2(%%rax),%%rsp;\n\tcall\t%P1") This pattern was included by mistake (it's incorrect and improperly documented). This is supposed to be the pattern that manages the enter and realignment in the special optimization case of all 17 registers being clobbered and I can do the enter, stack realignment and allocation in savms64f.S just prior to the symbol __savms64f_17. Please ignore it for now. Daniel