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Thu, 9 Nov 2023 05:41:21 GMT Received: from smtpav06.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 6526220049; Thu, 9 Nov 2023 05:41:21 +0000 (GMT) Received: from smtpav06.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id EC06720040; Thu, 9 Nov 2023 05:41:19 +0000 (GMT) Received: from [9.200.103.64] (unknown [9.200.103.64]) by smtpav06.fra02v.mail.ibm.com (Postfix) with ESMTP; Thu, 9 Nov 2023 05:41:19 +0000 (GMT) Message-ID: Date: Thu, 9 Nov 2023 13:41:18 +0800 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Content-Language: en-US To: gcc-patches Cc: Segher Boessenkool , David , "Kewen.Lin" , David , Richard Biener From: HAO CHEN GUI Subject: [PATCH, expand] Call misaligned memory reference in expand_builtin_return [PR112417] Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-TM-AS-GCONF: 00 X-Proofpoint-GUID: C4_lupPeS6_dCDamrQfEZcTFqBi34Fn5 X-Proofpoint-ORIG-GUID: ATqJHHzuzOAZmNvi1sLRVDaHaVl-NlWn X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.987,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-11-09_04,2023-11-08_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxlogscore=833 mlxscore=0 malwarescore=0 clxscore=1011 bulkscore=0 phishscore=0 spamscore=0 suspectscore=0 priorityscore=1501 impostorscore=0 adultscore=0 lowpriorityscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2311060000 definitions=main-2311090044 X-Spam-Status: No, score=-12.3 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_EF,GIT_PATCH_0,KAM_SHORT,RCVD_IN_MSPIKE_H4,RCVD_IN_MSPIKE_WL,SPF_HELO_NONE,SPF_PASS,TXREP,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: Hi, This patch modifies expand_builtin_return and make it call expand_misaligned_mem_ref to load unaligned memory. The memory reference pointed by void* pointer might be unaligned, so expanding it with unaligned move optabs is safe. The new test case illustrates the problem. rs6000 doesn't have unaligned vector load instruction with VSX disabled. When calling builtin_return, it shouldn't load the memory to vector register by unaligned load instruction directly. It should store it to an on stack variable by extract_bit_field then load to return register from stack by aligned load instruction. Bootstrapped and tested on x86 and powerpc64-linux BE and LE with no regressions. Is this OK for trunk? Thanks Gui Haochen ChangeLog expand: Call misaligned memory reference in expand_builtin_return expand_builtin_return loads memory to return registers. The memory might be unaligned compared to the mode of the registers. So it should be expanded by unaligned move optabs if the memory reference is unaligned. gcc/ PR target/112417 * builtins.cc (expand_builtin_return): Call expand_misaligned_mem_ref for loading unaligned memory reference. * builtins.h (expand_misaligned_mem_ref): Declare. * expr.cc (expand_misaligned_mem_ref): No longer static. gcc/testsuite/ PR target/112417 * gcc.target/powerpc/pr112417.c: New. patch.diff diff --git a/gcc/builtins.cc b/gcc/builtins.cc index cb90bd03b3e..b879eb88b7c 100644 --- a/gcc/builtins.cc +++ b/gcc/builtins.cc @@ -1816,7 +1816,12 @@ expand_builtin_return (rtx result) if (size % align != 0) size = CEIL (size, align) * align; reg = gen_rtx_REG (mode, INCOMING_REGNO (regno)); - emit_move_insn (reg, adjust_address (result, mode, size)); + rtx tmp = adjust_address (result, mode, size); + unsigned int align = MEM_ALIGN (tmp); + if (align < GET_MODE_ALIGNMENT (mode)) + tmp = expand_misaligned_mem_ref (tmp, mode, 1, align, + NULL, NULL); + emit_move_insn (reg, tmp); push_to_sequence (call_fusage); emit_use (reg); diff --git a/gcc/builtins.h b/gcc/builtins.h index 88a26d70cd5..a3d7954ee6e 100644 --- a/gcc/builtins.h +++ b/gcc/builtins.h @@ -157,5 +157,7 @@ extern internal_fn replacement_internal_fn (gcall *); extern bool builtin_with_linkage_p (tree); extern int type_to_class (tree); +extern rtx expand_misaligned_mem_ref (rtx, machine_mode, int, unsigned int, + rtx, rtx *); #endif /* GCC_BUILTINS_H */ diff --git a/gcc/expr.cc b/gcc/expr.cc index ed4dbb13d89..b0adb35a095 100644 --- a/gcc/expr.cc +++ b/gcc/expr.cc @@ -9156,7 +9156,7 @@ expand_cond_expr_using_cmove (tree treeop0 ATTRIBUTE_UNUSED, If the result can be stored at TARGET, and ALT_RTL is non-NULL, then *ALT_RTL is set to TARGET (before legitimziation). */ -static rtx +rtx expand_misaligned_mem_ref (rtx temp, machine_mode mode, int unsignedp, unsigned int align, rtx target, rtx *alt_rtl) { diff --git a/gcc/testsuite/gcc.target/powerpc/pr112417.c b/gcc/testsuite/gcc.target/powerpc/pr112417.c new file mode 100644 index 00000000000..ef82fc82033 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/pr112417.c @@ -0,0 +1,12 @@ +/* { dg-do compile { target { has_arch_pwr7 } } } */ +/* { dg-options "-mno-vsx -maltivec -O2" } */ + +void * foo (void * p) +{ + if (p) + __builtin_return (p); +} + +/* Ensure that unaligned load is generated via stack load/store. */ +/* { dg-final { scan-assembler {\mstw\M} { target { ! has_arch_ppc64 } } } } */ +/* { dg-final { scan-assembler {\mstd\M} { target has_arch_ppc64 } } } */