From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mx0a-001b2d01.pphosted.com (mx0a-001b2d01.pphosted.com [148.163.156.1]) by sourceware.org (Postfix) with ESMTPS id 172A33857C6C for ; Tue, 12 Oct 2021 08:57:56 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 172A33857C6C Received: from pps.filterd (m0098399.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.1.2/8.16.1.2) with SMTP id 19C887C0026655; Tue, 12 Oct 2021 04:57:55 -0400 Received: from ppma05fra.de.ibm.com (6c.4a.5195.ip4.static.sl-reverse.com [149.81.74.108]) by mx0a-001b2d01.pphosted.com with ESMTP id 3bn49ykwyp-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 12 Oct 2021 04:57:55 -0400 Received: from pps.filterd (ppma05fra.de.ibm.com [127.0.0.1]) by ppma05fra.de.ibm.com (8.16.1.2/8.16.1.2) with SMTP id 19C8rOXI032284; Tue, 12 Oct 2021 08:57:52 GMT Received: from b06cxnps4074.portsmouth.uk.ibm.com (d06relay11.portsmouth.uk.ibm.com [9.149.109.196]) by ppma05fra.de.ibm.com with ESMTP id 3bk2q9mpc2-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 12 Oct 2021 08:57:52 +0000 Received: from d06av23.portsmouth.uk.ibm.com (d06av23.portsmouth.uk.ibm.com [9.149.105.59]) by b06cxnps4074.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 19C8vmqi2097718 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Tue, 12 Oct 2021 08:57:48 GMT Received: from d06av23.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id B6807A4040; Tue, 12 Oct 2021 08:57:48 +0000 (GMT) Received: from d06av23.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id F0FF8A406B; Tue, 12 Oct 2021 08:57:46 +0000 (GMT) Received: from [9.200.40.250] (unknown [9.200.40.250]) by d06av23.portsmouth.uk.ibm.com (Postfix) with ESMTP; Tue, 12 Oct 2021 08:57:46 +0000 (GMT) Message-ID: Date: Tue, 12 Oct 2021 16:57:43 +0800 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:91.0) Gecko/20100101 Thunderbird/91.1.2 Content-Language: en-US To: gcc-patches Cc: Segher Boessenkool , Bill Schmidt From: HAO CHEN GUI Subject: [PATCH, rs6000] Disable gimple fold for float or double vec_minmax when fast-math is not set Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: EDtNizIQK2yYNf9q5Py9HpVBvBEsKu7T X-Proofpoint-GUID: EDtNizIQK2yYNf9q5Py9HpVBvBEsKu7T X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.182.1,Aquarius:18.0.790,Hydra:6.0.425,FMLib:17.0.607.475 definitions=2021-10-12_02,2021-10-11_01,2020-04-07_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 bulkscore=0 clxscore=1015 mlxscore=0 mlxlogscore=999 malwarescore=0 adultscore=0 priorityscore=1501 phishscore=0 spamscore=0 impostorscore=0 suspectscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2109230001 definitions=main-2110120047 X-Spam-Status: No, score=-11.1 required=5.0 tests=BAYES_00, BODY_8BITS, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_EF, GIT_PATCH_0, KAM_SHORT, RCVD_IN_MSPIKE_H2, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 12 Oct 2021 08:57:59 -0000 Hi,    This patch disables gimple folding for float or double vec_min/max when fast-math is not set. It makes vec_min/max conform with the guide. Bootstrapped and tested on powerpc64le-linux with no regressions. Is this okay for trunk? Any recommendations? Thanks a lot.    I re-send the patch as previous one is messed up in email thread. Sorry for that. ChangeLog 2021-08-25 Haochen Gui gcc/         * config/rs6000/rs6000-call.c (rs6000_gimple_fold_builtin):         Modify the VSX_BUILTIN_XVMINDP, ALTIVEC_BUILTIN_VMINFP,         VSX_BUILTIN_XVMAXDP, ALTIVEC_BUILTIN_VMAXFP expansions. gcc/testsuite/         * gcc.target/powerpc/vec-minmax-1.c: New test.         * gcc.target/powerpc/vec-minmax-2.c: Likewise. patch.diff diff --git a/gcc/config/rs6000/rs6000-call.c b/gcc/config/rs6000/rs6000-call.c index b4e13af4dc6..90527734ceb 100644 --- a/gcc/config/rs6000/rs6000-call.c +++ b/gcc/config/rs6000/rs6000-call.c @@ -12159,6 +12159,11 @@ rs6000_gimple_fold_builtin (gimple_stmt_iterator *gsi)        return true;      /* flavors of vec_min.  */      case VSX_BUILTIN_XVMINDP: +    case ALTIVEC_BUILTIN_VMINFP: +      if (!flag_finite_math_only || flag_signed_zeros) +       return false; +      /* Fall through to MIN_EXPR.  */ +      gcc_fallthrough ();      case P8V_BUILTIN_VMINSD:      case P8V_BUILTIN_VMINUD:      case ALTIVEC_BUILTIN_VMINSB: @@ -12167,7 +12172,6 @@ rs6000_gimple_fold_builtin (gimple_stmt_iterator *gsi)      case ALTIVEC_BUILTIN_VMINUB:      case ALTIVEC_BUILTIN_VMINUH:      case ALTIVEC_BUILTIN_VMINUW: -    case ALTIVEC_BUILTIN_VMINFP:        arg0 = gimple_call_arg (stmt, 0);        arg1 = gimple_call_arg (stmt, 1);        lhs = gimple_call_lhs (stmt); @@ -12177,6 +12181,11 @@ rs6000_gimple_fold_builtin (gimple_stmt_iterator *gsi)        return true;      /* flavors of vec_max.  */      case VSX_BUILTIN_XVMAXDP: +    case ALTIVEC_BUILTIN_VMAXFP: +      if (!flag_finite_math_only || flag_signed_zeros) +       return false; +      /* Fall through to MAX_EXPR.  */ +      gcc_fallthrough ();      case P8V_BUILTIN_VMAXSD:      case P8V_BUILTIN_VMAXUD:      case ALTIVEC_BUILTIN_VMAXSB: @@ -12185,7 +12194,6 @@ rs6000_gimple_fold_builtin (gimple_stmt_iterator *gsi)      case ALTIVEC_BUILTIN_VMAXUB:      case ALTIVEC_BUILTIN_VMAXUH:      case ALTIVEC_BUILTIN_VMAXUW: -    case ALTIVEC_BUILTIN_VMAXFP:        arg0 = gimple_call_arg (stmt, 0);        arg1 = gimple_call_arg (stmt, 1);        lhs = gimple_call_lhs (stmt); diff --git a/gcc/testsuite/gcc.target/powerpc/vec-minmax-1.c b/gcc/testsuite/gcc.target/powerpc/vec-minmax-1.c new file mode 100644 index 00000000000..547798fd65c --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/vec-minmax-1.c @@ -0,0 +1,53 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-options "-O2 -mdejagnu-cpu=power9" } */ +/* { dg-final { scan-assembler-times {\mxvmaxdp\M} 1 } } */ +/* { dg-final { scan-assembler-times {\mxvmaxsp\M} 1 } } */ +/* { dg-final { scan-assembler-times {\mxvmindp\M} 1 } } */ +/* { dg-final { scan-assembler-times {\mxvminsp\M} 1 } } */ + +/* This test verifies that float or double vec_min/max are bound to +   xv[min|max][d|s]p instructions when fast-math is not set.  */ + + +#include + +#ifdef _BIG_ENDIAN +   const int PREF_D = 0; +#else +   const int PREF_D = 1; +#endif + +double vmaxd (double a, double b) +{ +  vector double va = vec_promote (a, PREF_D); +  vector double vb = vec_promote (b, PREF_D); +  return vec_extract (vec_max (va, vb), PREF_D); +} + +double vmind (double a, double b) +{ +  vector double va = vec_promote (a, PREF_D); +  vector double vb = vec_promote (b, PREF_D); +  return vec_extract (vec_min (va, vb), PREF_D); +} + +#ifdef _BIG_ENDIAN +   const int PREF_F = 0; +#else +   const int PREF_F = 3; +#endif + +float vmaxf (float a, float b) +{ +  vector float va = vec_promote (a, PREF_F); +  vector float vb = vec_promote (b, PREF_F); +  return vec_extract (vec_max (va, vb), PREF_F); +} + +float vminf (float a, float b) +{ +  vector float va = vec_promote (a, PREF_F); +  vector float vb = vec_promote (b, PREF_F); +  return vec_extract (vec_min (va, vb), PREF_F); +} diff --git a/gcc/testsuite/gcc.target/powerpc/vec-minmax-2.c b/gcc/testsuite/gcc.target/powerpc/vec-minmax-2.c new file mode 100644 index 00000000000..4c6f4365830 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/vec-minmax-2.c @@ -0,0 +1,51 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-options "-O2 -mdejagnu-cpu=power9 -ffast-math" } */ +/* { dg-final { scan-assembler-times {\mxsmaxcdp\M} 2 } } */ +/* { dg-final { scan-assembler-times {\mxsmincdp\M} 2 } } */ + +/* This test verifies that float or double vec_min/max can be converted +   to scalar comparison when fast-math is set.  */ + + +#include + +#ifdef _BIG_ENDIAN +   const int PREF_D = 0; +#else +   const int PREF_D = 1; +#endif + +double vmaxd (double a, double b) +{ +  vector double va = vec_promote (a, PREF_D); +  vector double vb = vec_promote (b, PREF_D); +  return vec_extract (vec_max (va, vb), PREF_D); +} + +double vmind (double a, double b) +{ +  vector double va = vec_promote (a, PREF_D); +  vector double vb = vec_promote (b, PREF_D); +  return vec_extract (vec_min (va, vb), PREF_D); +} + +#ifdef _BIG_ENDIAN +   const int PREF_F = 0; +#else +   const int PREF_F = 3; +#endif + +float vmaxf (float a, float b) +{ +  vector float va = vec_promote (a, PREF_F); +  vector float vb = vec_promote (b, PREF_F); +  return vec_extract (vec_max (va, vb), PREF_F); +} + +float vminf (float a, float b) +{ +  vector float va = vec_promote (a, PREF_F); +  vector float vb = vec_promote (b, PREF_F); +  return vec_extract (vec_min (va, vb), PREF_F); +}