From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mo4-p00-ob.smtp.rzone.de (mo4-p00-ob.smtp.rzone.de [85.215.255.22]) by sourceware.org (Postfix) with ESMTPS id EE7183858D35 for ; Tue, 23 May 2023 16:57:51 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org EE7183858D35 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=gjlay.de Authentication-Results: sourceware.org; spf=none smtp.mailfrom=gjlay.de ARC-Seal: i=1; a=rsa-sha256; t=1684861070; cv=none; d=strato.com; s=strato-dkim-0002; b=DGtwM6hQuFXTbkHD2SSh30v5/vpn6gqKq48ZVxf+PNqvXMyzki4K7jP6dvFNtt3DEi KLBKQEn+5+8bBpHjnhaIzy7/VmORRniGGSNXUBvsiiNSX4MhUuCODhhEvg8iyYQYQDMy OmyMYXS6/jkJ9vvHHzQDu5YLrUV1wkvZJ7cJSt5Rz1+DOQNsC5xyadDW2adi3hlRaX8F srMVODHtweRLui5qn1TYwRHri591Z3xYOZA+rm6WbEeQuNEwh5cDC9TevOnLGijZVj0L JcZflS6uJgbQ9AR/BjV+sfBaFb64fgeqT0BABLZQgtCIEWb7alBduGOVjOXLt/fRmzzc ZFeQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; t=1684861070; s=strato-dkim-0002; d=strato.com; h=Subject:From:Cc:To:Date:Message-ID:Cc:Date:From:Subject:Sender; bh=JAlv6WFeeepnV/kpJuyvPLSfyCxSNmcxOVtqdpfT5m4=; b=V6HUGcXBOCYpKlDpXHwHXApFCld+ATbPvfAkmrsvTCGomYzkiigVRe08Xd9S1w+xHd OmjY/Zi2kugOnuljy4G31tANwAbnSNSj1fCapY0GJe9fi+MLiIM2NWsdxC6vy2d+yPGV 0gCEVBsA28Sbokmo/KpNugB4m5H9KMKqOl5a+6vICH6V83mRG6fXR3ENGzDa29Fdk392 51f53fdk67tQ8OUK2/YtcYlR49BD90QmcCFGV4xuVMr/Jcaf1IhnEuCGWo4d7zxl6rZF 0i01oqnTDDWtqwoBgs94ridaNahAM0QK44WaSZcxvIIgLLCtpqR3GG2JEUt7gBoTyW+W Tlkw== ARC-Authentication-Results: i=1; strato.com; arc=none; dkim=none X-RZG-CLASS-ID: mo00 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; t=1684861070; s=strato-dkim-0002; d=gjlay.de; h=Subject:From:Cc:To:Date:Message-ID:Cc:Date:From:Subject:Sender; bh=JAlv6WFeeepnV/kpJuyvPLSfyCxSNmcxOVtqdpfT5m4=; b=imon6DCcYC94SnJhezK9Je6vCT2RGk8MyRr7SBRnKjJxQclml0zs4j7iZO1arv/JLC FibDpmGshiO38+4nsYcC/+XVwZ2OUI4Kp54yfH3iofI8hR+S4NiPr2+trs2Og8PQkEIn kaee6vMmCXECN1q/RKvGsAonFx8Oc5KebdfPCArKSQt6Hno4Dipqozj+ENzTvc0mTetB cci40tq584MDa2IRkCPge9jeCu12/7/QLvKl2Ql8eH2ypHSexD6V4sHqbq1ZFkl1pVzE 86FHJzg6yh2GXhYecqWadRaaNp0cuoZF7/XmGtqduJS4FQMZ6TeM/6q0kFgAQQ5LVDgP ytvQ== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; t=1684861070; s=strato-dkim-0003; d=gjlay.de; h=Subject:From:Cc:To:Date:Message-ID:Cc:Date:From:Subject:Sender; bh=JAlv6WFeeepnV/kpJuyvPLSfyCxSNmcxOVtqdpfT5m4=; b=vT2kgxZ8AlyVflhFvVm7t/V+gswr0SPiOtWgX6xF41JwJVsRsmiIxNIoNZrjDRcA+G VjDmhbHXR5aL+5sYyiBw== X-RZG-AUTH: ":LXoWVUeid/7A29J/hMvvT3koxZnKT7Qq0xotTetVnKkRmM69o2y+LiO3MutATA==" Received: from [192.168.2.102] by smtp.strato.de (RZmta 49.4.0 DYNA|AUTH) with ESMTPSA id z691f1z4NGvogo5 (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256 bits)) (Client did not present a certificate); Tue, 23 May 2023 18:57:50 +0200 (CEST) Message-ID: Date: Tue, 23 May 2023 18:57:49 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.11.0 Content-Language: en-US To: gcc-patches@gcc.gnu.org Cc: Denis Chertykov From: Georg-Johann Lay Subject: [avr,committed] Fix cost computation for bit insertions. Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-Spam-Status: No, score=-8.5 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,GIT_PATCH_0,RCVD_IN_DNSWL_NONE,SPF_HELO_PASS,SPF_NONE,TXREP,T_SCC_BODY_TEXT_LINE,URIBL_BLACK autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: Applied this patchlet that implements proper cost computation of (set (zero_extract (...) ...)) kind patterns that do single-bit (inverted) bit insertions. Johann -- Improve cost computation for single-bit bit insertions. Some miscomputation of rtx_costs lead to sub-optimal code for single-bit bit insertions. This patch implements TARGET_INSN_COST, which has a chance to see the whole insn during insn combination; in particular the SET_DEST of (set (zero_extract (...) ...)). gcc/ * config/avr/avr.cc (avr_insn_cost): New static function. (TARGET_INSN_COST): Define to that function. diff --git a/gcc/config/avr/avr.cc b/gcc/config/avr/avr.cc index 9fa50ca230d..4fa6f5309b2 100644 --- a/gcc/config/avr/avr.cc +++ b/gcc/config/avr/avr.cc @@ -11514,6 +11514,52 @@ avr_rtx_costs (rtx x, machine_mode mode, int outer_code, } +/* Implement `TARGET_INSN_COST'. */ +/* For some insns, it is not enough to look at the cost of the SET_SRC. + In that case, have a look at the entire insn, e.g. during insn combine. */ + +static int +avr_insn_cost (rtx_insn *insn, bool speed) +{ + const int unknown_cost = -1; + int cost = unknown_cost; + + rtx set = single_set (insn); + + if (set + && ZERO_EXTRACT == GET_CODE (SET_DEST (set))) + { + // Try find anything that would flip the extracted bit. + bool not_bit_p = false; + + subrtx_iterator::array_type array; + FOR_EACH_SUBRTX (iter, array, SET_SRC (set), NONCONST) + { + enum rtx_code code = GET_CODE (*iter); + not_bit_p |= code == NOT || code == XOR || code == GE; + } + + // Don't go too deep into the analysis. In almost all cases, + // using BLD/BST is the best we can do for single-bit moves, + // even considering CSE. + cost = COSTS_N_INSNS (2 + not_bit_p); + } + + if (cost != unknown_cost) + { + if (avr_log.rtx_costs) + avr_edump ("\n%? (%s) insn_cost=%d\n%r\n", + speed ? "speed" : "size", cost, insn); + return cost; + } + + // Resort to what rtlanal.cc::insn_cost() implements as a default + // when targetm.insn_cost() is not implemented. + + return pattern_cost (PATTERN (insn), speed); +} + + /* Implement `TARGET_ADDRESS_COST'. */ static int @@ -14574,6 +14620,8 @@ avr_float_lib_compare_returns_bool (machine_mode mode, enum rtx_code) #undef TARGET_ASM_FINAL_POSTSCAN_INSN #define TARGET_ASM_FINAL_POSTSCAN_INSN avr_asm_final_postscan_insn +#undef TARGET_INSN_COST +#define TARGET_INSN_COST avr_insn_cost #undef TARGET_REGISTER_MOVE_COST #define TARGET_REGISTER_MOVE_COST avr_register_move_cost #undef TARGET_MEMORY_MOVE_COST