* [PATCH v2 0/6] Remove "old" built-in function infrastructure @ 2021-12-06 20:49 Bill Schmidt 2021-12-06 20:49 ` [PATCH 1/6] rs6000: Remove new_builtins_are_live and dead code it was guarding Bill Schmidt ` (6 more replies) 0 siblings, 7 replies; 20+ messages in thread From: Bill Schmidt @ 2021-12-06 20:49 UTC (permalink / raw) To: gcc-patches; +Cc: segher, dje.gcc Hi! Now that the new built-in function support is all upstream and enabled, it seems safe and prudent to remove the old code to avoid confusion. I broke this up to the extent possible, but a couple of patches are still pretty large. David Edelsohn found that I had broken some C++ library functions for AIX, and his fix for that required me to re-spin the patches. I also generated the diff with a more efficient algorithm to reduce the patch size. Otherwise this series is identical to V1. Thanks! Bill Bill Schmidt (6): rs6000: Remove new_builtins_are_live and dead code it was guarding rs6000: Remove altivec_overloaded_builtins array and initialization rs6000: Rename rs6000-builtin-new.def to rs6000-builtins.def rs6000: Remove rs6000-builtin.def and associated data and functions rs6000: Rename functions with "new" in their names rs6000: Rename arrays to remove temporary _x suffix gcc/config/rs6000/darwin.h | 8 +- gcc/config/rs6000/rs6000-builtin.def | 3350 ----- ...00-builtin-new.def => rs6000-builtins.def} | 0 gcc/config/rs6000/rs6000-c.c | 1266 +- gcc/config/rs6000/rs6000-call.c | 11964 +--------------- gcc/config/rs6000/rs6000-gen-builtins.c | 115 +- gcc/config/rs6000/rs6000-internal.h | 2 +- gcc/config/rs6000/rs6000-protos.h | 3 - gcc/config/rs6000/rs6000.c | 334 +- gcc/config/rs6000/rs6000.h | 58 - gcc/config/rs6000/t-rs6000 | 7 +- 11 files changed, 224 insertions(+), 16883 deletions(-) delete mode 100644 gcc/config/rs6000/rs6000-builtin.def rename gcc/config/rs6000/{rs6000-builtin-new.def => rs6000-builtins.def} (100%) -- 2.27.0 ^ permalink raw reply [flat|nested] 20+ messages in thread
* [PATCH 1/6] rs6000: Remove new_builtins_are_live and dead code it was guarding 2021-12-06 20:49 [PATCH v2 0/6] Remove "old" built-in function infrastructure Bill Schmidt @ 2021-12-06 20:49 ` Bill Schmidt 2021-12-07 1:09 ` Segher Boessenkool 2021-12-06 20:49 ` [PATCH 2/6] rs6000: Remove altivec_overloaded_builtins array and initialization Bill Schmidt ` (5 subsequent siblings) 6 siblings, 1 reply; 20+ messages in thread From: Bill Schmidt @ 2021-12-06 20:49 UTC (permalink / raw) To: gcc-patches; +Cc: segher, dje.gcc Hi! To allow for a sane switch-over from the old built-in infrastructure to the new, both sets of code have co-existed, with the enabled one under the control of the boolean variable new_builtins_are_live. As a first step in removing the old code, remove this variable and the now-dead code it was guarding. Bootstrapped and tested on powerpc64le-linux-gnu with no regressions. Is this okay for trunk? Thanks! Bill 2021-12-06 Bill Schmidt <wschmidt@linux.ibm.com> gcc/ * config/rs6000/darwin.h (SUBTARGET_INIT_BUILTINS): Remove test for new_builtins_are_live and simplify. * config/rs6000/rs6000-c.c (altivec_build_resolved_builtin): Remove dead function. (altivec_resolve_overloaded_builtin): Remove test for new_builtins_are_live and simplify. * config/rs6000/rs6000-call.c (altivec_init_builtins): Remove forward declaration. (builtin_function_type): Likewise. (rs6000_common_init_builtins): Likewise. (htm_init_builtins): Likewise. (mma_init_builtins): Likewise. (def_builtin): Remove dead function. (rs6000_expand_zeroop_builtin): Likewise. (rs6000_expand_mtfsf_builtin): Likewise. (rs6000_expand_mtfsb_builtin): Likewise. (rs6000_expand_set_fpscr_rn_builtin): Likewise. (rs6000_expand_set_fpscr_drn_builtin): Likewise. (rs6000_expand_unop_builtin): Likewise. (altivec_expand_abs_builtin): Likewise. (rs6000_expand_binop_builtin): Likewise. (altivec_expand_lxvr_builtin): Likewise. (altivec_expand_lv_builtin): Likewise. (altivec_expand_stxvl_builtin): Likewise. (altivec_expand_stv_builtin): Likewise. (mma_expand_builtin): Likewise. (htm_expand_builtin): Likewise. (cpu_expand_builtin): Likewise. (rs6000_expand_quaternop_builtin): Likewise. (rs6000_expand_ternop_builtin): Likewise. (altivec_expand_dst_builtin): Likewise. (altivec_expand_vec_sel_builtin): Likewise. (altivec_expand_builtin): Likewise. (rs6000_invalid_builtin): Likewise. (rs6000_builtin_valid_without_lhs): Likewise. (rs6000_gimple_fold_builtin): Remove test for new_builtins_are_live and simplify. (rs6000_expand_builtin): Likewise. (rs6000_init_builtins): Remove tests for new_builtins_are_live and simplify. (rs6000_builtin_decl): Likewise. (altivec_init_builtins): Remove dead function. (mma_init_builtins): Likewise. (htm_init_builtins): Likewise. (builtin_quaternary_function_type): Likewise. (builtin_function_type): Likewise. (rs6000_common_init_builtins): Likewise. * config/rs6000/rs6000-gen-builtins.c (write_header_file): Don't declare new_builtins_are_live. (write_init_bif_table): In generated code, remove test for new_builtins_are_live and simplify. (write_init_ovld_table): Likewise. (write_init_file): Don't initialize new_builtins_are_live. * config/rs6000/rs6000.c (rs6000_builtin_vectorized_function): Remove test for new_builtins_are_live and simplify. (rs6000_builtin_md_vectorized_function): Likewise. (rs6000_builtin_reciprocal): Likewise. (add_condition_to_bb): Likewise. (rs6000_atomic_assign_expand_fenv): Likewise. --- gcc/config/rs6000/darwin.h | 8 +- gcc/config/rs6000/rs6000-c.c | 1084 +---- gcc/config/rs6000/rs6000-call.c | 5225 +---------------------- gcc/config/rs6000/rs6000-gen-builtins.c | 87 +- gcc/config/rs6000/rs6000.c | 256 +- 5 files changed, 59 insertions(+), 6601 deletions(-) diff --git a/gcc/config/rs6000/darwin.h b/gcc/config/rs6000/darwin.h index 120b01f9a2b..7bc1009a523 100644 --- a/gcc/config/rs6000/darwin.h +++ b/gcc/config/rs6000/darwin.h @@ -507,12 +507,8 @@ #define SUBTARGET_INIT_BUILTINS \ do { \ darwin_patch_builtins (); \ - if (new_builtins_are_live) \ - rs6000_builtin_decls_x[(unsigned) (RS6000_BIF_CFSTRING)] \ - = darwin_init_cfstring_builtins ((unsigned) (RS6000_BIF_CFSTRING)); \ - else \ - rs6000_builtin_decls[(unsigned) (RS6000_BUILTIN_CFSTRING)] \ - = darwin_init_cfstring_builtins ((unsigned) (RS6000_BUILTIN_CFSTRING)); \ + rs6000_builtin_decls_x[(unsigned) (RS6000_BIF_CFSTRING)] \ + = darwin_init_cfstring_builtins ((unsigned) (RS6000_BIF_CFSTRING)); \ } while(0) /* So far, there is no rs6000_fold_builtin, if one is introduced, then diff --git a/gcc/config/rs6000/rs6000-c.c b/gcc/config/rs6000/rs6000-c.c index 8e83d97e72f..d44edf585aa 100644 --- a/gcc/config/rs6000/rs6000-c.c +++ b/gcc/config/rs6000/rs6000-c.c @@ -873,82 +873,6 @@ fully_fold_convert (tree type, tree expr) return result; } -/* Build a tree for a function call to an Altivec non-overloaded builtin. - The overloaded builtin that matched the types and args is described - by DESC. The N arguments are given in ARGS, respectively. - - Actually the only thing it does is calling fold_convert on ARGS, with - a small exception for vec_{all,any}_{ge,le} predicates. */ - -static tree -altivec_build_resolved_builtin (tree *args, int n, - const struct altivec_builtin_types *desc) -{ - tree impl_fndecl = rs6000_builtin_decls[desc->overloaded_code]; - tree ret_type = rs6000_builtin_type (desc->ret_type); - tree argtypes = TYPE_ARG_TYPES (TREE_TYPE (impl_fndecl)); - tree arg_type[4]; - tree call; - - int i; - for (i = 0; i < n; i++) - arg_type[i] = TREE_VALUE (argtypes), argtypes = TREE_CHAIN (argtypes); - - /* The AltiVec overloading implementation is overall gross, but this - is particularly disgusting. The vec_{all,any}_{ge,le} builtins - are completely different for floating-point vs. integer vector - types, because the former has vcmpgefp, but the latter should use - vcmpgtXX. - - In practice, the second and third arguments are swapped, and the - condition (LT vs. EQ, which is recognizable by bit 1 of the first - argument) is reversed. Patch the arguments here before building - the resolved CALL_EXPR. */ - if (n == 3 - && desc->code == ALTIVEC_BUILTIN_VEC_VCMPGE_P - && desc->overloaded_code != ALTIVEC_BUILTIN_VCMPGEFP_P - && desc->overloaded_code != VSX_BUILTIN_XVCMPGEDP_P) - { - std::swap (args[1], args[2]); - std::swap (arg_type[1], arg_type[2]); - - args[0] = fold_build2 (BIT_XOR_EXPR, TREE_TYPE (args[0]), args[0], - build_int_cst (NULL_TREE, 2)); - } - - switch (n) - { - case 0: - call = build_call_expr (impl_fndecl, 0); - break; - case 1: - call = build_call_expr (impl_fndecl, 1, - fully_fold_convert (arg_type[0], args[0])); - break; - case 2: - call = build_call_expr (impl_fndecl, 2, - fully_fold_convert (arg_type[0], args[0]), - fully_fold_convert (arg_type[1], args[1])); - break; - case 3: - call = build_call_expr (impl_fndecl, 3, - fully_fold_convert (arg_type[0], args[0]), - fully_fold_convert (arg_type[1], args[1]), - fully_fold_convert (arg_type[2], args[2])); - break; - case 4: - call = build_call_expr (impl_fndecl, 4, - fully_fold_convert (arg_type[0], args[0]), - fully_fold_convert (arg_type[1], args[1]), - fully_fold_convert (arg_type[2], args[2]), - fully_fold_convert (arg_type[3], args[3])); - break; - default: - gcc_unreachable (); - } - return fold_convert (ret_type, call); -} - /* Implementation of the resolve_overloaded_builtin target hook, to support Altivec's overloaded builtins. */ @@ -956,1013 +880,7 @@ tree altivec_resolve_overloaded_builtin (location_t loc, tree fndecl, void *passed_arglist) { - if (new_builtins_are_live) - return altivec_resolve_new_overloaded_builtin (loc, fndecl, - passed_arglist); - - vec<tree, va_gc> *arglist = static_cast<vec<tree, va_gc> *> (passed_arglist); - unsigned int nargs = vec_safe_length (arglist); - enum rs6000_builtins fcode - = (enum rs6000_builtins) DECL_MD_FUNCTION_CODE (fndecl); - tree fnargs = TYPE_ARG_TYPES (TREE_TYPE (fndecl)); - tree types[4], args[4]; - const struct altivec_builtin_types *desc; - unsigned int n; - - if (!rs6000_overloaded_builtin_p (fcode)) - return NULL_TREE; - - if (TARGET_DEBUG_BUILTIN) - fprintf (stderr, "altivec_resolve_overloaded_builtin, code = %4d, %s\n", - (int)fcode, IDENTIFIER_POINTER (DECL_NAME (fndecl))); - - /* vec_lvsl and vec_lvsr are deprecated for use with LE element order. */ - if (fcode == ALTIVEC_BUILTIN_VEC_LVSL && !BYTES_BIG_ENDIAN) - warning (OPT_Wdeprecated, - "%<vec_lvsl%> is deprecated for little endian; use " - "assignment for unaligned loads and stores"); - else if (fcode == ALTIVEC_BUILTIN_VEC_LVSR && !BYTES_BIG_ENDIAN) - warning (OPT_Wdeprecated, - "%<vec_lvsr%> is deprecated for little endian; use " - "assignment for unaligned loads and stores"); - - if (fcode == ALTIVEC_BUILTIN_VEC_MUL) - { - /* vec_mul needs to be special cased because there are no instructions - for it for the {un}signed char, {un}signed short, and {un}signed int - types. */ - if (nargs != 2) - { - error ("builtin %qs only accepts 2 arguments", "vec_mul"); - return error_mark_node; - } - - tree arg0 = (*arglist)[0]; - tree arg0_type = TREE_TYPE (arg0); - tree arg1 = (*arglist)[1]; - tree arg1_type = TREE_TYPE (arg1); - - /* Both arguments must be vectors and the types must be compatible. */ - if (TREE_CODE (arg0_type) != VECTOR_TYPE) - goto bad; - if (!lang_hooks.types_compatible_p (arg0_type, arg1_type)) - goto bad; - - switch (TYPE_MODE (TREE_TYPE (arg0_type))) - { - case E_QImode: - case E_HImode: - case E_SImode: - case E_DImode: - case E_TImode: - { - /* For scalar types just use a multiply expression. */ - return fold_build2_loc (loc, MULT_EXPR, TREE_TYPE (arg0), arg0, - fold_convert (TREE_TYPE (arg0), arg1)); - } - case E_SFmode: - { - /* For floats use the xvmulsp instruction directly. */ - tree call = rs6000_builtin_decls[VSX_BUILTIN_XVMULSP]; - return build_call_expr (call, 2, arg0, arg1); - } - case E_DFmode: - { - /* For doubles use the xvmuldp instruction directly. */ - tree call = rs6000_builtin_decls[VSX_BUILTIN_XVMULDP]; - return build_call_expr (call, 2, arg0, arg1); - } - /* Other types are errors. */ - default: - goto bad; - } - } - - if (fcode == ALTIVEC_BUILTIN_VEC_CMPNE) - { - /* vec_cmpne needs to be special cased because there are no instructions - for it (prior to power 9). */ - if (nargs != 2) - { - error ("builtin %qs only accepts 2 arguments", "vec_cmpne"); - return error_mark_node; - } - - tree arg0 = (*arglist)[0]; - tree arg0_type = TREE_TYPE (arg0); - tree arg1 = (*arglist)[1]; - tree arg1_type = TREE_TYPE (arg1); - - /* Both arguments must be vectors and the types must be compatible. */ - if (TREE_CODE (arg0_type) != VECTOR_TYPE) - goto bad; - if (!lang_hooks.types_compatible_p (arg0_type, arg1_type)) - goto bad; - - /* Power9 instructions provide the most efficient implementation of - ALTIVEC_BUILTIN_VEC_CMPNE if the mode is not DImode or TImode - or SFmode or DFmode. */ - if (!TARGET_P9_VECTOR - || (TYPE_MODE (TREE_TYPE (arg0_type)) == DImode) - || (TYPE_MODE (TREE_TYPE (arg0_type)) == TImode) - || (TYPE_MODE (TREE_TYPE (arg0_type)) == SFmode) - || (TYPE_MODE (TREE_TYPE (arg0_type)) == DFmode)) - { - switch (TYPE_MODE (TREE_TYPE (arg0_type))) - { - /* vec_cmpneq (va, vb) == vec_nor (vec_cmpeq (va, vb), - vec_cmpeq (va, vb)). */ - /* Note: vec_nand also works but opt changes vec_nand's - to vec_nor's anyway. */ - case E_QImode: - case E_HImode: - case E_SImode: - case E_DImode: - case E_TImode: - case E_SFmode: - case E_DFmode: - { - /* call = vec_cmpeq (va, vb) - result = vec_nor (call, call). */ - vec<tree, va_gc> *params = make_tree_vector (); - vec_safe_push (params, arg0); - vec_safe_push (params, arg1); - tree call = altivec_resolve_overloaded_builtin - (loc, rs6000_builtin_decls[ALTIVEC_BUILTIN_VEC_CMPEQ], - params); - /* Use save_expr to ensure that operands used more than once - that may have side effects (like calls) are only evaluated - once. */ - call = save_expr (call); - params = make_tree_vector (); - vec_safe_push (params, call); - vec_safe_push (params, call); - return altivec_resolve_overloaded_builtin - (loc, rs6000_builtin_decls[ALTIVEC_BUILTIN_VEC_NOR], params); - } - /* Other types are errors. */ - default: - goto bad; - } - } - /* else, fall through and process the Power9 alternative below */ - } - - if (fcode == ALTIVEC_BUILTIN_VEC_ADDE - || fcode == ALTIVEC_BUILTIN_VEC_SUBE) - { - /* vec_adde needs to be special cased because there is no instruction - for the {un}signed int version. */ - if (nargs != 3) - { - const char *name = fcode == ALTIVEC_BUILTIN_VEC_ADDE ? - "vec_adde": "vec_sube"; - error ("builtin %qs only accepts 3 arguments", name); - return error_mark_node; - } - - tree arg0 = (*arglist)[0]; - tree arg0_type = TREE_TYPE (arg0); - tree arg1 = (*arglist)[1]; - tree arg1_type = TREE_TYPE (arg1); - tree arg2 = (*arglist)[2]; - tree arg2_type = TREE_TYPE (arg2); - - /* All 3 arguments must be vectors of (signed or unsigned) (int or - __int128) and the types must be compatible. */ - if (TREE_CODE (arg0_type) != VECTOR_TYPE) - goto bad; - if (!lang_hooks.types_compatible_p (arg0_type, arg1_type) - || !lang_hooks.types_compatible_p (arg1_type, arg2_type)) - goto bad; - - switch (TYPE_MODE (TREE_TYPE (arg0_type))) - { - /* For {un}signed ints, - vec_adde (va, vb, carryv) == vec_add (vec_add (va, vb), - vec_and (carryv, 1)). - vec_sube (va, vb, carryv) == vec_sub (vec_sub (va, vb), - vec_and (carryv, 1)). */ - case E_SImode: - { - tree add_sub_builtin; - - vec<tree, va_gc> *params = make_tree_vector (); - vec_safe_push (params, arg0); - vec_safe_push (params, arg1); - - if (fcode == ALTIVEC_BUILTIN_VEC_ADDE) - add_sub_builtin = rs6000_builtin_decls[ALTIVEC_BUILTIN_VEC_ADD]; - else - add_sub_builtin = rs6000_builtin_decls[ALTIVEC_BUILTIN_VEC_SUB]; - - tree call = altivec_resolve_overloaded_builtin (loc, - add_sub_builtin, - params); - tree const1 = build_int_cstu (TREE_TYPE (arg0_type), 1); - tree ones_vector = build_vector_from_val (arg0_type, const1); - tree and_expr = fold_build2_loc (loc, BIT_AND_EXPR, arg0_type, - arg2, ones_vector); - params = make_tree_vector (); - vec_safe_push (params, call); - vec_safe_push (params, and_expr); - return altivec_resolve_overloaded_builtin (loc, add_sub_builtin, - params); - } - /* For {un}signed __int128s use the vaddeuqm instruction - directly. */ - case E_TImode: - { - tree bii; - - if (fcode == ALTIVEC_BUILTIN_VEC_ADDE) - bii = rs6000_builtin_decls[P8V_BUILTIN_VEC_VADDEUQM]; - - else - bii = rs6000_builtin_decls[P8V_BUILTIN_VEC_VSUBEUQM]; - - return altivec_resolve_overloaded_builtin (loc, bii, arglist); - } - - /* Types other than {un}signed int and {un}signed __int128 - are errors. */ - default: - goto bad; - } - } - - if (fcode == ALTIVEC_BUILTIN_VEC_ADDEC - || fcode == ALTIVEC_BUILTIN_VEC_SUBEC) - { - /* vec_addec and vec_subec needs to be special cased because there is - no instruction for the {un}signed int version. */ - if (nargs != 3) - { - const char *name = fcode == ALTIVEC_BUILTIN_VEC_ADDEC ? - "vec_addec": "vec_subec"; - error ("builtin %qs only accepts 3 arguments", name); - return error_mark_node; - } - - tree arg0 = (*arglist)[0]; - tree arg0_type = TREE_TYPE (arg0); - tree arg1 = (*arglist)[1]; - tree arg1_type = TREE_TYPE (arg1); - tree arg2 = (*arglist)[2]; - tree arg2_type = TREE_TYPE (arg2); - - /* All 3 arguments must be vectors of (signed or unsigned) (int or - __int128) and the types must be compatible. */ - if (TREE_CODE (arg0_type) != VECTOR_TYPE) - goto bad; - if (!lang_hooks.types_compatible_p (arg0_type, arg1_type) - || !lang_hooks.types_compatible_p (arg1_type, arg2_type)) - goto bad; - - switch (TYPE_MODE (TREE_TYPE (arg0_type))) - { - /* For {un}signed ints, - vec_addec (va, vb, carryv) == - vec_or (vec_addc (va, vb), - vec_addc (vec_add (va, vb), - vec_and (carryv, 0x1))). */ - case E_SImode: - { - /* Use save_expr to ensure that operands used more than once - that may have side effects (like calls) are only evaluated - once. */ - tree as_builtin; - tree as_c_builtin; - - arg0 = save_expr (arg0); - arg1 = save_expr (arg1); - vec<tree, va_gc> *params = make_tree_vector (); - vec_safe_push (params, arg0); - vec_safe_push (params, arg1); - - if (fcode == ALTIVEC_BUILTIN_VEC_ADDEC) - as_c_builtin = rs6000_builtin_decls[ALTIVEC_BUILTIN_VEC_ADDC]; - else - as_c_builtin = rs6000_builtin_decls[ALTIVEC_BUILTIN_VEC_SUBC]; - - tree call1 = altivec_resolve_overloaded_builtin (loc, as_c_builtin, - params); - params = make_tree_vector (); - vec_safe_push (params, arg0); - vec_safe_push (params, arg1); - - - if (fcode == ALTIVEC_BUILTIN_VEC_ADDEC) - as_builtin = rs6000_builtin_decls[ALTIVEC_BUILTIN_VEC_ADD]; - else - as_builtin = rs6000_builtin_decls[ALTIVEC_BUILTIN_VEC_SUB]; - - tree call2 = altivec_resolve_overloaded_builtin (loc, as_builtin, - params); - tree const1 = build_int_cstu (TREE_TYPE (arg0_type), 1); - tree ones_vector = build_vector_from_val (arg0_type, const1); - tree and_expr = fold_build2_loc (loc, BIT_AND_EXPR, arg0_type, - arg2, ones_vector); - params = make_tree_vector (); - vec_safe_push (params, call2); - vec_safe_push (params, and_expr); - call2 = altivec_resolve_overloaded_builtin (loc, as_c_builtin, - params); - params = make_tree_vector (); - vec_safe_push (params, call1); - vec_safe_push (params, call2); - tree or_builtin = rs6000_builtin_decls[ALTIVEC_BUILTIN_VEC_OR]; - return altivec_resolve_overloaded_builtin (loc, or_builtin, - params); - } - /* For {un}signed __int128s use the vaddecuq/vsubbecuq - instructions. */ - case E_TImode: - { - tree bii; - - if (fcode == ALTIVEC_BUILTIN_VEC_ADDEC) - bii = rs6000_builtin_decls[P8V_BUILTIN_VEC_VADDECUQ]; - - else - bii = rs6000_builtin_decls[P8V_BUILTIN_VEC_VSUBECUQ]; - - return altivec_resolve_overloaded_builtin (loc, bii, arglist); - } - /* Types other than {un}signed int and {un}signed __int128 - are errors. */ - default: - goto bad; - } - } - - /* For now treat vec_splats and vec_promote as the same. */ - if (fcode == ALTIVEC_BUILTIN_VEC_SPLATS - || fcode == ALTIVEC_BUILTIN_VEC_PROMOTE) - { - tree type, arg; - int size; - int i; - bool unsigned_p; - vec<constructor_elt, va_gc> *vec; - const char *name = fcode == ALTIVEC_BUILTIN_VEC_SPLATS ? "vec_splats": "vec_promote"; - - if (fcode == ALTIVEC_BUILTIN_VEC_SPLATS && nargs != 1) - { - error ("builtin %qs only accepts 1 argument", name); - return error_mark_node; - } - if (fcode == ALTIVEC_BUILTIN_VEC_PROMOTE && nargs != 2) - { - error ("builtin %qs only accepts 2 arguments", name); - return error_mark_node; - } - /* Ignore promote's element argument. */ - if (fcode == ALTIVEC_BUILTIN_VEC_PROMOTE - && !INTEGRAL_TYPE_P (TREE_TYPE ((*arglist)[1]))) - goto bad; - - arg = (*arglist)[0]; - type = TREE_TYPE (arg); - if (!SCALAR_FLOAT_TYPE_P (type) - && !INTEGRAL_TYPE_P (type)) - goto bad; - unsigned_p = TYPE_UNSIGNED (type); - switch (TYPE_MODE (type)) - { - case E_TImode: - type = (unsigned_p ? unsigned_V1TI_type_node : V1TI_type_node); - size = 1; - break; - case E_DImode: - type = (unsigned_p ? unsigned_V2DI_type_node : V2DI_type_node); - size = 2; - break; - case E_SImode: - type = (unsigned_p ? unsigned_V4SI_type_node : V4SI_type_node); - size = 4; - break; - case E_HImode: - type = (unsigned_p ? unsigned_V8HI_type_node : V8HI_type_node); - size = 8; - break; - case E_QImode: - type = (unsigned_p ? unsigned_V16QI_type_node : V16QI_type_node); - size = 16; - break; - case E_SFmode: type = V4SF_type_node; size = 4; break; - case E_DFmode: type = V2DF_type_node; size = 2; break; - default: - goto bad; - } - arg = save_expr (fold_convert (TREE_TYPE (type), arg)); - vec_alloc (vec, size); - for(i = 0; i < size; i++) - { - constructor_elt elt = {NULL_TREE, arg}; - vec->quick_push (elt); - } - return build_constructor (type, vec); - } - - /* For now use pointer tricks to do the extraction, unless we are on VSX - extracting a double from a constant offset. */ - if (fcode == ALTIVEC_BUILTIN_VEC_EXTRACT) - { - tree arg1; - tree arg1_type; - tree arg2; - tree arg1_inner_type; - tree decl, stmt; - tree innerptrtype; - machine_mode mode; - - /* No second argument. */ - if (nargs != 2) - { - error ("builtin %qs only accepts 2 arguments", "vec_extract"); - return error_mark_node; - } - - arg2 = (*arglist)[1]; - arg1 = (*arglist)[0]; - arg1_type = TREE_TYPE (arg1); - - if (TREE_CODE (arg1_type) != VECTOR_TYPE) - goto bad; - if (!INTEGRAL_TYPE_P (TREE_TYPE (arg2))) - goto bad; - - /* See if we can optimize vec_extracts with the current VSX instruction - set. */ - mode = TYPE_MODE (arg1_type); - if (VECTOR_MEM_VSX_P (mode)) - - { - tree call = NULL_TREE; - int nunits = GET_MODE_NUNITS (mode); - - arg2 = fold_for_warn (arg2); - - /* If the second argument is an integer constant, generate - the built-in code if we can. We need 64-bit and direct - move to extract the small integer vectors. */ - if (TREE_CODE (arg2) == INTEGER_CST) - { - wide_int selector = wi::to_wide (arg2); - selector = wi::umod_trunc (selector, nunits); - arg2 = wide_int_to_tree (TREE_TYPE (arg2), selector); - switch (mode) - { - default: - break; - - case E_V1TImode: - call = rs6000_builtin_decls[VSX_BUILTIN_VEC_EXT_V1TI]; - break; - - case E_V2DFmode: - call = rs6000_builtin_decls[VSX_BUILTIN_VEC_EXT_V2DF]; - break; - - case E_V2DImode: - call = rs6000_builtin_decls[VSX_BUILTIN_VEC_EXT_V2DI]; - break; - - case E_V4SFmode: - call = rs6000_builtin_decls[ALTIVEC_BUILTIN_VEC_EXT_V4SF]; - break; - - case E_V4SImode: - if (TARGET_DIRECT_MOVE_64BIT) - call = rs6000_builtin_decls[ALTIVEC_BUILTIN_VEC_EXT_V4SI]; - break; - - case E_V8HImode: - if (TARGET_DIRECT_MOVE_64BIT) - call = rs6000_builtin_decls[ALTIVEC_BUILTIN_VEC_EXT_V8HI]; - break; - - case E_V16QImode: - if (TARGET_DIRECT_MOVE_64BIT) - call = rs6000_builtin_decls[ALTIVEC_BUILTIN_VEC_EXT_V16QI]; - break; - } - } - - /* If the second argument is variable, we can optimize it if we are - generating 64-bit code on a machine with direct move. */ - else if (TREE_CODE (arg2) != INTEGER_CST && TARGET_DIRECT_MOVE_64BIT) - { - switch (mode) - { - default: - break; - - case E_V2DFmode: - call = rs6000_builtin_decls[VSX_BUILTIN_VEC_EXT_V2DF]; - break; - - case E_V2DImode: - call = rs6000_builtin_decls[VSX_BUILTIN_VEC_EXT_V2DI]; - break; - - case E_V4SFmode: - call = rs6000_builtin_decls[ALTIVEC_BUILTIN_VEC_EXT_V4SF]; - break; - - case E_V4SImode: - call = rs6000_builtin_decls[ALTIVEC_BUILTIN_VEC_EXT_V4SI]; - break; - - case E_V8HImode: - call = rs6000_builtin_decls[ALTIVEC_BUILTIN_VEC_EXT_V8HI]; - break; - - case E_V16QImode: - call = rs6000_builtin_decls[ALTIVEC_BUILTIN_VEC_EXT_V16QI]; - break; - } - } - - if (call) - { - tree result = build_call_expr (call, 2, arg1, arg2); - /* Coerce the result to vector element type. May be no-op. */ - arg1_inner_type = TREE_TYPE (arg1_type); - result = fold_convert (arg1_inner_type, result); - return result; - } - } - - /* Build *(((arg1_inner_type*)&(vector type){arg1})+arg2). */ - arg1_inner_type = TREE_TYPE (arg1_type); - arg2 = build_binary_op (loc, BIT_AND_EXPR, arg2, - build_int_cst (TREE_TYPE (arg2), - TYPE_VECTOR_SUBPARTS (arg1_type) - - 1), 0); - decl = build_decl (loc, VAR_DECL, NULL_TREE, arg1_type); - DECL_EXTERNAL (decl) = 0; - TREE_PUBLIC (decl) = 0; - DECL_CONTEXT (decl) = current_function_decl; - TREE_USED (decl) = 1; - TREE_TYPE (decl) = arg1_type; - TREE_READONLY (decl) = TYPE_READONLY (arg1_type); - if (c_dialect_cxx ()) - { - stmt = build4 (TARGET_EXPR, arg1_type, decl, arg1, - NULL_TREE, NULL_TREE); - SET_EXPR_LOCATION (stmt, loc); - } - else - { - DECL_INITIAL (decl) = arg1; - stmt = build1 (DECL_EXPR, arg1_type, decl); - TREE_ADDRESSABLE (decl) = 1; - SET_EXPR_LOCATION (stmt, loc); - stmt = build1 (COMPOUND_LITERAL_EXPR, arg1_type, stmt); - } - - innerptrtype = build_pointer_type (arg1_inner_type); - - stmt = build_unary_op (loc, ADDR_EXPR, stmt, 0); - stmt = convert (innerptrtype, stmt); - stmt = build_binary_op (loc, PLUS_EXPR, stmt, arg2, 1); - stmt = build_indirect_ref (loc, stmt, RO_NULL); - - /* PR83660: We mark this as having side effects so that - downstream in fold_build_cleanup_point_expr () it will get a - CLEANUP_POINT_EXPR. If it does not we can run into an ICE - later in gimplify_cleanup_point_expr (). Potentially this - causes missed optimization because the actually is no side - effect. */ - if (c_dialect_cxx ()) - TREE_SIDE_EFFECTS (stmt) = 1; - - return stmt; - } - - /* For now use pointer tricks to do the insertion, unless we are on VSX - inserting a double to a constant offset.. */ - if (fcode == ALTIVEC_BUILTIN_VEC_INSERT) - { - tree arg0; - tree arg1; - tree arg2; - tree arg1_type; - tree decl, stmt; - machine_mode mode; - - /* No second or third arguments. */ - if (nargs != 3) - { - error ("builtin %qs only accepts 3 arguments", "vec_insert"); - return error_mark_node; - } - - arg0 = (*arglist)[0]; - arg1 = (*arglist)[1]; - arg1_type = TREE_TYPE (arg1); - arg2 = fold_for_warn ((*arglist)[2]); - - if (TREE_CODE (arg1_type) != VECTOR_TYPE) - goto bad; - if (!INTEGRAL_TYPE_P (TREE_TYPE (arg2))) - goto bad; - - /* If we can use the VSX xxpermdi instruction, use that for insert. */ - mode = TYPE_MODE (arg1_type); - if ((mode == V2DFmode || mode == V2DImode) && VECTOR_UNIT_VSX_P (mode) - && TREE_CODE (arg2) == INTEGER_CST) - { - wide_int selector = wi::to_wide (arg2); - selector = wi::umod_trunc (selector, 2); - tree call = NULL_TREE; - - arg2 = wide_int_to_tree (TREE_TYPE (arg2), selector); - if (mode == V2DFmode) - call = rs6000_builtin_decls[VSX_BUILTIN_VEC_SET_V2DF]; - else if (mode == V2DImode) - call = rs6000_builtin_decls[VSX_BUILTIN_VEC_SET_V2DI]; - - /* Note, __builtin_vec_insert_<xxx> has vector and scalar types - reversed. */ - if (call) - return build_call_expr (call, 3, arg1, arg0, arg2); - } - else if (mode == V1TImode && VECTOR_UNIT_VSX_P (mode) - && TREE_CODE (arg2) == INTEGER_CST) - { - tree call = rs6000_builtin_decls[VSX_BUILTIN_VEC_SET_V1TI]; - wide_int selector = wi::zero(32); - - arg2 = wide_int_to_tree (TREE_TYPE (arg2), selector); - /* Note, __builtin_vec_insert_<xxx> has vector and scalar types - reversed. */ - return build_call_expr (call, 3, arg1, arg0, arg2); - } - - /* Build *(((arg1_inner_type*)&(vector type){arg1})+arg2) = arg0 with - VIEW_CONVERT_EXPR. i.e.: - D.3192 = v1; - _1 = n & 3; - VIEW_CONVERT_EXPR<int[4]>(D.3192)[_1] = i; - v1 = D.3192; - D.3194 = v1; */ - if (TYPE_VECTOR_SUBPARTS (arg1_type) == 1) - arg2 = build_int_cst (TREE_TYPE (arg2), 0); - else - arg2 = build_binary_op (loc, BIT_AND_EXPR, arg2, - build_int_cst (TREE_TYPE (arg2), - TYPE_VECTOR_SUBPARTS (arg1_type) - - 1), 0); - decl = build_decl (loc, VAR_DECL, NULL_TREE, arg1_type); - DECL_EXTERNAL (decl) = 0; - TREE_PUBLIC (decl) = 0; - DECL_CONTEXT (decl) = current_function_decl; - TREE_USED (decl) = 1; - TREE_TYPE (decl) = arg1_type; - TREE_READONLY (decl) = TYPE_READONLY (arg1_type); - TREE_ADDRESSABLE (decl) = 1; - if (c_dialect_cxx ()) - { - stmt = build4 (TARGET_EXPR, arg1_type, decl, arg1, - NULL_TREE, NULL_TREE); - SET_EXPR_LOCATION (stmt, loc); - } - else - { - DECL_INITIAL (decl) = arg1; - stmt = build1 (DECL_EXPR, arg1_type, decl); - SET_EXPR_LOCATION (stmt, loc); - stmt = build1 (COMPOUND_LITERAL_EXPR, arg1_type, stmt); - } - - if (TARGET_VSX) - { - stmt = build_array_ref (loc, stmt, arg2); - stmt = fold_build2 (MODIFY_EXPR, TREE_TYPE (arg0), stmt, - convert (TREE_TYPE (stmt), arg0)); - stmt = build2 (COMPOUND_EXPR, arg1_type, stmt, decl); - } - else - { - tree arg1_inner_type; - tree innerptrtype; - arg1_inner_type = TREE_TYPE (arg1_type); - innerptrtype = build_pointer_type (arg1_inner_type); - - stmt = build_unary_op (loc, ADDR_EXPR, stmt, 0); - stmt = convert (innerptrtype, stmt); - stmt = build_binary_op (loc, PLUS_EXPR, stmt, arg2, 1); - stmt = build_indirect_ref (loc, stmt, RO_NULL); - stmt = build2 (MODIFY_EXPR, TREE_TYPE (stmt), stmt, - convert (TREE_TYPE (stmt), arg0)); - stmt = build2 (COMPOUND_EXPR, arg1_type, stmt, decl); - } - return stmt; - } - - for (n = 0; - !VOID_TYPE_P (TREE_VALUE (fnargs)) && n < nargs; - fnargs = TREE_CHAIN (fnargs), n++) - { - tree decl_type = TREE_VALUE (fnargs); - tree arg = (*arglist)[n]; - tree type; - - if (arg == error_mark_node) - return error_mark_node; - - if (n >= 4) - abort (); - - arg = default_conversion (arg); - - /* The C++ front-end converts float * to const void * using - NOP_EXPR<const void *> (NOP_EXPR<void *> (x)). */ - type = TREE_TYPE (arg); - if (POINTER_TYPE_P (type) - && TREE_CODE (arg) == NOP_EXPR - && lang_hooks.types_compatible_p (TREE_TYPE (arg), - const_ptr_type_node) - && lang_hooks.types_compatible_p (TREE_TYPE (TREE_OPERAND (arg, 0)), - ptr_type_node)) - { - arg = TREE_OPERAND (arg, 0); - type = TREE_TYPE (arg); - } - - /* Remove the const from the pointers to simplify the overload - matching further down. */ - if (POINTER_TYPE_P (decl_type) - && POINTER_TYPE_P (type) - && TYPE_QUALS (TREE_TYPE (type)) != 0) - { - if (TYPE_READONLY (TREE_TYPE (type)) - && !TYPE_READONLY (TREE_TYPE (decl_type))) - warning (0, "passing argument %d of %qE discards qualifiers from " - "pointer target type", n + 1, fndecl); - type = build_pointer_type (build_qualified_type (TREE_TYPE (type), - 0)); - arg = fold_convert (type, arg); - } - - /* For P9V_BUILTIN_VEC_LXVL, convert any const * to its non constant - equivalent to simplify the overload matching below. */ - if (fcode == P9V_BUILTIN_VEC_LXVL) - { - if (POINTER_TYPE_P (type) - && TYPE_READONLY (TREE_TYPE (type))) - { - type = build_pointer_type (build_qualified_type ( - TREE_TYPE (type),0)); - arg = fold_convert (type, arg); - } - } - - args[n] = arg; - types[n] = type; - } - - /* If the number of arguments did not match the prototype, return NULL - and the generic code will issue the appropriate error message. */ - if (!VOID_TYPE_P (TREE_VALUE (fnargs)) || n < nargs) - return NULL; - - if (n == 0) - abort (); - - if (fcode == ALTIVEC_BUILTIN_VEC_STEP) - { - if (TREE_CODE (types[0]) != VECTOR_TYPE) - goto bad; - - return build_int_cst (NULL_TREE, TYPE_VECTOR_SUBPARTS (types[0])); - } - - { - bool unsupported_builtin = false; - enum rs6000_builtins overloaded_code; - tree result = NULL; - for (desc = altivec_overloaded_builtins; - desc->code && desc->code != fcode; desc++) - continue; - - /* Need to special case __builtin_cmp because the overloaded forms - of this function take (unsigned int, unsigned int) or (unsigned - long long int, unsigned long long int). Since C conventions - allow the respective argument types to be implicitly coerced into - each other, the default handling does not provide adequate - discrimination between the desired forms of the function. */ - if (fcode == P6_OV_BUILTIN_CMPB) - { - machine_mode arg1_mode = TYPE_MODE (types[0]); - machine_mode arg2_mode = TYPE_MODE (types[1]); - - if (nargs != 2) - { - error ("builtin %qs only accepts 2 arguments", "__builtin_cmpb"); - return error_mark_node; - } - - /* If any supplied arguments are wider than 32 bits, resolve to - 64-bit variant of built-in function. */ - if ((GET_MODE_PRECISION (arg1_mode) > 32) - || (GET_MODE_PRECISION (arg2_mode) > 32)) - { - /* Assure all argument and result types are compatible with - the built-in function represented by P6_BUILTIN_CMPB. */ - overloaded_code = P6_BUILTIN_CMPB; - } - else - { - /* Assure all argument and result types are compatible with - the built-in function represented by P6_BUILTIN_CMPB_32. */ - overloaded_code = P6_BUILTIN_CMPB_32; - } - - while (desc->code && desc->code == fcode - && desc->overloaded_code != overloaded_code) - desc++; - - if (desc->code && (desc->code == fcode) - && rs6000_builtin_type_compatible (types[0], desc->op1) - && rs6000_builtin_type_compatible (types[1], desc->op2)) - { - if (rs6000_builtin_decls[desc->overloaded_code] != NULL_TREE) - { - result = altivec_build_resolved_builtin (args, n, desc); - /* overloaded_code is set above */ - if (!rs6000_builtin_is_supported_p (overloaded_code)) - unsupported_builtin = true; - else - return result; - } - else - unsupported_builtin = true; - } - } - else if (fcode == P9V_BUILTIN_VEC_VSIEDP) - { - machine_mode arg1_mode = TYPE_MODE (types[0]); - - if (nargs != 2) - { - error ("builtin %qs only accepts 2 arguments", - "scalar_insert_exp"); - return error_mark_node; - } - - /* If supplied first argument is wider than 64 bits, resolve to - 128-bit variant of built-in function. */ - if (GET_MODE_PRECISION (arg1_mode) > 64) - { - /* If first argument is of float variety, choose variant - that expects __ieee128 argument. Otherwise, expect - __int128 argument. */ - if (GET_MODE_CLASS (arg1_mode) == MODE_FLOAT) - overloaded_code = P9V_BUILTIN_VSIEQPF; - else - overloaded_code = P9V_BUILTIN_VSIEQP; - } - else - { - /* If first argument is of float variety, choose variant - that expects double argument. Otherwise, expect - long long int argument. */ - if (GET_MODE_CLASS (arg1_mode) == MODE_FLOAT) - overloaded_code = P9V_BUILTIN_VSIEDPF; - else - overloaded_code = P9V_BUILTIN_VSIEDP; - } - while (desc->code && desc->code == fcode - && desc->overloaded_code != overloaded_code) - desc++; - - if (desc->code && (desc->code == fcode) - && rs6000_builtin_type_compatible (types[0], desc->op1) - && rs6000_builtin_type_compatible (types[1], desc->op2)) - { - if (rs6000_builtin_decls[desc->overloaded_code] != NULL_TREE) - { - result = altivec_build_resolved_builtin (args, n, desc); - /* overloaded_code is set above. */ - if (!rs6000_builtin_is_supported_p (overloaded_code)) - unsupported_builtin = true; - else - return result; - } - else - unsupported_builtin = true; - } - } - else if ((fcode == P10_BUILTIN_VEC_XXEVAL) - || (fcode == P10V_BUILTIN_VXXPERMX)) - { - signed char op3_type; - - /* Need to special case P10_BUILTIN_VEC_XXEVAL and - P10V_BUILTIN_VXXPERMX because they take 4 arguments and the - existing infrastructure only handles three. */ - if (nargs != 4) - { - const char *name = fcode == P10_BUILTIN_VEC_XXEVAL ? - "__builtin_vec_xxeval":"__builtin_vec_xxpermx"; - - error ("builtin %qs requires 4 arguments", name); - return error_mark_node; - } - - for ( ; desc->code == fcode; desc++) - { - if (fcode == P10_BUILTIN_VEC_XXEVAL) - op3_type = desc->op3; - else /* P10V_BUILTIN_VXXPERMX */ - op3_type = RS6000_BTI_V16QI; - - if (rs6000_builtin_type_compatible (types[0], desc->op1) - && rs6000_builtin_type_compatible (types[1], desc->op2) - && rs6000_builtin_type_compatible (types[2], desc->op3) - && rs6000_builtin_type_compatible (types[2], op3_type) - && rs6000_builtin_type_compatible (types[3], - RS6000_BTI_UINTSI)) - { - if (rs6000_builtin_decls[desc->overloaded_code] == NULL_TREE) - unsupported_builtin = true; - else - { - result = altivec_build_resolved_builtin (args, n, desc); - if (rs6000_builtin_is_supported_p (desc->overloaded_code)) - return result; - /* Allow loop to continue in case a different - definition is supported. */ - overloaded_code = desc->overloaded_code; - unsupported_builtin = true; - } - } - } - } - else - { - /* For arguments after the last, we have RS6000_BTI_NOT_OPAQUE in - the opX fields. */ - for (; desc->code == fcode; desc++) - { - if ((desc->op1 == RS6000_BTI_NOT_OPAQUE - || rs6000_builtin_type_compatible (types[0], desc->op1)) - && (desc->op2 == RS6000_BTI_NOT_OPAQUE - || rs6000_builtin_type_compatible (types[1], desc->op2)) - && (desc->op3 == RS6000_BTI_NOT_OPAQUE - || rs6000_builtin_type_compatible (types[2], desc->op3))) - { - if (rs6000_builtin_decls[desc->overloaded_code] != NULL_TREE) - { - result = altivec_build_resolved_builtin (args, n, desc); - if (!rs6000_builtin_is_supported_p (desc->overloaded_code)) - { - /* Allow loop to continue in case a different - definition is supported. */ - overloaded_code = desc->overloaded_code; - unsupported_builtin = true; - } - else - return result; - } - else - unsupported_builtin = true; - } - } - } - - if (unsupported_builtin) - { - const char *name = rs6000_overloaded_builtin_name (fcode); - if (result != NULL) - { - const char *internal_name - = rs6000_overloaded_builtin_name (overloaded_code); - /* An error message making reference to the name of the - non-overloaded function has already been issued. Add - clarification of the previous message. */ - rich_location richloc (line_table, input_location); - inform (&richloc, - "overloaded builtin %qs is implemented by builtin %qs", - name, internal_name); - } - else - error ("%qs is not supported in this compiler configuration", name); - /* If an error-representing result tree was returned from - altivec_build_resolved_builtin above, use it. */ - return (result != NULL) ? result : error_mark_node; - } - } - bad: - { - const char *name = rs6000_overloaded_builtin_name (fcode); - error ("invalid parameter combination for AltiVec intrinsic %qs", name); - return error_mark_node; - } + return altivec_resolve_new_overloaded_builtin (loc, fndecl, passed_arglist); } /* Build a tree for a function call to an Altivec non-overloaded builtin. diff --git a/gcc/config/rs6000/rs6000-call.c b/gcc/config/rs6000/rs6000-call.c index d9736eaf21c..175d26186d3 100644 --- a/gcc/config/rs6000/rs6000-call.c +++ b/gcc/config/rs6000/rs6000-call.c @@ -182,13 +182,6 @@ static const struct { "mma", PPC_FEATURE2_MMA, 1 }, }; -static void altivec_init_builtins (void); -static tree builtin_function_type (machine_mode, machine_mode, - machine_mode, machine_mode, - enum rs6000_builtins, const char *name); -static void rs6000_common_init_builtins (void); -static void htm_init_builtins (void); -static void mma_init_builtins (void); static rtx rs6000_expand_new_builtin (tree, rtx, rtx, machine_mode, int); static bool rs6000_gimple_fold_new_builtin (gimple_stmt_iterator *gsi); @@ -9029,89 +9022,6 @@ const char *rs6000_type_string (tree type_node) return "unknown"; } -static void -def_builtin (const char *name, tree type, enum rs6000_builtins code) -{ - tree t; - unsigned classify = rs6000_builtin_info[(int)code].attr; - const char *attr_string = ""; - - /* Don't define the builtin if it doesn't have a type. See PR92661. */ - if (type == NULL_TREE) - return; - - gcc_assert (name != NULL); - gcc_assert (IN_RANGE ((int)code, 0, (int)RS6000_BUILTIN_COUNT)); - - if (rs6000_builtin_decls[(int)code]) - fatal_error (input_location, - "internal error: builtin function %qs already processed", - name); - - rs6000_builtin_decls[(int)code] = t = - add_builtin_function (name, type, (int)code, BUILT_IN_MD, NULL, NULL_TREE); - - /* Set any special attributes. */ - if ((classify & RS6000_BTC_CONST) != 0) - { - /* const function, function only depends on the inputs. */ - TREE_READONLY (t) = 1; - TREE_NOTHROW (t) = 1; - attr_string = "= const"; - } - else if ((classify & RS6000_BTC_PURE) != 0) - { - /* pure function, function can read global memory, but does not set any - external state. */ - DECL_PURE_P (t) = 1; - TREE_NOTHROW (t) = 1; - attr_string = "= pure"; - } - else if ((classify & RS6000_BTC_FP) != 0) - { - /* Function is a math function. If rounding mode is on, then treat the - function as not reading global memory, but it can have arbitrary side - effects. If it is off, then assume the function is a const function. - This mimics the ATTR_MATHFN_FPROUNDING attribute in - builtin-attribute.def that is used for the math functions. */ - TREE_NOTHROW (t) = 1; - if (flag_rounding_math) - { - DECL_PURE_P (t) = 1; - DECL_IS_NOVOPS (t) = 1; - attr_string = "= fp, pure"; - } - else - { - TREE_READONLY (t) = 1; - attr_string = "= fp, const"; - } - } - else if ((classify & (RS6000_BTC_QUAD | RS6000_BTC_PAIR)) != 0) - /* The function uses a register quad and/or pair. Nothing to do. */ - ; - else if ((classify & RS6000_BTC_ATTR_MASK) != 0) - gcc_unreachable (); - - if (TARGET_DEBUG_BUILTIN) - { - tree t = TREE_TYPE (type); - fprintf (stderr, "%s %s (", rs6000_type_string (t), name); - t = TYPE_ARG_TYPES (type); - gcc_assert (t); - - while (TREE_VALUE (t) != void_type_node) - { - fprintf (stderr, "%s", rs6000_type_string (TREE_VALUE (t))); - t = TREE_CHAIN (t); - gcc_assert (t); - if (TREE_VALUE (t) != void_type_node) - fprintf (stderr, ", "); - } - fprintf (stderr, "); %s [%4d]\n", attr_string, (int) code); - } -} - static const struct builtin_compatibility bdesc_compat[] = { #define RS6000_BUILTIN_COMPAT @@ -9473,443 +9383,6 @@ rs6000_overloaded_builtin_name (enum rs6000_builtins fncode) return rs6000_builtin_info[(int)fncode].name; } -/* Expand an expression EXP that calls a builtin without arguments. */ -static rtx -rs6000_expand_zeroop_builtin (enum insn_code icode, rtx target) -{ - rtx pat; - machine_mode tmode = insn_data[icode].operand[0].mode; - - if (icode == CODE_FOR_nothing) - /* Builtin not supported on this processor. */ - return 0; - - if (icode == CODE_FOR_rs6000_mffsl - && rs6000_isa_flags & OPTION_MASK_SOFT_FLOAT) - { - error ("%<__builtin_mffsl%> not supported with %<-msoft-float%>"); - return const0_rtx; - } - - if (target == 0 - || GET_MODE (target) != tmode - || ! (*insn_data[icode].operand[0].predicate) (target, tmode)) - target = gen_reg_rtx (tmode); - - pat = GEN_FCN (icode) (target); - if (! pat) - return 0; - emit_insn (pat); - - return target; -} - - -static rtx -rs6000_expand_mtfsf_builtin (enum insn_code icode, tree exp) -{ - rtx pat; - tree arg0 = CALL_EXPR_ARG (exp, 0); - tree arg1 = CALL_EXPR_ARG (exp, 1); - rtx op0 = expand_normal (arg0); - rtx op1 = expand_normal (arg1); - machine_mode mode0 = insn_data[icode].operand[0].mode; - machine_mode mode1 = insn_data[icode].operand[1].mode; - - if (icode == CODE_FOR_nothing) - /* Builtin not supported on this processor. */ - return 0; - - /* If we got invalid arguments bail out before generating bad rtl. */ - if (arg0 == error_mark_node || arg1 == error_mark_node) - return const0_rtx; - - if (!CONST_INT_P (op0) - || INTVAL (op0) > 255 - || INTVAL (op0) < 0) - { - error ("argument 1 must be an 8-bit field value"); - return const0_rtx; - } - - if (! (*insn_data[icode].operand[0].predicate) (op0, mode0)) - op0 = copy_to_mode_reg (mode0, op0); - - if (! (*insn_data[icode].operand[1].predicate) (op1, mode1)) - op1 = copy_to_mode_reg (mode1, op1); - - pat = GEN_FCN (icode) (op0, op1); - if (!pat) - return const0_rtx; - emit_insn (pat); - - return NULL_RTX; -} - -static rtx -rs6000_expand_mtfsb_builtin (enum insn_code icode, tree exp) -{ - rtx pat; - tree arg0 = CALL_EXPR_ARG (exp, 0); - rtx op0 = expand_normal (arg0); - - if (icode == CODE_FOR_nothing) - /* Builtin not supported on this processor. */ - return 0; - - if (rs6000_isa_flags & OPTION_MASK_SOFT_FLOAT) - { - error ("%<__builtin_mtfsb0%> and %<__builtin_mtfsb1%> not supported with " - "%<-msoft-float%>"); - return const0_rtx; - } - - /* If we got invalid arguments bail out before generating bad rtl. */ - if (arg0 == error_mark_node) - return const0_rtx; - - /* Only allow bit numbers 0 to 31. */ - if (!u5bit_cint_operand (op0, VOIDmode)) - { - error ("Argument must be a constant between 0 and 31."); - return const0_rtx; - } - - pat = GEN_FCN (icode) (op0); - if (!pat) - return const0_rtx; - emit_insn (pat); - - return NULL_RTX; -} - -static rtx -rs6000_expand_set_fpscr_rn_builtin (enum insn_code icode, tree exp) -{ - rtx pat; - tree arg0 = CALL_EXPR_ARG (exp, 0); - rtx op0 = expand_normal (arg0); - machine_mode mode0 = insn_data[icode].operand[0].mode; - - if (icode == CODE_FOR_nothing) - /* Builtin not supported on this processor. */ - return 0; - - if (rs6000_isa_flags & OPTION_MASK_SOFT_FLOAT) - { - error ("%<__builtin_set_fpscr_rn%> not supported with %<-msoft-float%>"); - return const0_rtx; - } - - /* If we got invalid arguments bail out before generating bad rtl. */ - if (arg0 == error_mark_node) - return const0_rtx; - - /* If the argument is a constant, check the range. Argument can only be a - 2-bit value. Unfortunately, can't check the range of the value at - compile time if the argument is a variable. The least significant two - bits of the argument, regardless of type, are used to set the rounding - mode. All other bits are ignored. */ - if (CONST_INT_P (op0) && !const_0_to_3_operand(op0, VOIDmode)) - { - error ("Argument must be a value between 0 and 3."); - return const0_rtx; - } - - if (! (*insn_data[icode].operand[0].predicate) (op0, mode0)) - op0 = copy_to_mode_reg (mode0, op0); - - pat = GEN_FCN (icode) (op0); - if (!pat) - return const0_rtx; - emit_insn (pat); - - return NULL_RTX; -} -static rtx -rs6000_expand_set_fpscr_drn_builtin (enum insn_code icode, tree exp) -{ - rtx pat; - tree arg0 = CALL_EXPR_ARG (exp, 0); - rtx op0 = expand_normal (arg0); - machine_mode mode0 = insn_data[icode].operand[0].mode; - - if (TARGET_32BIT) - /* Builtin not supported in 32-bit mode. */ - fatal_error (input_location, - "%<__builtin_set_fpscr_drn%> is not supported " - "in 32-bit mode"); - - if (rs6000_isa_flags & OPTION_MASK_SOFT_FLOAT) - { - error ("%<__builtin_set_fpscr_drn%> not supported with %<-msoft-float%>"); - return const0_rtx; - } - - if (icode == CODE_FOR_nothing) - /* Builtin not supported on this processor. */ - return 0; - - /* If we got invalid arguments bail out before generating bad rtl. */ - if (arg0 == error_mark_node) - return const0_rtx; - - /* If the argument is a constant, check the range. Agrument can only be a - 3-bit value. Unfortunately, can't check the range of the value at - compile time if the argument is a variable. The least significant two - bits of the argument, regardless of type, are used to set the rounding - mode. All other bits are ignored. */ - if (CONST_INT_P (op0) && !const_0_to_7_operand(op0, VOIDmode)) - { - error ("Argument must be a value between 0 and 7."); - return const0_rtx; - } - - if (! (*insn_data[icode].operand[0].predicate) (op0, mode0)) - op0 = copy_to_mode_reg (mode0, op0); - - pat = GEN_FCN (icode) (op0); - if (! pat) - return const0_rtx; - emit_insn (pat); - - return NULL_RTX; -} - -static rtx -rs6000_expand_unop_builtin (enum insn_code icode, tree exp, rtx target) -{ - rtx pat; - tree arg0 = CALL_EXPR_ARG (exp, 0); - rtx op0 = expand_normal (arg0); - machine_mode tmode = insn_data[icode].operand[0].mode; - machine_mode mode0 = insn_data[icode].operand[1].mode; - - if (icode == CODE_FOR_nothing) - /* Builtin not supported on this processor. */ - return 0; - - /* If we got invalid arguments bail out before generating bad rtl. */ - if (arg0 == error_mark_node) - return const0_rtx; - - if (icode == CODE_FOR_altivec_vspltisb - || icode == CODE_FOR_altivec_vspltish - || icode == CODE_FOR_altivec_vspltisw) - { - /* Only allow 5-bit *signed* literals. */ - if (!CONST_INT_P (op0) - || INTVAL (op0) > 15 - || INTVAL (op0) < -16) - { - error ("argument 1 must be a 5-bit signed literal"); - return CONST0_RTX (tmode); - } - } - - if (target == 0 - || GET_MODE (target) != tmode - || ! (*insn_data[icode].operand[0].predicate) (target, tmode)) - target = gen_reg_rtx (tmode); - - if (! (*insn_data[icode].operand[1].predicate) (op0, mode0)) - op0 = copy_to_mode_reg (mode0, op0); - - pat = GEN_FCN (icode) (target, op0); - if (! pat) - return 0; - emit_insn (pat); - - return target; -} - -static rtx -altivec_expand_abs_builtin (enum insn_code icode, tree exp, rtx target) -{ - rtx pat, scratch1, scratch2; - tree arg0 = CALL_EXPR_ARG (exp, 0); - rtx op0 = expand_normal (arg0); - machine_mode tmode = insn_data[icode].operand[0].mode; - machine_mode mode0 = insn_data[icode].operand[1].mode; - - /* If we have invalid arguments, bail out before generating bad rtl. */ - if (arg0 == error_mark_node) - return const0_rtx; - - if (target == 0 - || GET_MODE (target) != tmode - || ! (*insn_data[icode].operand[0].predicate) (target, tmode)) - target = gen_reg_rtx (tmode); - - if (! (*insn_data[icode].operand[1].predicate) (op0, mode0)) - op0 = copy_to_mode_reg (mode0, op0); - - scratch1 = gen_reg_rtx (mode0); - scratch2 = gen_reg_rtx (mode0); - - pat = GEN_FCN (icode) (target, op0, scratch1, scratch2); - if (! pat) - return 0; - emit_insn (pat); - - return target; -} - -static rtx -rs6000_expand_binop_builtin (enum insn_code icode, tree exp, rtx target) -{ - rtx pat; - tree arg0 = CALL_EXPR_ARG (exp, 0); - tree arg1 = CALL_EXPR_ARG (exp, 1); - rtx op0 = expand_normal (arg0); - rtx op1 = expand_normal (arg1); - machine_mode tmode = insn_data[icode].operand[0].mode; - machine_mode mode0 = insn_data[icode].operand[1].mode; - machine_mode mode1 = insn_data[icode].operand[2].mode; - - if (icode == CODE_FOR_nothing) - /* Builtin not supported on this processor. */ - return 0; - - /* If we got invalid arguments bail out before generating bad rtl. */ - if (arg0 == error_mark_node || arg1 == error_mark_node) - return const0_rtx; - - if (icode == CODE_FOR_unpackv1ti - || icode == CODE_FOR_unpackkf - || icode == CODE_FOR_unpacktf - || icode == CODE_FOR_unpackif - || icode == CODE_FOR_unpacktd - || icode == CODE_FOR_vec_cntmb_v16qi - || icode == CODE_FOR_vec_cntmb_v8hi - || icode == CODE_FOR_vec_cntmb_v4si - || icode == CODE_FOR_vec_cntmb_v2di) - { - /* Only allow 1-bit unsigned literals. */ - STRIP_NOPS (arg1); - if (TREE_CODE (arg1) != INTEGER_CST - || !IN_RANGE (TREE_INT_CST_LOW (arg1), 0, 1)) - { - error ("argument 2 must be a 1-bit unsigned literal"); - return CONST0_RTX (tmode); - } - } - else if (icode == CODE_FOR_altivec_vspltw) - { - /* Only allow 2-bit unsigned literals. */ - STRIP_NOPS (arg1); - if (TREE_CODE (arg1) != INTEGER_CST - || TREE_INT_CST_LOW (arg1) & ~3) - { - error ("argument 2 must be a 2-bit unsigned literal"); - return CONST0_RTX (tmode); - } - } - else if (icode == CODE_FOR_vgnb) - { - /* Only allow unsigned literals in range 2..7. */ - /* Note that arg1 is second operand. */ - STRIP_NOPS (arg1); - if (TREE_CODE (arg1) != INTEGER_CST - || (TREE_INT_CST_LOW (arg1) & ~7) - || !IN_RANGE (TREE_INT_CST_LOW (arg1), 2, 7)) - { - error ("argument 2 must be unsigned literal between " - "2 and 7 inclusive"); - return CONST0_RTX (tmode); - } - } - else if (icode == CODE_FOR_altivec_vsplth) - { - /* Only allow 3-bit unsigned literals. */ - STRIP_NOPS (arg1); - if (TREE_CODE (arg1) != INTEGER_CST - || TREE_INT_CST_LOW (arg1) & ~7) - { - error ("argument 2 must be a 3-bit unsigned literal"); - return CONST0_RTX (tmode); - } - } - else if (icode == CODE_FOR_altivec_vspltb) - { - /* Only allow 4-bit unsigned literals. */ - STRIP_NOPS (arg1); - if (TREE_CODE (arg1) != INTEGER_CST - || TREE_INT_CST_LOW (arg1) & ~15) - { - error ("argument 2 must be a 4-bit unsigned literal"); - return CONST0_RTX (tmode); - } - } - else if (icode == CODE_FOR_altivec_vcfux - || icode == CODE_FOR_altivec_vcfsx - || icode == CODE_FOR_altivec_vctsxs - || icode == CODE_FOR_altivec_vctuxs - || icode == CODE_FOR_vsx_xvcvuxddp_scale - || icode == CODE_FOR_vsx_xvcvsxddp_scale) - { - /* Only allow 5-bit unsigned literals. */ - STRIP_NOPS (arg1); - if (TREE_CODE (arg1) != INTEGER_CST - || TREE_INT_CST_LOW (arg1) & ~0x1f) - { - error ("argument 2 must be a 5-bit unsigned literal"); - return CONST0_RTX (tmode); - } - } - else if (icode == CODE_FOR_dfptstsfi_eq_dd - || icode == CODE_FOR_dfptstsfi_lt_dd - || icode == CODE_FOR_dfptstsfi_gt_dd - || icode == CODE_FOR_dfptstsfi_unordered_dd - || icode == CODE_FOR_dfptstsfi_eq_td - || icode == CODE_FOR_dfptstsfi_lt_td - || icode == CODE_FOR_dfptstsfi_gt_td - || icode == CODE_FOR_dfptstsfi_unordered_td) - { - /* Only allow 6-bit unsigned literals. */ - STRIP_NOPS (arg0); - if (TREE_CODE (arg0) != INTEGER_CST - || !IN_RANGE (TREE_INT_CST_LOW (arg0), 0, 63)) - { - error ("argument 1 must be a 6-bit unsigned literal"); - return CONST0_RTX (tmode); - } - } - else if (icode == CODE_FOR_xststdcqp_kf - || icode == CODE_FOR_xststdcqp_tf - || icode == CODE_FOR_xststdcdp - || icode == CODE_FOR_xststdcsp - || icode == CODE_FOR_xvtstdcdp - || icode == CODE_FOR_xvtstdcsp) - { - /* Only allow 7-bit unsigned literals. */ - STRIP_NOPS (arg1); - if (TREE_CODE (arg1) != INTEGER_CST - || !IN_RANGE (TREE_INT_CST_LOW (arg1), 0, 127)) - { - error ("argument 2 must be a 7-bit unsigned literal"); - return CONST0_RTX (tmode); - } - } - - if (target == 0 - || GET_MODE (target) != tmode - || ! (*insn_data[icode].operand[0].predicate) (target, tmode)) - target = gen_reg_rtx (tmode); - - if (! (*insn_data[icode].operand[1].predicate) (op0, mode0)) - op0 = copy_to_mode_reg (mode0, op0); - if (! (*insn_data[icode].operand[2].predicate) (op1, mode1)) - op1 = copy_to_mode_reg (mode1, op1); - - pat = GEN_FCN (icode) (target, op0, op1); - if (! pat) - return 0; - emit_insn (pat); - - return target; -} - static rtx altivec_expand_predicate_builtin (enum insn_code icode, tree exp, rtx target) { @@ -10030,432 +9503,6 @@ swap_endian_selector_for_mode (machine_mode mode) gen_rtvec_v (16, perm))); } -/* For the load and sign extend rightmost elements; load and zero extend - rightmost element builtins. */ -static rtx -altivec_expand_lxvr_builtin (enum insn_code icode, tree exp, rtx target, bool blk, bool sign_extend) -{ - rtx pat, addr; - tree arg0 = CALL_EXPR_ARG (exp, 0); - tree arg1 = CALL_EXPR_ARG (exp, 1); - machine_mode tmode = insn_data[icode].operand[0].mode; - machine_mode smode = insn_data[icode].operand[1].mode; - machine_mode mode0 = Pmode; - machine_mode mode1 = Pmode; - rtx op0 = expand_normal (arg0); - rtx op1 = expand_normal (arg1); - - if (icode == CODE_FOR_nothing) - /* Builtin not supported on this processor. */ - return 0; - - /* If we got invalid arguments bail out before generating bad rtl. */ - if (arg0 == error_mark_node || arg1 == error_mark_node) - return const0_rtx; - - if (target == 0 - || GET_MODE (target) != tmode - || ! (*insn_data[icode].operand[0].predicate) (target, tmode)) - target = gen_reg_rtx (tmode); - - op1 = copy_to_mode_reg (mode1, op1); - - if (op0 == const0_rtx) - addr = gen_rtx_MEM (blk ? BLKmode : tmode, op1); - else - { - op0 = copy_to_mode_reg (mode0, op0); - addr = gen_rtx_MEM (blk ? BLKmode : smode, - gen_rtx_PLUS (Pmode, op1, op0)); - } - - if (sign_extend) - { - rtx discratch = gen_reg_rtx (V2DImode); - rtx tiscratch = gen_reg_rtx (TImode); - - /* Emit the lxvr*x insn. */ - pat = GEN_FCN (icode) (tiscratch, addr); - if (!pat) - return 0; - emit_insn (pat); - - /* Emit a sign extension from V16QI,V8HI,V4SI to V2DI. */ - rtx temp1, temp2; - if (icode == CODE_FOR_vsx_lxvrbx) - { - temp1 = simplify_gen_subreg (V16QImode, tiscratch, TImode, 0); - emit_insn (gen_vsx_sign_extend_qi_v2di (discratch, temp1)); - } - else if (icode == CODE_FOR_vsx_lxvrhx) - { - temp1 = simplify_gen_subreg (V8HImode, tiscratch, TImode, 0); - emit_insn (gen_vsx_sign_extend_hi_v2di (discratch, temp1)); - } - else if (icode == CODE_FOR_vsx_lxvrwx) - { - temp1 = simplify_gen_subreg (V4SImode, tiscratch, TImode, 0); - emit_insn (gen_vsx_sign_extend_si_v2di (discratch, temp1)); - } - else if (icode == CODE_FOR_vsx_lxvrdx) - discratch = simplify_gen_subreg (V2DImode, tiscratch, TImode, 0); - else - gcc_unreachable (); - - /* Emit the sign extension from V2DI (double) to TI (quad). */ - temp2 = simplify_gen_subreg (TImode, discratch, V2DImode, 0); - emit_insn (gen_extendditi2_vector (target, temp2)); - - return target; - } - else - { - /* Zero extend. */ - pat = GEN_FCN (icode) (target, addr); - if (!pat) - return 0; - emit_insn (pat); - return target; - } - return 0; -} - -static rtx -altivec_expand_lv_builtin (enum insn_code icode, tree exp, rtx target, bool blk) -{ - rtx pat, addr; - tree arg0 = CALL_EXPR_ARG (exp, 0); - tree arg1 = CALL_EXPR_ARG (exp, 1); - machine_mode tmode = insn_data[icode].operand[0].mode; - machine_mode mode0 = Pmode; - machine_mode mode1 = Pmode; - rtx op0 = expand_normal (arg0); - rtx op1 = expand_normal (arg1); - - if (icode == CODE_FOR_nothing) - /* Builtin not supported on this processor. */ - return 0; - - /* If we got invalid arguments bail out before generating bad rtl. */ - if (arg0 == error_mark_node || arg1 == error_mark_node) - return const0_rtx; - - if (target == 0 - || GET_MODE (target) != tmode - || ! (*insn_data[icode].operand[0].predicate) (target, tmode)) - target = gen_reg_rtx (tmode); - - op1 = copy_to_mode_reg (mode1, op1); - - /* For LVX, express the RTL accurately by ANDing the address with -16. - LVXL and LVE*X expand to use UNSPECs to hide their special behavior, - so the raw address is fine. */ - if (icode == CODE_FOR_altivec_lvx_v1ti - || icode == CODE_FOR_altivec_lvx_v2df - || icode == CODE_FOR_altivec_lvx_v2di - || icode == CODE_FOR_altivec_lvx_v4sf - || icode == CODE_FOR_altivec_lvx_v4si - || icode == CODE_FOR_altivec_lvx_v8hi - || icode == CODE_FOR_altivec_lvx_v16qi) - { - rtx rawaddr; - if (op0 == const0_rtx) - rawaddr = op1; - else - { - op0 = copy_to_mode_reg (mode0, op0); - rawaddr = gen_rtx_PLUS (Pmode, op1, op0); - } - addr = gen_rtx_AND (Pmode, rawaddr, gen_rtx_CONST_INT (Pmode, -16)); - addr = gen_rtx_MEM (blk ? BLKmode : tmode, addr); - - emit_insn (gen_rtx_SET (target, addr)); - } - else - { - if (op0 == const0_rtx) - addr = gen_rtx_MEM (blk ? BLKmode : tmode, op1); - else - { - op0 = copy_to_mode_reg (mode0, op0); - addr = gen_rtx_MEM (blk ? BLKmode : tmode, - gen_rtx_PLUS (Pmode, op1, op0)); - } - - pat = GEN_FCN (icode) (target, addr); - if (! pat) - return 0; - emit_insn (pat); - } - - return target; -} - -static rtx -altivec_expand_stxvl_builtin (enum insn_code icode, tree exp) -{ - rtx pat; - tree arg0 = CALL_EXPR_ARG (exp, 0); - tree arg1 = CALL_EXPR_ARG (exp, 1); - tree arg2 = CALL_EXPR_ARG (exp, 2); - rtx op0 = expand_normal (arg0); - rtx op1 = expand_normal (arg1); - rtx op2 = expand_normal (arg2); - machine_mode mode0 = insn_data[icode].operand[0].mode; - machine_mode mode1 = insn_data[icode].operand[1].mode; - machine_mode mode2 = insn_data[icode].operand[2].mode; - - if (icode == CODE_FOR_nothing) - /* Builtin not supported on this processor. */ - return NULL_RTX; - - /* If we got invalid arguments bail out before generating bad rtl. */ - if (arg0 == error_mark_node - || arg1 == error_mark_node - || arg2 == error_mark_node) - return NULL_RTX; - - if (! (*insn_data[icode].operand[1].predicate) (op0, mode0)) - op0 = copy_to_mode_reg (mode0, op0); - if (! (*insn_data[icode].operand[2].predicate) (op1, mode1)) - op1 = copy_to_mode_reg (mode1, op1); - if (! (*insn_data[icode].operand[3].predicate) (op2, mode2)) - op2 = copy_to_mode_reg (mode2, op2); - - pat = GEN_FCN (icode) (op0, op1, op2); - if (pat) - emit_insn (pat); - - return NULL_RTX; -} - -static rtx -altivec_expand_stv_builtin (enum insn_code icode, tree exp) -{ - tree arg0 = CALL_EXPR_ARG (exp, 0); - tree arg1 = CALL_EXPR_ARG (exp, 1); - tree arg2 = CALL_EXPR_ARG (exp, 2); - rtx op0 = expand_normal (arg0); - rtx op1 = expand_normal (arg1); - rtx op2 = expand_normal (arg2); - rtx pat, addr, rawaddr, truncrtx; - machine_mode tmode = insn_data[icode].operand[0].mode; - machine_mode smode = insn_data[icode].operand[1].mode; - machine_mode mode1 = Pmode; - machine_mode mode2 = Pmode; - - /* Invalid arguments. Bail before doing anything stoopid! */ - if (arg0 == error_mark_node - || arg1 == error_mark_node - || arg2 == error_mark_node) - return const0_rtx; - - op2 = copy_to_mode_reg (mode2, op2); - - /* For STVX, express the RTL accurately by ANDing the address with -16. - STVXL and STVE*X expand to use UNSPECs to hide their special behavior, - so the raw address is fine. */ - if (icode == CODE_FOR_altivec_stvx_v2df - || icode == CODE_FOR_altivec_stvx_v2di - || icode == CODE_FOR_altivec_stvx_v4sf - || icode == CODE_FOR_altivec_stvx_v4si - || icode == CODE_FOR_altivec_stvx_v8hi - || icode == CODE_FOR_altivec_stvx_v16qi) - { - if (op1 == const0_rtx) - rawaddr = op2; - else - { - op1 = copy_to_mode_reg (mode1, op1); - rawaddr = gen_rtx_PLUS (Pmode, op2, op1); - } - - addr = gen_rtx_AND (Pmode, rawaddr, gen_rtx_CONST_INT (Pmode, -16)); - addr = gen_rtx_MEM (tmode, addr); - - op0 = copy_to_mode_reg (tmode, op0); - - emit_insn (gen_rtx_SET (addr, op0)); - } - else if (icode == CODE_FOR_vsx_stxvrbx - || icode == CODE_FOR_vsx_stxvrhx - || icode == CODE_FOR_vsx_stxvrwx - || icode == CODE_FOR_vsx_stxvrdx) - { - truncrtx = gen_rtx_TRUNCATE (tmode, op0); - op0 = copy_to_mode_reg (E_TImode, truncrtx); - - if (op1 == const0_rtx) - addr = gen_rtx_MEM (Pmode, op2); - else - { - op1 = copy_to_mode_reg (mode1, op1); - addr = gen_rtx_MEM (tmode, gen_rtx_PLUS (Pmode, op2, op1)); - } - pat = GEN_FCN (icode) (addr, op0); - if (pat) - emit_insn (pat); - } - else - { - if (! (*insn_data[icode].operand[1].predicate) (op0, smode)) - op0 = copy_to_mode_reg (smode, op0); - - if (op1 == const0_rtx) - addr = gen_rtx_MEM (tmode, op2); - else - { - op1 = copy_to_mode_reg (mode1, op1); - addr = gen_rtx_MEM (tmode, gen_rtx_PLUS (Pmode, op2, op1)); - } - - pat = GEN_FCN (icode) (addr, op0); - if (pat) - emit_insn (pat); - } - - return NULL_RTX; -} - -/* Expand the MMA built-in in EXP. - Store true in *EXPANDEDP if we found a built-in to expand. */ - -static rtx -mma_expand_builtin (tree exp, rtx target, bool *expandedp) -{ - unsigned i; - tree fndecl = TREE_OPERAND (CALL_EXPR_FN (exp), 0); - enum rs6000_builtins fcode - = (enum rs6000_builtins) DECL_MD_FUNCTION_CODE (fndecl); - const struct builtin_description *d = bdesc_mma; - - /* Expand the MMA built-in. */ - for (i = 0; i < ARRAY_SIZE (bdesc_mma); i++, d++) - if (d->code == fcode) - break; - - if (i >= ARRAY_SIZE (bdesc_mma)) - { - *expandedp = false; - return NULL_RTX; - } - - *expandedp = true; - - tree arg; - call_expr_arg_iterator iter; - enum insn_code icode = d->icode; - const struct insn_operand_data *insn_op; - rtx op[MAX_MMA_OPERANDS]; - unsigned nopnds = 0; - unsigned attr = rs6000_builtin_info[fcode].attr; - bool void_func = (attr & RS6000_BTC_VOID); - machine_mode tmode = VOIDmode; - - if (TREE_TYPE (TREE_TYPE (fndecl)) != void_type_node) - { - tmode = insn_data[icode].operand[0].mode; - if (!target - || GET_MODE (target) != tmode - || !(*insn_data[icode].operand[0].predicate) (target, tmode)) - target = gen_reg_rtx (tmode); - op[nopnds++] = target; - } - else - target = const0_rtx; - - FOR_EACH_CALL_EXPR_ARG (arg, iter, exp) - { - if (arg == error_mark_node) - return const0_rtx; - - rtx opnd; - insn_op = &insn_data[icode].operand[nopnds]; - if (TREE_CODE (arg) == ADDR_EXPR - && MEM_P (DECL_RTL (TREE_OPERAND (arg, 0)))) - opnd = DECL_RTL (TREE_OPERAND (arg, 0)); - else - opnd = expand_normal (arg); - - if (!(*insn_op->predicate) (opnd, insn_op->mode)) - { - if (!strcmp (insn_op->constraint, "n")) - { - if (!CONST_INT_P (opnd)) - error ("argument %d must be an unsigned literal", nopnds); - else - error ("argument %d is an unsigned literal that is " - "out of range", nopnds); - return const0_rtx; - } - opnd = copy_to_mode_reg (insn_op->mode, opnd); - } - - /* Some MMA instructions have INOUT accumulator operands, so force - their target register to be the same as their input register. */ - if (!void_func - && nopnds == 1 - && !strcmp (insn_op->constraint, "0") - && insn_op->mode == tmode - && REG_P (opnd) - && (*insn_data[icode].operand[0].predicate) (opnd, tmode)) - target = op[0] = opnd; - - op[nopnds++] = opnd; - } - - unsigned attr_args = attr & RS6000_BTC_OPND_MASK; - if (attr & RS6000_BTC_QUAD - || fcode == VSX_BUILTIN_DISASSEMBLE_PAIR_INTERNAL) - attr_args++; - - gcc_assert (nopnds == attr_args); - - rtx pat; - switch (nopnds) - { - case 1: - pat = GEN_FCN (icode) (op[0]); - break; - case 2: - pat = GEN_FCN (icode) (op[0], op[1]); - break; - case 3: - /* The ASSEMBLE builtin source operands are reversed in little-endian - mode, so reorder them. */ - if (fcode == VSX_BUILTIN_ASSEMBLE_PAIR_INTERNAL && !WORDS_BIG_ENDIAN) - std::swap (op[1], op[2]); - pat = GEN_FCN (icode) (op[0], op[1], op[2]); - break; - case 4: - pat = GEN_FCN (icode) (op[0], op[1], op[2], op[3]); - break; - case 5: - /* The ASSEMBLE builtin source operands are reversed in little-endian - mode, so reorder them. */ - if (fcode == MMA_BUILTIN_ASSEMBLE_ACC_INTERNAL && !WORDS_BIG_ENDIAN) - { - std::swap (op[1], op[4]); - std::swap (op[2], op[3]); - } - pat = GEN_FCN (icode) (op[0], op[1], op[2], op[3], op[4]); - break; - case 6: - pat = GEN_FCN (icode) (op[0], op[1], op[2], op[3], op[4], op[5]); - break; - case 7: - pat = GEN_FCN (icode) (op[0], op[1], op[2], op[3], op[4], op[5], op[6]); - break; - default: - gcc_unreachable (); - } - if (!pat) - return NULL_RTX; - emit_insn (pat); - - return target; -} - /* Return the appropriate SPR number associated with the given builtin. */ static inline HOST_WIDE_INT htm_spr_num (enum rs6000_builtins code) @@ -10485,678 +9532,6 @@ rs6000_htm_spr_icode (bool nonvoid) return (TARGET_POWERPC64) ? CODE_FOR_htm_mtspr_di : CODE_FOR_htm_mtspr_si; } -/* Expand the HTM builtin in EXP and store the result in TARGET. - Store true in *EXPANDEDP if we found a builtin to expand. */ -static rtx -htm_expand_builtin (tree exp, rtx target, bool * expandedp) -{ - tree fndecl = TREE_OPERAND (CALL_EXPR_FN (exp), 0); - bool nonvoid = TREE_TYPE (TREE_TYPE (fndecl)) != void_type_node; - enum rs6000_builtins fcode - = (enum rs6000_builtins) DECL_MD_FUNCTION_CODE (fndecl); - const struct builtin_description *d; - size_t i; - - *expandedp = true; - - if (!TARGET_POWERPC64 - && (fcode == HTM_BUILTIN_TABORTDC - || fcode == HTM_BUILTIN_TABORTDCI)) - { - size_t uns_fcode = (size_t)fcode; - const char *name = rs6000_builtin_info[uns_fcode].name; - error ("builtin %qs is only valid in 64-bit mode", name); - return const0_rtx; - } - - /* Expand the HTM builtins. */ - d = bdesc_htm; - for (i = 0; i < ARRAY_SIZE (bdesc_htm); i++, d++) - if (d->code == fcode) - { - rtx op[MAX_HTM_OPERANDS], pat; - int nopnds = 0; - tree arg; - call_expr_arg_iterator iter; - unsigned attr = rs6000_builtin_info[fcode].attr; - enum insn_code icode = d->icode; - const struct insn_operand_data *insn_op; - bool uses_spr = (attr & RS6000_BTC_SPR); - rtx cr = NULL_RTX; - - if (uses_spr) - icode = rs6000_htm_spr_icode (nonvoid); - insn_op = &insn_data[icode].operand[0]; - - if (nonvoid) - { - machine_mode tmode = (uses_spr) ? insn_op->mode : E_SImode; - if (!target - || GET_MODE (target) != tmode - || (uses_spr && !(*insn_op->predicate) (target, tmode))) - target = gen_reg_rtx (tmode); - if (uses_spr) - op[nopnds++] = target; - } - - FOR_EACH_CALL_EXPR_ARG (arg, iter, exp) - { - if (arg == error_mark_node || nopnds >= MAX_HTM_OPERANDS) - return const0_rtx; - - insn_op = &insn_data[icode].operand[nopnds]; - - op[nopnds] = expand_normal (arg); - - if (!(*insn_op->predicate) (op[nopnds], insn_op->mode)) - { - if (!strcmp (insn_op->constraint, "n")) - { - int arg_num = (nonvoid) ? nopnds : nopnds + 1; - if (!CONST_INT_P (op[nopnds])) - error ("argument %d must be an unsigned literal", arg_num); - else - error ("argument %d is an unsigned literal that is " - "out of range", arg_num); - return const0_rtx; - } - op[nopnds] = copy_to_mode_reg (insn_op->mode, op[nopnds]); - } - - nopnds++; - } - - /* Handle the builtins for extended mnemonics. These accept - no arguments, but map to builtins that take arguments. */ - switch (fcode) - { - case HTM_BUILTIN_TENDALL: /* Alias for: tend. 1 */ - case HTM_BUILTIN_TRESUME: /* Alias for: tsr. 1 */ - op[nopnds++] = GEN_INT (1); - if (flag_checking) - attr |= RS6000_BTC_UNARY; - break; - case HTM_BUILTIN_TSUSPEND: /* Alias for: tsr. 0 */ - op[nopnds++] = GEN_INT (0); - if (flag_checking) - attr |= RS6000_BTC_UNARY; - break; - default: - break; - } - - /* If this builtin accesses SPRs, then pass in the appropriate - SPR number and SPR regno as the last two operands. */ - if (uses_spr) - { - machine_mode mode = (TARGET_POWERPC64) ? DImode : SImode; - op[nopnds++] = gen_rtx_CONST_INT (mode, htm_spr_num (fcode)); - } - /* If this builtin accesses a CR, then pass in a scratch - CR as the last operand. */ - else if (attr & RS6000_BTC_CR) - { cr = gen_reg_rtx (CCmode); - op[nopnds++] = cr; - } - - if (flag_checking) - { - int expected_nopnds = 0; - if ((attr & RS6000_BTC_OPND_MASK) == RS6000_BTC_UNARY) - expected_nopnds = 1; - else if ((attr & RS6000_BTC_OPND_MASK) == RS6000_BTC_BINARY) - expected_nopnds = 2; - else if ((attr & RS6000_BTC_OPND_MASK) == RS6000_BTC_TERNARY) - expected_nopnds = 3; - else if ((attr & RS6000_BTC_TYPE_MASK) == RS6000_BTC_QUATERNARY) - expected_nopnds = 4; - if (!(attr & RS6000_BTC_VOID)) - expected_nopnds += 1; - if (uses_spr) - expected_nopnds += 1; - - gcc_assert (nopnds == expected_nopnds - && nopnds <= MAX_HTM_OPERANDS); - } - - switch (nopnds) - { - case 1: - pat = GEN_FCN (icode) (op[0]); - break; - case 2: - pat = GEN_FCN (icode) (op[0], op[1]); - break; - case 3: - pat = GEN_FCN (icode) (op[0], op[1], op[2]); - break; - case 4: - pat = GEN_FCN (icode) (op[0], op[1], op[2], op[3]); - break; - default: - gcc_unreachable (); - } - if (!pat) - return NULL_RTX; - emit_insn (pat); - - if (attr & RS6000_BTC_CR) - { - if (fcode == HTM_BUILTIN_TBEGIN) - { - /* Emit code to set TARGET to true or false depending on - whether the tbegin. instruction successfully or failed - to start a transaction. We do this by placing the 1's - complement of CR's EQ bit into TARGET. */ - rtx scratch = gen_reg_rtx (SImode); - emit_insn (gen_rtx_SET (scratch, - gen_rtx_EQ (SImode, cr, - const0_rtx))); - emit_insn (gen_rtx_SET (target, - gen_rtx_XOR (SImode, scratch, - GEN_INT (1)))); - } - else - { - /* Emit code to copy the 4-bit condition register field - CR into the least significant end of register TARGET. */ - rtx scratch1 = gen_reg_rtx (SImode); - rtx scratch2 = gen_reg_rtx (SImode); - rtx subreg = simplify_gen_subreg (CCmode, scratch1, SImode, 0); - emit_insn (gen_movcc (subreg, cr)); - emit_insn (gen_lshrsi3 (scratch2, scratch1, GEN_INT (28))); - emit_insn (gen_andsi3 (target, scratch2, GEN_INT (0xf))); - } - } - - if (nonvoid) - return target; - return const0_rtx; - } - - *expandedp = false; - return NULL_RTX; -} - -/* Expand the CPU builtin in FCODE and store the result in TARGET. */ - -static rtx -cpu_expand_builtin (enum rs6000_builtins fcode, tree exp ATTRIBUTE_UNUSED, - rtx target) -{ - /* __builtin_cpu_init () is a nop, so expand to nothing. */ - if (fcode == RS6000_BUILTIN_CPU_INIT) - return const0_rtx; - - if (target == 0 || GET_MODE (target) != SImode) - target = gen_reg_rtx (SImode); - -#ifdef TARGET_LIBC_PROVIDES_HWCAP_IN_TCB - tree arg = TREE_OPERAND (CALL_EXPR_ARG (exp, 0), 0); - /* Target clones creates an ARRAY_REF instead of STRING_CST, convert it back - to a STRING_CST. */ - if (TREE_CODE (arg) == ARRAY_REF - && TREE_CODE (TREE_OPERAND (arg, 0)) == STRING_CST - && TREE_CODE (TREE_OPERAND (arg, 1)) == INTEGER_CST - && compare_tree_int (TREE_OPERAND (arg, 1), 0) == 0) - arg = TREE_OPERAND (arg, 0); - - if (TREE_CODE (arg) != STRING_CST) - { - error ("builtin %qs only accepts a string argument", - rs6000_builtin_info[(size_t) fcode].name); - return const0_rtx; - } - - if (fcode == RS6000_BUILTIN_CPU_IS) - { - const char *cpu = TREE_STRING_POINTER (arg); - rtx cpuid = NULL_RTX; - for (size_t i = 0; i < ARRAY_SIZE (cpu_is_info); i++) - if (strcmp (cpu, cpu_is_info[i].cpu) == 0) - { - /* The CPUID value in the TCB is offset by _DL_FIRST_PLATFORM. */ - cpuid = GEN_INT (cpu_is_info[i].cpuid + _DL_FIRST_PLATFORM); - break; - } - if (cpuid == NULL_RTX) - { - /* Invalid CPU argument. */ - error ("cpu %qs is an invalid argument to builtin %qs", - cpu, rs6000_builtin_info[(size_t) fcode].name); - return const0_rtx; - } - - rtx platform = gen_reg_rtx (SImode); - rtx tcbmem = gen_const_mem (SImode, - gen_rtx_PLUS (Pmode, - gen_rtx_REG (Pmode, TLS_REGNUM), - GEN_INT (TCB_PLATFORM_OFFSET))); - emit_move_insn (platform, tcbmem); - emit_insn (gen_eqsi3 (target, platform, cpuid)); - } - else if (fcode == RS6000_BUILTIN_CPU_SUPPORTS) - { - const char *hwcap = TREE_STRING_POINTER (arg); - rtx mask = NULL_RTX; - int hwcap_offset; - for (size_t i = 0; i < ARRAY_SIZE (cpu_supports_info); i++) - if (strcmp (hwcap, cpu_supports_info[i].hwcap) == 0) - { - mask = GEN_INT (cpu_supports_info[i].mask); - hwcap_offset = TCB_HWCAP_OFFSET (cpu_supports_info[i].id); - break; - } - if (mask == NULL_RTX) - { - /* Invalid HWCAP argument. */ - error ("%s %qs is an invalid argument to builtin %qs", - "hwcap", hwcap, rs6000_builtin_info[(size_t) fcode].name); - return const0_rtx; - } - - rtx tcb_hwcap = gen_reg_rtx (SImode); - rtx tcbmem = gen_const_mem (SImode, - gen_rtx_PLUS (Pmode, - gen_rtx_REG (Pmode, TLS_REGNUM), - GEN_INT (hwcap_offset))); - emit_move_insn (tcb_hwcap, tcbmem); - rtx scratch1 = gen_reg_rtx (SImode); - emit_insn (gen_rtx_SET (scratch1, gen_rtx_AND (SImode, tcb_hwcap, mask))); - rtx scratch2 = gen_reg_rtx (SImode); - emit_insn (gen_eqsi3 (scratch2, scratch1, const0_rtx)); - emit_insn (gen_rtx_SET (target, gen_rtx_XOR (SImode, scratch2, const1_rtx))); - } - else - gcc_unreachable (); - - /* Record that we have expanded a CPU builtin, so that we can later - emit a reference to the special symbol exported by LIBC to ensure we - do not link against an old LIBC that doesn't support this feature. */ - cpu_builtin_p = true; - -#else - warning (0, "builtin %qs needs GLIBC (2.23 and newer) that exports hardware " - "capability bits", rs6000_builtin_info[(size_t) fcode].name); - - /* For old LIBCs, always return FALSE. */ - emit_move_insn (target, GEN_INT (0)); -#endif /* TARGET_LIBC_PROVIDES_HWCAP_IN_TCB */ - - return target; -} - -static rtx -rs6000_expand_quaternop_builtin (enum insn_code icode, tree exp, rtx target) -{ - rtx pat; - tree arg0 = CALL_EXPR_ARG (exp, 0); - tree arg1 = CALL_EXPR_ARG (exp, 1); - tree arg2 = CALL_EXPR_ARG (exp, 2); - tree arg3 = CALL_EXPR_ARG (exp, 3); - rtx op0 = expand_normal (arg0); - rtx op1 = expand_normal (arg1); - rtx op2 = expand_normal (arg2); - rtx op3 = expand_normal (arg3); - machine_mode tmode = insn_data[icode].operand[0].mode; - machine_mode mode0 = insn_data[icode].operand[1].mode; - machine_mode mode1 = insn_data[icode].operand[2].mode; - machine_mode mode2 = insn_data[icode].operand[3].mode; - machine_mode mode3 = insn_data[icode].operand[4].mode; - - if (icode == CODE_FOR_nothing) - /* Builtin not supported on this processor. */ - return 0; - - /* If we got invalid arguments bail out before generating bad rtl. */ - if (arg0 == error_mark_node - || arg1 == error_mark_node - || arg2 == error_mark_node - || arg3 == error_mark_node) - return const0_rtx; - - /* Check and prepare argument depending on the instruction code. - - Note that a switch statement instead of the sequence of tests - would be incorrect as many of the CODE_FOR values could be - CODE_FOR_nothing and that would yield multiple alternatives - with identical values. We'd never reach here at runtime in - this case. */ - if (icode == CODE_FOR_xxeval) - { - /* Only allow 8-bit unsigned literals. */ - STRIP_NOPS (arg3); - if (TREE_CODE (arg3) != INTEGER_CST - || TREE_INT_CST_LOW (arg3) & ~0xff) - { - error ("argument 4 must be an 8-bit unsigned literal"); - return CONST0_RTX (tmode); - } - } - - else if (icode == CODE_FOR_xxpermx) - { - /* Only allow 3-bit unsigned literals. */ - STRIP_NOPS (arg3); - if (TREE_CODE (arg3) != INTEGER_CST - || TREE_INT_CST_LOW (arg3) & ~0x7) - { - error ("argument 4 must be a 3-bit unsigned literal"); - return CONST0_RTX (tmode); - } - } - - else if (icode == CODE_FOR_vreplace_elt_v4si - || icode == CODE_FOR_vreplace_elt_v4sf) - { - /* Check whether the 3rd argument is an integer constant in the range - 0 to 3 inclusive. */ - STRIP_NOPS (arg2); - if (TREE_CODE (arg2) != INTEGER_CST - || !IN_RANGE (TREE_INT_CST_LOW (arg2), 0, 3)) - { - error ("argument 3 must be in the range 0 to 3"); - return CONST0_RTX (tmode); - } - } - - else if (icode == CODE_FOR_vreplace_un_v4si - || icode == CODE_FOR_vreplace_un_v4sf) - { - /* Check whether the 3rd argument is an integer constant in the range - 0 to 12 inclusive. */ - STRIP_NOPS (arg2); - if (TREE_CODE (arg2) != INTEGER_CST - || !IN_RANGE(TREE_INT_CST_LOW (arg2), 0, 12)) - { - error ("argument 3 must be in the range 0 to 12"); - return CONST0_RTX (tmode); - } - } - - else if (icode == CODE_FOR_vsldb_v16qi - || icode == CODE_FOR_vsldb_v8hi - || icode == CODE_FOR_vsldb_v4si - || icode == CODE_FOR_vsldb_v2di - || icode == CODE_FOR_vsrdb_v16qi - || icode == CODE_FOR_vsrdb_v8hi - || icode == CODE_FOR_vsrdb_v4si - || icode == CODE_FOR_vsrdb_v2di) - { - /* Check whether the 3rd argument is an integer constant in the range - 0 to 7 inclusive. */ - STRIP_NOPS (arg2); - if (TREE_CODE (arg2) != INTEGER_CST - || !IN_RANGE (TREE_INT_CST_LOW (arg2), 0, 7)) - { - error ("argument 3 must be a constant in the range 0 to 7"); - return CONST0_RTX (tmode); - } - } - - if (target == 0 - || GET_MODE (target) != tmode - || ! (*insn_data[icode].operand[0].predicate) (target, tmode)) - target = gen_reg_rtx (tmode); - - if (! (*insn_data[icode].operand[1].predicate) (op0, mode0)) - op0 = copy_to_mode_reg (mode0, op0); - if (! (*insn_data[icode].operand[2].predicate) (op1, mode1)) - op1 = copy_to_mode_reg (mode1, op1); - if (! (*insn_data[icode].operand[3].predicate) (op2, mode2)) - op2 = copy_to_mode_reg (mode2, op2); - if (! (*insn_data[icode].operand[4].predicate) (op3, mode3)) - op3 = copy_to_mode_reg (mode3, op3); - - pat = GEN_FCN (icode) (target, op0, op1, op2, op3); - if (! pat) - return 0; - emit_insn (pat); - - return target; -} - -static rtx -rs6000_expand_ternop_builtin (enum insn_code icode, tree exp, rtx target) -{ - rtx pat; - tree arg0 = CALL_EXPR_ARG (exp, 0); - tree arg1 = CALL_EXPR_ARG (exp, 1); - tree arg2 = CALL_EXPR_ARG (exp, 2); - rtx op0 = expand_normal (arg0); - rtx op1 = expand_normal (arg1); - rtx op2 = expand_normal (arg2); - machine_mode tmode = insn_data[icode].operand[0].mode; - machine_mode mode0 = insn_data[icode].operand[1].mode; - machine_mode mode1 = insn_data[icode].operand[2].mode; - machine_mode mode2 = insn_data[icode].operand[3].mode; - - if (icode == CODE_FOR_nothing) - /* Builtin not supported on this processor. */ - return 0; - - /* If we got invalid arguments bail out before generating bad rtl. */ - if (arg0 == error_mark_node - || arg1 == error_mark_node - || arg2 == error_mark_node) - return const0_rtx; - - /* Check and prepare argument depending on the instruction code. - - Note that a switch statement instead of the sequence of tests - would be incorrect as many of the CODE_FOR values could be - CODE_FOR_nothing and that would yield multiple alternatives - with identical values. We'd never reach here at runtime in - this case. */ - if (icode == CODE_FOR_altivec_vsldoi_v4sf - || icode == CODE_FOR_altivec_vsldoi_v2df - || icode == CODE_FOR_altivec_vsldoi_v4si - || icode == CODE_FOR_altivec_vsldoi_v8hi - || icode == CODE_FOR_altivec_vsldoi_v16qi) - { - /* Only allow 4-bit unsigned literals. */ - STRIP_NOPS (arg2); - if (TREE_CODE (arg2) != INTEGER_CST - || TREE_INT_CST_LOW (arg2) & ~0xf) - { - error ("argument 3 must be a 4-bit unsigned literal"); - return CONST0_RTX (tmode); - } - } - else if (icode == CODE_FOR_vsx_xxpermdi_v2df - || icode == CODE_FOR_vsx_xxpermdi_v2di - || icode == CODE_FOR_vsx_xxpermdi_v2df_be - || icode == CODE_FOR_vsx_xxpermdi_v2di_be - || icode == CODE_FOR_vsx_xxpermdi_v1ti - || icode == CODE_FOR_vsx_xxpermdi_v4sf - || icode == CODE_FOR_vsx_xxpermdi_v4si - || icode == CODE_FOR_vsx_xxpermdi_v8hi - || icode == CODE_FOR_vsx_xxpermdi_v16qi - || icode == CODE_FOR_vsx_xxsldwi_v16qi - || icode == CODE_FOR_vsx_xxsldwi_v8hi - || icode == CODE_FOR_vsx_xxsldwi_v4si - || icode == CODE_FOR_vsx_xxsldwi_v4sf - || icode == CODE_FOR_vsx_xxsldwi_v2di - || icode == CODE_FOR_vsx_xxsldwi_v2df) - { - /* Only allow 2-bit unsigned literals. */ - STRIP_NOPS (arg2); - if (TREE_CODE (arg2) != INTEGER_CST - || TREE_INT_CST_LOW (arg2) & ~0x3) - { - error ("argument 3 must be a 2-bit unsigned literal"); - return CONST0_RTX (tmode); - } - } - else if (icode == CODE_FOR_vsx_set_v2df - || icode == CODE_FOR_vsx_set_v2di - || icode == CODE_FOR_bcdadd_v16qi - || icode == CODE_FOR_bcdadd_v1ti - || icode == CODE_FOR_bcdadd_lt_v16qi - || icode == CODE_FOR_bcdadd_lt_v1ti - || icode == CODE_FOR_bcdadd_eq_v16qi - || icode == CODE_FOR_bcdadd_eq_v1ti - || icode == CODE_FOR_bcdadd_gt_v16qi - || icode == CODE_FOR_bcdadd_gt_v1ti - || icode == CODE_FOR_bcdsub_v16qi - || icode == CODE_FOR_bcdsub_v1ti - || icode == CODE_FOR_bcdsub_lt_v16qi - || icode == CODE_FOR_bcdsub_lt_v1ti - || icode == CODE_FOR_bcdsub_eq_v16qi - || icode == CODE_FOR_bcdsub_eq_v1ti - || icode == CODE_FOR_bcdsub_gt_v16qi - || icode == CODE_FOR_bcdsub_gt_v1ti) - { - /* Only allow 1-bit unsigned literals. */ - STRIP_NOPS (arg2); - if (TREE_CODE (arg2) != INTEGER_CST - || TREE_INT_CST_LOW (arg2) & ~0x1) - { - error ("argument 3 must be a 1-bit unsigned literal"); - return CONST0_RTX (tmode); - } - } - else if (icode == CODE_FOR_dfp_ddedpd_dd - || icode == CODE_FOR_dfp_ddedpd_td) - { - /* Only allow 2-bit unsigned literals where the value is 0 or 2. */ - STRIP_NOPS (arg0); - if (TREE_CODE (arg0) != INTEGER_CST - || TREE_INT_CST_LOW (arg2) & ~0x3) - { - error ("argument 1 must be 0 or 2"); - return CONST0_RTX (tmode); - } - } - else if (icode == CODE_FOR_dfp_denbcd_dd - || icode == CODE_FOR_dfp_denbcd_td - || icode == CODE_FOR_dfp_denbcd_v16qi) - { - /* Only allow 1-bit unsigned literals. */ - STRIP_NOPS (arg0); - if (TREE_CODE (arg0) != INTEGER_CST - || TREE_INT_CST_LOW (arg0) & ~0x1) - { - error ("argument 1 must be a 1-bit unsigned literal"); - return CONST0_RTX (tmode); - } - } - else if (icode == CODE_FOR_dfp_dscli_dd - || icode == CODE_FOR_dfp_dscli_td - || icode == CODE_FOR_dfp_dscri_dd - || icode == CODE_FOR_dfp_dscri_td) - { - /* Only allow 6-bit unsigned literals. */ - STRIP_NOPS (arg1); - if (TREE_CODE (arg1) != INTEGER_CST - || TREE_INT_CST_LOW (arg1) & ~0x3f) - { - error ("argument 2 must be a 6-bit unsigned literal"); - return CONST0_RTX (tmode); - } - } - else if (icode == CODE_FOR_crypto_vshasigmaw - || icode == CODE_FOR_crypto_vshasigmad) - { - /* Check whether the 2nd and 3rd arguments are integer constants and in - range and prepare arguments. */ - STRIP_NOPS (arg1); - if (TREE_CODE (arg1) != INTEGER_CST || wi::geu_p (wi::to_wide (arg1), 2)) - { - error ("argument 2 must be 0 or 1"); - return CONST0_RTX (tmode); - } - - STRIP_NOPS (arg2); - if (TREE_CODE (arg2) != INTEGER_CST - || wi::geu_p (wi::to_wide (arg2), 16)) - { - error ("argument 3 must be in the range [0, 15]"); - return CONST0_RTX (tmode); - } - } - - if (target == 0 - || GET_MODE (target) != tmode - || ! (*insn_data[icode].operand[0].predicate) (target, tmode)) - target = gen_reg_rtx (tmode); - - if (! (*insn_data[icode].operand[1].predicate) (op0, mode0)) - op0 = copy_to_mode_reg (mode0, op0); - if (! (*insn_data[icode].operand[2].predicate) (op1, mode1)) - op1 = copy_to_mode_reg (mode1, op1); - if (! (*insn_data[icode].operand[3].predicate) (op2, mode2)) - op2 = copy_to_mode_reg (mode2, op2); - - pat = GEN_FCN (icode) (target, op0, op1, op2); - if (! pat) - return 0; - emit_insn (pat); - - return target; -} - - -/* Expand the dst builtins. */ -static rtx -altivec_expand_dst_builtin (tree exp, rtx target ATTRIBUTE_UNUSED, - bool *expandedp) -{ - tree fndecl = TREE_OPERAND (CALL_EXPR_FN (exp), 0); - enum rs6000_builtins fcode - = (enum rs6000_builtins) DECL_MD_FUNCTION_CODE (fndecl); - tree arg0, arg1, arg2; - machine_mode mode0, mode1; - rtx pat, op0, op1, op2; - const struct builtin_description *d; - size_t i; - - *expandedp = false; - - /* Handle DST variants. */ - d = bdesc_dst; - for (i = 0; i < ARRAY_SIZE (bdesc_dst); i++, d++) - if (d->code == fcode) - { - arg0 = CALL_EXPR_ARG (exp, 0); - arg1 = CALL_EXPR_ARG (exp, 1); - arg2 = CALL_EXPR_ARG (exp, 2); - op0 = expand_normal (arg0); - op1 = expand_normal (arg1); - op2 = expand_normal (arg2); - mode0 = insn_data[d->icode].operand[0].mode; - mode1 = insn_data[d->icode].operand[1].mode; - - /* Invalid arguments, bail out before generating bad rtl. */ - if (arg0 == error_mark_node - || arg1 == error_mark_node - || arg2 == error_mark_node) - return const0_rtx; - - *expandedp = true; - STRIP_NOPS (arg2); - if (TREE_CODE (arg2) != INTEGER_CST - || TREE_INT_CST_LOW (arg2) & ~0x3) - { - error ("argument to %qs must be a 2-bit unsigned literal", d->name); - return const0_rtx; - } - - if (! (*insn_data[d->icode].operand[0].predicate) (op0, mode0)) - op0 = copy_to_mode_reg (Pmode, op0); - if (! (*insn_data[d->icode].operand[1].predicate) (op1, mode1)) - op1 = copy_to_mode_reg (mode1, op1); - - pat = GEN_FCN (d->icode) (op0, op1, op2); - if (pat != 0) - emit_insn (pat); - - return NULL_RTX; - } - - return NULL_RTX; -} - /* Expand vec_init builtin. */ static rtx altivec_expand_vec_init_builtin (tree type, tree exp, rtx target) @@ -11285,545 +9660,6 @@ altivec_expand_vec_ext_builtin (tree exp, rtx target) return target; } -/* Expand vec_sel builtin. */ -static rtx -altivec_expand_vec_sel_builtin (enum insn_code icode, tree exp, rtx target) -{ - rtx op0, op1, op2, pat; - tree arg0, arg1, arg2; - - arg0 = CALL_EXPR_ARG (exp, 0); - op0 = expand_normal (arg0); - arg1 = CALL_EXPR_ARG (exp, 1); - op1 = expand_normal (arg1); - arg2 = CALL_EXPR_ARG (exp, 2); - op2 = expand_normal (arg2); - - machine_mode tmode = insn_data[icode].operand[0].mode; - machine_mode mode0 = insn_data[icode].operand[1].mode; - machine_mode mode1 = insn_data[icode].operand[2].mode; - machine_mode mode2 = insn_data[icode].operand[3].mode; - - if (target == 0 || GET_MODE (target) != tmode - || !(*insn_data[icode].operand[0].predicate) (target, tmode)) - target = gen_reg_rtx (tmode); - - if (!(*insn_data[icode].operand[1].predicate) (op0, mode0)) - op0 = copy_to_mode_reg (mode0, op0); - if (!(*insn_data[icode].operand[2].predicate) (op1, mode1)) - op1 = copy_to_mode_reg (mode1, op1); - if (!(*insn_data[icode].operand[3].predicate) (op2, mode2)) - op2 = copy_to_mode_reg (mode2, op2); - - pat = GEN_FCN (icode) (target, op0, op1, op2, op2); - if (pat) - emit_insn (pat); - else - return NULL_RTX; - - return target; -} - -/* Expand the builtin in EXP and store the result in TARGET. Store - true in *EXPANDEDP if we found a builtin to expand. */ -static rtx -altivec_expand_builtin (tree exp, rtx target, bool *expandedp) -{ - const struct builtin_description *d; - size_t i; - enum insn_code icode; - tree fndecl = TREE_OPERAND (CALL_EXPR_FN (exp), 0); - tree arg0, arg1, arg2; - rtx op0, pat; - machine_mode tmode, mode0; - enum rs6000_builtins fcode - = (enum rs6000_builtins) DECL_MD_FUNCTION_CODE (fndecl); - - if (rs6000_overloaded_builtin_p (fcode)) - { - *expandedp = true; - error ("unresolved overload for Altivec builtin %qF", fndecl); - - /* Given it is invalid, just generate a normal call. */ - return expand_call (exp, target, false); - } - - target = altivec_expand_dst_builtin (exp, target, expandedp); - if (*expandedp) - return target; - - *expandedp = true; - - switch (fcode) - { - case ALTIVEC_BUILTIN_STVX_V2DF: - return altivec_expand_stv_builtin (CODE_FOR_altivec_stvx_v2df, exp); - case ALTIVEC_BUILTIN_STVX_V2DI: - return altivec_expand_stv_builtin (CODE_FOR_altivec_stvx_v2di, exp); - case ALTIVEC_BUILTIN_STVX_V4SF: - return altivec_expand_stv_builtin (CODE_FOR_altivec_stvx_v4sf, exp); - case ALTIVEC_BUILTIN_STVX: - case ALTIVEC_BUILTIN_STVX_V4SI: - return altivec_expand_stv_builtin (CODE_FOR_altivec_stvx_v4si, exp); - case ALTIVEC_BUILTIN_STVX_V8HI: - return altivec_expand_stv_builtin (CODE_FOR_altivec_stvx_v8hi, exp); - case ALTIVEC_BUILTIN_STVX_V16QI: - return altivec_expand_stv_builtin (CODE_FOR_altivec_stvx_v16qi, exp); - case ALTIVEC_BUILTIN_STVEBX: - return altivec_expand_stv_builtin (CODE_FOR_altivec_stvebx, exp); - case ALTIVEC_BUILTIN_STVEHX: - return altivec_expand_stv_builtin (CODE_FOR_altivec_stvehx, exp); - case ALTIVEC_BUILTIN_STVEWX: - return altivec_expand_stv_builtin (CODE_FOR_altivec_stvewx, exp); - - case P10_BUILTIN_TR_STXVRBX: - return altivec_expand_stv_builtin (CODE_FOR_vsx_stxvrbx, exp); - case P10_BUILTIN_TR_STXVRHX: - return altivec_expand_stv_builtin (CODE_FOR_vsx_stxvrhx, exp); - case P10_BUILTIN_TR_STXVRWX: - return altivec_expand_stv_builtin (CODE_FOR_vsx_stxvrwx, exp); - case P10_BUILTIN_TR_STXVRDX: - return altivec_expand_stv_builtin (CODE_FOR_vsx_stxvrdx, exp); - - case ALTIVEC_BUILTIN_STVXL_V2DF: - return altivec_expand_stv_builtin (CODE_FOR_altivec_stvxl_v2df, exp); - case ALTIVEC_BUILTIN_STVXL_V2DI: - return altivec_expand_stv_builtin (CODE_FOR_altivec_stvxl_v2di, exp); - case ALTIVEC_BUILTIN_STVXL_V4SF: - return altivec_expand_stv_builtin (CODE_FOR_altivec_stvxl_v4sf, exp); - case ALTIVEC_BUILTIN_STVXL: - case ALTIVEC_BUILTIN_STVXL_V4SI: - return altivec_expand_stv_builtin (CODE_FOR_altivec_stvxl_v4si, exp); - case ALTIVEC_BUILTIN_STVXL_V8HI: - return altivec_expand_stv_builtin (CODE_FOR_altivec_stvxl_v8hi, exp); - case ALTIVEC_BUILTIN_STVXL_V16QI: - return altivec_expand_stv_builtin (CODE_FOR_altivec_stvxl_v16qi, exp); - - case ALTIVEC_BUILTIN_STVLX: - return altivec_expand_stv_builtin (CODE_FOR_altivec_stvlx, exp); - case ALTIVEC_BUILTIN_STVLXL: - return altivec_expand_stv_builtin (CODE_FOR_altivec_stvlxl, exp); - case ALTIVEC_BUILTIN_STVRX: - return altivec_expand_stv_builtin (CODE_FOR_altivec_stvrx, exp); - case ALTIVEC_BUILTIN_STVRXL: - return altivec_expand_stv_builtin (CODE_FOR_altivec_stvrxl, exp); - - case P9V_BUILTIN_STXVL: - return altivec_expand_stxvl_builtin (CODE_FOR_stxvl, exp); - - case P9V_BUILTIN_XST_LEN_R: - return altivec_expand_stxvl_builtin (CODE_FOR_xst_len_r, exp); - - case VSX_BUILTIN_STXVD2X_V1TI: - return altivec_expand_stv_builtin (CODE_FOR_vsx_store_v1ti, exp); - case VSX_BUILTIN_STXVD2X_V2DF: - return altivec_expand_stv_builtin (CODE_FOR_vsx_store_v2df, exp); - case VSX_BUILTIN_STXVD2X_V2DI: - return altivec_expand_stv_builtin (CODE_FOR_vsx_store_v2di, exp); - case VSX_BUILTIN_STXVW4X_V4SF: - return altivec_expand_stv_builtin (CODE_FOR_vsx_store_v4sf, exp); - case VSX_BUILTIN_STXVW4X_V4SI: - return altivec_expand_stv_builtin (CODE_FOR_vsx_store_v4si, exp); - case VSX_BUILTIN_STXVW4X_V8HI: - return altivec_expand_stv_builtin (CODE_FOR_vsx_store_v8hi, exp); - case VSX_BUILTIN_STXVW4X_V16QI: - return altivec_expand_stv_builtin (CODE_FOR_vsx_store_v16qi, exp); - - /* For the following on big endian, it's ok to use any appropriate - unaligned-supporting store, so use a generic expander. For - little-endian, the exact element-reversing instruction must - be used. */ - case VSX_BUILTIN_ST_ELEMREV_V1TI: - { - enum insn_code code = (BYTES_BIG_ENDIAN ? CODE_FOR_vsx_store_v1ti - : CODE_FOR_vsx_st_elemrev_v1ti); - return altivec_expand_stv_builtin (code, exp); - } - case VSX_BUILTIN_ST_ELEMREV_V2DF: - { - enum insn_code code = (BYTES_BIG_ENDIAN ? CODE_FOR_vsx_store_v2df - : CODE_FOR_vsx_st_elemrev_v2df); - return altivec_expand_stv_builtin (code, exp); - } - case VSX_BUILTIN_ST_ELEMREV_V2DI: - { - enum insn_code code = (BYTES_BIG_ENDIAN ? CODE_FOR_vsx_store_v2di - : CODE_FOR_vsx_st_elemrev_v2di); - return altivec_expand_stv_builtin (code, exp); - } - case VSX_BUILTIN_ST_ELEMREV_V4SF: - { - enum insn_code code = (BYTES_BIG_ENDIAN ? CODE_FOR_vsx_store_v4sf - : CODE_FOR_vsx_st_elemrev_v4sf); - return altivec_expand_stv_builtin (code, exp); - } - case VSX_BUILTIN_ST_ELEMREV_V4SI: - { - enum insn_code code = (BYTES_BIG_ENDIAN ? CODE_FOR_vsx_store_v4si - : CODE_FOR_vsx_st_elemrev_v4si); - return altivec_expand_stv_builtin (code, exp); - } - case VSX_BUILTIN_ST_ELEMREV_V8HI: - { - enum insn_code code = (BYTES_BIG_ENDIAN ? CODE_FOR_vsx_store_v8hi - : CODE_FOR_vsx_st_elemrev_v8hi); - return altivec_expand_stv_builtin (code, exp); - } - case VSX_BUILTIN_ST_ELEMREV_V16QI: - { - enum insn_code code = (BYTES_BIG_ENDIAN ? CODE_FOR_vsx_store_v16qi - : CODE_FOR_vsx_st_elemrev_v16qi); - return altivec_expand_stv_builtin (code, exp); - } - - case ALTIVEC_BUILTIN_MFVSCR: - icode = CODE_FOR_altivec_mfvscr; - tmode = insn_data[icode].operand[0].mode; - - if (target == 0 - || GET_MODE (target) != tmode - || ! (*insn_data[icode].operand[0].predicate) (target, tmode)) - target = gen_reg_rtx (tmode); - - pat = GEN_FCN (icode) (target); - if (! pat) - return 0; - emit_insn (pat); - return target; - - case ALTIVEC_BUILTIN_MTVSCR: - icode = CODE_FOR_altivec_mtvscr; - arg0 = CALL_EXPR_ARG (exp, 0); - op0 = expand_normal (arg0); - mode0 = insn_data[icode].operand[0].mode; - - /* If we got invalid arguments bail out before generating bad rtl. */ - if (arg0 == error_mark_node) - return const0_rtx; - - if (! (*insn_data[icode].operand[0].predicate) (op0, mode0)) - op0 = copy_to_mode_reg (mode0, op0); - - pat = GEN_FCN (icode) (op0); - if (pat) - emit_insn (pat); - return NULL_RTX; - - case ALTIVEC_BUILTIN_VSEL_2DF: - return altivec_expand_vec_sel_builtin (CODE_FOR_altivec_vselv2df, exp, - target); - case ALTIVEC_BUILTIN_VSEL_2DI: - case ALTIVEC_BUILTIN_VSEL_2DI_UNS: - return altivec_expand_vec_sel_builtin (CODE_FOR_altivec_vselv2di, exp, - target); - case ALTIVEC_BUILTIN_VSEL_4SF: - return altivec_expand_vec_sel_builtin (CODE_FOR_altivec_vselv4sf, exp, - target); - case ALTIVEC_BUILTIN_VSEL_4SI: - case ALTIVEC_BUILTIN_VSEL_4SI_UNS: - return altivec_expand_vec_sel_builtin (CODE_FOR_altivec_vselv4si, exp, - target); - case ALTIVEC_BUILTIN_VSEL_8HI: - case ALTIVEC_BUILTIN_VSEL_8HI_UNS: - return altivec_expand_vec_sel_builtin (CODE_FOR_altivec_vselv8hi, exp, - target); - case ALTIVEC_BUILTIN_VSEL_16QI: - case ALTIVEC_BUILTIN_VSEL_16QI_UNS: - return altivec_expand_vec_sel_builtin (CODE_FOR_altivec_vselv16qi, exp, - target); - - case ALTIVEC_BUILTIN_DSSALL: - emit_insn (gen_altivec_dssall ()); - return NULL_RTX; - - case ALTIVEC_BUILTIN_DSS: - icode = CODE_FOR_altivec_dss; - arg0 = CALL_EXPR_ARG (exp, 0); - STRIP_NOPS (arg0); - op0 = expand_normal (arg0); - mode0 = insn_data[icode].operand[0].mode; - - /* If we got invalid arguments bail out before generating bad rtl. */ - if (arg0 == error_mark_node) - return const0_rtx; - - if (TREE_CODE (arg0) != INTEGER_CST - || TREE_INT_CST_LOW (arg0) & ~0x3) - { - error ("argument to %qs must be a 2-bit unsigned literal", "dss"); - return const0_rtx; - } - - if (! (*insn_data[icode].operand[0].predicate) (op0, mode0)) - op0 = copy_to_mode_reg (mode0, op0); - - emit_insn (gen_altivec_dss (op0)); - return NULL_RTX; - - case ALTIVEC_BUILTIN_VEC_INIT_V4SI: - case ALTIVEC_BUILTIN_VEC_INIT_V8HI: - case ALTIVEC_BUILTIN_VEC_INIT_V16QI: - case ALTIVEC_BUILTIN_VEC_INIT_V4SF: - case VSX_BUILTIN_VEC_INIT_V2DF: - case VSX_BUILTIN_VEC_INIT_V2DI: - case VSX_BUILTIN_VEC_INIT_V1TI: - return altivec_expand_vec_init_builtin (TREE_TYPE (exp), exp, target); - - case ALTIVEC_BUILTIN_VEC_SET_V4SI: - case ALTIVEC_BUILTIN_VEC_SET_V8HI: - case ALTIVEC_BUILTIN_VEC_SET_V16QI: - case ALTIVEC_BUILTIN_VEC_SET_V4SF: - case VSX_BUILTIN_VEC_SET_V2DF: - case VSX_BUILTIN_VEC_SET_V2DI: - case VSX_BUILTIN_VEC_SET_V1TI: - return altivec_expand_vec_set_builtin (exp); - - case ALTIVEC_BUILTIN_VEC_EXT_V4SI: - case ALTIVEC_BUILTIN_VEC_EXT_V8HI: - case ALTIVEC_BUILTIN_VEC_EXT_V16QI: - case ALTIVEC_BUILTIN_VEC_EXT_V4SF: - case VSX_BUILTIN_VEC_EXT_V2DF: - case VSX_BUILTIN_VEC_EXT_V2DI: - case VSX_BUILTIN_VEC_EXT_V1TI: - return altivec_expand_vec_ext_builtin (exp, target); - - case P9V_BUILTIN_VEC_EXTRACT4B: - arg1 = CALL_EXPR_ARG (exp, 1); - STRIP_NOPS (arg1); - - /* Generate a normal call if it is invalid. */ - if (arg1 == error_mark_node) - return expand_call (exp, target, false); - - if (TREE_CODE (arg1) != INTEGER_CST || TREE_INT_CST_LOW (arg1) > 12) - { - error ("second argument to %qs must be [0, 12]", "vec_vextract4b"); - return expand_call (exp, target, false); - } - break; - - case P9V_BUILTIN_VEC_INSERT4B: - arg2 = CALL_EXPR_ARG (exp, 2); - STRIP_NOPS (arg2); - - /* Generate a normal call if it is invalid. */ - if (arg2 == error_mark_node) - return expand_call (exp, target, false); - - if (TREE_CODE (arg2) != INTEGER_CST || TREE_INT_CST_LOW (arg2) > 12) - { - error ("third argument to %qs must be [0, 12]", "vec_vinsert4b"); - return expand_call (exp, target, false); - } - break; - - case P10_BUILTIN_VEC_XXGENPCVM: - arg1 = CALL_EXPR_ARG (exp, 1); - STRIP_NOPS (arg1); - - /* Generate a normal call if it is invalid. */ - if (arg1 == error_mark_node) - return expand_call (exp, target, false); - - if (TREE_CODE (arg1) != INTEGER_CST - || !IN_RANGE (TREE_INT_CST_LOW (arg1), 0, 3)) - { - size_t uns_fcode = (size_t) fcode; - const char *name = rs6000_builtin_info[uns_fcode].name; - error ("Second argument of %qs must be in the range [0, 3].", name); - return expand_call (exp, target, false); - } - break; - - default: - break; - /* Fall through. */ - } - - /* Expand abs* operations. */ - d = bdesc_abs; - for (i = 0; i < ARRAY_SIZE (bdesc_abs); i++, d++) - if (d->code == fcode) - return altivec_expand_abs_builtin (d->icode, exp, target); - - /* Expand the AltiVec predicates. */ - d = bdesc_altivec_preds; - for (i = 0; i < ARRAY_SIZE (bdesc_altivec_preds); i++, d++) - if (d->code == fcode) - return altivec_expand_predicate_builtin (d->icode, exp, target); - - /* LV* are funky. We initialized them differently. */ - switch (fcode) - { - case ALTIVEC_BUILTIN_LVSL: - return altivec_expand_lv_builtin (CODE_FOR_altivec_lvsl, - exp, target, false); - case ALTIVEC_BUILTIN_LVSR: - return altivec_expand_lv_builtin (CODE_FOR_altivec_lvsr, - exp, target, false); - case ALTIVEC_BUILTIN_LVEBX: - return altivec_expand_lv_builtin (CODE_FOR_altivec_lvebx, - exp, target, false); - case ALTIVEC_BUILTIN_LVEHX: - return altivec_expand_lv_builtin (CODE_FOR_altivec_lvehx, - exp, target, false); - case ALTIVEC_BUILTIN_LVEWX: - return altivec_expand_lv_builtin (CODE_FOR_altivec_lvewx, - exp, target, false); - case P10_BUILTIN_SE_LXVRBX: - return altivec_expand_lxvr_builtin (CODE_FOR_vsx_lxvrbx, - exp, target, false, true); - case P10_BUILTIN_SE_LXVRHX: - return altivec_expand_lxvr_builtin (CODE_FOR_vsx_lxvrhx, - exp, target, false, true); - case P10_BUILTIN_SE_LXVRWX: - return altivec_expand_lxvr_builtin (CODE_FOR_vsx_lxvrwx, - exp, target, false, true); - case P10_BUILTIN_SE_LXVRDX: - return altivec_expand_lxvr_builtin (CODE_FOR_vsx_lxvrdx, - exp, target, false, true); - case P10_BUILTIN_ZE_LXVRBX: - return altivec_expand_lxvr_builtin (CODE_FOR_vsx_lxvrbx, - exp, target, false, false); - case P10_BUILTIN_ZE_LXVRHX: - return altivec_expand_lxvr_builtin (CODE_FOR_vsx_lxvrhx, - exp, target, false, false); - case P10_BUILTIN_ZE_LXVRWX: - return altivec_expand_lxvr_builtin (CODE_FOR_vsx_lxvrwx, - exp, target, false, false); - case P10_BUILTIN_ZE_LXVRDX: - return altivec_expand_lxvr_builtin (CODE_FOR_vsx_lxvrdx, - exp, target, false, false); - case ALTIVEC_BUILTIN_LVXL_V2DF: - return altivec_expand_lv_builtin (CODE_FOR_altivec_lvxl_v2df, - exp, target, false); - case ALTIVEC_BUILTIN_LVXL_V2DI: - return altivec_expand_lv_builtin (CODE_FOR_altivec_lvxl_v2di, - exp, target, false); - case ALTIVEC_BUILTIN_LVXL_V4SF: - return altivec_expand_lv_builtin (CODE_FOR_altivec_lvxl_v4sf, - exp, target, false); - case ALTIVEC_BUILTIN_LVXL: - case ALTIVEC_BUILTIN_LVXL_V4SI: - return altivec_expand_lv_builtin (CODE_FOR_altivec_lvxl_v4si, - exp, target, false); - case ALTIVEC_BUILTIN_LVXL_V8HI: - return altivec_expand_lv_builtin (CODE_FOR_altivec_lvxl_v8hi, - exp, target, false); - case ALTIVEC_BUILTIN_LVXL_V16QI: - return altivec_expand_lv_builtin (CODE_FOR_altivec_lvxl_v16qi, - exp, target, false); - case ALTIVEC_BUILTIN_LVX_V1TI: - return altivec_expand_lv_builtin (CODE_FOR_altivec_lvx_v1ti, - exp, target, false); - case ALTIVEC_BUILTIN_LVX_V2DF: - return altivec_expand_lv_builtin (CODE_FOR_altivec_lvx_v2df, - exp, target, false); - case ALTIVEC_BUILTIN_LVX_V2DI: - return altivec_expand_lv_builtin (CODE_FOR_altivec_lvx_v2di, - exp, target, false); - case ALTIVEC_BUILTIN_LVX_V4SF: - return altivec_expand_lv_builtin (CODE_FOR_altivec_lvx_v4sf, - exp, target, false); - case ALTIVEC_BUILTIN_LVX: - case ALTIVEC_BUILTIN_LVX_V4SI: - return altivec_expand_lv_builtin (CODE_FOR_altivec_lvx_v4si, - exp, target, false); - case ALTIVEC_BUILTIN_LVX_V8HI: - return altivec_expand_lv_builtin (CODE_FOR_altivec_lvx_v8hi, - exp, target, false); - case ALTIVEC_BUILTIN_LVX_V16QI: - return altivec_expand_lv_builtin (CODE_FOR_altivec_lvx_v16qi, - exp, target, false); - case ALTIVEC_BUILTIN_LVLX: - return altivec_expand_lv_builtin (CODE_FOR_altivec_lvlx, - exp, target, true); - case ALTIVEC_BUILTIN_LVLXL: - return altivec_expand_lv_builtin (CODE_FOR_altivec_lvlxl, - exp, target, true); - case ALTIVEC_BUILTIN_LVRX: - return altivec_expand_lv_builtin (CODE_FOR_altivec_lvrx, - exp, target, true); - case ALTIVEC_BUILTIN_LVRXL: - return altivec_expand_lv_builtin (CODE_FOR_altivec_lvrxl, - exp, target, true); - case VSX_BUILTIN_LXVD2X_V1TI: - return altivec_expand_lv_builtin (CODE_FOR_vsx_load_v1ti, - exp, target, false); - case VSX_BUILTIN_LXVD2X_V2DF: - return altivec_expand_lv_builtin (CODE_FOR_vsx_load_v2df, - exp, target, false); - case VSX_BUILTIN_LXVD2X_V2DI: - return altivec_expand_lv_builtin (CODE_FOR_vsx_load_v2di, - exp, target, false); - case VSX_BUILTIN_LXVW4X_V4SF: - return altivec_expand_lv_builtin (CODE_FOR_vsx_load_v4sf, - exp, target, false); - case VSX_BUILTIN_LXVW4X_V4SI: - return altivec_expand_lv_builtin (CODE_FOR_vsx_load_v4si, - exp, target, false); - case VSX_BUILTIN_LXVW4X_V8HI: - return altivec_expand_lv_builtin (CODE_FOR_vsx_load_v8hi, - exp, target, false); - case VSX_BUILTIN_LXVW4X_V16QI: - return altivec_expand_lv_builtin (CODE_FOR_vsx_load_v16qi, - exp, target, false); - /* For the following on big endian, it's ok to use any appropriate - unaligned-supporting load, so use a generic expander. For - little-endian, the exact element-reversing instruction must - be used. */ - case VSX_BUILTIN_LD_ELEMREV_V2DF: - { - enum insn_code code = (BYTES_BIG_ENDIAN ? CODE_FOR_vsx_load_v2df - : CODE_FOR_vsx_ld_elemrev_v2df); - return altivec_expand_lv_builtin (code, exp, target, false); - } - case VSX_BUILTIN_LD_ELEMREV_V1TI: - { - enum insn_code code = (BYTES_BIG_ENDIAN ? CODE_FOR_vsx_load_v1ti - : CODE_FOR_vsx_ld_elemrev_v1ti); - return altivec_expand_lv_builtin (code, exp, target, false); - } - case VSX_BUILTIN_LD_ELEMREV_V2DI: - { - enum insn_code code = (BYTES_BIG_ENDIAN ? CODE_FOR_vsx_load_v2di - : CODE_FOR_vsx_ld_elemrev_v2di); - return altivec_expand_lv_builtin (code, exp, target, false); - } - case VSX_BUILTIN_LD_ELEMREV_V4SF: - { - enum insn_code code = (BYTES_BIG_ENDIAN ? CODE_FOR_vsx_load_v4sf - : CODE_FOR_vsx_ld_elemrev_v4sf); - return altivec_expand_lv_builtin (code, exp, target, false); - } - case VSX_BUILTIN_LD_ELEMREV_V4SI: - { - enum insn_code code = (BYTES_BIG_ENDIAN ? CODE_FOR_vsx_load_v4si - : CODE_FOR_vsx_ld_elemrev_v4si); - return altivec_expand_lv_builtin (code, exp, target, false); - } - case VSX_BUILTIN_LD_ELEMREV_V8HI: - { - enum insn_code code = (BYTES_BIG_ENDIAN ? CODE_FOR_vsx_load_v8hi - : CODE_FOR_vsx_ld_elemrev_v8hi); - return altivec_expand_lv_builtin (code, exp, target, false); - } - case VSX_BUILTIN_LD_ELEMREV_V16QI: - { - enum insn_code code = (BYTES_BIG_ENDIAN ? CODE_FOR_vsx_load_v16qi - : CODE_FOR_vsx_ld_elemrev_v16qi); - return altivec_expand_lv_builtin (code, exp, target, false); - } - break; - default: - break; - /* Fall through. */ - } - - *expandedp = false; - return NULL_RTX; -} - /* Check whether a builtin function is supported in this target configuration. */ bool @@ -11836,71 +9672,6 @@ rs6000_builtin_is_supported_p (enum rs6000_builtins fncode) return true; } -/* Raise an error message for a builtin function that is called without the - appropriate target options being set. */ - -static void -rs6000_invalid_builtin (enum rs6000_builtins fncode) -{ - size_t uns_fncode = (size_t) fncode; - const char *name = rs6000_builtin_info[uns_fncode].name; - HOST_WIDE_INT fnmask = rs6000_builtin_info[uns_fncode].mask; - - gcc_assert (name != NULL); - if ((fnmask & RS6000_BTM_CELL) != 0) - error ("%qs is only valid for the cell processor", name); - else if ((fnmask & RS6000_BTM_VSX) != 0) - error ("%qs requires the %qs option", name, "-mvsx"); - else if ((fnmask & RS6000_BTM_HTM) != 0) - error ("%qs requires the %qs option", name, "-mhtm"); - else if ((fnmask & RS6000_BTM_ALTIVEC) != 0) - error ("%qs requires the %qs option", name, "-maltivec"); - else if ((fnmask & (RS6000_BTM_DFP | RS6000_BTM_P8_VECTOR)) - == (RS6000_BTM_DFP | RS6000_BTM_P8_VECTOR)) - error ("%qs requires the %qs and %qs options", name, "-mhard-dfp", - "-mpower8-vector"); - else if ((fnmask & RS6000_BTM_DFP) != 0) - error ("%qs requires the %qs option", name, "-mhard-dfp"); - else if ((fnmask & RS6000_BTM_P8_VECTOR) != 0) - error ("%qs requires the %qs option", name, "-mpower8-vector"); - else if ((fnmask & (RS6000_BTM_P9_VECTOR | RS6000_BTM_64BIT)) - == (RS6000_BTM_P9_VECTOR | RS6000_BTM_64BIT)) - error ("%qs requires the %qs and %qs options", name, "-mcpu=power9", - "-m64"); - else if ((fnmask & RS6000_BTM_P9_VECTOR) != 0) - error ("%qs requires the %qs option", name, "-mcpu=power9"); - else if ((fnmask & (RS6000_BTM_P9_MISC | RS6000_BTM_64BIT)) - == (RS6000_BTM_P9_MISC | RS6000_BTM_64BIT)) - error ("%qs requires the %qs and %qs options", name, "-mcpu=power9", - "-m64"); - else if ((fnmask & RS6000_BTM_P9_MISC) == RS6000_BTM_P9_MISC) - error ("%qs requires the %qs option", name, "-mcpu=power9"); - else if ((fnmask & RS6000_BTM_P10) != 0) - error ("%qs requires the %qs option", name, "-mcpu=power10"); - else if ((fnmask & RS6000_BTM_MMA) != 0) - error ("%qs requires the %qs option", name, "-mmma"); - else if ((fnmask & RS6000_BTM_LDBL128) == RS6000_BTM_LDBL128) - { - if (!TARGET_HARD_FLOAT) - error ("%qs requires the %qs option", name, "-mhard-float"); - else - error ("%qs requires the %qs option", name, - TARGET_IEEEQUAD ? "-mabi=ibmlongdouble" : "-mlong-double-128"); - } - else if ((fnmask & RS6000_BTM_HARD_FLOAT) != 0) - error ("%qs requires the %qs option", name, "-mhard-float"); - else if ((fnmask & RS6000_BTM_FLOAT128_HW) != 0) - error ("%qs requires ISA 3.0 IEEE 128-bit floating point", name); - else if ((fnmask & RS6000_BTM_FLOAT128) != 0) - error ("%qs requires the %qs option", name, "%<-mfloat128%>"); - else if ((fnmask & (RS6000_BTM_POPCNTD | RS6000_BTM_POWERPC64)) - == (RS6000_BTM_POPCNTD | RS6000_BTM_POWERPC64)) - error ("%qs requires the %qs (or newer), and %qs or %qs options", - name, "-mcpu=power7", "-m64", "-mpowerpc64"); - else - error ("%qs is not supported with the current options", name); -} - /* Raise an error message for a builtin function that is called without the appropriate target options being set. */ @@ -12000,35 +9771,6 @@ rs6000_fold_builtin (tree fndecl ATTRIBUTE_UNUSED, #endif } -/* Helper function to sort out which built-ins may be valid without having - a LHS. */ -static bool -rs6000_builtin_valid_without_lhs (enum rs6000_builtins fn_code) -{ - /* Check for built-ins explicitly marked as a void function. */ - if (rs6000_builtin_info[fn_code].attr & RS6000_BTC_VOID) - return true; - - switch (fn_code) - { - case ALTIVEC_BUILTIN_STVX_V16QI: - case ALTIVEC_BUILTIN_STVX_V8HI: - case ALTIVEC_BUILTIN_STVX_V4SI: - case ALTIVEC_BUILTIN_STVX_V4SF: - case ALTIVEC_BUILTIN_STVX_V2DI: - case ALTIVEC_BUILTIN_STVX_V2DF: - case VSX_BUILTIN_STXVW4X_V16QI: - case VSX_BUILTIN_STXVW4X_V8HI: - case VSX_BUILTIN_STXVW4X_V4SF: - case VSX_BUILTIN_STXVW4X_V4SI: - case VSX_BUILTIN_STXVD2X_V2DF: - case VSX_BUILTIN_STXVD2X_V2DI: - return true; - default: - return false; - } -} - /* Helper function to handle the gimple folding of a vector compare operation. This sets up true/false vectors, and uses the VEC_COND_EXPR operation. @@ -12345,968 +10087,7 @@ rs6000_gimple_fold_mma_builtin (gimple_stmt_iterator *gsi) bool rs6000_gimple_fold_builtin (gimple_stmt_iterator *gsi) { - if (new_builtins_are_live) - return rs6000_gimple_fold_new_builtin (gsi); - - gimple *stmt = gsi_stmt (*gsi); - tree fndecl = gimple_call_fndecl (stmt); - gcc_checking_assert (fndecl && DECL_BUILT_IN_CLASS (fndecl) == BUILT_IN_MD); - enum rs6000_builtins fn_code - = (enum rs6000_builtins) DECL_MD_FUNCTION_CODE (fndecl); - tree arg0, arg1, lhs, temp; - enum tree_code bcode; - gimple *g; - - size_t uns_fncode = (size_t) fn_code; - enum insn_code icode = rs6000_builtin_info[uns_fncode].icode; - const char *fn_name1 = rs6000_builtin_info[uns_fncode].name; - const char *fn_name2 = (icode != CODE_FOR_nothing) - ? get_insn_name ((int) icode) - : "nothing"; - - if (TARGET_DEBUG_BUILTIN) - fprintf (stderr, "rs6000_gimple_fold_builtin %d %s %s\n", - fn_code, fn_name1, fn_name2); - - if (!rs6000_fold_gimple) - return false; - - /* Prevent gimple folding for code that does not have a LHS, unless it is - allowed per the rs6000_builtin_valid_without_lhs helper function. */ - if (!gimple_call_lhs (stmt) && !rs6000_builtin_valid_without_lhs (fn_code)) - return false; - - /* Don't fold invalid builtins, let rs6000_expand_builtin diagnose it. */ - if (!rs6000_builtin_is_supported_p (fn_code)) - return false; - - if (rs6000_gimple_fold_mma_builtin (gsi)) - return true; - - switch (fn_code) - { - /* Flavors of vec_add. We deliberately don't expand - P8V_BUILTIN_VADDUQM as it gets lowered from V1TImode to - TImode, resulting in much poorer code generation. */ - case ALTIVEC_BUILTIN_VADDUBM: - case ALTIVEC_BUILTIN_VADDUHM: - case ALTIVEC_BUILTIN_VADDUWM: - case P8V_BUILTIN_VADDUDM: - case ALTIVEC_BUILTIN_VADDFP: - case VSX_BUILTIN_XVADDDP: - bcode = PLUS_EXPR; - do_binary: - arg0 = gimple_call_arg (stmt, 0); - arg1 = gimple_call_arg (stmt, 1); - lhs = gimple_call_lhs (stmt); - if (INTEGRAL_TYPE_P (TREE_TYPE (TREE_TYPE (lhs))) - && !TYPE_OVERFLOW_WRAPS (TREE_TYPE (TREE_TYPE (lhs)))) - { - /* Ensure the binary operation is performed in a type - that wraps if it is integral type. */ - gimple_seq stmts = NULL; - tree type = unsigned_type_for (TREE_TYPE (lhs)); - tree uarg0 = gimple_build (&stmts, VIEW_CONVERT_EXPR, - type, arg0); - tree uarg1 = gimple_build (&stmts, VIEW_CONVERT_EXPR, - type, arg1); - tree res = gimple_build (&stmts, gimple_location (stmt), bcode, - type, uarg0, uarg1); - gsi_insert_seq_before (gsi, stmts, GSI_SAME_STMT); - g = gimple_build_assign (lhs, VIEW_CONVERT_EXPR, - build1 (VIEW_CONVERT_EXPR, - TREE_TYPE (lhs), res)); - gsi_replace (gsi, g, true); - return true; - } - g = gimple_build_assign (lhs, bcode, arg0, arg1); - gimple_set_location (g, gimple_location (stmt)); - gsi_replace (gsi, g, true); - return true; - /* Flavors of vec_sub. We deliberately don't expand - P8V_BUILTIN_VSUBUQM. */ - case ALTIVEC_BUILTIN_VSUBUBM: - case ALTIVEC_BUILTIN_VSUBUHM: - case ALTIVEC_BUILTIN_VSUBUWM: - case P8V_BUILTIN_VSUBUDM: - case ALTIVEC_BUILTIN_VSUBFP: - case VSX_BUILTIN_XVSUBDP: - bcode = MINUS_EXPR; - goto do_binary; - case VSX_BUILTIN_XVMULSP: - case VSX_BUILTIN_XVMULDP: - arg0 = gimple_call_arg (stmt, 0); - arg1 = gimple_call_arg (stmt, 1); - lhs = gimple_call_lhs (stmt); - g = gimple_build_assign (lhs, MULT_EXPR, arg0, arg1); - gimple_set_location (g, gimple_location (stmt)); - gsi_replace (gsi, g, true); - return true; - /* Even element flavors of vec_mul (signed). */ - case ALTIVEC_BUILTIN_VMULESB: - case ALTIVEC_BUILTIN_VMULESH: - case P8V_BUILTIN_VMULESW: - /* Even element flavors of vec_mul (unsigned). */ - case ALTIVEC_BUILTIN_VMULEUB: - case ALTIVEC_BUILTIN_VMULEUH: - case P8V_BUILTIN_VMULEUW: - arg0 = gimple_call_arg (stmt, 0); - arg1 = gimple_call_arg (stmt, 1); - lhs = gimple_call_lhs (stmt); - g = gimple_build_assign (lhs, VEC_WIDEN_MULT_EVEN_EXPR, arg0, arg1); - gimple_set_location (g, gimple_location (stmt)); - gsi_replace (gsi, g, true); - return true; - /* Odd element flavors of vec_mul (signed). */ - case ALTIVEC_BUILTIN_VMULOSB: - case ALTIVEC_BUILTIN_VMULOSH: - case P8V_BUILTIN_VMULOSW: - /* Odd element flavors of vec_mul (unsigned). */ - case ALTIVEC_BUILTIN_VMULOUB: - case ALTIVEC_BUILTIN_VMULOUH: - case P8V_BUILTIN_VMULOUW: - arg0 = gimple_call_arg (stmt, 0); - arg1 = gimple_call_arg (stmt, 1); - lhs = gimple_call_lhs (stmt); - g = gimple_build_assign (lhs, VEC_WIDEN_MULT_ODD_EXPR, arg0, arg1); - gimple_set_location (g, gimple_location (stmt)); - gsi_replace (gsi, g, true); - return true; - /* Flavors of vec_div (Integer). */ - case VSX_BUILTIN_DIV_V2DI: - case VSX_BUILTIN_UDIV_V2DI: - arg0 = gimple_call_arg (stmt, 0); - arg1 = gimple_call_arg (stmt, 1); - lhs = gimple_call_lhs (stmt); - g = gimple_build_assign (lhs, TRUNC_DIV_EXPR, arg0, arg1); - gimple_set_location (g, gimple_location (stmt)); - gsi_replace (gsi, g, true); - return true; - /* Flavors of vec_div (Float). */ - case VSX_BUILTIN_XVDIVSP: - case VSX_BUILTIN_XVDIVDP: - arg0 = gimple_call_arg (stmt, 0); - arg1 = gimple_call_arg (stmt, 1); - lhs = gimple_call_lhs (stmt); - g = gimple_build_assign (lhs, RDIV_EXPR, arg0, arg1); - gimple_set_location (g, gimple_location (stmt)); - gsi_replace (gsi, g, true); - return true; - /* Flavors of vec_and. */ - case ALTIVEC_BUILTIN_VAND_V16QI_UNS: - case ALTIVEC_BUILTIN_VAND_V16QI: - case ALTIVEC_BUILTIN_VAND_V8HI_UNS: - case ALTIVEC_BUILTIN_VAND_V8HI: - case ALTIVEC_BUILTIN_VAND_V4SI_UNS: - case ALTIVEC_BUILTIN_VAND_V4SI: - case ALTIVEC_BUILTIN_VAND_V2DI_UNS: - case ALTIVEC_BUILTIN_VAND_V2DI: - case ALTIVEC_BUILTIN_VAND_V4SF: - case ALTIVEC_BUILTIN_VAND_V2DF: - arg0 = gimple_call_arg (stmt, 0); - arg1 = gimple_call_arg (stmt, 1); - lhs = gimple_call_lhs (stmt); - g = gimple_build_assign (lhs, BIT_AND_EXPR, arg0, arg1); - gimple_set_location (g, gimple_location (stmt)); - gsi_replace (gsi, g, true); - return true; - /* Flavors of vec_andc. */ - case ALTIVEC_BUILTIN_VANDC_V16QI_UNS: - case ALTIVEC_BUILTIN_VANDC_V16QI: - case ALTIVEC_BUILTIN_VANDC_V8HI_UNS: - case ALTIVEC_BUILTIN_VANDC_V8HI: - case ALTIVEC_BUILTIN_VANDC_V4SI_UNS: - case ALTIVEC_BUILTIN_VANDC_V4SI: - case ALTIVEC_BUILTIN_VANDC_V2DI_UNS: - case ALTIVEC_BUILTIN_VANDC_V2DI: - case ALTIVEC_BUILTIN_VANDC_V4SF: - case ALTIVEC_BUILTIN_VANDC_V2DF: - arg0 = gimple_call_arg (stmt, 0); - arg1 = gimple_call_arg (stmt, 1); - lhs = gimple_call_lhs (stmt); - temp = create_tmp_reg_or_ssa_name (TREE_TYPE (arg1)); - g = gimple_build_assign (temp, BIT_NOT_EXPR, arg1); - gimple_set_location (g, gimple_location (stmt)); - gsi_insert_before (gsi, g, GSI_SAME_STMT); - g = gimple_build_assign (lhs, BIT_AND_EXPR, arg0, temp); - gimple_set_location (g, gimple_location (stmt)); - gsi_replace (gsi, g, true); - return true; - /* Flavors of vec_nand. */ - case P8V_BUILTIN_VEC_NAND: - case P8V_BUILTIN_NAND_V16QI_UNS: - case P8V_BUILTIN_NAND_V16QI: - case P8V_BUILTIN_NAND_V8HI_UNS: - case P8V_BUILTIN_NAND_V8HI: - case P8V_BUILTIN_NAND_V4SI_UNS: - case P8V_BUILTIN_NAND_V4SI: - case P8V_BUILTIN_NAND_V2DI_UNS: - case P8V_BUILTIN_NAND_V2DI: - case P8V_BUILTIN_NAND_V4SF: - case P8V_BUILTIN_NAND_V2DF: - arg0 = gimple_call_arg (stmt, 0); - arg1 = gimple_call_arg (stmt, 1); - lhs = gimple_call_lhs (stmt); - temp = create_tmp_reg_or_ssa_name (TREE_TYPE (arg1)); - g = gimple_build_assign (temp, BIT_AND_EXPR, arg0, arg1); - gimple_set_location (g, gimple_location (stmt)); - gsi_insert_before (gsi, g, GSI_SAME_STMT); - g = gimple_build_assign (lhs, BIT_NOT_EXPR, temp); - gimple_set_location (g, gimple_location (stmt)); - gsi_replace (gsi, g, true); - return true; - /* Flavors of vec_or. */ - case ALTIVEC_BUILTIN_VOR_V16QI_UNS: - case ALTIVEC_BUILTIN_VOR_V16QI: - case ALTIVEC_BUILTIN_VOR_V8HI_UNS: - case ALTIVEC_BUILTIN_VOR_V8HI: - case ALTIVEC_BUILTIN_VOR_V4SI_UNS: - case ALTIVEC_BUILTIN_VOR_V4SI: - case ALTIVEC_BUILTIN_VOR_V2DI_UNS: - case ALTIVEC_BUILTIN_VOR_V2DI: - case ALTIVEC_BUILTIN_VOR_V4SF: - case ALTIVEC_BUILTIN_VOR_V2DF: - arg0 = gimple_call_arg (stmt, 0); - arg1 = gimple_call_arg (stmt, 1); - lhs = gimple_call_lhs (stmt); - g = gimple_build_assign (lhs, BIT_IOR_EXPR, arg0, arg1); - gimple_set_location (g, gimple_location (stmt)); - gsi_replace (gsi, g, true); - return true; - /* flavors of vec_orc. */ - case P8V_BUILTIN_ORC_V16QI_UNS: - case P8V_BUILTIN_ORC_V16QI: - case P8V_BUILTIN_ORC_V8HI_UNS: - case P8V_BUILTIN_ORC_V8HI: - case P8V_BUILTIN_ORC_V4SI_UNS: - case P8V_BUILTIN_ORC_V4SI: - case P8V_BUILTIN_ORC_V2DI_UNS: - case P8V_BUILTIN_ORC_V2DI: - case P8V_BUILTIN_ORC_V4SF: - case P8V_BUILTIN_ORC_V2DF: - arg0 = gimple_call_arg (stmt, 0); - arg1 = gimple_call_arg (stmt, 1); - lhs = gimple_call_lhs (stmt); - temp = create_tmp_reg_or_ssa_name (TREE_TYPE (arg1)); - g = gimple_build_assign (temp, BIT_NOT_EXPR, arg1); - gimple_set_location (g, gimple_location (stmt)); - gsi_insert_before (gsi, g, GSI_SAME_STMT); - g = gimple_build_assign (lhs, BIT_IOR_EXPR, arg0, temp); - gimple_set_location (g, gimple_location (stmt)); - gsi_replace (gsi, g, true); - return true; - /* Flavors of vec_xor. */ - case ALTIVEC_BUILTIN_VXOR_V16QI_UNS: - case ALTIVEC_BUILTIN_VXOR_V16QI: - case ALTIVEC_BUILTIN_VXOR_V8HI_UNS: - case ALTIVEC_BUILTIN_VXOR_V8HI: - case ALTIVEC_BUILTIN_VXOR_V4SI_UNS: - case ALTIVEC_BUILTIN_VXOR_V4SI: - case ALTIVEC_BUILTIN_VXOR_V2DI_UNS: - case ALTIVEC_BUILTIN_VXOR_V2DI: - case ALTIVEC_BUILTIN_VXOR_V4SF: - case ALTIVEC_BUILTIN_VXOR_V2DF: - arg0 = gimple_call_arg (stmt, 0); - arg1 = gimple_call_arg (stmt, 1); - lhs = gimple_call_lhs (stmt); - g = gimple_build_assign (lhs, BIT_XOR_EXPR, arg0, arg1); - gimple_set_location (g, gimple_location (stmt)); - gsi_replace (gsi, g, true); - return true; - /* Flavors of vec_nor. */ - case ALTIVEC_BUILTIN_VNOR_V16QI_UNS: - case ALTIVEC_BUILTIN_VNOR_V16QI: - case ALTIVEC_BUILTIN_VNOR_V8HI_UNS: - case ALTIVEC_BUILTIN_VNOR_V8HI: - case ALTIVEC_BUILTIN_VNOR_V4SI_UNS: - case ALTIVEC_BUILTIN_VNOR_V4SI: - case ALTIVEC_BUILTIN_VNOR_V2DI_UNS: - case ALTIVEC_BUILTIN_VNOR_V2DI: - case ALTIVEC_BUILTIN_VNOR_V4SF: - case ALTIVEC_BUILTIN_VNOR_V2DF: - arg0 = gimple_call_arg (stmt, 0); - arg1 = gimple_call_arg (stmt, 1); - lhs = gimple_call_lhs (stmt); - temp = create_tmp_reg_or_ssa_name (TREE_TYPE (arg1)); - g = gimple_build_assign (temp, BIT_IOR_EXPR, arg0, arg1); - gimple_set_location (g, gimple_location (stmt)); - gsi_insert_before (gsi, g, GSI_SAME_STMT); - g = gimple_build_assign (lhs, BIT_NOT_EXPR, temp); - gimple_set_location (g, gimple_location (stmt)); - gsi_replace (gsi, g, true); - return true; - /* flavors of vec_abs. */ - case ALTIVEC_BUILTIN_ABS_V16QI: - case ALTIVEC_BUILTIN_ABS_V8HI: - case ALTIVEC_BUILTIN_ABS_V4SI: - case ALTIVEC_BUILTIN_ABS_V4SF: - case P8V_BUILTIN_ABS_V2DI: - case VSX_BUILTIN_XVABSDP: - arg0 = gimple_call_arg (stmt, 0); - if (INTEGRAL_TYPE_P (TREE_TYPE (TREE_TYPE (arg0))) - && !TYPE_OVERFLOW_WRAPS (TREE_TYPE (TREE_TYPE (arg0)))) - return false; - lhs = gimple_call_lhs (stmt); - g = gimple_build_assign (lhs, ABS_EXPR, arg0); - gimple_set_location (g, gimple_location (stmt)); - gsi_replace (gsi, g, true); - return true; - /* flavors of vec_min. */ - case VSX_BUILTIN_XVMINDP: - case ALTIVEC_BUILTIN_VMINFP: - { - lhs = gimple_call_lhs (stmt); - tree type = TREE_TYPE (lhs); - if (HONOR_NANS (type)) - return false; - gcc_fallthrough (); - } - case P8V_BUILTIN_VMINSD: - case P8V_BUILTIN_VMINUD: - case ALTIVEC_BUILTIN_VMINSB: - case ALTIVEC_BUILTIN_VMINSH: - case ALTIVEC_BUILTIN_VMINSW: - case ALTIVEC_BUILTIN_VMINUB: - case ALTIVEC_BUILTIN_VMINUH: - case ALTIVEC_BUILTIN_VMINUW: - arg0 = gimple_call_arg (stmt, 0); - arg1 = gimple_call_arg (stmt, 1); - lhs = gimple_call_lhs (stmt); - g = gimple_build_assign (lhs, MIN_EXPR, arg0, arg1); - gimple_set_location (g, gimple_location (stmt)); - gsi_replace (gsi, g, true); - return true; - /* flavors of vec_max. */ - case VSX_BUILTIN_XVMAXDP: - case ALTIVEC_BUILTIN_VMAXFP: - { - lhs = gimple_call_lhs (stmt); - tree type = TREE_TYPE (lhs); - if (HONOR_NANS (type)) - return false; - gcc_fallthrough (); - } - case P8V_BUILTIN_VMAXSD: - case P8V_BUILTIN_VMAXUD: - case ALTIVEC_BUILTIN_VMAXSB: - case ALTIVEC_BUILTIN_VMAXSH: - case ALTIVEC_BUILTIN_VMAXSW: - case ALTIVEC_BUILTIN_VMAXUB: - case ALTIVEC_BUILTIN_VMAXUH: - case ALTIVEC_BUILTIN_VMAXUW: - arg0 = gimple_call_arg (stmt, 0); - arg1 = gimple_call_arg (stmt, 1); - lhs = gimple_call_lhs (stmt); - g = gimple_build_assign (lhs, MAX_EXPR, arg0, arg1); - gimple_set_location (g, gimple_location (stmt)); - gsi_replace (gsi, g, true); - return true; - /* Flavors of vec_eqv. */ - case P8V_BUILTIN_EQV_V16QI: - case P8V_BUILTIN_EQV_V8HI: - case P8V_BUILTIN_EQV_V4SI: - case P8V_BUILTIN_EQV_V4SF: - case P8V_BUILTIN_EQV_V2DF: - case P8V_BUILTIN_EQV_V2DI: - arg0 = gimple_call_arg (stmt, 0); - arg1 = gimple_call_arg (stmt, 1); - lhs = gimple_call_lhs (stmt); - temp = create_tmp_reg_or_ssa_name (TREE_TYPE (arg1)); - g = gimple_build_assign (temp, BIT_XOR_EXPR, arg0, arg1); - gimple_set_location (g, gimple_location (stmt)); - gsi_insert_before (gsi, g, GSI_SAME_STMT); - g = gimple_build_assign (lhs, BIT_NOT_EXPR, temp); - gimple_set_location (g, gimple_location (stmt)); - gsi_replace (gsi, g, true); - return true; - /* Flavors of vec_rotate_left. */ - case ALTIVEC_BUILTIN_VRLB: - case ALTIVEC_BUILTIN_VRLH: - case ALTIVEC_BUILTIN_VRLW: - case P8V_BUILTIN_VRLD: - arg0 = gimple_call_arg (stmt, 0); - arg1 = gimple_call_arg (stmt, 1); - lhs = gimple_call_lhs (stmt); - g = gimple_build_assign (lhs, LROTATE_EXPR, arg0, arg1); - gimple_set_location (g, gimple_location (stmt)); - gsi_replace (gsi, g, true); - return true; - /* Flavors of vector shift right algebraic. - vec_sra{b,h,w} -> vsra{b,h,w}. */ - case ALTIVEC_BUILTIN_VSRAB: - case ALTIVEC_BUILTIN_VSRAH: - case ALTIVEC_BUILTIN_VSRAW: - case P8V_BUILTIN_VSRAD: - { - arg0 = gimple_call_arg (stmt, 0); - arg1 = gimple_call_arg (stmt, 1); - lhs = gimple_call_lhs (stmt); - tree arg1_type = TREE_TYPE (arg1); - tree unsigned_arg1_type = unsigned_type_for (TREE_TYPE (arg1)); - tree unsigned_element_type = unsigned_type_for (TREE_TYPE (arg1_type)); - location_t loc = gimple_location (stmt); - /* Force arg1 into the range valid matching the arg0 type. */ - /* Build a vector consisting of the max valid bit-size values. */ - int n_elts = VECTOR_CST_NELTS (arg1); - tree element_size = build_int_cst (unsigned_element_type, - 128 / n_elts); - tree_vector_builder elts (unsigned_arg1_type, n_elts, 1); - for (int i = 0; i < n_elts; i++) - elts.safe_push (element_size); - tree modulo_tree = elts.build (); - /* Modulo the provided shift value against that vector. */ - gimple_seq stmts = NULL; - tree unsigned_arg1 = gimple_build (&stmts, VIEW_CONVERT_EXPR, - unsigned_arg1_type, arg1); - tree new_arg1 = gimple_build (&stmts, loc, TRUNC_MOD_EXPR, - unsigned_arg1_type, unsigned_arg1, - modulo_tree); - gsi_insert_seq_before (gsi, stmts, GSI_SAME_STMT); - /* And finally, do the shift. */ - g = gimple_build_assign (lhs, RSHIFT_EXPR, arg0, new_arg1); - gimple_set_location (g, loc); - gsi_replace (gsi, g, true); - return true; - } - /* Flavors of vector shift left. - builtin_altivec_vsl{b,h,w} -> vsl{b,h,w}. */ - case ALTIVEC_BUILTIN_VSLB: - case ALTIVEC_BUILTIN_VSLH: - case ALTIVEC_BUILTIN_VSLW: - case P8V_BUILTIN_VSLD: - { - location_t loc; - gimple_seq stmts = NULL; - arg0 = gimple_call_arg (stmt, 0); - tree arg0_type = TREE_TYPE (arg0); - if (INTEGRAL_TYPE_P (TREE_TYPE (arg0_type)) - && !TYPE_OVERFLOW_WRAPS (TREE_TYPE (arg0_type))) - return false; - arg1 = gimple_call_arg (stmt, 1); - tree arg1_type = TREE_TYPE (arg1); - tree unsigned_arg1_type = unsigned_type_for (TREE_TYPE (arg1)); - tree unsigned_element_type = unsigned_type_for (TREE_TYPE (arg1_type)); - loc = gimple_location (stmt); - lhs = gimple_call_lhs (stmt); - /* Force arg1 into the range valid matching the arg0 type. */ - /* Build a vector consisting of the max valid bit-size values. */ - int n_elts = VECTOR_CST_NELTS (arg1); - int tree_size_in_bits = TREE_INT_CST_LOW (size_in_bytes (arg1_type)) - * BITS_PER_UNIT; - tree element_size = build_int_cst (unsigned_element_type, - tree_size_in_bits / n_elts); - tree_vector_builder elts (unsigned_type_for (arg1_type), n_elts, 1); - for (int i = 0; i < n_elts; i++) - elts.safe_push (element_size); - tree modulo_tree = elts.build (); - /* Modulo the provided shift value against that vector. */ - tree unsigned_arg1 = gimple_build (&stmts, VIEW_CONVERT_EXPR, - unsigned_arg1_type, arg1); - tree new_arg1 = gimple_build (&stmts, loc, TRUNC_MOD_EXPR, - unsigned_arg1_type, unsigned_arg1, - modulo_tree); - gsi_insert_seq_before (gsi, stmts, GSI_SAME_STMT); - /* And finally, do the shift. */ - g = gimple_build_assign (lhs, LSHIFT_EXPR, arg0, new_arg1); - gimple_set_location (g, gimple_location (stmt)); - gsi_replace (gsi, g, true); - return true; - } - /* Flavors of vector shift right. */ - case ALTIVEC_BUILTIN_VSRB: - case ALTIVEC_BUILTIN_VSRH: - case ALTIVEC_BUILTIN_VSRW: - case P8V_BUILTIN_VSRD: - { - arg0 = gimple_call_arg (stmt, 0); - arg1 = gimple_call_arg (stmt, 1); - lhs = gimple_call_lhs (stmt); - tree arg1_type = TREE_TYPE (arg1); - tree unsigned_arg1_type = unsigned_type_for (TREE_TYPE (arg1)); - tree unsigned_element_type = unsigned_type_for (TREE_TYPE (arg1_type)); - location_t loc = gimple_location (stmt); - gimple_seq stmts = NULL; - /* Convert arg0 to unsigned. */ - tree arg0_unsigned - = gimple_build (&stmts, VIEW_CONVERT_EXPR, - unsigned_type_for (TREE_TYPE (arg0)), arg0); - /* Force arg1 into the range valid matching the arg0 type. */ - /* Build a vector consisting of the max valid bit-size values. */ - int n_elts = VECTOR_CST_NELTS (arg1); - tree element_size = build_int_cst (unsigned_element_type, - 128 / n_elts); - tree_vector_builder elts (unsigned_arg1_type, n_elts, 1); - for (int i = 0; i < n_elts; i++) - elts.safe_push (element_size); - tree modulo_tree = elts.build (); - /* Modulo the provided shift value against that vector. */ - tree unsigned_arg1 = gimple_build (&stmts, VIEW_CONVERT_EXPR, - unsigned_arg1_type, arg1); - tree new_arg1 = gimple_build (&stmts, loc, TRUNC_MOD_EXPR, - unsigned_arg1_type, unsigned_arg1, - modulo_tree); - /* Do the shift. */ - tree res - = gimple_build (&stmts, RSHIFT_EXPR, - TREE_TYPE (arg0_unsigned), arg0_unsigned, new_arg1); - /* Convert result back to the lhs type. */ - res = gimple_build (&stmts, VIEW_CONVERT_EXPR, TREE_TYPE (lhs), res); - gsi_insert_seq_before (gsi, stmts, GSI_SAME_STMT); - replace_call_with_value (gsi, res); - return true; - } - /* Vector loads. */ - case ALTIVEC_BUILTIN_LVX_V16QI: - case ALTIVEC_BUILTIN_LVX_V8HI: - case ALTIVEC_BUILTIN_LVX_V4SI: - case ALTIVEC_BUILTIN_LVX_V4SF: - case ALTIVEC_BUILTIN_LVX_V2DI: - case ALTIVEC_BUILTIN_LVX_V2DF: - case ALTIVEC_BUILTIN_LVX_V1TI: - { - arg0 = gimple_call_arg (stmt, 0); // offset - arg1 = gimple_call_arg (stmt, 1); // address - lhs = gimple_call_lhs (stmt); - location_t loc = gimple_location (stmt); - /* Since arg1 may be cast to a different type, just use ptr_type_node - here instead of trying to enforce TBAA on pointer types. */ - tree arg1_type = ptr_type_node; - tree lhs_type = TREE_TYPE (lhs); - /* POINTER_PLUS_EXPR wants the offset to be of type 'sizetype'. Create - the tree using the value from arg0. The resulting type will match - the type of arg1. */ - gimple_seq stmts = NULL; - tree temp_offset = gimple_convert (&stmts, loc, sizetype, arg0); - tree temp_addr = gimple_build (&stmts, loc, POINTER_PLUS_EXPR, - arg1_type, arg1, temp_offset); - /* Mask off any lower bits from the address. */ - tree aligned_addr = gimple_build (&stmts, loc, BIT_AND_EXPR, - arg1_type, temp_addr, - build_int_cst (arg1_type, -16)); - gsi_insert_seq_before (gsi, stmts, GSI_SAME_STMT); - if (!is_gimple_mem_ref_addr (aligned_addr)) - { - tree t = make_ssa_name (TREE_TYPE (aligned_addr)); - gimple *g = gimple_build_assign (t, aligned_addr); - gsi_insert_before (gsi, g, GSI_SAME_STMT); - aligned_addr = t; - } - /* Use the build2 helper to set up the mem_ref. The MEM_REF could also - take an offset, but since we've already incorporated the offset - above, here we just pass in a zero. */ - gimple *g - = gimple_build_assign (lhs, build2 (MEM_REF, lhs_type, aligned_addr, - build_int_cst (arg1_type, 0))); - gimple_set_location (g, loc); - gsi_replace (gsi, g, true); - return true; - } - /* Vector stores. */ - case ALTIVEC_BUILTIN_STVX_V16QI: - case ALTIVEC_BUILTIN_STVX_V8HI: - case ALTIVEC_BUILTIN_STVX_V4SI: - case ALTIVEC_BUILTIN_STVX_V4SF: - case ALTIVEC_BUILTIN_STVX_V2DI: - case ALTIVEC_BUILTIN_STVX_V2DF: - { - arg0 = gimple_call_arg (stmt, 0); /* Value to be stored. */ - arg1 = gimple_call_arg (stmt, 1); /* Offset. */ - tree arg2 = gimple_call_arg (stmt, 2); /* Store-to address. */ - location_t loc = gimple_location (stmt); - tree arg0_type = TREE_TYPE (arg0); - /* Use ptr_type_node (no TBAA) for the arg2_type. - FIXME: (Richard) "A proper fix would be to transition this type as - seen from the frontend to GIMPLE, for example in a similar way we - do for MEM_REFs by piggy-backing that on an extra argument, a - constant zero pointer of the alias pointer type to use (which would - also serve as a type indicator of the store itself). I'd use a - target specific internal function for this (not sure if we can have - those target specific, but I guess if it's folded away then that's - fine) and get away with the overload set." */ - tree arg2_type = ptr_type_node; - /* POINTER_PLUS_EXPR wants the offset to be of type 'sizetype'. Create - the tree using the value from arg0. The resulting type will match - the type of arg2. */ - gimple_seq stmts = NULL; - tree temp_offset = gimple_convert (&stmts, loc, sizetype, arg1); - tree temp_addr = gimple_build (&stmts, loc, POINTER_PLUS_EXPR, - arg2_type, arg2, temp_offset); - /* Mask off any lower bits from the address. */ - tree aligned_addr = gimple_build (&stmts, loc, BIT_AND_EXPR, - arg2_type, temp_addr, - build_int_cst (arg2_type, -16)); - gsi_insert_seq_before (gsi, stmts, GSI_SAME_STMT); - if (!is_gimple_mem_ref_addr (aligned_addr)) - { - tree t = make_ssa_name (TREE_TYPE (aligned_addr)); - gimple *g = gimple_build_assign (t, aligned_addr); - gsi_insert_before (gsi, g, GSI_SAME_STMT); - aligned_addr = t; - } - /* The desired gimple result should be similar to: - MEM[(__vector floatD.1407 *)_1] = vf1D.2697; */ - gimple *g - = gimple_build_assign (build2 (MEM_REF, arg0_type, aligned_addr, - build_int_cst (arg2_type, 0)), arg0); - gimple_set_location (g, loc); - gsi_replace (gsi, g, true); - return true; - } - - /* unaligned Vector loads. */ - case VSX_BUILTIN_LXVW4X_V16QI: - case VSX_BUILTIN_LXVW4X_V8HI: - case VSX_BUILTIN_LXVW4X_V4SF: - case VSX_BUILTIN_LXVW4X_V4SI: - case VSX_BUILTIN_LXVD2X_V2DF: - case VSX_BUILTIN_LXVD2X_V2DI: - { - arg0 = gimple_call_arg (stmt, 0); // offset - arg1 = gimple_call_arg (stmt, 1); // address - lhs = gimple_call_lhs (stmt); - location_t loc = gimple_location (stmt); - /* Since arg1 may be cast to a different type, just use ptr_type_node - here instead of trying to enforce TBAA on pointer types. */ - tree arg1_type = ptr_type_node; - tree lhs_type = TREE_TYPE (lhs); - /* In GIMPLE the type of the MEM_REF specifies the alignment. The - required alignment (power) is 4 bytes regardless of data type. */ - tree align_ltype = build_aligned_type (lhs_type, 4); - /* POINTER_PLUS_EXPR wants the offset to be of type 'sizetype'. Create - the tree using the value from arg0. The resulting type will match - the type of arg1. */ - gimple_seq stmts = NULL; - tree temp_offset = gimple_convert (&stmts, loc, sizetype, arg0); - tree temp_addr = gimple_build (&stmts, loc, POINTER_PLUS_EXPR, - arg1_type, arg1, temp_offset); - gsi_insert_seq_before (gsi, stmts, GSI_SAME_STMT); - if (!is_gimple_mem_ref_addr (temp_addr)) - { - tree t = make_ssa_name (TREE_TYPE (temp_addr)); - gimple *g = gimple_build_assign (t, temp_addr); - gsi_insert_before (gsi, g, GSI_SAME_STMT); - temp_addr = t; - } - /* Use the build2 helper to set up the mem_ref. The MEM_REF could also - take an offset, but since we've already incorporated the offset - above, here we just pass in a zero. */ - gimple *g; - g = gimple_build_assign (lhs, build2 (MEM_REF, align_ltype, temp_addr, - build_int_cst (arg1_type, 0))); - gimple_set_location (g, loc); - gsi_replace (gsi, g, true); - return true; - } - - /* unaligned Vector stores. */ - case VSX_BUILTIN_STXVW4X_V16QI: - case VSX_BUILTIN_STXVW4X_V8HI: - case VSX_BUILTIN_STXVW4X_V4SF: - case VSX_BUILTIN_STXVW4X_V4SI: - case VSX_BUILTIN_STXVD2X_V2DF: - case VSX_BUILTIN_STXVD2X_V2DI: - { - arg0 = gimple_call_arg (stmt, 0); /* Value to be stored. */ - arg1 = gimple_call_arg (stmt, 1); /* Offset. */ - tree arg2 = gimple_call_arg (stmt, 2); /* Store-to address. */ - location_t loc = gimple_location (stmt); - tree arg0_type = TREE_TYPE (arg0); - /* Use ptr_type_node (no TBAA) for the arg2_type. */ - tree arg2_type = ptr_type_node; - /* In GIMPLE the type of the MEM_REF specifies the alignment. The - required alignment (power) is 4 bytes regardless of data type. */ - tree align_stype = build_aligned_type (arg0_type, 4); - /* POINTER_PLUS_EXPR wants the offset to be of type 'sizetype'. Create - the tree using the value from arg1. */ - gimple_seq stmts = NULL; - tree temp_offset = gimple_convert (&stmts, loc, sizetype, arg1); - tree temp_addr = gimple_build (&stmts, loc, POINTER_PLUS_EXPR, - arg2_type, arg2, temp_offset); - gsi_insert_seq_before (gsi, stmts, GSI_SAME_STMT); - if (!is_gimple_mem_ref_addr (temp_addr)) - { - tree t = make_ssa_name (TREE_TYPE (temp_addr)); - gimple *g = gimple_build_assign (t, temp_addr); - gsi_insert_before (gsi, g, GSI_SAME_STMT); - temp_addr = t; - } - gimple *g; - g = gimple_build_assign (build2 (MEM_REF, align_stype, temp_addr, - build_int_cst (arg2_type, 0)), arg0); - gimple_set_location (g, loc); - gsi_replace (gsi, g, true); - return true; - } - - /* Vector Fused multiply-add (fma). */ - case ALTIVEC_BUILTIN_VMADDFP: - case VSX_BUILTIN_XVMADDDP: - case ALTIVEC_BUILTIN_VMLADDUHM: - { - arg0 = gimple_call_arg (stmt, 0); - arg1 = gimple_call_arg (stmt, 1); - tree arg2 = gimple_call_arg (stmt, 2); - lhs = gimple_call_lhs (stmt); - gcall *g = gimple_build_call_internal (IFN_FMA, 3, arg0, arg1, arg2); - gimple_call_set_lhs (g, lhs); - gimple_call_set_nothrow (g, true); - gimple_set_location (g, gimple_location (stmt)); - gsi_replace (gsi, g, true); - return true; - } - - /* Vector compares; EQ, NE, GE, GT, LE. */ - case ALTIVEC_BUILTIN_VCMPEQUB: - case ALTIVEC_BUILTIN_VCMPEQUH: - case ALTIVEC_BUILTIN_VCMPEQUW: - case P8V_BUILTIN_VCMPEQUD: - case P10V_BUILTIN_VCMPEQUT: - fold_compare_helper (gsi, EQ_EXPR, stmt); - return true; - - case P9V_BUILTIN_CMPNEB: - case P9V_BUILTIN_CMPNEH: - case P9V_BUILTIN_CMPNEW: - case P10V_BUILTIN_CMPNET: - fold_compare_helper (gsi, NE_EXPR, stmt); - return true; - - case VSX_BUILTIN_CMPGE_16QI: - case VSX_BUILTIN_CMPGE_U16QI: - case VSX_BUILTIN_CMPGE_8HI: - case VSX_BUILTIN_CMPGE_U8HI: - case VSX_BUILTIN_CMPGE_4SI: - case VSX_BUILTIN_CMPGE_U4SI: - case VSX_BUILTIN_CMPGE_2DI: - case VSX_BUILTIN_CMPGE_U2DI: - case P10V_BUILTIN_CMPGE_1TI: - case P10V_BUILTIN_CMPGE_U1TI: - fold_compare_helper (gsi, GE_EXPR, stmt); - return true; - - case ALTIVEC_BUILTIN_VCMPGTSB: - case ALTIVEC_BUILTIN_VCMPGTUB: - case ALTIVEC_BUILTIN_VCMPGTSH: - case ALTIVEC_BUILTIN_VCMPGTUH: - case ALTIVEC_BUILTIN_VCMPGTSW: - case ALTIVEC_BUILTIN_VCMPGTUW: - case P8V_BUILTIN_VCMPGTUD: - case P8V_BUILTIN_VCMPGTSD: - case P10V_BUILTIN_VCMPGTUT: - case P10V_BUILTIN_VCMPGTST: - fold_compare_helper (gsi, GT_EXPR, stmt); - return true; - - case VSX_BUILTIN_CMPLE_16QI: - case VSX_BUILTIN_CMPLE_U16QI: - case VSX_BUILTIN_CMPLE_8HI: - case VSX_BUILTIN_CMPLE_U8HI: - case VSX_BUILTIN_CMPLE_4SI: - case VSX_BUILTIN_CMPLE_U4SI: - case VSX_BUILTIN_CMPLE_2DI: - case VSX_BUILTIN_CMPLE_U2DI: - case P10V_BUILTIN_CMPLE_1TI: - case P10V_BUILTIN_CMPLE_U1TI: - fold_compare_helper (gsi, LE_EXPR, stmt); - return true; - - /* flavors of vec_splat_[us]{8,16,32}. */ - case ALTIVEC_BUILTIN_VSPLTISB: - case ALTIVEC_BUILTIN_VSPLTISH: - case ALTIVEC_BUILTIN_VSPLTISW: - { - arg0 = gimple_call_arg (stmt, 0); - lhs = gimple_call_lhs (stmt); - - /* Only fold the vec_splat_*() if the lower bits of arg 0 is a - 5-bit signed constant in range -16 to +15. */ - if (TREE_CODE (arg0) != INTEGER_CST - || !IN_RANGE (TREE_INT_CST_LOW (arg0), -16, 15)) - return false; - gimple_seq stmts = NULL; - location_t loc = gimple_location (stmt); - tree splat_value = gimple_convert (&stmts, loc, - TREE_TYPE (TREE_TYPE (lhs)), arg0); - gsi_insert_seq_before (gsi, stmts, GSI_SAME_STMT); - tree splat_tree = build_vector_from_val (TREE_TYPE (lhs), splat_value); - g = gimple_build_assign (lhs, splat_tree); - gimple_set_location (g, gimple_location (stmt)); - gsi_replace (gsi, g, true); - return true; - } - - /* Flavors of vec_splat. */ - /* a = vec_splat (b, 0x3) becomes a = { b[3],b[3],b[3],...}; */ - case ALTIVEC_BUILTIN_VSPLTB: - case ALTIVEC_BUILTIN_VSPLTH: - case ALTIVEC_BUILTIN_VSPLTW: - case VSX_BUILTIN_XXSPLTD_V2DI: - case VSX_BUILTIN_XXSPLTD_V2DF: - { - arg0 = gimple_call_arg (stmt, 0); /* input vector. */ - arg1 = gimple_call_arg (stmt, 1); /* index into arg0. */ - /* Only fold the vec_splat_*() if arg1 is both a constant value and - is a valid index into the arg0 vector. */ - unsigned int n_elts = VECTOR_CST_NELTS (arg0); - if (TREE_CODE (arg1) != INTEGER_CST - || TREE_INT_CST_LOW (arg1) > (n_elts -1)) - return false; - lhs = gimple_call_lhs (stmt); - tree lhs_type = TREE_TYPE (lhs); - tree arg0_type = TREE_TYPE (arg0); - tree splat; - if (TREE_CODE (arg0) == VECTOR_CST) - splat = VECTOR_CST_ELT (arg0, TREE_INT_CST_LOW (arg1)); - else - { - /* Determine (in bits) the length and start location of the - splat value for a call to the tree_vec_extract helper. */ - int splat_elem_size = TREE_INT_CST_LOW (size_in_bytes (arg0_type)) - * BITS_PER_UNIT / n_elts; - int splat_start_bit = TREE_INT_CST_LOW (arg1) * splat_elem_size; - tree len = build_int_cst (bitsizetype, splat_elem_size); - tree start = build_int_cst (bitsizetype, splat_start_bit); - splat = tree_vec_extract (gsi, TREE_TYPE (lhs_type), arg0, - len, start); - } - /* And finally, build the new vector. */ - tree splat_tree = build_vector_from_val (lhs_type, splat); - g = gimple_build_assign (lhs, splat_tree); - gimple_set_location (g, gimple_location (stmt)); - gsi_replace (gsi, g, true); - return true; - } - - /* vec_mergel (integrals). */ - case ALTIVEC_BUILTIN_VMRGLH: - case ALTIVEC_BUILTIN_VMRGLW: - case VSX_BUILTIN_XXMRGLW_4SI: - case ALTIVEC_BUILTIN_VMRGLB: - case VSX_BUILTIN_VEC_MERGEL_V2DI: - case VSX_BUILTIN_XXMRGLW_4SF: - case VSX_BUILTIN_VEC_MERGEL_V2DF: - fold_mergehl_helper (gsi, stmt, 1); - return true; - /* vec_mergeh (integrals). */ - case ALTIVEC_BUILTIN_VMRGHH: - case ALTIVEC_BUILTIN_VMRGHW: - case VSX_BUILTIN_XXMRGHW_4SI: - case ALTIVEC_BUILTIN_VMRGHB: - case VSX_BUILTIN_VEC_MERGEH_V2DI: - case VSX_BUILTIN_XXMRGHW_4SF: - case VSX_BUILTIN_VEC_MERGEH_V2DF: - fold_mergehl_helper (gsi, stmt, 0); - return true; - - /* Flavors of vec_mergee. */ - case P8V_BUILTIN_VMRGEW_V4SI: - case P8V_BUILTIN_VMRGEW_V2DI: - case P8V_BUILTIN_VMRGEW_V4SF: - case P8V_BUILTIN_VMRGEW_V2DF: - fold_mergeeo_helper (gsi, stmt, 0); - return true; - /* Flavors of vec_mergeo. */ - case P8V_BUILTIN_VMRGOW_V4SI: - case P8V_BUILTIN_VMRGOW_V2DI: - case P8V_BUILTIN_VMRGOW_V4SF: - case P8V_BUILTIN_VMRGOW_V2DF: - fold_mergeeo_helper (gsi, stmt, 1); - return true; - - /* d = vec_pack (a, b) */ - case P8V_BUILTIN_VPKUDUM: - case ALTIVEC_BUILTIN_VPKUHUM: - case ALTIVEC_BUILTIN_VPKUWUM: - { - arg0 = gimple_call_arg (stmt, 0); - arg1 = gimple_call_arg (stmt, 1); - lhs = gimple_call_lhs (stmt); - gimple *g = gimple_build_assign (lhs, VEC_PACK_TRUNC_EXPR, arg0, arg1); - gimple_set_location (g, gimple_location (stmt)); - gsi_replace (gsi, g, true); - return true; - } - - /* d = vec_unpackh (a) */ - /* Note that the UNPACK_{HI,LO}_EXPR used in the gimple_build_assign call - in this code is sensitive to endian-ness, and needs to be inverted to - handle both LE and BE targets. */ - case ALTIVEC_BUILTIN_VUPKHSB: - case ALTIVEC_BUILTIN_VUPKHSH: - case P8V_BUILTIN_VUPKHSW: - { - arg0 = gimple_call_arg (stmt, 0); - lhs = gimple_call_lhs (stmt); - if (BYTES_BIG_ENDIAN) - g = gimple_build_assign (lhs, VEC_UNPACK_HI_EXPR, arg0); - else - g = gimple_build_assign (lhs, VEC_UNPACK_LO_EXPR, arg0); - gimple_set_location (g, gimple_location (stmt)); - gsi_replace (gsi, g, true); - return true; - } - /* d = vec_unpackl (a) */ - case ALTIVEC_BUILTIN_VUPKLSB: - case ALTIVEC_BUILTIN_VUPKLSH: - case P8V_BUILTIN_VUPKLSW: - { - arg0 = gimple_call_arg (stmt, 0); - lhs = gimple_call_lhs (stmt); - if (BYTES_BIG_ENDIAN) - g = gimple_build_assign (lhs, VEC_UNPACK_LO_EXPR, arg0); - else - g = gimple_build_assign (lhs, VEC_UNPACK_HI_EXPR, arg0); - gimple_set_location (g, gimple_location (stmt)); - gsi_replace (gsi, g, true); - return true; - } - /* There is no gimple type corresponding with pixel, so just return. */ - case ALTIVEC_BUILTIN_VUPKHPX: - case ALTIVEC_BUILTIN_VUPKLPX: - return false; - - /* vec_perm. */ - case ALTIVEC_BUILTIN_VPERM_16QI: - case ALTIVEC_BUILTIN_VPERM_8HI: - case ALTIVEC_BUILTIN_VPERM_4SI: - case ALTIVEC_BUILTIN_VPERM_2DI: - case ALTIVEC_BUILTIN_VPERM_4SF: - case ALTIVEC_BUILTIN_VPERM_2DF: - { - arg0 = gimple_call_arg (stmt, 0); - arg1 = gimple_call_arg (stmt, 1); - tree permute = gimple_call_arg (stmt, 2); - lhs = gimple_call_lhs (stmt); - location_t loc = gimple_location (stmt); - gimple_seq stmts = NULL; - // convert arg0 and arg1 to match the type of the permute - // for the VEC_PERM_EXPR operation. - tree permute_type = (TREE_TYPE (permute)); - tree arg0_ptype = gimple_build (&stmts, loc, VIEW_CONVERT_EXPR, - permute_type, arg0); - tree arg1_ptype = gimple_build (&stmts, loc, VIEW_CONVERT_EXPR, - permute_type, arg1); - tree lhs_ptype = gimple_build (&stmts, loc, VEC_PERM_EXPR, - permute_type, arg0_ptype, arg1_ptype, - permute); - // Convert the result back to the desired lhs type upon completion. - tree temp = gimple_build (&stmts, loc, VIEW_CONVERT_EXPR, - TREE_TYPE (lhs), lhs_ptype); - gsi_insert_seq_before (gsi, stmts, GSI_SAME_STMT); - g = gimple_build_assign (lhs, temp); - gimple_set_location (g, loc); - gsi_replace (gsi, g, true); - return true; - } - - default: - if (TARGET_DEBUG_BUILTIN) - fprintf (stderr, "gimple builtin intrinsic not matched:%d %s %s\n", - fn_code, fn_name1, fn_name2); - break; - } - - return false; + return rs6000_gimple_fold_new_builtin (gsi); } /* Helper function to sort out which built-ins may be valid without having @@ -14587,299 +11368,7 @@ rs6000_expand_builtin (tree exp, rtx target, rtx subtarget ATTRIBUTE_UNUSED, machine_mode mode ATTRIBUTE_UNUSED, int ignore ATTRIBUTE_UNUSED) { - if (new_builtins_are_live) - return rs6000_expand_new_builtin (exp, target, subtarget, mode, ignore); - - tree fndecl = TREE_OPERAND (CALL_EXPR_FN (exp), 0); - enum rs6000_builtins fcode - = (enum rs6000_builtins) DECL_MD_FUNCTION_CODE (fndecl); - size_t uns_fcode = (size_t)fcode; - const struct builtin_description *d; - size_t i; - rtx ret; - bool success; - HOST_WIDE_INT mask = rs6000_builtin_info[uns_fcode].mask; - bool func_valid_p = ((rs6000_builtin_mask & mask) == mask); - enum insn_code icode = rs6000_builtin_info[uns_fcode].icode; - - /* We have two different modes (KFmode, TFmode) that are the IEEE 128-bit - floating point type, depending on whether long double is the IBM extended - double (KFmode) or long double is IEEE 128-bit (TFmode). It is simpler if - we only define one variant of the built-in function, and switch the code - when defining it, rather than defining two built-ins and using the - overload table in rs6000-c.c to switch between the two. If we don't have - the proper assembler, don't do this switch because CODE_FOR_*kf* and - CODE_FOR_*tf* will be CODE_FOR_nothing. */ - if (FLOAT128_IEEE_P (TFmode)) - switch (icode) - { - default: - break; - - case CODE_FOR_sqrtkf2_odd: icode = CODE_FOR_sqrttf2_odd; break; - case CODE_FOR_trunckfdf2_odd: icode = CODE_FOR_trunctfdf2_odd; break; - case CODE_FOR_addkf3_odd: icode = CODE_FOR_addtf3_odd; break; - case CODE_FOR_subkf3_odd: icode = CODE_FOR_subtf3_odd; break; - case CODE_FOR_mulkf3_odd: icode = CODE_FOR_multf3_odd; break; - case CODE_FOR_divkf3_odd: icode = CODE_FOR_divtf3_odd; break; - case CODE_FOR_fmakf4_odd: icode = CODE_FOR_fmatf4_odd; break; - case CODE_FOR_xsxexpqp_kf: icode = CODE_FOR_xsxexpqp_tf; break; - case CODE_FOR_xsxsigqp_kf: icode = CODE_FOR_xsxsigqp_tf; break; - case CODE_FOR_xststdcnegqp_kf: icode = CODE_FOR_xststdcnegqp_tf; break; - case CODE_FOR_xsiexpqp_kf: icode = CODE_FOR_xsiexpqp_tf; break; - case CODE_FOR_xsiexpqpf_kf: icode = CODE_FOR_xsiexpqpf_tf; break; - case CODE_FOR_xststdcqp_kf: icode = CODE_FOR_xststdcqp_tf; break; - - case CODE_FOR_xscmpexpqp_eq_kf: - icode = CODE_FOR_xscmpexpqp_eq_tf; - break; - - case CODE_FOR_xscmpexpqp_lt_kf: - icode = CODE_FOR_xscmpexpqp_lt_tf; - break; - - case CODE_FOR_xscmpexpqp_gt_kf: - icode = CODE_FOR_xscmpexpqp_gt_tf; - break; - - case CODE_FOR_xscmpexpqp_unordered_kf: - icode = CODE_FOR_xscmpexpqp_unordered_tf; - break; - } - - if (TARGET_DEBUG_BUILTIN) - { - const char *name1 = rs6000_builtin_info[uns_fcode].name; - const char *name2 = (icode != CODE_FOR_nothing) - ? get_insn_name ((int) icode) - : "nothing"; - const char *name3; - - switch (rs6000_builtin_info[uns_fcode].attr & RS6000_BTC_TYPE_MASK) - { - default: name3 = "unknown"; break; - case RS6000_BTC_SPECIAL: name3 = "special"; break; - case RS6000_BTC_UNARY: name3 = "unary"; break; - case RS6000_BTC_BINARY: name3 = "binary"; break; - case RS6000_BTC_TERNARY: name3 = "ternary"; break; - case RS6000_BTC_QUATERNARY:name3 = "quaternary";break; - case RS6000_BTC_PREDICATE: name3 = "predicate"; break; - case RS6000_BTC_ABS: name3 = "abs"; break; - case RS6000_BTC_DST: name3 = "dst"; break; - } - - - fprintf (stderr, - "rs6000_expand_builtin, %s (%d), insn = %s (%d), type=%s%s\n", - (name1) ? name1 : "---", fcode, - (name2) ? name2 : "---", (int) icode, - name3, - func_valid_p ? "" : ", not valid"); - } - - if (!func_valid_p) - { - rs6000_invalid_builtin (fcode); - - /* Given it is invalid, just generate a normal call. */ - return expand_call (exp, target, ignore); - } - - switch (fcode) - { - case RS6000_BUILTIN_RECIP: - return rs6000_expand_binop_builtin (CODE_FOR_recipdf3, exp, target); - - case RS6000_BUILTIN_RECIPF: - return rs6000_expand_binop_builtin (CODE_FOR_recipsf3, exp, target); - - case RS6000_BUILTIN_RSQRTF: - return rs6000_expand_unop_builtin (CODE_FOR_rsqrtsf2, exp, target); - - case RS6000_BUILTIN_RSQRT: - return rs6000_expand_unop_builtin (CODE_FOR_rsqrtdf2, exp, target); - - case POWER7_BUILTIN_BPERMD: - return rs6000_expand_binop_builtin (((TARGET_64BIT) - ? CODE_FOR_bpermd_di - : CODE_FOR_bpermd_si), exp, target); - - case RS6000_BUILTIN_GET_TB: - return rs6000_expand_zeroop_builtin (CODE_FOR_rs6000_get_timebase, - target); - - case RS6000_BUILTIN_MFTB: - return rs6000_expand_zeroop_builtin (((TARGET_64BIT) - ? CODE_FOR_rs6000_mftb_di - : CODE_FOR_rs6000_mftb_si), - target); - - case RS6000_BUILTIN_MFFS: - return rs6000_expand_zeroop_builtin (CODE_FOR_rs6000_mffs, target); - - case RS6000_BUILTIN_MTFSB0: - return rs6000_expand_mtfsb_builtin (CODE_FOR_rs6000_mtfsb0, exp); - - case RS6000_BUILTIN_MTFSB1: - return rs6000_expand_mtfsb_builtin (CODE_FOR_rs6000_mtfsb1, exp); - - case RS6000_BUILTIN_SET_FPSCR_RN: - return rs6000_expand_set_fpscr_rn_builtin (CODE_FOR_rs6000_set_fpscr_rn, - exp); - - case RS6000_BUILTIN_SET_FPSCR_DRN: - return - rs6000_expand_set_fpscr_drn_builtin (CODE_FOR_rs6000_set_fpscr_drn, - exp); - - case RS6000_BUILTIN_MFFSL: - return rs6000_expand_zeroop_builtin (CODE_FOR_rs6000_mffsl, target); - - case RS6000_BUILTIN_MTFSF: - return rs6000_expand_mtfsf_builtin (CODE_FOR_rs6000_mtfsf, exp); - - case RS6000_BUILTIN_CPU_INIT: - case RS6000_BUILTIN_CPU_IS: - case RS6000_BUILTIN_CPU_SUPPORTS: - return cpu_expand_builtin (fcode, exp, target); - - case MISC_BUILTIN_SPEC_BARRIER: - { - emit_insn (gen_speculation_barrier ()); - return NULL_RTX; - } - - case ALTIVEC_BUILTIN_MASK_FOR_LOAD: - { - int icode2 = (BYTES_BIG_ENDIAN ? (int) CODE_FOR_altivec_lvsr_direct - : (int) CODE_FOR_altivec_lvsl_direct); - machine_mode tmode = insn_data[icode2].operand[0].mode; - machine_mode mode = insn_data[icode2].operand[1].mode; - tree arg; - rtx op, addr, pat; - - gcc_assert (TARGET_ALTIVEC); - - arg = CALL_EXPR_ARG (exp, 0); - gcc_assert (POINTER_TYPE_P (TREE_TYPE (arg))); - op = expand_expr (arg, NULL_RTX, Pmode, EXPAND_NORMAL); - addr = memory_address (mode, op); - /* We need to negate the address. */ - op = gen_reg_rtx (GET_MODE (addr)); - emit_insn (gen_rtx_SET (op, gen_rtx_NEG (GET_MODE (addr), addr))); - op = gen_rtx_MEM (mode, op); - - if (target == 0 - || GET_MODE (target) != tmode - || ! (*insn_data[icode2].operand[0].predicate) (target, tmode)) - target = gen_reg_rtx (tmode); - - pat = GEN_FCN (icode2) (target, op); - if (!pat) - return 0; - emit_insn (pat); - - return target; - } - - case ALTIVEC_BUILTIN_VCFUX: - case ALTIVEC_BUILTIN_VCFSX: - case ALTIVEC_BUILTIN_VCTUXS: - case ALTIVEC_BUILTIN_VCTSXS: - /* FIXME: There's got to be a nicer way to handle this case than - constructing a new CALL_EXPR. */ - if (call_expr_nargs (exp) == 1) - { - exp = build_call_nary (TREE_TYPE (exp), CALL_EXPR_FN (exp), - 2, CALL_EXPR_ARG (exp, 0), integer_zero_node); - } - break; - - /* For the pack and unpack int128 routines, fix up the builtin so it - uses the correct IBM128 type. */ - case MISC_BUILTIN_PACK_IF: - if (TARGET_LONG_DOUBLE_128 && !TARGET_IEEEQUAD) - { - icode = CODE_FOR_packtf; - fcode = MISC_BUILTIN_PACK_TF; - uns_fcode = (size_t)fcode; - } - break; - - case MISC_BUILTIN_UNPACK_IF: - if (TARGET_LONG_DOUBLE_128 && !TARGET_IEEEQUAD) - { - icode = CODE_FOR_unpacktf; - fcode = MISC_BUILTIN_UNPACK_TF; - uns_fcode = (size_t)fcode; - } - break; - - default: - break; - } - - if (TARGET_MMA) - { - ret = mma_expand_builtin (exp, target, &success); - - if (success) - return ret; - } - if (TARGET_ALTIVEC) - { - ret = altivec_expand_builtin (exp, target, &success); - - if (success) - return ret; - } - if (TARGET_HTM) - { - ret = htm_expand_builtin (exp, target, &success); - - if (success) - return ret; - } - - unsigned attr = rs6000_builtin_info[uns_fcode].attr & RS6000_BTC_OPND_MASK; - /* RS6000_BTC_SPECIAL represents no-operand operators. */ - gcc_assert (attr == RS6000_BTC_UNARY - || attr == RS6000_BTC_BINARY - || attr == RS6000_BTC_TERNARY - || attr == RS6000_BTC_QUATERNARY - || attr == RS6000_BTC_SPECIAL); - - /* Handle simple unary operations. */ - d = bdesc_1arg; - for (i = 0; i < ARRAY_SIZE (bdesc_1arg); i++, d++) - if (d->code == fcode) - return rs6000_expand_unop_builtin (icode, exp, target); - - /* Handle simple binary operations. */ - d = bdesc_2arg; - for (i = 0; i < ARRAY_SIZE (bdesc_2arg); i++, d++) - if (d->code == fcode) - return rs6000_expand_binop_builtin (icode, exp, target); - - /* Handle simple ternary operations. */ - d = bdesc_3arg; - for (i = 0; i < ARRAY_SIZE (bdesc_3arg); i++, d++) - if (d->code == fcode) - return rs6000_expand_ternop_builtin (icode, exp, target); - - /* Handle simple quaternary operations. */ - d = bdesc_4arg; - for (i = 0; i < ARRAY_SIZE (bdesc_4arg); i++, d++) - if (d->code == fcode) - return rs6000_expand_quaternop_builtin (icode, exp, target); - - /* Handle simple no-argument operations. */ - d = bdesc_0arg; - for (i = 0; i < ARRAY_SIZE (bdesc_0arg); i++, d++) - if (d->code == fcode) - return rs6000_expand_zeroop_builtin (icode, target); - - gcc_unreachable (); + return rs6000_expand_new_builtin (exp, target, subtarget, mode, ignore); } /* Expand ALTIVEC_BUILTIN_MASK_FOR_LOAD. */ @@ -16045,26 +12534,15 @@ void rs6000_init_builtins (void) { tree tdecl; - tree ftype; tree t; - machine_mode mode; - const char *str; if (TARGET_DEBUG_BUILTIN) fprintf (stderr, "rs6000_init_builtins%s%s\n", (TARGET_ALTIVEC) ? ", altivec" : "", (TARGET_VSX) ? ", vsx" : ""); - if (new_builtins_are_live) - V2DI_type_node = rs6000_vector_type ("__vector long long", - long_long_integer_type_node, 2); - else - { - str = TARGET_POWERPC64 ? "__vector long" : "__vector long long"; - V2DI_type_node = rs6000_vector_type (str, - long_long_integer_type_node, - 2); - } + V2DI_type_node = rs6000_vector_type ("__vector long long", + long_long_integer_type_node, 2); ptr_V2DI_type_node = build_pointer_type (build_qualified_type (V2DI_type_node, TYPE_QUAL_CONST)); @@ -16115,18 +12593,9 @@ rs6000_init_builtins (void) = build_pointer_type (build_qualified_type (unsigned_V4SI_type_node, TYPE_QUAL_CONST)); - if (new_builtins_are_live) - unsigned_V2DI_type_node - = rs6000_vector_type ("__vector unsigned long long", - long_long_unsigned_type_node, 2); - else - { - str = TARGET_POWERPC64 - ? "__vector unsigned long" - : "__vector unsigned long long"; - unsigned_V2DI_type_node - = rs6000_vector_type (str, long_long_unsigned_type_node, 2); - } + unsigned_V2DI_type_node + = rs6000_vector_type ("__vector unsigned long long", + long_long_unsigned_type_node, 2); ptr_unsigned_V2DI_type_node = build_pointer_type (build_qualified_type (unsigned_V2DI_type_node, @@ -16502,120 +12971,14 @@ rs6000_init_builtins (void) } } - if (new_builtins_are_live) - { - altivec_builtin_mask_for_load - = rs6000_builtin_decls_x[RS6000_BIF_MASK_FOR_LOAD]; - -#ifdef SUBTARGET_INIT_BUILTINS - SUBTARGET_INIT_BUILTINS; -#endif - return; - } - - /* Create Altivec, VSX and MMA builtins on machines with at least the - general purpose extensions (970 and newer) to allow the use of - the target attribute. */ - if (TARGET_EXTRA_BUILTINS) - { - altivec_init_builtins (); - mma_init_builtins (); - } - if (TARGET_HTM) - htm_init_builtins (); - - if (TARGET_EXTRA_BUILTINS) - rs6000_common_init_builtins (); - - ftype = builtin_function_type (DFmode, DFmode, DFmode, VOIDmode, - RS6000_BUILTIN_RECIP, "__builtin_recipdiv"); - def_builtin ("__builtin_recipdiv", ftype, RS6000_BUILTIN_RECIP); - - ftype = builtin_function_type (SFmode, SFmode, SFmode, VOIDmode, - RS6000_BUILTIN_RECIPF, "__builtin_recipdivf"); - def_builtin ("__builtin_recipdivf", ftype, RS6000_BUILTIN_RECIPF); - - ftype = builtin_function_type (DFmode, DFmode, VOIDmode, VOIDmode, - RS6000_BUILTIN_RSQRT, "__builtin_rsqrt"); - def_builtin ("__builtin_rsqrt", ftype, RS6000_BUILTIN_RSQRT); - - ftype = builtin_function_type (SFmode, SFmode, VOIDmode, VOIDmode, - RS6000_BUILTIN_RSQRTF, "__builtin_rsqrtf"); - def_builtin ("__builtin_rsqrtf", ftype, RS6000_BUILTIN_RSQRTF); - - mode = (TARGET_64BIT) ? DImode : SImode; - ftype = builtin_function_type (mode, mode, mode, VOIDmode, - POWER7_BUILTIN_BPERMD, "__builtin_bpermd"); - def_builtin ("__builtin_bpermd", ftype, POWER7_BUILTIN_BPERMD); - - ftype = build_function_type_list (unsigned_intDI_type_node, - NULL_TREE); - def_builtin ("__builtin_ppc_get_timebase", ftype, RS6000_BUILTIN_GET_TB); - - if (TARGET_64BIT) - ftype = build_function_type_list (unsigned_intDI_type_node, - NULL_TREE); - else - ftype = build_function_type_list (unsigned_intSI_type_node, - NULL_TREE); - def_builtin ("__builtin_ppc_mftb", ftype, RS6000_BUILTIN_MFTB); - - ftype = build_function_type_list (double_type_node, NULL_TREE); - def_builtin ("__builtin_mffs", ftype, RS6000_BUILTIN_MFFS); - - ftype = build_function_type_list (double_type_node, NULL_TREE); - def_builtin ("__builtin_mffsl", ftype, RS6000_BUILTIN_MFFSL); - - ftype = build_function_type_list (void_type_node, - intSI_type_node, - NULL_TREE); - def_builtin ("__builtin_mtfsb0", ftype, RS6000_BUILTIN_MTFSB0); - - ftype = build_function_type_list (void_type_node, - intSI_type_node, - NULL_TREE); - def_builtin ("__builtin_mtfsb1", ftype, RS6000_BUILTIN_MTFSB1); - - ftype = build_function_type_list (void_type_node, - intDI_type_node, - NULL_TREE); - def_builtin ("__builtin_set_fpscr_rn", ftype, RS6000_BUILTIN_SET_FPSCR_RN); - - ftype = build_function_type_list (void_type_node, - intDI_type_node, - NULL_TREE); - def_builtin ("__builtin_set_fpscr_drn", ftype, RS6000_BUILTIN_SET_FPSCR_DRN); - - ftype = build_function_type_list (void_type_node, - intSI_type_node, double_type_node, - NULL_TREE); - def_builtin ("__builtin_mtfsf", ftype, RS6000_BUILTIN_MTFSF); - - ftype = build_function_type_list (void_type_node, NULL_TREE); - def_builtin ("__builtin_cpu_init", ftype, RS6000_BUILTIN_CPU_INIT); - def_builtin ("__builtin_ppc_speculation_barrier", ftype, - MISC_BUILTIN_SPEC_BARRIER); - - ftype = build_function_type_list (bool_int_type_node, const_ptr_type_node, - NULL_TREE); - def_builtin ("__builtin_cpu_is", ftype, RS6000_BUILTIN_CPU_IS); - def_builtin ("__builtin_cpu_supports", ftype, RS6000_BUILTIN_CPU_SUPPORTS); + altivec_builtin_mask_for_load + = rs6000_builtin_decls_x[RS6000_BIF_MASK_FOR_LOAD]; #ifdef SUBTARGET_INIT_BUILTINS SUBTARGET_INIT_BUILTINS; #endif - /* Register the compatibility builtins after all of the normal - builtins have been defined. */ - const struct builtin_compatibility *d = bdesc_compat; - unsigned i; - for (i = 0; i < ARRAY_SIZE (bdesc_compat); i++, d++) - { - tree decl = rs6000_builtin_decls[(int)d->code]; - if (decl != NULL) - add_builtin_function (d->name, TREE_TYPE (decl), (int)d->code, - BUILT_IN_MD, NULL, NULL_TREE); - } + return; } static tree @@ -16637,1573 +13000,7 @@ rs6000_new_builtin_decl (unsigned code, bool /* initialize_p */) tree rs6000_builtin_decl (unsigned code, bool initialize_p ATTRIBUTE_UNUSED) { - if (new_builtins_are_live) - return rs6000_new_builtin_decl (code, initialize_p); - - if (code >= RS6000_BUILTIN_COUNT) - return error_mark_node; - - return rs6000_builtin_decls[code]; -} - -static void -altivec_init_builtins (void) -{ - const struct builtin_description *d; - size_t i; - tree ftype; - tree decl; - - tree pvoid_type_node = build_pointer_type (void_type_node); - - tree int_ftype_opaque - = build_function_type_list (integer_type_node, - opaque_V4SI_type_node, NULL_TREE); - tree opaque_ftype_opaque - = build_function_type_list (integer_type_node, NULL_TREE); - tree opaque_ftype_opaque_int - = build_function_type_list (opaque_V4SI_type_node, - opaque_V4SI_type_node, integer_type_node, NULL_TREE); - tree opaque_ftype_opaque_opaque_int - = build_function_type_list (opaque_V4SI_type_node, - opaque_V4SI_type_node, opaque_V4SI_type_node, - integer_type_node, NULL_TREE); - tree opaque_ftype_opaque_opaque_opaque - = build_function_type_list (opaque_V4SI_type_node, - opaque_V4SI_type_node, opaque_V4SI_type_node, - opaque_V4SI_type_node, NULL_TREE); - tree opaque_ftype_opaque_opaque - = build_function_type_list (opaque_V4SI_type_node, - opaque_V4SI_type_node, opaque_V4SI_type_node, - NULL_TREE); - tree int_ftype_int_opaque_opaque - = build_function_type_list (integer_type_node, - integer_type_node, opaque_V4SI_type_node, - opaque_V4SI_type_node, NULL_TREE); - tree int_ftype_int_v4si_v4si - = build_function_type_list (integer_type_node, - integer_type_node, V4SI_type_node, - V4SI_type_node, NULL_TREE); - tree int_ftype_int_v2di_v2di - = build_function_type_list (integer_type_node, - integer_type_node, V2DI_type_node, - V2DI_type_node, NULL_TREE); - tree int_ftype_int_v1ti_v1ti - = build_function_type_list (integer_type_node, - integer_type_node, V1TI_type_node, - V1TI_type_node, NULL_TREE); - tree void_ftype_v4si - = build_function_type_list (void_type_node, V4SI_type_node, NULL_TREE); - tree v8hi_ftype_void - = build_function_type_list (V8HI_type_node, NULL_TREE); - tree void_ftype_void - = build_function_type_list (void_type_node, NULL_TREE); - tree void_ftype_int - = build_function_type_list (void_type_node, integer_type_node, NULL_TREE); - - tree opaque_ftype_long_pcvoid - = build_function_type_list (opaque_V4SI_type_node, - long_integer_type_node, pcvoid_type_node, - NULL_TREE); - tree v16qi_ftype_pcvoid - = build_function_type_list (V16QI_type_node, - pcvoid_type_node, - NULL_TREE); - tree v16qi_ftype_long_pcvoid - = build_function_type_list (V16QI_type_node, - long_integer_type_node, pcvoid_type_node, - NULL_TREE); - tree v8hi_ftype_long_pcvoid - = build_function_type_list (V8HI_type_node, - long_integer_type_node, pcvoid_type_node, - NULL_TREE); - tree v4si_ftype_long_pcvoid - = build_function_type_list (V4SI_type_node, - long_integer_type_node, pcvoid_type_node, - NULL_TREE); - tree v4sf_ftype_long_pcvoid - = build_function_type_list (V4SF_type_node, - long_integer_type_node, pcvoid_type_node, - NULL_TREE); - tree v2df_ftype_long_pcvoid - = build_function_type_list (V2DF_type_node, - long_integer_type_node, pcvoid_type_node, - NULL_TREE); - tree v2di_ftype_long_pcvoid - = build_function_type_list (V2DI_type_node, - long_integer_type_node, pcvoid_type_node, - NULL_TREE); - tree v1ti_ftype_long_pcvoid - = build_function_type_list (V1TI_type_node, - long_integer_type_node, pcvoid_type_node, - NULL_TREE); - - tree void_ftype_opaque_long_pvoid - = build_function_type_list (void_type_node, - opaque_V4SI_type_node, long_integer_type_node, - pvoid_type_node, NULL_TREE); - tree void_ftype_v4si_long_pvoid - = build_function_type_list (void_type_node, - V4SI_type_node, long_integer_type_node, - pvoid_type_node, NULL_TREE); - tree void_ftype_v16qi_long_pvoid - = build_function_type_list (void_type_node, - V16QI_type_node, long_integer_type_node, - pvoid_type_node, NULL_TREE); - - tree void_ftype_v16qi_pvoid_long - = build_function_type_list (void_type_node, - V16QI_type_node, pvoid_type_node, - long_integer_type_node, NULL_TREE); - - tree void_ftype_v8hi_long_pvoid - = build_function_type_list (void_type_node, - V8HI_type_node, long_integer_type_node, - pvoid_type_node, NULL_TREE); - tree void_ftype_v4sf_long_pvoid - = build_function_type_list (void_type_node, - V4SF_type_node, long_integer_type_node, - pvoid_type_node, NULL_TREE); - tree void_ftype_v2df_long_pvoid - = build_function_type_list (void_type_node, - V2DF_type_node, long_integer_type_node, - pvoid_type_node, NULL_TREE); - tree void_ftype_v1ti_long_pvoid - = build_function_type_list (void_type_node, - V1TI_type_node, long_integer_type_node, - pvoid_type_node, NULL_TREE); - tree void_ftype_v2di_long_pvoid - = build_function_type_list (void_type_node, - V2DI_type_node, long_integer_type_node, - pvoid_type_node, NULL_TREE); - tree int_ftype_int_v8hi_v8hi - = build_function_type_list (integer_type_node, - integer_type_node, V8HI_type_node, - V8HI_type_node, NULL_TREE); - tree int_ftype_int_v16qi_v16qi - = build_function_type_list (integer_type_node, - integer_type_node, V16QI_type_node, - V16QI_type_node, NULL_TREE); - tree int_ftype_int_v4sf_v4sf - = build_function_type_list (integer_type_node, - integer_type_node, V4SF_type_node, - V4SF_type_node, NULL_TREE); - tree int_ftype_int_v2df_v2df - = build_function_type_list (integer_type_node, - integer_type_node, V2DF_type_node, - V2DF_type_node, NULL_TREE); - tree v2di_ftype_v2di - = build_function_type_list (V2DI_type_node, V2DI_type_node, NULL_TREE); - tree v4si_ftype_v4si - = build_function_type_list (V4SI_type_node, V4SI_type_node, NULL_TREE); - tree v8hi_ftype_v8hi - = build_function_type_list (V8HI_type_node, V8HI_type_node, NULL_TREE); - tree v16qi_ftype_v16qi - = build_function_type_list (V16QI_type_node, V16QI_type_node, NULL_TREE); - tree v4sf_ftype_v4sf - = build_function_type_list (V4SF_type_node, V4SF_type_node, NULL_TREE); - tree v2df_ftype_v2df - = build_function_type_list (V2DF_type_node, V2DF_type_node, NULL_TREE); - tree void_ftype_pcvoid_int_int - = build_function_type_list (void_type_node, - pcvoid_type_node, integer_type_node, - integer_type_node, NULL_TREE); - - def_builtin ("__builtin_altivec_mtvscr", void_ftype_v4si, ALTIVEC_BUILTIN_MTVSCR); - def_builtin ("__builtin_altivec_mfvscr", v8hi_ftype_void, ALTIVEC_BUILTIN_MFVSCR); - def_builtin ("__builtin_altivec_dssall", void_ftype_void, ALTIVEC_BUILTIN_DSSALL); - def_builtin ("__builtin_altivec_dss", void_ftype_int, ALTIVEC_BUILTIN_DSS); - def_builtin ("__builtin_altivec_lvsl", v16qi_ftype_long_pcvoid, ALTIVEC_BUILTIN_LVSL); - def_builtin ("__builtin_altivec_lvsr", v16qi_ftype_long_pcvoid, ALTIVEC_BUILTIN_LVSR); - def_builtin ("__builtin_altivec_lvebx", v16qi_ftype_long_pcvoid, ALTIVEC_BUILTIN_LVEBX); - def_builtin ("__builtin_altivec_lvehx", v8hi_ftype_long_pcvoid, ALTIVEC_BUILTIN_LVEHX); - def_builtin ("__builtin_altivec_lvewx", v4si_ftype_long_pcvoid, ALTIVEC_BUILTIN_LVEWX); - def_builtin ("__builtin_altivec_se_lxvrbx", v16qi_ftype_long_pcvoid, P10_BUILTIN_SE_LXVRBX); - def_builtin ("__builtin_altivec_se_lxvrhx", v8hi_ftype_long_pcvoid, P10_BUILTIN_SE_LXVRHX); - def_builtin ("__builtin_altivec_se_lxvrwx", v4si_ftype_long_pcvoid, P10_BUILTIN_SE_LXVRWX); - def_builtin ("__builtin_altivec_se_lxvrdx", v2di_ftype_long_pcvoid, P10_BUILTIN_SE_LXVRDX); - def_builtin ("__builtin_altivec_ze_lxvrbx", v16qi_ftype_long_pcvoid, P10_BUILTIN_ZE_LXVRBX); - def_builtin ("__builtin_altivec_ze_lxvrhx", v8hi_ftype_long_pcvoid, P10_BUILTIN_ZE_LXVRHX); - def_builtin ("__builtin_altivec_ze_lxvrwx", v4si_ftype_long_pcvoid, P10_BUILTIN_ZE_LXVRWX); - def_builtin ("__builtin_altivec_ze_lxvrdx", v2di_ftype_long_pcvoid, P10_BUILTIN_ZE_LXVRDX); - def_builtin ("__builtin_altivec_tr_stxvrbx", void_ftype_v1ti_long_pvoid, P10_BUILTIN_TR_STXVRBX); - def_builtin ("__builtin_altivec_tr_stxvrhx", void_ftype_v1ti_long_pvoid, P10_BUILTIN_TR_STXVRHX); - def_builtin ("__builtin_altivec_tr_stxvrwx", void_ftype_v1ti_long_pvoid, P10_BUILTIN_TR_STXVRWX); - def_builtin ("__builtin_altivec_tr_stxvrdx", void_ftype_v1ti_long_pvoid, P10_BUILTIN_TR_STXVRDX); - def_builtin ("__builtin_altivec_lvxl", v4si_ftype_long_pcvoid, ALTIVEC_BUILTIN_LVXL); - def_builtin ("__builtin_altivec_lvxl_v2df", v2df_ftype_long_pcvoid, - ALTIVEC_BUILTIN_LVXL_V2DF); - def_builtin ("__builtin_altivec_lvxl_v2di", v2di_ftype_long_pcvoid, - ALTIVEC_BUILTIN_LVXL_V2DI); - def_builtin ("__builtin_altivec_lvxl_v4sf", v4sf_ftype_long_pcvoid, - ALTIVEC_BUILTIN_LVXL_V4SF); - def_builtin ("__builtin_altivec_lvxl_v4si", v4si_ftype_long_pcvoid, - ALTIVEC_BUILTIN_LVXL_V4SI); - def_builtin ("__builtin_altivec_lvxl_v8hi", v8hi_ftype_long_pcvoid, - ALTIVEC_BUILTIN_LVXL_V8HI); - def_builtin ("__builtin_altivec_lvxl_v16qi", v16qi_ftype_long_pcvoid, - ALTIVEC_BUILTIN_LVXL_V16QI); - def_builtin ("__builtin_altivec_lvx", v4si_ftype_long_pcvoid, ALTIVEC_BUILTIN_LVX); - def_builtin ("__builtin_altivec_lvx_v1ti", v1ti_ftype_long_pcvoid, - ALTIVEC_BUILTIN_LVX_V1TI); - def_builtin ("__builtin_altivec_lvx_v2df", v2df_ftype_long_pcvoid, - ALTIVEC_BUILTIN_LVX_V2DF); - def_builtin ("__builtin_altivec_lvx_v2di", v2di_ftype_long_pcvoid, - ALTIVEC_BUILTIN_LVX_V2DI); - def_builtin ("__builtin_altivec_lvx_v4sf", v4sf_ftype_long_pcvoid, - ALTIVEC_BUILTIN_LVX_V4SF); - def_builtin ("__builtin_altivec_lvx_v4si", v4si_ftype_long_pcvoid, - ALTIVEC_BUILTIN_LVX_V4SI); - def_builtin ("__builtin_altivec_lvx_v8hi", v8hi_ftype_long_pcvoid, - ALTIVEC_BUILTIN_LVX_V8HI); - def_builtin ("__builtin_altivec_lvx_v16qi", v16qi_ftype_long_pcvoid, - ALTIVEC_BUILTIN_LVX_V16QI); - def_builtin ("__builtin_altivec_stvx", void_ftype_v4si_long_pvoid, ALTIVEC_BUILTIN_STVX); - def_builtin ("__builtin_altivec_stvx_v2df", void_ftype_v2df_long_pvoid, - ALTIVEC_BUILTIN_STVX_V2DF); - def_builtin ("__builtin_altivec_stvx_v2di", void_ftype_v2di_long_pvoid, - ALTIVEC_BUILTIN_STVX_V2DI); - def_builtin ("__builtin_altivec_stvx_v4sf", void_ftype_v4sf_long_pvoid, - ALTIVEC_BUILTIN_STVX_V4SF); - def_builtin ("__builtin_altivec_stvx_v4si", void_ftype_v4si_long_pvoid, - ALTIVEC_BUILTIN_STVX_V4SI); - def_builtin ("__builtin_altivec_stvx_v8hi", void_ftype_v8hi_long_pvoid, - ALTIVEC_BUILTIN_STVX_V8HI); - def_builtin ("__builtin_altivec_stvx_v16qi", void_ftype_v16qi_long_pvoid, - ALTIVEC_BUILTIN_STVX_V16QI); - def_builtin ("__builtin_altivec_stvewx", void_ftype_v4si_long_pvoid, ALTIVEC_BUILTIN_STVEWX); - def_builtin ("__builtin_altivec_stvxl", void_ftype_v4si_long_pvoid, ALTIVEC_BUILTIN_STVXL); - def_builtin ("__builtin_altivec_stvxl_v2df", void_ftype_v2df_long_pvoid, - ALTIVEC_BUILTIN_STVXL_V2DF); - def_builtin ("__builtin_altivec_stvxl_v2di", void_ftype_v2di_long_pvoid, - ALTIVEC_BUILTIN_STVXL_V2DI); - def_builtin ("__builtin_altivec_stvxl_v4sf", void_ftype_v4sf_long_pvoid, - ALTIVEC_BUILTIN_STVXL_V4SF); - def_builtin ("__builtin_altivec_stvxl_v4si", void_ftype_v4si_long_pvoid, - ALTIVEC_BUILTIN_STVXL_V4SI); - def_builtin ("__builtin_altivec_stvxl_v8hi", void_ftype_v8hi_long_pvoid, - ALTIVEC_BUILTIN_STVXL_V8HI); - def_builtin ("__builtin_altivec_stvxl_v16qi", void_ftype_v16qi_long_pvoid, - ALTIVEC_BUILTIN_STVXL_V16QI); - def_builtin ("__builtin_altivec_stvebx", void_ftype_v16qi_long_pvoid, ALTIVEC_BUILTIN_STVEBX); - def_builtin ("__builtin_altivec_stvehx", void_ftype_v8hi_long_pvoid, ALTIVEC_BUILTIN_STVEHX); - def_builtin ("__builtin_vec_ld", opaque_ftype_long_pcvoid, ALTIVEC_BUILTIN_VEC_LD); - def_builtin ("__builtin_vec_lde", opaque_ftype_long_pcvoid, ALTIVEC_BUILTIN_VEC_LDE); - def_builtin ("__builtin_vec_ldl", opaque_ftype_long_pcvoid, ALTIVEC_BUILTIN_VEC_LDL); - def_builtin ("__builtin_vec_lvsl", v16qi_ftype_long_pcvoid, ALTIVEC_BUILTIN_VEC_LVSL); - def_builtin ("__builtin_vec_lvsr", v16qi_ftype_long_pcvoid, ALTIVEC_BUILTIN_VEC_LVSR); - def_builtin ("__builtin_vec_lvebx", v16qi_ftype_long_pcvoid, ALTIVEC_BUILTIN_VEC_LVEBX); - def_builtin ("__builtin_vec_lvehx", v8hi_ftype_long_pcvoid, ALTIVEC_BUILTIN_VEC_LVEHX); - def_builtin ("__builtin_vec_lvewx", v4si_ftype_long_pcvoid, ALTIVEC_BUILTIN_VEC_LVEWX); - def_builtin ("__builtin_vec_se_lxvrx", v1ti_ftype_long_pcvoid, P10_BUILTIN_VEC_SE_LXVRX); - def_builtin ("__builtin_vec_ze_lxvrx", v1ti_ftype_long_pcvoid, P10_BUILTIN_VEC_ZE_LXVRX); - def_builtin ("__builtin_vec_tr_stxvrx", void_ftype_opaque_long_pvoid, P10_BUILTIN_VEC_TR_STXVRX); - def_builtin ("__builtin_vec_st", void_ftype_opaque_long_pvoid, ALTIVEC_BUILTIN_VEC_ST); - def_builtin ("__builtin_vec_ste", void_ftype_opaque_long_pvoid, ALTIVEC_BUILTIN_VEC_STE); - def_builtin ("__builtin_vec_stl", void_ftype_opaque_long_pvoid, ALTIVEC_BUILTIN_VEC_STL); - def_builtin ("__builtin_vec_stvewx", void_ftype_opaque_long_pvoid, ALTIVEC_BUILTIN_VEC_STVEWX); - def_builtin ("__builtin_vec_stvebx", void_ftype_opaque_long_pvoid, ALTIVEC_BUILTIN_VEC_STVEBX); - def_builtin ("__builtin_vec_stvehx", void_ftype_opaque_long_pvoid, ALTIVEC_BUILTIN_VEC_STVEHX); - - def_builtin ("__builtin_vsx_lxvd2x_v2df", v2df_ftype_long_pcvoid, - VSX_BUILTIN_LXVD2X_V2DF); - def_builtin ("__builtin_vsx_lxvd2x_v2di", v2di_ftype_long_pcvoid, - VSX_BUILTIN_LXVD2X_V2DI); - def_builtin ("__builtin_vsx_lxvw4x_v4sf", v4sf_ftype_long_pcvoid, - VSX_BUILTIN_LXVW4X_V4SF); - def_builtin ("__builtin_vsx_lxvw4x_v4si", v4si_ftype_long_pcvoid, - VSX_BUILTIN_LXVW4X_V4SI); - def_builtin ("__builtin_vsx_lxvw4x_v8hi", v8hi_ftype_long_pcvoid, - VSX_BUILTIN_LXVW4X_V8HI); - def_builtin ("__builtin_vsx_lxvw4x_v16qi", v16qi_ftype_long_pcvoid, - VSX_BUILTIN_LXVW4X_V16QI); - def_builtin ("__builtin_vsx_stxvd2x_v2df", void_ftype_v2df_long_pvoid, - VSX_BUILTIN_STXVD2X_V2DF); - def_builtin ("__builtin_vsx_stxvd2x_v2di", void_ftype_v2di_long_pvoid, - VSX_BUILTIN_STXVD2X_V2DI); - def_builtin ("__builtin_vsx_stxvw4x_v4sf", void_ftype_v4sf_long_pvoid, - VSX_BUILTIN_STXVW4X_V4SF); - def_builtin ("__builtin_vsx_stxvw4x_v4si", void_ftype_v4si_long_pvoid, - VSX_BUILTIN_STXVW4X_V4SI); - def_builtin ("__builtin_vsx_stxvw4x_v8hi", void_ftype_v8hi_long_pvoid, - VSX_BUILTIN_STXVW4X_V8HI); - def_builtin ("__builtin_vsx_stxvw4x_v16qi", void_ftype_v16qi_long_pvoid, - VSX_BUILTIN_STXVW4X_V16QI); - - def_builtin ("__builtin_vsx_ld_elemrev_v2df", v2df_ftype_long_pcvoid, - VSX_BUILTIN_LD_ELEMREV_V2DF); - def_builtin ("__builtin_vsx_ld_elemrev_v2di", v2di_ftype_long_pcvoid, - VSX_BUILTIN_LD_ELEMREV_V2DI); - def_builtin ("__builtin_vsx_ld_elemrev_v4sf", v4sf_ftype_long_pcvoid, - VSX_BUILTIN_LD_ELEMREV_V4SF); - def_builtin ("__builtin_vsx_ld_elemrev_v4si", v4si_ftype_long_pcvoid, - VSX_BUILTIN_LD_ELEMREV_V4SI); - def_builtin ("__builtin_vsx_ld_elemrev_v8hi", v8hi_ftype_long_pcvoid, - VSX_BUILTIN_LD_ELEMREV_V8HI); - def_builtin ("__builtin_vsx_ld_elemrev_v16qi", v16qi_ftype_long_pcvoid, - VSX_BUILTIN_LD_ELEMREV_V16QI); - def_builtin ("__builtin_vsx_st_elemrev_v2df", void_ftype_v2df_long_pvoid, - VSX_BUILTIN_ST_ELEMREV_V2DF); - def_builtin ("__builtin_vsx_st_elemrev_v1ti", void_ftype_v1ti_long_pvoid, - VSX_BUILTIN_ST_ELEMREV_V1TI); - def_builtin ("__builtin_vsx_st_elemrev_v2di", void_ftype_v2di_long_pvoid, - VSX_BUILTIN_ST_ELEMREV_V2DI); - def_builtin ("__builtin_vsx_st_elemrev_v4sf", void_ftype_v4sf_long_pvoid, - VSX_BUILTIN_ST_ELEMREV_V4SF); - def_builtin ("__builtin_vsx_st_elemrev_v4si", void_ftype_v4si_long_pvoid, - VSX_BUILTIN_ST_ELEMREV_V4SI); - def_builtin ("__builtin_vsx_st_elemrev_v8hi", void_ftype_v8hi_long_pvoid, - VSX_BUILTIN_ST_ELEMREV_V8HI); - def_builtin ("__builtin_vsx_st_elemrev_v16qi", void_ftype_v16qi_long_pvoid, - VSX_BUILTIN_ST_ELEMREV_V16QI); - - def_builtin ("__builtin_vec_vsx_ld", opaque_ftype_long_pcvoid, - VSX_BUILTIN_VEC_LD); - def_builtin ("__builtin_vec_vsx_st", void_ftype_opaque_long_pvoid, - VSX_BUILTIN_VEC_ST); - def_builtin ("__builtin_vec_xl", opaque_ftype_long_pcvoid, - VSX_BUILTIN_VEC_XL); - def_builtin ("__builtin_vec_xl_be", opaque_ftype_long_pcvoid, - VSX_BUILTIN_VEC_XL_BE); - def_builtin ("__builtin_vec_xst", void_ftype_opaque_long_pvoid, - VSX_BUILTIN_VEC_XST); - def_builtin ("__builtin_vec_xst_be", void_ftype_opaque_long_pvoid, - VSX_BUILTIN_VEC_XST_BE); - - def_builtin ("__builtin_vec_step", int_ftype_opaque, ALTIVEC_BUILTIN_VEC_STEP); - def_builtin ("__builtin_vec_splats", opaque_ftype_opaque, ALTIVEC_BUILTIN_VEC_SPLATS); - def_builtin ("__builtin_vec_promote", opaque_ftype_opaque, ALTIVEC_BUILTIN_VEC_PROMOTE); - - def_builtin ("__builtin_vec_sld", opaque_ftype_opaque_opaque_int, ALTIVEC_BUILTIN_VEC_SLD); - def_builtin ("__builtin_vec_splat", opaque_ftype_opaque_int, ALTIVEC_BUILTIN_VEC_SPLAT); - def_builtin ("__builtin_vec_extract", opaque_ftype_opaque_int, ALTIVEC_BUILTIN_VEC_EXTRACT); - def_builtin ("__builtin_vec_insert", opaque_ftype_opaque_opaque_int, ALTIVEC_BUILTIN_VEC_INSERT); - def_builtin ("__builtin_vec_vspltw", opaque_ftype_opaque_int, ALTIVEC_BUILTIN_VEC_VSPLTW); - def_builtin ("__builtin_vec_vsplth", opaque_ftype_opaque_int, ALTIVEC_BUILTIN_VEC_VSPLTH); - def_builtin ("__builtin_vec_vspltb", opaque_ftype_opaque_int, ALTIVEC_BUILTIN_VEC_VSPLTB); - def_builtin ("__builtin_vec_ctf", opaque_ftype_opaque_int, ALTIVEC_BUILTIN_VEC_CTF); - def_builtin ("__builtin_vec_vcfsx", opaque_ftype_opaque_int, ALTIVEC_BUILTIN_VEC_VCFSX); - def_builtin ("__builtin_vec_vcfux", opaque_ftype_opaque_int, ALTIVEC_BUILTIN_VEC_VCFUX); - def_builtin ("__builtin_vec_cts", opaque_ftype_opaque_int, ALTIVEC_BUILTIN_VEC_CTS); - def_builtin ("__builtin_vec_ctu", opaque_ftype_opaque_int, ALTIVEC_BUILTIN_VEC_CTU); - - def_builtin ("__builtin_vec_adde", opaque_ftype_opaque_opaque_opaque, - ALTIVEC_BUILTIN_VEC_ADDE); - def_builtin ("__builtin_vec_addec", opaque_ftype_opaque_opaque_opaque, - ALTIVEC_BUILTIN_VEC_ADDEC); - def_builtin ("__builtin_vec_cmpne", opaque_ftype_opaque_opaque, - ALTIVEC_BUILTIN_VEC_CMPNE); - def_builtin ("__builtin_vec_mul", opaque_ftype_opaque_opaque, - ALTIVEC_BUILTIN_VEC_MUL); - def_builtin ("__builtin_vec_sube", opaque_ftype_opaque_opaque_opaque, - ALTIVEC_BUILTIN_VEC_SUBE); - def_builtin ("__builtin_vec_subec", opaque_ftype_opaque_opaque_opaque, - ALTIVEC_BUILTIN_VEC_SUBEC); - - /* Cell builtins. */ - def_builtin ("__builtin_altivec_lvlx", v16qi_ftype_long_pcvoid, ALTIVEC_BUILTIN_LVLX); - def_builtin ("__builtin_altivec_lvlxl", v16qi_ftype_long_pcvoid, ALTIVEC_BUILTIN_LVLXL); - def_builtin ("__builtin_altivec_lvrx", v16qi_ftype_long_pcvoid, ALTIVEC_BUILTIN_LVRX); - def_builtin ("__builtin_altivec_lvrxl", v16qi_ftype_long_pcvoid, ALTIVEC_BUILTIN_LVRXL); - - def_builtin ("__builtin_vec_lvlx", v16qi_ftype_long_pcvoid, ALTIVEC_BUILTIN_VEC_LVLX); - def_builtin ("__builtin_vec_lvlxl", v16qi_ftype_long_pcvoid, ALTIVEC_BUILTIN_VEC_LVLXL); - def_builtin ("__builtin_vec_lvrx", v16qi_ftype_long_pcvoid, ALTIVEC_BUILTIN_VEC_LVRX); - def_builtin ("__builtin_vec_lvrxl", v16qi_ftype_long_pcvoid, ALTIVEC_BUILTIN_VEC_LVRXL); - - def_builtin ("__builtin_altivec_stvlx", void_ftype_v16qi_long_pvoid, ALTIVEC_BUILTIN_STVLX); - def_builtin ("__builtin_altivec_stvlxl", void_ftype_v16qi_long_pvoid, ALTIVEC_BUILTIN_STVLXL); - def_builtin ("__builtin_altivec_stvrx", void_ftype_v16qi_long_pvoid, ALTIVEC_BUILTIN_STVRX); - def_builtin ("__builtin_altivec_stvrxl", void_ftype_v16qi_long_pvoid, ALTIVEC_BUILTIN_STVRXL); - - def_builtin ("__builtin_vec_stvlx", void_ftype_v16qi_long_pvoid, ALTIVEC_BUILTIN_VEC_STVLX); - def_builtin ("__builtin_vec_stvlxl", void_ftype_v16qi_long_pvoid, ALTIVEC_BUILTIN_VEC_STVLXL); - def_builtin ("__builtin_vec_stvrx", void_ftype_v16qi_long_pvoid, ALTIVEC_BUILTIN_VEC_STVRX); - def_builtin ("__builtin_vec_stvrxl", void_ftype_v16qi_long_pvoid, ALTIVEC_BUILTIN_VEC_STVRXL); - - if (TARGET_P9_VECTOR) - { - def_builtin ("__builtin_altivec_stxvl", void_ftype_v16qi_pvoid_long, - P9V_BUILTIN_STXVL); - def_builtin ("__builtin_altivec_xst_len_r", void_ftype_v16qi_pvoid_long, - P9V_BUILTIN_XST_LEN_R); - } - - /* Add the DST variants. */ - d = bdesc_dst; - for (i = 0; i < ARRAY_SIZE (bdesc_dst); i++, d++) - { - /* It is expected that these dst built-in functions may have - d->icode equal to CODE_FOR_nothing. */ - def_builtin (d->name, void_ftype_pcvoid_int_int, d->code); - } - - /* Initialize the predicates. */ - d = bdesc_altivec_preds; - for (i = 0; i < ARRAY_SIZE (bdesc_altivec_preds); i++, d++) - { - machine_mode mode1; - tree type; - - if (rs6000_overloaded_builtin_p (d->code)) - mode1 = VOIDmode; - else - { - /* Cannot define builtin if the instruction is disabled. */ - gcc_assert (d->icode != CODE_FOR_nothing); - mode1 = insn_data[d->icode].operand[1].mode; - } - - switch (mode1) - { - case E_VOIDmode: - type = int_ftype_int_opaque_opaque; - break; - case E_V1TImode: - type = int_ftype_int_v1ti_v1ti; - break; - case E_V2DImode: - type = int_ftype_int_v2di_v2di; - break; - case E_V4SImode: - type = int_ftype_int_v4si_v4si; - break; - case E_V8HImode: - type = int_ftype_int_v8hi_v8hi; - break; - case E_V16QImode: - type = int_ftype_int_v16qi_v16qi; - break; - case E_V4SFmode: - type = int_ftype_int_v4sf_v4sf; - break; - case E_V2DFmode: - type = int_ftype_int_v2df_v2df; - break; - default: - gcc_unreachable (); - } - - def_builtin (d->name, type, d->code); - } - - /* Initialize the abs* operators. */ - d = bdesc_abs; - for (i = 0; i < ARRAY_SIZE (bdesc_abs); i++, d++) - { - machine_mode mode0; - tree type; - - /* Cannot define builtin if the instruction is disabled. */ - gcc_assert (d->icode != CODE_FOR_nothing); - mode0 = insn_data[d->icode].operand[0].mode; - - switch (mode0) - { - case E_V2DImode: - type = v2di_ftype_v2di; - break; - case E_V4SImode: - type = v4si_ftype_v4si; - break; - case E_V8HImode: - type = v8hi_ftype_v8hi; - break; - case E_V16QImode: - type = v16qi_ftype_v16qi; - break; - case E_V4SFmode: - type = v4sf_ftype_v4sf; - break; - case E_V2DFmode: - type = v2df_ftype_v2df; - break; - default: - gcc_unreachable (); - } - - def_builtin (d->name, type, d->code); - } - - /* Initialize target builtin that implements - targetm.vectorize.builtin_mask_for_load. */ - - decl = add_builtin_function ("__builtin_altivec_mask_for_load", - v16qi_ftype_pcvoid, - ALTIVEC_BUILTIN_MASK_FOR_LOAD, - BUILT_IN_MD, NULL, NULL_TREE); - TREE_READONLY (decl) = 1; - if (TARGET_DEBUG_BUILTIN) - { - tree arg_type = TREE_VALUE (TYPE_ARG_TYPES (v16qi_ftype_pcvoid)); - fprintf (stderr, "%s __builtin_altivec_mask_for_load (%s); [%4d]\n", - rs6000_type_string (TREE_TYPE (v16qi_ftype_pcvoid)), - rs6000_type_string (arg_type), - (int) ALTIVEC_BUILTIN_MASK_FOR_LOAD); - } - /* Record the decl. Will be used by rs6000_builtin_mask_for_load. */ - altivec_builtin_mask_for_load = decl; - - /* Access to the vec_init patterns. */ - ftype = build_function_type_list (V4SI_type_node, integer_type_node, - integer_type_node, integer_type_node, - integer_type_node, NULL_TREE); - def_builtin ("__builtin_vec_init_v4si", ftype, ALTIVEC_BUILTIN_VEC_INIT_V4SI); - - ftype = build_function_type_list (V8HI_type_node, short_integer_type_node, - short_integer_type_node, - short_integer_type_node, - short_integer_type_node, - short_integer_type_node, - short_integer_type_node, - short_integer_type_node, - short_integer_type_node, NULL_TREE); - def_builtin ("__builtin_vec_init_v8hi", ftype, ALTIVEC_BUILTIN_VEC_INIT_V8HI); - - ftype = build_function_type_list (V16QI_type_node, char_type_node, - char_type_node, char_type_node, - char_type_node, char_type_node, - char_type_node, char_type_node, - char_type_node, char_type_node, - char_type_node, char_type_node, - char_type_node, char_type_node, - char_type_node, char_type_node, - char_type_node, NULL_TREE); - def_builtin ("__builtin_vec_init_v16qi", ftype, - ALTIVEC_BUILTIN_VEC_INIT_V16QI); - - ftype = build_function_type_list (V4SF_type_node, float_type_node, - float_type_node, float_type_node, - float_type_node, NULL_TREE); - def_builtin ("__builtin_vec_init_v4sf", ftype, ALTIVEC_BUILTIN_VEC_INIT_V4SF); - - /* VSX builtins. */ - ftype = build_function_type_list (V2DF_type_node, double_type_node, - double_type_node, NULL_TREE); - def_builtin ("__builtin_vec_init_v2df", ftype, VSX_BUILTIN_VEC_INIT_V2DF); - - ftype = build_function_type_list (V2DI_type_node, intDI_type_node, - intDI_type_node, NULL_TREE); - def_builtin ("__builtin_vec_init_v2di", ftype, VSX_BUILTIN_VEC_INIT_V2DI); - - /* Access to the vec_set patterns. */ - ftype = build_function_type_list (V4SI_type_node, V4SI_type_node, - intSI_type_node, - integer_type_node, NULL_TREE); - def_builtin ("__builtin_vec_set_v4si", ftype, ALTIVEC_BUILTIN_VEC_SET_V4SI); - - ftype = build_function_type_list (V8HI_type_node, V8HI_type_node, - intHI_type_node, - integer_type_node, NULL_TREE); - def_builtin ("__builtin_vec_set_v8hi", ftype, ALTIVEC_BUILTIN_VEC_SET_V8HI); - - ftype = build_function_type_list (V16QI_type_node, V16QI_type_node, - intQI_type_node, - integer_type_node, NULL_TREE); - def_builtin ("__builtin_vec_set_v16qi", ftype, ALTIVEC_BUILTIN_VEC_SET_V16QI); - - ftype = build_function_type_list (V4SF_type_node, V4SF_type_node, - float_type_node, - integer_type_node, NULL_TREE); - def_builtin ("__builtin_vec_set_v4sf", ftype, ALTIVEC_BUILTIN_VEC_SET_V4SF); - - ftype = build_function_type_list (V2DF_type_node, V2DF_type_node, - double_type_node, - integer_type_node, NULL_TREE); - def_builtin ("__builtin_vec_set_v2df", ftype, VSX_BUILTIN_VEC_SET_V2DF); - - ftype = build_function_type_list (V2DI_type_node, V2DI_type_node, - intDI_type_node, - integer_type_node, NULL_TREE); - def_builtin ("__builtin_vec_set_v2di", ftype, VSX_BUILTIN_VEC_SET_V2DI); - - /* Access to the vec_extract patterns. */ - ftype = build_function_type_list (intSI_type_node, V4SI_type_node, - integer_type_node, NULL_TREE); - def_builtin ("__builtin_vec_ext_v4si", ftype, ALTIVEC_BUILTIN_VEC_EXT_V4SI); - - ftype = build_function_type_list (intHI_type_node, V8HI_type_node, - integer_type_node, NULL_TREE); - def_builtin ("__builtin_vec_ext_v8hi", ftype, ALTIVEC_BUILTIN_VEC_EXT_V8HI); - - ftype = build_function_type_list (intQI_type_node, V16QI_type_node, - integer_type_node, NULL_TREE); - def_builtin ("__builtin_vec_ext_v16qi", ftype, ALTIVEC_BUILTIN_VEC_EXT_V16QI); - - ftype = build_function_type_list (float_type_node, V4SF_type_node, - integer_type_node, NULL_TREE); - def_builtin ("__builtin_vec_ext_v4sf", ftype, ALTIVEC_BUILTIN_VEC_EXT_V4SF); - - ftype = build_function_type_list (double_type_node, V2DF_type_node, - integer_type_node, NULL_TREE); - def_builtin ("__builtin_vec_ext_v2df", ftype, VSX_BUILTIN_VEC_EXT_V2DF); - - ftype = build_function_type_list (intDI_type_node, V2DI_type_node, - integer_type_node, NULL_TREE); - def_builtin ("__builtin_vec_ext_v2di", ftype, VSX_BUILTIN_VEC_EXT_V2DI); - - - if (V1TI_type_node) - { - tree v1ti_ftype_long_pcvoid - = build_function_type_list (V1TI_type_node, - long_integer_type_node, pcvoid_type_node, - NULL_TREE); - tree void_ftype_v1ti_long_pvoid - = build_function_type_list (void_type_node, - V1TI_type_node, long_integer_type_node, - pvoid_type_node, NULL_TREE); - def_builtin ("__builtin_vsx_ld_elemrev_v1ti", v1ti_ftype_long_pcvoid, - VSX_BUILTIN_LD_ELEMREV_V1TI); - def_builtin ("__builtin_vsx_lxvd2x_v1ti", v1ti_ftype_long_pcvoid, - VSX_BUILTIN_LXVD2X_V1TI); - def_builtin ("__builtin_vsx_stxvd2x_v1ti", void_ftype_v1ti_long_pvoid, - VSX_BUILTIN_STXVD2X_V1TI); - ftype = build_function_type_list (V1TI_type_node, intTI_type_node, - NULL_TREE, NULL_TREE); - def_builtin ("__builtin_vec_init_v1ti", ftype, VSX_BUILTIN_VEC_INIT_V1TI); - ftype = build_function_type_list (V1TI_type_node, V1TI_type_node, - intTI_type_node, - integer_type_node, NULL_TREE); - def_builtin ("__builtin_vec_set_v1ti", ftype, VSX_BUILTIN_VEC_SET_V1TI); - ftype = build_function_type_list (intTI_type_node, V1TI_type_node, - integer_type_node, NULL_TREE); - def_builtin ("__builtin_vec_ext_v1ti", ftype, VSX_BUILTIN_VEC_EXT_V1TI); - } - -} - -static void -mma_init_builtins (void) -{ - const struct builtin_description *d = bdesc_mma; - - for (unsigned i = 0; i < ARRAY_SIZE (bdesc_mma); i++, d++) - { - tree op[MAX_MMA_OPERANDS], type; - unsigned icode = (unsigned) d->icode; - unsigned attr = rs6000_builtin_info[d->code].attr; - int attr_args = (attr & RS6000_BTC_OPND_MASK); - bool gimple_func = (attr & RS6000_BTC_GIMPLE); - unsigned nopnds = 0; - - if (d->name == 0) - { - if (TARGET_DEBUG_BUILTIN) - fprintf (stderr, "mma_builtin, bdesc_mma[%ld] no name\n", - (long unsigned) i); - continue; - } - - if (gimple_func) - { - gcc_assert (icode == CODE_FOR_nothing); - /* Some MMA built-ins that are expanded into gimple are converted - into internal MMA built-ins that are expanded into rtl. - The internal built-in follows immediately after this built-in. */ - if (d->code != VSX_BUILTIN_LXVP - && d->code != VSX_BUILTIN_STXVP) - { - op[nopnds++] = void_type_node; - icode = d[1].icode; - } - } - else - { - if (!(d->code == MMA_BUILTIN_DISASSEMBLE_ACC_INTERNAL - || d->code == VSX_BUILTIN_DISASSEMBLE_PAIR_INTERNAL) - && (attr & RS6000_BTC_QUAD) == 0) - attr_args--; - - /* Ensure we have the correct number and type of operands. */ - gcc_assert (attr_args == insn_data[icode].n_operands - 1); - } - - /* This is a disassemble pair/acc function. */ - if (d->code == MMA_BUILTIN_DISASSEMBLE_ACC - || d->code == VSX_BUILTIN_DISASSEMBLE_PAIR) - { - op[nopnds++] = build_pointer_type (void_type_node); - if (d->code == MMA_BUILTIN_DISASSEMBLE_ACC) - op[nopnds++] = build_pointer_type (vector_quad_type_node); - else - op[nopnds++] = build_pointer_type (vector_pair_type_node); - } - else if (d->code == VSX_BUILTIN_LXVP) - { - op[nopnds++] = vector_pair_type_node; - op[nopnds++] = sizetype; - op[nopnds++] = build_pointer_type (vector_pair_type_node); - } - else if (d->code == VSX_BUILTIN_STXVP) - { - op[nopnds++] = void_type_node; - op[nopnds++] = vector_pair_type_node; - op[nopnds++] = sizetype; - op[nopnds++] = build_pointer_type (vector_pair_type_node); - } - else - { - /* This is a normal MMA built-in function. */ - unsigned j = 0; - if (attr & RS6000_BTC_QUAD - && d->code != MMA_BUILTIN_DISASSEMBLE_ACC_INTERNAL - && d->code != VSX_BUILTIN_DISASSEMBLE_PAIR_INTERNAL) - j = 1; - for (; j < (unsigned) insn_data[icode].n_operands; j++) - { - machine_mode mode = insn_data[icode].operand[j].mode; - if (gimple_func && mode == XOmode) - op[nopnds++] = build_pointer_type (vector_quad_type_node); - else if (gimple_func - && mode == OOmode - && (d->code == VSX_BUILTIN_BUILD_PAIR - || d->code == VSX_BUILTIN_ASSEMBLE_PAIR)) - op[nopnds++] = build_pointer_type (vector_pair_type_node); - else - /* MMA uses unsigned types. */ - op[nopnds++] = builtin_mode_to_type[mode][1]; - } - } - - switch (nopnds) - { - case 1: - type = build_function_type_list (op[0], NULL_TREE); - break; - case 2: - type = build_function_type_list (op[0], op[1], NULL_TREE); - break; - case 3: - type = build_function_type_list (op[0], op[1], op[2], NULL_TREE); - break; - case 4: - type = build_function_type_list (op[0], op[1], op[2], op[3], - NULL_TREE); - break; - case 5: - type = build_function_type_list (op[0], op[1], op[2], op[3], op[4], - NULL_TREE); - break; - case 6: - type = build_function_type_list (op[0], op[1], op[2], op[3], op[4], - op[5], NULL_TREE); - break; - case 7: - type = build_function_type_list (op[0], op[1], op[2], op[3], op[4], - op[5], op[6], NULL_TREE); - break; - default: - gcc_unreachable (); - } - - def_builtin (d->name, type, d->code); - } -} - -static void -htm_init_builtins (void) -{ - HOST_WIDE_INT builtin_mask = rs6000_builtin_mask; - const struct builtin_description *d; - size_t i; - - d = bdesc_htm; - for (i = 0; i < ARRAY_SIZE (bdesc_htm); i++, d++) - { - tree op[MAX_HTM_OPERANDS], type; - HOST_WIDE_INT mask = d->mask; - unsigned attr = rs6000_builtin_info[d->code].attr; - bool void_func = (attr & RS6000_BTC_VOID); - int attr_args = (attr & RS6000_BTC_OPND_MASK); - int nopnds = 0; - tree gpr_type_node; - tree rettype; - tree argtype; - - /* It is expected that these htm built-in functions may have - d->icode equal to CODE_FOR_nothing. */ - - if (TARGET_32BIT && TARGET_POWERPC64) - gpr_type_node = long_long_unsigned_type_node; - else - gpr_type_node = long_unsigned_type_node; - - if (attr & RS6000_BTC_SPR) - { - rettype = gpr_type_node; - argtype = gpr_type_node; - } - else if (d->code == HTM_BUILTIN_TABORTDC - || d->code == HTM_BUILTIN_TABORTDCI) - { - rettype = unsigned_type_node; - argtype = gpr_type_node; - } - else - { - rettype = unsigned_type_node; - argtype = unsigned_type_node; - } - - if ((mask & builtin_mask) != mask) - { - if (TARGET_DEBUG_BUILTIN) - fprintf (stderr, "htm_builtin, skip binary %s\n", d->name); - continue; - } - - if (d->name == 0) - { - if (TARGET_DEBUG_BUILTIN) - fprintf (stderr, "htm_builtin, bdesc_htm[%ld] no name\n", - (long unsigned) i); - continue; - } - - op[nopnds++] = (void_func) ? void_type_node : rettype; - - if (attr_args == RS6000_BTC_UNARY) - op[nopnds++] = argtype; - else if (attr_args == RS6000_BTC_BINARY) - { - op[nopnds++] = argtype; - op[nopnds++] = argtype; - } - else if (attr_args == RS6000_BTC_TERNARY) - { - op[nopnds++] = argtype; - op[nopnds++] = argtype; - op[nopnds++] = argtype; - } - - switch (nopnds) - { - case 1: - type = build_function_type_list (op[0], NULL_TREE); - break; - case 2: - type = build_function_type_list (op[0], op[1], NULL_TREE); - break; - case 3: - type = build_function_type_list (op[0], op[1], op[2], NULL_TREE); - break; - case 4: - type = build_function_type_list (op[0], op[1], op[2], op[3], - NULL_TREE); - break; - default: - gcc_unreachable (); - } - - def_builtin (d->name, type, d->code); - } -} - -/* Map types for builtin functions with an explicit return type and - exactly 4 arguments. Functions with fewer than 3 arguments use - builtin_function_type. The number of quaternary built-in - functions is very small. Handle each case specially. */ -static tree -builtin_quaternary_function_type (machine_mode mode_ret, - machine_mode mode_arg0, - machine_mode mode_arg1, - machine_mode mode_arg2, - machine_mode mode_arg3, - enum rs6000_builtins builtin) -{ - tree function_type = NULL; - - static tree v2udi_type = builtin_mode_to_type[V2DImode][1]; - static tree v16uqi_type = builtin_mode_to_type[V16QImode][1]; - static tree uchar_type = builtin_mode_to_type[QImode][1]; - - static tree xxeval_type = - build_function_type_list (v2udi_type, v2udi_type, v2udi_type, - v2udi_type, uchar_type, NULL_TREE); - - static tree xxpermx_type = - build_function_type_list (v2udi_type, v2udi_type, v2udi_type, - v16uqi_type, uchar_type, NULL_TREE); - - switch (builtin) { - - case P10V_BUILTIN_XXEVAL: - gcc_assert ((mode_ret == V2DImode) - && (mode_arg0 == V2DImode) - && (mode_arg1 == V2DImode) - && (mode_arg2 == V2DImode) - && (mode_arg3 == QImode)); - function_type = xxeval_type; - break; - - case P10V_BUILTIN_VXXPERMX: - gcc_assert ((mode_ret == V2DImode) - && (mode_arg0 == V2DImode) - && (mode_arg1 == V2DImode) - && (mode_arg2 == V16QImode) - && (mode_arg3 == QImode)); - function_type = xxpermx_type; - break; - - default: - /* A case for each quaternary built-in must be provided above. */ - gcc_unreachable (); - } - - return function_type; -} - -/* Map types for builtin functions with an explicit return type and up to 3 - arguments. Functions with fewer than 3 arguments use VOIDmode as the type - of the argument. */ -static tree -builtin_function_type (machine_mode mode_ret, machine_mode mode_arg0, - machine_mode mode_arg1, machine_mode mode_arg2, - enum rs6000_builtins builtin, const char *name) -{ - struct builtin_hash_struct h; - struct builtin_hash_struct *h2; - int num_args = 3; - int i; - tree ret_type = NULL_TREE; - tree arg_type[3] = { NULL_TREE, NULL_TREE, NULL_TREE }; - - /* Create builtin_hash_table. */ - if (builtin_hash_table == NULL) - builtin_hash_table = hash_table<builtin_hasher>::create_ggc (1500); - - h.type = NULL_TREE; - h.mode[0] = mode_ret; - h.mode[1] = mode_arg0; - h.mode[2] = mode_arg1; - h.mode[3] = mode_arg2; - h.uns_p[0] = 0; - h.uns_p[1] = 0; - h.uns_p[2] = 0; - h.uns_p[3] = 0; - - /* If the builtin is a type that produces unsigned results or takes unsigned - arguments, and it is returned as a decl for the vectorizer (such as - widening multiplies, permute), make sure the arguments and return value - are type correct. */ - switch (builtin) - { - /* unsigned 1 argument functions. */ - case CRYPTO_BUILTIN_VSBOX: - case CRYPTO_BUILTIN_VSBOX_BE: - case P8V_BUILTIN_VGBBD: - case MISC_BUILTIN_CDTBCD: - case MISC_BUILTIN_CBCDTD: - case P10V_BUILTIN_XVCVSPBF16: - case P10V_BUILTIN_XVCVBF16SPN: - case P10V_BUILTIN_MTVSRBM: - case P10V_BUILTIN_MTVSRHM: - case P10V_BUILTIN_MTVSRWM: - case P10V_BUILTIN_MTVSRDM: - case P10V_BUILTIN_MTVSRQM: - case P10V_BUILTIN_VCNTMBB: - case P10V_BUILTIN_VCNTMBH: - case P10V_BUILTIN_VCNTMBW: - case P10V_BUILTIN_VCNTMBD: - case P10V_BUILTIN_VEXPANDMB: - case P10V_BUILTIN_VEXPANDMH: - case P10V_BUILTIN_VEXPANDMW: - case P10V_BUILTIN_VEXPANDMD: - case P10V_BUILTIN_VEXPANDMQ: - h.uns_p[0] = 1; - h.uns_p[1] = 1; - break; - - /* unsigned 2 argument functions. */ - case ALTIVEC_BUILTIN_VMULEUB: - case ALTIVEC_BUILTIN_VMULEUH: - case P8V_BUILTIN_VMULEUW: - case ALTIVEC_BUILTIN_VMULOUB: - case ALTIVEC_BUILTIN_VMULOUH: - case P8V_BUILTIN_VMULOUW: - case CRYPTO_BUILTIN_VCIPHER: - case CRYPTO_BUILTIN_VCIPHER_BE: - case CRYPTO_BUILTIN_VCIPHERLAST: - case CRYPTO_BUILTIN_VCIPHERLAST_BE: - case CRYPTO_BUILTIN_VNCIPHER: - case CRYPTO_BUILTIN_VNCIPHER_BE: - case CRYPTO_BUILTIN_VNCIPHERLAST: - case CRYPTO_BUILTIN_VNCIPHERLAST_BE: - case CRYPTO_BUILTIN_VPMSUMB: - case CRYPTO_BUILTIN_VPMSUMH: - case CRYPTO_BUILTIN_VPMSUMW: - case CRYPTO_BUILTIN_VPMSUMD: - case CRYPTO_BUILTIN_VPMSUM: - case MISC_BUILTIN_ADDG6S: - case MISC_BUILTIN_DIVWEU: - case MISC_BUILTIN_DIVDEU: - case VSX_BUILTIN_UDIV_V2DI: - case ALTIVEC_BUILTIN_VMAXUB: - case ALTIVEC_BUILTIN_VMINUB: - case ALTIVEC_BUILTIN_VMAXUH: - case ALTIVEC_BUILTIN_VMINUH: - case ALTIVEC_BUILTIN_VMAXUW: - case ALTIVEC_BUILTIN_VMINUW: - case P8V_BUILTIN_VMAXUD: - case P8V_BUILTIN_VMINUD: - case ALTIVEC_BUILTIN_VAND_V16QI_UNS: - case ALTIVEC_BUILTIN_VAND_V8HI_UNS: - case ALTIVEC_BUILTIN_VAND_V4SI_UNS: - case ALTIVEC_BUILTIN_VAND_V2DI_UNS: - case ALTIVEC_BUILTIN_VANDC_V16QI_UNS: - case ALTIVEC_BUILTIN_VANDC_V8HI_UNS: - case ALTIVEC_BUILTIN_VANDC_V4SI_UNS: - case ALTIVEC_BUILTIN_VANDC_V2DI_UNS: - case ALTIVEC_BUILTIN_VNOR_V16QI_UNS: - case ALTIVEC_BUILTIN_VNOR_V8HI_UNS: - case ALTIVEC_BUILTIN_VNOR_V4SI_UNS: - case ALTIVEC_BUILTIN_VNOR_V2DI_UNS: - case ALTIVEC_BUILTIN_VOR_V16QI_UNS: - case ALTIVEC_BUILTIN_VOR_V8HI_UNS: - case ALTIVEC_BUILTIN_VOR_V4SI_UNS: - case ALTIVEC_BUILTIN_VOR_V2DI_UNS: - case ALTIVEC_BUILTIN_VXOR_V16QI_UNS: - case ALTIVEC_BUILTIN_VXOR_V8HI_UNS: - case ALTIVEC_BUILTIN_VXOR_V4SI_UNS: - case ALTIVEC_BUILTIN_VXOR_V2DI_UNS: - case P8V_BUILTIN_EQV_V16QI_UNS: - case P8V_BUILTIN_EQV_V8HI_UNS: - case P8V_BUILTIN_EQV_V4SI_UNS: - case P8V_BUILTIN_EQV_V2DI_UNS: - case P8V_BUILTIN_EQV_V1TI_UNS: - case P8V_BUILTIN_NAND_V16QI_UNS: - case P8V_BUILTIN_NAND_V8HI_UNS: - case P8V_BUILTIN_NAND_V4SI_UNS: - case P8V_BUILTIN_NAND_V2DI_UNS: - case P8V_BUILTIN_NAND_V1TI_UNS: - case P8V_BUILTIN_ORC_V16QI_UNS: - case P8V_BUILTIN_ORC_V8HI_UNS: - case P8V_BUILTIN_ORC_V4SI_UNS: - case P8V_BUILTIN_ORC_V2DI_UNS: - case P8V_BUILTIN_ORC_V1TI_UNS: - case P10_BUILTIN_CFUGED: - case P10_BUILTIN_CNTLZDM: - case P10_BUILTIN_CNTTZDM: - case P10_BUILTIN_PDEPD: - case P10_BUILTIN_PEXTD: - case P10V_BUILTIN_VCFUGED: - case P10V_BUILTIN_VCLZDM: - case P10V_BUILTIN_VCTZDM: - case P10V_BUILTIN_VGNB: - case P10V_BUILTIN_VPDEPD: - case P10V_BUILTIN_VPEXTD: - case P10V_BUILTIN_XXGENPCVM_V16QI: - case P10V_BUILTIN_XXGENPCVM_V8HI: - case P10V_BUILTIN_XXGENPCVM_V4SI: - case P10V_BUILTIN_XXGENPCVM_V2DI: - case P10V_BUILTIN_DIVEU_V4SI: - case P10V_BUILTIN_DIVEU_V2DI: - case P10V_BUILTIN_DIVEU_V1TI: - case P10V_BUILTIN_DIVU_V4SI: - case P10V_BUILTIN_DIVU_V2DI: - case P10V_BUILTIN_MODU_V1TI: - case P10V_BUILTIN_MODU_V2DI: - case P10V_BUILTIN_MODU_V4SI: - case P10V_BUILTIN_MULHU_V2DI: - case P10V_BUILTIN_MULHU_V4SI: - case P10V_BUILTIN_VMULEUD: - case P10V_BUILTIN_VMULOUD: - h.uns_p[0] = 1; - h.uns_p[1] = 1; - h.uns_p[2] = 1; - break; - - /* unsigned 3 argument functions. */ - case ALTIVEC_BUILTIN_VPERM_16QI_UNS: - case ALTIVEC_BUILTIN_VPERM_8HI_UNS: - case ALTIVEC_BUILTIN_VPERM_4SI_UNS: - case ALTIVEC_BUILTIN_VPERM_2DI_UNS: - case ALTIVEC_BUILTIN_VSEL_16QI_UNS: - case ALTIVEC_BUILTIN_VSEL_8HI_UNS: - case ALTIVEC_BUILTIN_VSEL_4SI_UNS: - case ALTIVEC_BUILTIN_VSEL_2DI_UNS: - case VSX_BUILTIN_VPERM_16QI_UNS: - case VSX_BUILTIN_VPERM_8HI_UNS: - case VSX_BUILTIN_VPERM_4SI_UNS: - case VSX_BUILTIN_VPERM_2DI_UNS: - case VSX_BUILTIN_XXSEL_16QI_UNS: - case VSX_BUILTIN_XXSEL_8HI_UNS: - case VSX_BUILTIN_XXSEL_4SI_UNS: - case VSX_BUILTIN_XXSEL_2DI_UNS: - case CRYPTO_BUILTIN_VPERMXOR: - case CRYPTO_BUILTIN_VPERMXOR_V2DI: - case CRYPTO_BUILTIN_VPERMXOR_V4SI: - case CRYPTO_BUILTIN_VPERMXOR_V8HI: - case CRYPTO_BUILTIN_VPERMXOR_V16QI: - case CRYPTO_BUILTIN_VSHASIGMAW: - case CRYPTO_BUILTIN_VSHASIGMAD: - case CRYPTO_BUILTIN_VSHASIGMA: - case P10V_BUILTIN_VEXTRACTBL: - case P10V_BUILTIN_VEXTRACTHL: - case P10V_BUILTIN_VEXTRACTWL: - case P10V_BUILTIN_VEXTRACTDL: - case P10V_BUILTIN_VEXTRACTBR: - case P10V_BUILTIN_VEXTRACTHR: - case P10V_BUILTIN_VEXTRACTWR: - case P10V_BUILTIN_VEXTRACTDR: - case P10V_BUILTIN_VINSERTGPRBL: - case P10V_BUILTIN_VINSERTGPRHL: - case P10V_BUILTIN_VINSERTGPRWL: - case P10V_BUILTIN_VINSERTGPRDL: - case P10V_BUILTIN_VINSERTVPRBL: - case P10V_BUILTIN_VINSERTVPRHL: - case P10V_BUILTIN_VINSERTVPRWL: - case P10V_BUILTIN_VREPLACE_ELT_UV4SI: - case P10V_BUILTIN_VREPLACE_ELT_UV2DI: - case P10V_BUILTIN_VREPLACE_UN_UV4SI: - case P10V_BUILTIN_VREPLACE_UN_UV2DI: - case P10V_BUILTIN_VXXBLEND_V16QI: - case P10V_BUILTIN_VXXBLEND_V8HI: - case P10V_BUILTIN_VXXBLEND_V4SI: - case P10V_BUILTIN_VXXBLEND_V2DI: - h.uns_p[0] = 1; - h.uns_p[1] = 1; - h.uns_p[2] = 1; - h.uns_p[3] = 1; - break; - - /* signed permute functions with unsigned char mask. */ - case ALTIVEC_BUILTIN_VPERM_16QI: - case ALTIVEC_BUILTIN_VPERM_8HI: - case ALTIVEC_BUILTIN_VPERM_4SI: - case ALTIVEC_BUILTIN_VPERM_4SF: - case ALTIVEC_BUILTIN_VPERM_2DI: - case ALTIVEC_BUILTIN_VPERM_2DF: - case VSX_BUILTIN_VPERM_16QI: - case VSX_BUILTIN_VPERM_8HI: - case VSX_BUILTIN_VPERM_4SI: - case VSX_BUILTIN_VPERM_4SF: - case VSX_BUILTIN_VPERM_2DI: - case VSX_BUILTIN_VPERM_2DF: - h.uns_p[3] = 1; - break; - - /* unsigned args, signed return. */ - case VSX_BUILTIN_XVCVUXDSP: - case VSX_BUILTIN_XVCVUXDDP_UNS: - case ALTIVEC_BUILTIN_UNSFLOAT_V4SI_V4SF: - h.uns_p[1] = 1; - break; - - /* signed args, unsigned return. */ - case VSX_BUILTIN_XVCVDPUXDS_UNS: - case ALTIVEC_BUILTIN_FIXUNS_V4SF_V4SI: - case MISC_BUILTIN_UNPACK_TD: - case MISC_BUILTIN_UNPACK_V1TI: - h.uns_p[0] = 1; - break; - - /* unsigned arguments, bool return (compares). */ - case ALTIVEC_BUILTIN_VCMPEQUB: - case ALTIVEC_BUILTIN_VCMPEQUH: - case ALTIVEC_BUILTIN_VCMPEQUW: - case P8V_BUILTIN_VCMPEQUD: - case VSX_BUILTIN_CMPGE_U16QI: - case VSX_BUILTIN_CMPGE_U8HI: - case VSX_BUILTIN_CMPGE_U4SI: - case VSX_BUILTIN_CMPGE_U2DI: - case P10V_BUILTIN_CMPGE_U1TI: - case ALTIVEC_BUILTIN_VCMPGTUB: - case ALTIVEC_BUILTIN_VCMPGTUH: - case ALTIVEC_BUILTIN_VCMPGTUW: - case P8V_BUILTIN_VCMPGTUD: - case P10V_BUILTIN_VCMPGTUT: - case P10V_BUILTIN_VCMPEQUT: - h.uns_p[1] = 1; - h.uns_p[2] = 1; - break; - - /* unsigned arguments for 128-bit pack instructions. */ - case MISC_BUILTIN_PACK_TD: - case MISC_BUILTIN_PACK_V1TI: - h.uns_p[1] = 1; - h.uns_p[2] = 1; - break; - - /* unsigned second arguments (vector shift right). */ - case ALTIVEC_BUILTIN_VSRB: - case ALTIVEC_BUILTIN_VSRH: - case ALTIVEC_BUILTIN_VSRW: - case P8V_BUILTIN_VSRD: - /* Vector splat immediate insert */ - case P10V_BUILTIN_VXXSPLTI32DX_V4SI: - case P10V_BUILTIN_VXXSPLTI32DX_V4SF: - h.uns_p[2] = 1; - break; - - case VSX_BUILTIN_LXVP: - h.uns_p[0] = 1; - h.uns_p[2] = 1; - break; - - case VSX_BUILTIN_STXVP: - h.uns_p[1] = 1; - h.uns_p[3] = 1; - break; - - default: - break; - } - - /* Figure out how many args are present. */ - while (num_args > 0 && h.mode[num_args] == VOIDmode) - num_args--; - - ret_type = builtin_mode_to_type[h.mode[0]][h.uns_p[0]]; - if (!ret_type && h.uns_p[0]) - ret_type = builtin_mode_to_type[h.mode[0]][0]; - - /* If the required decimal float type has been disabled, - then return NULL_TREE. */ - if (!ret_type && DECIMAL_FLOAT_MODE_P (h.mode[0])) - return NULL_TREE; - - if (!ret_type) - fatal_error (input_location, - "internal error: builtin function %qs had an unexpected " - "return type %qs", name, GET_MODE_NAME (h.mode[0])); - - for (i = 0; i < (int) ARRAY_SIZE (arg_type); i++) - arg_type[i] = NULL_TREE; - - for (i = 0; i < num_args; i++) - { - int m = (int) h.mode[i+1]; - int uns_p = h.uns_p[i+1]; - - arg_type[i] = builtin_mode_to_type[m][uns_p]; - if (!arg_type[i] && uns_p) - arg_type[i] = builtin_mode_to_type[m][0]; - - /* If the required decimal float type has been disabled, - then return NULL_TREE. */ - if (!arg_type[i] && DECIMAL_FLOAT_MODE_P (m)) - return NULL_TREE; - - if (!arg_type[i]) - fatal_error (input_location, - "internal error: builtin function %qs, argument %d " - "had unexpected argument type %qs", name, i, - GET_MODE_NAME (m)); - } - - builtin_hash_struct **found = builtin_hash_table->find_slot (&h, INSERT); - if (*found == NULL) - { - h2 = ggc_alloc<builtin_hash_struct> (); - *h2 = h; - *found = h2; - - h2->type = build_function_type_list (ret_type, arg_type[0], arg_type[1], - arg_type[2], NULL_TREE); - } - - return (*found)->type; -} - -static void -rs6000_common_init_builtins (void) -{ - const struct builtin_description *d; - size_t i; - - tree opaque_ftype_opaque = NULL_TREE; - tree opaque_ftype_opaque_opaque = NULL_TREE; - tree opaque_ftype_opaque_opaque_opaque = NULL_TREE; - tree opaque_ftype_opaque_opaque_opaque_opaque = NULL_TREE; - HOST_WIDE_INT builtin_mask = rs6000_builtin_mask; - - /* Create Altivec and VSX builtins on machines with at least the - general purpose extensions (970 and newer) to allow the use of - the target attribute. */ - - if (TARGET_EXTRA_BUILTINS) - builtin_mask |= RS6000_BTM_COMMON; - - /* Add the quaternary operators. */ - d = bdesc_4arg; - for (i = 0; i < ARRAY_SIZE (bdesc_4arg); i++, d++) - { - tree type; - HOST_WIDE_INT mask = d->mask; - - if ((mask & builtin_mask) != mask) - { - if (TARGET_DEBUG_BUILTIN) - fprintf (stderr, "rs6000_builtin, skip quaternary %s\n", d->name); - continue; - } - - if (rs6000_overloaded_builtin_p (d->code)) - { - type = opaque_ftype_opaque_opaque_opaque_opaque; - if (!type) - type = opaque_ftype_opaque_opaque_opaque_opaque - = build_function_type_list (opaque_V4SI_type_node, - opaque_V4SI_type_node, - opaque_V4SI_type_node, - opaque_V4SI_type_node, - opaque_V4SI_type_node, - NULL_TREE); - } - else - { - enum insn_code icode = d->icode; - if (d->name == 0) - { - if (TARGET_DEBUG_BUILTIN) - fprintf (stderr, "rs6000_builtin, bdesc_4arg[%ld] no name\n", - (long) i); - continue; - } - - if (icode == CODE_FOR_nothing) - { - if (TARGET_DEBUG_BUILTIN) - fprintf (stderr, - "rs6000_builtin, skip quaternary %s (no code)\n", - d->name); - continue; - } - - type = - builtin_quaternary_function_type (insn_data[icode].operand[0].mode, - insn_data[icode].operand[1].mode, - insn_data[icode].operand[2].mode, - insn_data[icode].operand[3].mode, - insn_data[icode].operand[4].mode, - d->code); - } - def_builtin (d->name, type, d->code); - } - - /* Add the ternary operators. */ - d = bdesc_3arg; - for (i = 0; i < ARRAY_SIZE (bdesc_3arg); i++, d++) - { - tree type; - HOST_WIDE_INT mask = d->mask; - - if ((mask & builtin_mask) != mask) - { - if (TARGET_DEBUG_BUILTIN) - fprintf (stderr, "rs6000_builtin, skip ternary %s\n", d->name); - continue; - } - - if (rs6000_overloaded_builtin_p (d->code)) - { - if (! (type = opaque_ftype_opaque_opaque_opaque)) - type = opaque_ftype_opaque_opaque_opaque - = build_function_type_list (opaque_V4SI_type_node, - opaque_V4SI_type_node, - opaque_V4SI_type_node, - opaque_V4SI_type_node, - NULL_TREE); - } - else - { - enum insn_code icode = d->icode; - if (d->name == 0) - { - if (TARGET_DEBUG_BUILTIN) - fprintf (stderr, "rs6000_builtin, bdesc_3arg[%ld] no name\n", - (long unsigned)i); - - continue; - } - - if (icode == CODE_FOR_nothing) - { - if (TARGET_DEBUG_BUILTIN) - fprintf (stderr, "rs6000_builtin, skip ternary %s (no code)\n", - d->name); - - continue; - } - - type = builtin_function_type (insn_data[icode].operand[0].mode, - insn_data[icode].operand[1].mode, - insn_data[icode].operand[2].mode, - insn_data[icode].operand[3].mode, - d->code, d->name); - } - - def_builtin (d->name, type, d->code); - } - - /* Add the binary operators. */ - d = bdesc_2arg; - for (i = 0; i < ARRAY_SIZE (bdesc_2arg); i++, d++) - { - machine_mode mode0, mode1, mode2; - tree type; - HOST_WIDE_INT mask = d->mask; - - if ((mask & builtin_mask) != mask) - { - if (TARGET_DEBUG_BUILTIN) - fprintf (stderr, "rs6000_builtin, skip binary %s\n", d->name); - continue; - } - - if (rs6000_overloaded_builtin_p (d->code)) - { - const struct altivec_builtin_types *desc; - - /* Verify the builtin we are overloading has already been defined. */ - type = NULL_TREE; - for (desc = altivec_overloaded_builtins; - desc->code != RS6000_BUILTIN_NONE; desc++) - if (desc->code == d->code - && rs6000_builtin_decls[(int)desc->overloaded_code]) - { - if (! (type = opaque_ftype_opaque_opaque)) - type = opaque_ftype_opaque_opaque - = build_function_type_list (opaque_V4SI_type_node, - opaque_V4SI_type_node, - opaque_V4SI_type_node, - NULL_TREE); - break; - } - } - else - { - enum insn_code icode = d->icode; - if (d->name == 0) - { - if (TARGET_DEBUG_BUILTIN) - fprintf (stderr, "rs6000_builtin, bdesc_2arg[%ld] no name\n", - (long unsigned)i); - - continue; - } - - if (icode == CODE_FOR_nothing) - { - if (TARGET_DEBUG_BUILTIN) - fprintf (stderr, "rs6000_builtin, skip binary %s (no code)\n", - d->name); - - continue; - } - - mode0 = insn_data[icode].operand[0].mode; - mode1 = insn_data[icode].operand[1].mode; - mode2 = insn_data[icode].operand[2].mode; - - type = builtin_function_type (mode0, mode1, mode2, VOIDmode, - d->code, d->name); - } - - def_builtin (d->name, type, d->code); - } - - /* Add the simple unary operators. */ - d = bdesc_1arg; - for (i = 0; i < ARRAY_SIZE (bdesc_1arg); i++, d++) - { - machine_mode mode0, mode1; - tree type; - HOST_WIDE_INT mask = d->mask; - - if ((mask & builtin_mask) != mask) - { - if (TARGET_DEBUG_BUILTIN) - fprintf (stderr, "rs6000_builtin, skip unary %s\n", d->name); - continue; - } - - if (rs6000_overloaded_builtin_p (d->code)) - { - if (! (type = opaque_ftype_opaque)) - type = opaque_ftype_opaque - = build_function_type_list (opaque_V4SI_type_node, - opaque_V4SI_type_node, - NULL_TREE); - } - else - { - enum insn_code icode = d->icode; - if (d->name == 0) - { - if (TARGET_DEBUG_BUILTIN) - fprintf (stderr, "rs6000_builtin, bdesc_1arg[%ld] no name\n", - (long unsigned)i); - - continue; - } - - if (icode == CODE_FOR_nothing) - { - if (TARGET_DEBUG_BUILTIN) - fprintf (stderr, "rs6000_builtin, skip unary %s (no code)\n", - d->name); - - continue; - } - - mode0 = insn_data[icode].operand[0].mode; - mode1 = insn_data[icode].operand[1].mode; - - type = builtin_function_type (mode0, mode1, VOIDmode, VOIDmode, - d->code, d->name); - } - - def_builtin (d->name, type, d->code); - } - - /* Add the simple no-argument operators. */ - d = bdesc_0arg; - for (i = 0; i < ARRAY_SIZE (bdesc_0arg); i++, d++) - { - machine_mode mode0; - tree type; - HOST_WIDE_INT mask = d->mask; - - if ((mask & builtin_mask) != mask) - { - if (TARGET_DEBUG_BUILTIN) - fprintf (stderr, "rs6000_builtin, skip no-argument %s\n", d->name); - continue; - } - if (rs6000_overloaded_builtin_p (d->code)) - { - if (!opaque_ftype_opaque) - opaque_ftype_opaque - = build_function_type_list (opaque_V4SI_type_node, NULL_TREE); - type = opaque_ftype_opaque; - } - else - { - enum insn_code icode = d->icode; - if (d->name == 0) - { - if (TARGET_DEBUG_BUILTIN) - fprintf (stderr, "rs6000_builtin, bdesc_0arg[%lu] no name\n", - (long unsigned) i); - continue; - } - if (icode == CODE_FOR_nothing) - { - if (TARGET_DEBUG_BUILTIN) - fprintf (stderr, - "rs6000_builtin, skip no-argument %s (no code)\n", - d->name); - continue; - } - mode0 = insn_data[icode].operand[0].mode; - type = builtin_function_type (mode0, VOIDmode, VOIDmode, VOIDmode, - d->code, d->name); - } - def_builtin (d->name, type, d->code); - } + return rs6000_new_builtin_decl (code, initialize_p); } /* Return the internal arg pointer used for function incoming diff --git a/gcc/config/rs6000/rs6000-gen-builtins.c b/gcc/config/rs6000/rs6000-gen-builtins.c index d2e9c4ce547..78b2486aafc 100644 --- a/gcc/config/rs6000/rs6000-gen-builtins.c +++ b/gcc/config/rs6000/rs6000-gen-builtins.c @@ -2485,7 +2485,6 @@ write_header_file (void) fprintf (header_file, "#ifndef _RS6000_BUILTINS_H\n"); fprintf (header_file, "#define _RS6000_BUILTINS_H 1\n\n"); - fprintf (header_file, "extern int new_builtins_are_live;\n\n"); write_decls (); @@ -2682,68 +2681,64 @@ write_init_bif_table (void) || strstr (bifs[i].fndecl, "dd") != NULL || strstr (bifs[i].fndecl, "td") != NULL); - fprintf (init_file, - " if (new_builtins_are_live)\n"); - fprintf (init_file, " {\n"); - if (tf_found) { - fprintf (init_file, " if (float128_type_node)\n"); - fprintf (init_file, " {\n"); + fprintf (init_file, " if (float128_type_node)\n"); + fprintf (init_file, " {\n"); } else if (dfp_found) { - fprintf (init_file, " if (dfloat64_type_node)\n"); - fprintf (init_file, " {\n"); + fprintf (init_file, " if (dfloat64_type_node)\n"); + fprintf (init_file, " {\n"); } fprintf (init_file, - " rs6000_builtin_decls_x[(int)RS6000_BIF_%s] = t\n", + " rs6000_builtin_decls_x[(int)RS6000_BIF_%s] = t\n", bifs[i].idname); fprintf (init_file, - " = add_builtin_function (\"%s\",\n", + " = add_builtin_function (\"%s\",\n", bifs[i].proto.bifname); fprintf (init_file, - " %s,\n", + " %s,\n", bifs[i].fndecl); fprintf (init_file, - " (int)RS6000_BIF_%s," + " (int)RS6000_BIF_%s," " BUILT_IN_MD,\n", bifs[i].idname); fprintf (init_file, - " NULL, NULL_TREE);\n"); + " NULL, NULL_TREE);\n"); if (bifs[i].kind == FNK_CONST) { - fprintf (init_file, " TREE_READONLY (t) = 1;\n"); - fprintf (init_file, " TREE_NOTHROW (t) = 1;\n"); + fprintf (init_file, " TREE_READONLY (t) = 1;\n"); + fprintf (init_file, " TREE_NOTHROW (t) = 1;\n"); } else if (bifs[i].kind == FNK_PURE) { - fprintf (init_file, " DECL_PURE_P (t) = 1;\n"); - fprintf (init_file, " TREE_NOTHROW (t) = 1;\n"); + fprintf (init_file, " DECL_PURE_P (t) = 1;\n"); + fprintf (init_file, " TREE_NOTHROW (t) = 1;\n"); } else if (bifs[i].kind == FNK_FPMATH) { - fprintf (init_file, " TREE_NOTHROW (t) = 1;\n"); - fprintf (init_file, " if (flag_rounding_math)\n"); - fprintf (init_file, " {\n"); - fprintf (init_file, " DECL_PURE_P (t) = 1;\n"); - fprintf (init_file, " DECL_IS_NOVOPS (t) = 1;\n"); - fprintf (init_file, " }\n"); - fprintf (init_file, " else\n"); - fprintf (init_file, " TREE_READONLY (t) = 1;\n"); + fprintf (init_file, " TREE_NOTHROW (t) = 1;\n"); + fprintf (init_file, " if (flag_rounding_math)\n"); + fprintf (init_file, " {\n"); + fprintf (init_file, " DECL_PURE_P (t) = 1;\n"); + fprintf (init_file, " DECL_IS_NOVOPS (t) = 1;\n"); + fprintf (init_file, " }\n"); + fprintf (init_file, " else\n"); + fprintf (init_file, " TREE_READONLY (t) = 1;\n"); } if (tf_found || dfp_found) { - fprintf (init_file, " }\n"); - fprintf (init_file, " else\n"); - fprintf (init_file, " {\n"); - fprintf (init_file, " rs6000_builtin_decls_x" + fprintf (init_file, " }\n"); + fprintf (init_file, " else\n"); + fprintf (init_file, " {\n"); + fprintf (init_file, " rs6000_builtin_decls_x" "[(int)RS6000_BIF_%s] = NULL_TREE;\n", bifs[i].idname); - fprintf (init_file, " }\n"); + fprintf (init_file, " }\n"); } - fprintf (init_file, " }\n\n"); + fprintf (init_file, "\n"); } } @@ -2780,41 +2775,37 @@ write_init_ovld_table (void) || strstr (ovlds[i].fndecl, "dd") != NULL || strstr (ovlds[i].fndecl, "td") != NULL); - fprintf (init_file, - " if (new_builtins_are_live)\n"); - fprintf (init_file, " {\n"); - if (tf_found) { - fprintf (init_file, " if (float128_type_node)\n"); - fprintf (init_file, " {\n"); + fprintf (init_file, " if (float128_type_node)\n"); + fprintf (init_file, " {\n"); } else if (dfp_found) { - fprintf (init_file, " if (dfloat64_type_node)\n"); - fprintf (init_file, " {\n"); + fprintf (init_file, " if (dfloat64_type_node)\n"); + fprintf (init_file, " {\n"); } fprintf (init_file, - " rs6000_builtin_decls_x[(int)RS6000_OVLD_%s] = t\n", + " rs6000_builtin_decls_x[(int)RS6000_OVLD_%s] = t\n", stanza->stanza_id); fprintf (init_file, - " = add_builtin_function (\"%s\",\n", + " = add_builtin_function (\"%s\",\n", stanza->intern_name); fprintf (init_file, - " %s,\n", + " %s,\n", ovlds[i].fndecl); fprintf (init_file, - " (int)RS6000_OVLD_%s," + " (int)RS6000_OVLD_%s," " BUILT_IN_MD,\n", stanza->stanza_id); fprintf (init_file, - " NULL, NULL_TREE);\n"); + " NULL, NULL_TREE);\n"); if (tf_found || dfp_found) - fprintf (init_file, " }\n"); + fprintf (init_file, " }\n"); - fprintf (init_file, " }\n\n"); + fprintf (init_file, "\n"); fprintf (init_file, " rs6000_overload_info[RS6000_OVLD_%s - base]" @@ -2845,8 +2836,6 @@ write_init_file (void) fprintf (init_file, "#include \"rs6000-builtins.h\"\n"); fprintf (init_file, "\n"); - fprintf (init_file, "int new_builtins_are_live = 1;\n\n"); - fprintf (init_file, "tree rs6000_builtin_decls_x[RS6000_OVLD_MAX];\n\n"); write_bif_static_init (); diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c index 5e129986516..70df511ff98 100644 --- a/gcc/config/rs6000/rs6000.c +++ b/gcc/config/rs6000/rs6000.c @@ -5929,132 +5929,7 @@ static tree rs6000_builtin_vectorized_function (unsigned int fn, tree type_out, tree type_in) { - machine_mode in_mode, out_mode; - int in_n, out_n; - - if (new_builtins_are_live) - return rs6000_new_builtin_vectorized_function (fn, type_out, type_in); - - if (TARGET_DEBUG_BUILTIN) - fprintf (stderr, "rs6000_builtin_vectorized_function (%s, %s, %s)\n", - combined_fn_name (combined_fn (fn)), - GET_MODE_NAME (TYPE_MODE (type_out)), - GET_MODE_NAME (TYPE_MODE (type_in))); - - if (TREE_CODE (type_out) != VECTOR_TYPE - || TREE_CODE (type_in) != VECTOR_TYPE) - return NULL_TREE; - - out_mode = TYPE_MODE (TREE_TYPE (type_out)); - out_n = TYPE_VECTOR_SUBPARTS (type_out); - in_mode = TYPE_MODE (TREE_TYPE (type_in)); - in_n = TYPE_VECTOR_SUBPARTS (type_in); - - switch (fn) - { - CASE_CFN_COPYSIGN: - if (VECTOR_UNIT_VSX_P (V2DFmode) - && out_mode == DFmode && out_n == 2 - && in_mode == DFmode && in_n == 2) - return rs6000_builtin_decls[VSX_BUILTIN_CPSGNDP]; - if (VECTOR_UNIT_VSX_P (V4SFmode) - && out_mode == SFmode && out_n == 4 - && in_mode == SFmode && in_n == 4) - return rs6000_builtin_decls[VSX_BUILTIN_CPSGNSP]; - if (VECTOR_UNIT_ALTIVEC_P (V4SFmode) - && out_mode == SFmode && out_n == 4 - && in_mode == SFmode && in_n == 4) - return rs6000_builtin_decls[ALTIVEC_BUILTIN_COPYSIGN_V4SF]; - break; - CASE_CFN_CEIL: - if (VECTOR_UNIT_VSX_P (V2DFmode) - && out_mode == DFmode && out_n == 2 - && in_mode == DFmode && in_n == 2) - return rs6000_builtin_decls[VSX_BUILTIN_XVRDPIP]; - if (VECTOR_UNIT_VSX_P (V4SFmode) - && out_mode == SFmode && out_n == 4 - && in_mode == SFmode && in_n == 4) - return rs6000_builtin_decls[VSX_BUILTIN_XVRSPIP]; - if (VECTOR_UNIT_ALTIVEC_P (V4SFmode) - && out_mode == SFmode && out_n == 4 - && in_mode == SFmode && in_n == 4) - return rs6000_builtin_decls[ALTIVEC_BUILTIN_VRFIP]; - break; - CASE_CFN_FLOOR: - if (VECTOR_UNIT_VSX_P (V2DFmode) - && out_mode == DFmode && out_n == 2 - && in_mode == DFmode && in_n == 2) - return rs6000_builtin_decls[VSX_BUILTIN_XVRDPIM]; - if (VECTOR_UNIT_VSX_P (V4SFmode) - && out_mode == SFmode && out_n == 4 - && in_mode == SFmode && in_n == 4) - return rs6000_builtin_decls[VSX_BUILTIN_XVRSPIM]; - if (VECTOR_UNIT_ALTIVEC_P (V4SFmode) - && out_mode == SFmode && out_n == 4 - && in_mode == SFmode && in_n == 4) - return rs6000_builtin_decls[ALTIVEC_BUILTIN_VRFIM]; - break; - CASE_CFN_FMA: - if (VECTOR_UNIT_VSX_P (V2DFmode) - && out_mode == DFmode && out_n == 2 - && in_mode == DFmode && in_n == 2) - return rs6000_builtin_decls[VSX_BUILTIN_XVMADDDP]; - if (VECTOR_UNIT_VSX_P (V4SFmode) - && out_mode == SFmode && out_n == 4 - && in_mode == SFmode && in_n == 4) - return rs6000_builtin_decls[VSX_BUILTIN_XVMADDSP]; - if (VECTOR_UNIT_ALTIVEC_P (V4SFmode) - && out_mode == SFmode && out_n == 4 - && in_mode == SFmode && in_n == 4) - return rs6000_builtin_decls[ALTIVEC_BUILTIN_VMADDFP]; - break; - CASE_CFN_TRUNC: - if (VECTOR_UNIT_VSX_P (V2DFmode) - && out_mode == DFmode && out_n == 2 - && in_mode == DFmode && in_n == 2) - return rs6000_builtin_decls[VSX_BUILTIN_XVRDPIZ]; - if (VECTOR_UNIT_VSX_P (V4SFmode) - && out_mode == SFmode && out_n == 4 - && in_mode == SFmode && in_n == 4) - return rs6000_builtin_decls[VSX_BUILTIN_XVRSPIZ]; - if (VECTOR_UNIT_ALTIVEC_P (V4SFmode) - && out_mode == SFmode && out_n == 4 - && in_mode == SFmode && in_n == 4) - return rs6000_builtin_decls[ALTIVEC_BUILTIN_VRFIZ]; - break; - CASE_CFN_NEARBYINT: - if (VECTOR_UNIT_VSX_P (V2DFmode) - && flag_unsafe_math_optimizations - && out_mode == DFmode && out_n == 2 - && in_mode == DFmode && in_n == 2) - return rs6000_builtin_decls[VSX_BUILTIN_XVRDPI]; - if (VECTOR_UNIT_VSX_P (V4SFmode) - && flag_unsafe_math_optimizations - && out_mode == SFmode && out_n == 4 - && in_mode == SFmode && in_n == 4) - return rs6000_builtin_decls[VSX_BUILTIN_XVRSPI]; - break; - CASE_CFN_RINT: - if (VECTOR_UNIT_VSX_P (V2DFmode) - && !flag_trapping_math - && out_mode == DFmode && out_n == 2 - && in_mode == DFmode && in_n == 2) - return rs6000_builtin_decls[VSX_BUILTIN_XVRDPIC]; - if (VECTOR_UNIT_VSX_P (V4SFmode) - && !flag_trapping_math - && out_mode == SFmode && out_n == 4 - && in_mode == SFmode && in_n == 4) - return rs6000_builtin_decls[VSX_BUILTIN_XVRSPIC]; - break; - default: - break; - } - - /* Generate calls to libmass if appropriate. */ - if (rs6000_veclib_handler) - return rs6000_veclib_handler (combined_fn (fn), type_out, type_in); - - return NULL_TREE; + return rs6000_new_builtin_vectorized_function (fn, type_out, type_in); } /* Implement TARGET_VECTORIZE_BUILTIN_MD_VECTORIZED_FUNCTION. */ @@ -6063,113 +5938,7 @@ static tree rs6000_builtin_md_vectorized_function (tree fndecl, tree type_out, tree type_in) { - machine_mode in_mode, out_mode; - int in_n, out_n; - - if (new_builtins_are_live) - return rs6000_new_builtin_md_vectorized_function (fndecl, type_out, - type_in); - - if (TARGET_DEBUG_BUILTIN) - fprintf (stderr, "rs6000_builtin_md_vectorized_function (%s, %s, %s)\n", - IDENTIFIER_POINTER (DECL_NAME (fndecl)), - GET_MODE_NAME (TYPE_MODE (type_out)), - GET_MODE_NAME (TYPE_MODE (type_in))); - - if (TREE_CODE (type_out) != VECTOR_TYPE - || TREE_CODE (type_in) != VECTOR_TYPE) - return NULL_TREE; - - out_mode = TYPE_MODE (TREE_TYPE (type_out)); - out_n = TYPE_VECTOR_SUBPARTS (type_out); - in_mode = TYPE_MODE (TREE_TYPE (type_in)); - in_n = TYPE_VECTOR_SUBPARTS (type_in); - - enum rs6000_builtins fn - = (enum rs6000_builtins) DECL_MD_FUNCTION_CODE (fndecl); - switch (fn) - { - case RS6000_BUILTIN_RSQRTF: - if (VECTOR_UNIT_ALTIVEC_OR_VSX_P (V4SFmode) - && out_mode == SFmode && out_n == 4 - && in_mode == SFmode && in_n == 4) - return rs6000_builtin_decls[ALTIVEC_BUILTIN_VRSQRTFP]; - break; - case RS6000_BUILTIN_RSQRT: - if (VECTOR_UNIT_VSX_P (V2DFmode) - && out_mode == DFmode && out_n == 2 - && in_mode == DFmode && in_n == 2) - return rs6000_builtin_decls[VSX_BUILTIN_RSQRT_2DF]; - break; - case RS6000_BUILTIN_RECIPF: - if (VECTOR_UNIT_ALTIVEC_OR_VSX_P (V4SFmode) - && out_mode == SFmode && out_n == 4 - && in_mode == SFmode && in_n == 4) - return rs6000_builtin_decls[ALTIVEC_BUILTIN_VRECIPFP]; - break; - case RS6000_BUILTIN_RECIP: - if (VECTOR_UNIT_VSX_P (V2DFmode) - && out_mode == DFmode && out_n == 2 - && in_mode == DFmode && in_n == 2) - return rs6000_builtin_decls[VSX_BUILTIN_RECIP_V2DF]; - break; - default: - break; - } - - machine_mode in_vmode = TYPE_MODE (type_in); - machine_mode out_vmode = TYPE_MODE (type_out); - - /* Power10 supported vectorized built-in functions. */ - if (TARGET_POWER10 - && in_vmode == out_vmode - && VECTOR_UNIT_ALTIVEC_OR_VSX_P (in_vmode)) - { - machine_mode exp_mode = DImode; - machine_mode exp_vmode = V2DImode; - enum rs6000_builtins bif; - switch (fn) - { - case MISC_BUILTIN_DIVWE: - case MISC_BUILTIN_DIVWEU: - exp_mode = SImode; - exp_vmode = V4SImode; - if (fn == MISC_BUILTIN_DIVWE) - bif = P10V_BUILTIN_DIVES_V4SI; - else - bif = P10V_BUILTIN_DIVEU_V4SI; - break; - case MISC_BUILTIN_DIVDE: - case MISC_BUILTIN_DIVDEU: - if (fn == MISC_BUILTIN_DIVDE) - bif = P10V_BUILTIN_DIVES_V2DI; - else - bif = P10V_BUILTIN_DIVEU_V2DI; - break; - case P10_BUILTIN_CFUGED: - bif = P10V_BUILTIN_VCFUGED; - break; - case P10_BUILTIN_CNTLZDM: - bif = P10V_BUILTIN_VCLZDM; - break; - case P10_BUILTIN_CNTTZDM: - bif = P10V_BUILTIN_VCTZDM; - break; - case P10_BUILTIN_PDEPD: - bif = P10V_BUILTIN_VPDEPD; - break; - case P10_BUILTIN_PEXTD: - bif = P10V_BUILTIN_VPEXTD; - break; - default: - return NULL_TREE; - } - - if (in_mode == exp_mode && in_vmode == exp_vmode) - return rs6000_builtin_decls[bif]; - } - - return NULL_TREE; + return rs6000_new_builtin_md_vectorized_function (fndecl, type_out, type_in); } \f /* Default CPU string for rs6000*_file_start functions. */ @@ -22749,17 +22518,13 @@ rs6000_builtin_reciprocal (tree fndecl) if (!RS6000_RECIP_AUTO_RSQRTE_P (V2DFmode)) return NULL_TREE; - if (new_builtins_are_live) - return rs6000_builtin_decls_x[RS6000_BIF_RSQRT_2DF]; - return rs6000_builtin_decls[VSX_BUILTIN_RSQRT_2DF]; + return rs6000_builtin_decls_x[RS6000_BIF_RSQRT_2DF]; case RS6000_BIF_XVSQRTSP: if (!RS6000_RECIP_AUTO_RSQRTE_P (V4SFmode)) return NULL_TREE; - if (new_builtins_are_live) - return rs6000_builtin_decls_x[RS6000_BIF_RSQRT_4SF]; - return rs6000_builtin_decls[VSX_BUILTIN_RSQRT_4SF]; + return rs6000_builtin_decls_x[RS6000_BIF_RSQRT_4SF]; default: return NULL_TREE; @@ -25381,10 +25146,7 @@ add_condition_to_bb (tree function_decl, tree version_decl, tree bool_zero = build_int_cst (bool_int_type_node, 0); tree cond_var = create_tmp_var (bool_int_type_node); - tree predicate_decl - = new_builtins_are_live - ? rs6000_builtin_decls_x[(int) RS6000_BIF_CPU_SUPPORTS] - : rs6000_builtin_decls [(int) RS6000_BUILTIN_CPU_SUPPORTS]; + tree predicate_decl = rs6000_builtin_decls_x[(int) RS6000_BIF_CPU_SUPPORTS]; const char *arg_str = rs6000_clone_map[clone_isa].name; tree predicate_arg = build_string_literal (strlen (arg_str) + 1, arg_str); gimple *call_cond_stmt = gimple_build_call (predicate_decl, 1, predicate_arg); @@ -28024,12 +27786,8 @@ rs6000_atomic_assign_expand_fenv (tree *hold, tree *clear, tree *update) return; } - tree mffs - = new_builtins_are_live ? rs6000_builtin_decls_x[RS6000_BIF_MFFS] - : rs6000_builtin_decls[RS6000_BUILTIN_MFFS]; - tree mtfsf - = new_builtins_are_live ? rs6000_builtin_decls_x[RS6000_BIF_MTFSF] - : rs6000_builtin_decls[RS6000_BUILTIN_MTFSF]; + tree mffs = rs6000_builtin_decls_x[RS6000_BIF_MFFS]; + tree mtfsf = rs6000_builtin_decls_x[RS6000_BIF_MTFSF]; tree call_mffs = build_call_expr (mffs, 0); /* Generates the equivalent of feholdexcept (&fenv_var) -- 2.27.0 ^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [PATCH 1/6] rs6000: Remove new_builtins_are_live and dead code it was guarding 2021-12-06 20:49 ` [PATCH 1/6] rs6000: Remove new_builtins_are_live and dead code it was guarding Bill Schmidt @ 2021-12-07 1:09 ` Segher Boessenkool 0 siblings, 0 replies; 20+ messages in thread From: Segher Boessenkool @ 2021-12-07 1:09 UTC (permalink / raw) To: Bill Schmidt; +Cc: gcc-patches, dje.gcc Hi! On Mon, Dec 06, 2021 at 02:49:03PM -0600, Bill Schmidt wrote: > To allow for a sane switch-over from the old built-in infrastructure to the > new, both sets of code have co-existed, with the enabled one under the control > of the boolean variable new_builtins_are_live. As a first step in removing the > old code, remove this variable and the now-dead code it was guarding. > * config/rs6000/darwin.h (SUBTARGET_INIT_BUILTINS): Remove > test for new_builtins_are_live and simplify. Please don't terminate changelog lines early. > * config/rs6000/rs6000-c.c (altivec_build_resolved_builtin): Remove > dead function. Same here, but you may want to keep line length 79 instead of 80, some people like that for some reason. > (altivec_resolve_overloaded_builtin): Remove test for > new_builtins_are_live and simplify. > * config/rs6000/rs6000-call.c (altivec_init_builtins): Remove forward > declaration. > (builtin_function_type): Likewise. > (rs6000_common_init_builtins): Likewise. > (htm_init_builtins): Likewise. > (mma_init_builtins): Likewise. > (def_builtin): Remove dead function. > (rs6000_expand_zeroop_builtin): Likewise. > (rs6000_expand_mtfsf_builtin): Likewise. > (rs6000_expand_mtfsb_builtin): Likewise. > (rs6000_expand_set_fpscr_rn_builtin): Likewise. > (rs6000_expand_set_fpscr_drn_builtin): Likewise. > (rs6000_expand_unop_builtin): Likewise. > (altivec_expand_abs_builtin): Likewise. > (rs6000_expand_binop_builtin): Likewise. > (altivec_expand_lxvr_builtin): Likewise. > (altivec_expand_lv_builtin): Likewise. > (altivec_expand_stxvl_builtin): Likewise. > (altivec_expand_stv_builtin): Likewise. > (mma_expand_builtin): Likewise. > (htm_expand_builtin): Likewise. > (cpu_expand_builtin): Likewise. > (rs6000_expand_quaternop_builtin): Likewise. > (rs6000_expand_ternop_builtin): Likewise. > (altivec_expand_dst_builtin): Likewise. > (altivec_expand_vec_sel_builtin): Likewise. > (altivec_expand_builtin): Likewise. > (rs6000_invalid_builtin): Likewise. > (rs6000_builtin_valid_without_lhs): Likewise. > (rs6000_gimple_fold_builtin): Remove test for new_builtins_are_live and > simplify. > (rs6000_expand_builtin): Likewise. > (rs6000_init_builtins): Remove tests for new_builtins_are_live and > simplify. > (rs6000_builtin_decl): Likewise. > (altivec_init_builtins): Remove dead function. > (mma_init_builtins): Likewise. > (htm_init_builtins): Likewise. > (builtin_quaternary_function_type): Likewise. > (builtin_function_type): Likewise. > (rs6000_common_init_builtins): Likewise. > * config/rs6000/rs6000-gen-builtins.c (write_header_file): Don't > declare new_builtins_are_live. > (write_init_bif_table): In generated code, remove test for > new_builtins_are_live and simplify. > (write_init_ovld_table): Likewise. > (write_init_file): Don't initialize new_builtins_are_live. > * config/rs6000/rs6000.c (rs6000_builtin_vectorized_function): Remove > test for new_builtins_are_live and simplify. > (rs6000_builtin_md_vectorized_function): Likewise. > (rs6000_builtin_reciprocal): Likewise. > (add_condition_to_bb): Likewise. > (rs6000_atomic_assign_expand_fenv): Likewise. You could have said "Remove old builtins code." everywhere ;-) Okay for trunk. Thanks! Segher ^ permalink raw reply [flat|nested] 20+ messages in thread
* [PATCH 2/6] rs6000: Remove altivec_overloaded_builtins array and initialization 2021-12-06 20:49 [PATCH v2 0/6] Remove "old" built-in function infrastructure Bill Schmidt 2021-12-06 20:49 ` [PATCH 1/6] rs6000: Remove new_builtins_are_live and dead code it was guarding Bill Schmidt @ 2021-12-06 20:49 ` Bill Schmidt 2021-12-14 17:57 ` [PATCH v2 " Bill Schmidt 2021-12-14 18:04 ` [PATCH " David Edelsohn 2021-12-06 20:49 ` [PATCH 3/6] rs6000: Rename rs6000-builtin-new.def to rs6000-builtins.def Bill Schmidt ` (4 subsequent siblings) 6 siblings, 2 replies; 20+ messages in thread From: Bill Schmidt @ 2021-12-06 20:49 UTC (permalink / raw) To: gcc-patches; +Cc: segher, dje.gcc Hi! This patch just removes the huge altivec_overloaded_builtins array. Bootstrapped and tested on powerpc64le-linux-gnu with no regressions. Is this okay for trunk? Thanks! Bill 2021-12-02 Bill Schmidt <wschmidt@linux.ibm.com> gcc/ * config/rs6000/rs6000-call.c (altivec_overloaded_builtins): Remove. * config/rs6000/rs6000.h (altivec_overloaded_builtins): Remove. --- gcc/config/rs6000/rs6000-call.c | 5892 ------------------------------- gcc/config/rs6000/rs6000.h | 1 - 2 files changed, 5893 deletions(-) diff --git a/gcc/config/rs6000/rs6000-call.c b/gcc/config/rs6000/rs6000-call.c index 175d26186d3..86054f75756 100644 --- a/gcc/config/rs6000/rs6000-call.c +++ b/gcc/config/rs6000/rs6000-call.c @@ -305,5898 +305,6 @@ static const struct rs6000_builtin_info_type rs6000_builtin_info[] = #undef RS6000_BUILTIN_P #undef RS6000_BUILTIN_X -const struct altivec_builtin_types altivec_overloaded_builtins[] = { - /* Unary AltiVec/VSX builtins. */ - { ALTIVEC_BUILTIN_VEC_ABS, ALTIVEC_BUILTIN_ABS_V16QI, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_ABS, ALTIVEC_BUILTIN_ABS_V8HI, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_ABS, ALTIVEC_BUILTIN_ABS_V4SI, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_ABS, P8V_BUILTIN_ABS_V2DI, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_ABS, ALTIVEC_BUILTIN_ABS_V4SF, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_ABS, VSX_BUILTIN_XVABSDP, - RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_ABSS, ALTIVEC_BUILTIN_ABSS_V16QI, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_ABSS, ALTIVEC_BUILTIN_ABSS_V8HI, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_ABSS, ALTIVEC_BUILTIN_ABSS_V4SI, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_CEIL, ALTIVEC_BUILTIN_VRFIP, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_CEIL, VSX_BUILTIN_XVRDPIP, - RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_EXPTE, ALTIVEC_BUILTIN_VEXPTEFP, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_FLOOR, VSX_BUILTIN_XVRDPIM, - RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_FLOOR, ALTIVEC_BUILTIN_VRFIM, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_LOGE, ALTIVEC_BUILTIN_VLOGEFP, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_MTVSCR, ALTIVEC_BUILTIN_MTVSCR, - RS6000_BTI_void, RS6000_BTI_V4SI, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_MTVSCR, ALTIVEC_BUILTIN_MTVSCR, - RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_MTVSCR, ALTIVEC_BUILTIN_MTVSCR, - RS6000_BTI_void, RS6000_BTI_bool_V4SI, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_MTVSCR, ALTIVEC_BUILTIN_MTVSCR, - RS6000_BTI_void, RS6000_BTI_V8HI, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_MTVSCR, ALTIVEC_BUILTIN_MTVSCR, - RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_MTVSCR, ALTIVEC_BUILTIN_MTVSCR, - RS6000_BTI_void, RS6000_BTI_bool_V8HI, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_MTVSCR, ALTIVEC_BUILTIN_MTVSCR, - RS6000_BTI_void, RS6000_BTI_pixel_V8HI, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_MTVSCR, ALTIVEC_BUILTIN_MTVSCR, - RS6000_BTI_void, RS6000_BTI_V16QI, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_MTVSCR, ALTIVEC_BUILTIN_MTVSCR, - RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_MTVSCR, ALTIVEC_BUILTIN_MTVSCR, - RS6000_BTI_void, RS6000_BTI_bool_V16QI, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_RE, ALTIVEC_BUILTIN_VREFP, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_RE, VSX_BUILTIN_XVREDP, - RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_ROUND, ALTIVEC_BUILTIN_VRFIN, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_ROUND, VSX_BUILTIN_XVRDPI, - RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_RECIP, ALTIVEC_BUILTIN_VRECIPFP, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, - { ALTIVEC_BUILTIN_VEC_RECIP, VSX_BUILTIN_RECIP_V2DF, - RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 }, - { ALTIVEC_BUILTIN_VEC_RSQRT, ALTIVEC_BUILTIN_VRSQRTFP, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_RSQRT, VSX_BUILTIN_RSQRT_2DF, - RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_RSQRTE, ALTIVEC_BUILTIN_VRSQRTEFP, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_RSQRTE, VSX_BUILTIN_XVRSQRTEDP, - RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_TRUNC, ALTIVEC_BUILTIN_VRFIZ, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_TRUNC, VSX_BUILTIN_XVRDPIZ, - RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_UNPACKH, ALTIVEC_BUILTIN_VUPKHSB, - RS6000_BTI_V8HI, RS6000_BTI_V16QI, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_UNPACKH, ALTIVEC_BUILTIN_VUPKHSB, - RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V16QI, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_UNPACKH, ALTIVEC_BUILTIN_VUPKHSH, - RS6000_BTI_V4SI, RS6000_BTI_V8HI, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_UNPACKH, ALTIVEC_BUILTIN_VUPKHSH, - RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V8HI, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_UNPACKH, P8V_BUILTIN_VUPKHSW, - RS6000_BTI_V2DI, RS6000_BTI_V4SI, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_UNPACKH, P8V_BUILTIN_VUPKHSW, - RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V4SI, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_UNPACKH, ALTIVEC_BUILTIN_VUPKHPX, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_pixel_V8HI, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_UNPACKH, VSX_BUILTIN_DOUBLEH_V4SF, - RS6000_BTI_V2DF, RS6000_BTI_V4SF, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_VUPKHSH, ALTIVEC_BUILTIN_VUPKHSH, - RS6000_BTI_V4SI, RS6000_BTI_V8HI, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_VUPKHSH, ALTIVEC_BUILTIN_VUPKHSH, - RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V8HI, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_VUPKHSH, P8V_BUILTIN_VUPKHSW, - RS6000_BTI_V2DI, RS6000_BTI_V4SI, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_VUPKHSH, P8V_BUILTIN_VUPKHSW, - RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V4SI, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_VUPKHPX, ALTIVEC_BUILTIN_VUPKHPX, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V8HI, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_VUPKHPX, ALTIVEC_BUILTIN_VUPKHPX, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_pixel_V8HI, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_VUPKHSB, ALTIVEC_BUILTIN_VUPKHSB, - RS6000_BTI_V8HI, RS6000_BTI_V16QI, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_VUPKHSB, ALTIVEC_BUILTIN_VUPKHSB, - RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V16QI, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_UNPACKL, ALTIVEC_BUILTIN_VUPKLSB, - RS6000_BTI_V8HI, RS6000_BTI_V16QI, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_UNPACKL, ALTIVEC_BUILTIN_VUPKLSB, - RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V16QI, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_UNPACKL, ALTIVEC_BUILTIN_VUPKLPX, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_pixel_V8HI, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_UNPACKL, ALTIVEC_BUILTIN_VUPKLSH, - RS6000_BTI_V4SI, RS6000_BTI_V8HI, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_UNPACKL, ALTIVEC_BUILTIN_VUPKLSH, - RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V8HI, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_UNPACKL, P8V_BUILTIN_VUPKLSW, - RS6000_BTI_V2DI, RS6000_BTI_V4SI, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_UNPACKL, P8V_BUILTIN_VUPKLSW, - RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V4SI, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_UNPACKL, VSX_BUILTIN_DOUBLEL_V4SF, - RS6000_BTI_V2DF, RS6000_BTI_V4SF, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_VUPKLPX, ALTIVEC_BUILTIN_VUPKLPX, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V8HI, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_VUPKLPX, ALTIVEC_BUILTIN_VUPKLPX, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_pixel_V8HI, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_VUPKLSH, ALTIVEC_BUILTIN_VUPKLSH, - RS6000_BTI_V4SI, RS6000_BTI_V8HI, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_VUPKLSH, ALTIVEC_BUILTIN_VUPKLSH, - RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V8HI, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_VUPKLSB, ALTIVEC_BUILTIN_VUPKLSB, - RS6000_BTI_V8HI, RS6000_BTI_V16QI, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_VUPKLSB, ALTIVEC_BUILTIN_VUPKLSB, - RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V16QI, 0, 0 }, - - /* Binary AltiVec/VSX builtins. */ - { ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUBM, - RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUBM, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUBM, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUBM, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUBM, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUBM, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUHM, - RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUHM, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUHM, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUHM, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUHM, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUHM, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUWM, - RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUWM, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUWM, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUWM, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUWM, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUWM, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_ADD, P8V_BUILTIN_VADDUDM, - RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_ADD, P8V_BUILTIN_VADDUDM, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_ADD, P8V_BUILTIN_VADDUDM, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_ADD, P8V_BUILTIN_VADDUDM, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_ADD, P8V_BUILTIN_VADDUDM, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_ADD, P8V_BUILTIN_VADDUDM, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDFP, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, - { ALTIVEC_BUILTIN_VEC_ADD, VSX_BUILTIN_XVADDDP, - RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 }, - { ALTIVEC_BUILTIN_VEC_ADD, P8V_BUILTIN_VADDUQM, - RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, 0 }, - { ALTIVEC_BUILTIN_VEC_ADD, P8V_BUILTIN_VADDUQM, - RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, - RS6000_BTI_unsigned_V1TI, 0 }, - { ALTIVEC_BUILTIN_VEC_VADDFP, ALTIVEC_BUILTIN_VADDFP, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, - { ALTIVEC_BUILTIN_VEC_VADDUWM, ALTIVEC_BUILTIN_VADDUWM, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VADDUWM, ALTIVEC_BUILTIN_VADDUWM, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VADDUWM, ALTIVEC_BUILTIN_VADDUWM, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VADDUWM, ALTIVEC_BUILTIN_VADDUWM, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VADDUWM, ALTIVEC_BUILTIN_VADDUWM, - RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VADDUWM, ALTIVEC_BUILTIN_VADDUWM, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VADDUWM, ALTIVEC_BUILTIN_VADDUWM, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VADDUWM, ALTIVEC_BUILTIN_VADDUWM, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VADDUHM, ALTIVEC_BUILTIN_VADDUHM, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VADDUHM, ALTIVEC_BUILTIN_VADDUHM, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VADDUHM, ALTIVEC_BUILTIN_VADDUHM, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VADDUHM, ALTIVEC_BUILTIN_VADDUHM, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VADDUHM, ALTIVEC_BUILTIN_VADDUHM, - RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VADDUHM, ALTIVEC_BUILTIN_VADDUHM, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VADDUHM, ALTIVEC_BUILTIN_VADDUHM, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VADDUHM, ALTIVEC_BUILTIN_VADDUHM, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VADDUBM, ALTIVEC_BUILTIN_VADDUBM, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_VADDUBM, ALTIVEC_BUILTIN_VADDUBM, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_VADDUBM, ALTIVEC_BUILTIN_VADDUBM, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_VADDUBM, ALTIVEC_BUILTIN_VADDUBM, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_VADDUBM, ALTIVEC_BUILTIN_VADDUBM, - RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_VADDUBM, ALTIVEC_BUILTIN_VADDUBM, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_VADDUBM, ALTIVEC_BUILTIN_VADDUBM, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_VADDUBM, ALTIVEC_BUILTIN_VADDUBM, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_ADDC, ALTIVEC_BUILTIN_VADDCUW, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_ADDC, ALTIVEC_BUILTIN_VADDCUW, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, - RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_ADDC, P8V_BUILTIN_VADDCUQ, - RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, - RS6000_BTI_unsigned_V1TI, 0 }, - { ALTIVEC_BUILTIN_VEC_ADDC, P8V_BUILTIN_VADDCUQ, - RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, 0 }, - { ALTIVEC_BUILTIN_VEC_ADDEC, P8V_BUILTIN_VADDECUQ, - RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, - RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI }, - { ALTIVEC_BUILTIN_VEC_ADDEC, P8V_BUILTIN_VADDECUQ, - RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI }, - { ALTIVEC_BUILTIN_VEC_ADDS, ALTIVEC_BUILTIN_VADDUBS, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_ADDS, ALTIVEC_BUILTIN_VADDUBS, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_ADDS, ALTIVEC_BUILTIN_VADDUBS, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_ADDS, ALTIVEC_BUILTIN_VADDSBS, - RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_ADDS, ALTIVEC_BUILTIN_VADDSBS, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_ADDS, ALTIVEC_BUILTIN_VADDSBS, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_ADDS, ALTIVEC_BUILTIN_VADDUHS, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_ADDS, ALTIVEC_BUILTIN_VADDUHS, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_ADDS, ALTIVEC_BUILTIN_VADDUHS, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_ADDS, ALTIVEC_BUILTIN_VADDSHS, - RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_ADDS, ALTIVEC_BUILTIN_VADDSHS, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_ADDS, ALTIVEC_BUILTIN_VADDSHS, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_ADDS, ALTIVEC_BUILTIN_VADDUWS, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_ADDS, ALTIVEC_BUILTIN_VADDUWS, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_ADDS, ALTIVEC_BUILTIN_VADDUWS, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_ADDS, ALTIVEC_BUILTIN_VADDSWS, - RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_ADDS, ALTIVEC_BUILTIN_VADDSWS, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_ADDS, ALTIVEC_BUILTIN_VADDSWS, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VADDSWS, ALTIVEC_BUILTIN_VADDSWS, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VADDSWS, ALTIVEC_BUILTIN_VADDSWS, - RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VADDSWS, ALTIVEC_BUILTIN_VADDSWS, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VADDUWS, ALTIVEC_BUILTIN_VADDUWS, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VADDUWS, ALTIVEC_BUILTIN_VADDUWS, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VADDUWS, ALTIVEC_BUILTIN_VADDUWS, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VADDUWS, ALTIVEC_BUILTIN_VADDUWS, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VADDUWS, ALTIVEC_BUILTIN_VADDUWS, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VADDSHS, ALTIVEC_BUILTIN_VADDSHS, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VADDSHS, ALTIVEC_BUILTIN_VADDSHS, - RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VADDSHS, ALTIVEC_BUILTIN_VADDSHS, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VADDUHS, ALTIVEC_BUILTIN_VADDUHS, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VADDUHS, ALTIVEC_BUILTIN_VADDUHS, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VADDUHS, ALTIVEC_BUILTIN_VADDUHS, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VADDUHS, ALTIVEC_BUILTIN_VADDUHS, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VADDUHS, ALTIVEC_BUILTIN_VADDUHS, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VADDSBS, ALTIVEC_BUILTIN_VADDSBS, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_VADDSBS, ALTIVEC_BUILTIN_VADDSBS, - RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_VADDSBS, ALTIVEC_BUILTIN_VADDSBS, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_VADDUBS, ALTIVEC_BUILTIN_VADDUBS, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_VADDUBS, ALTIVEC_BUILTIN_VADDUBS, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_VADDUBS, ALTIVEC_BUILTIN_VADDUBS, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_VADDUBS, ALTIVEC_BUILTIN_VADDUBS, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_VADDUBS, ALTIVEC_BUILTIN_VADDUBS, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, 0 }, - - { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V4SF, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, - { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V4SF, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_bool_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V4SF, - RS6000_BTI_V4SF, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SF, 0 }, - { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V2DF, - RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 }, - { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V2DF, - RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_bool_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V2DF, - RS6000_BTI_V2DF, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DF, 0 }, - { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V2DI, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V2DI, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V2DI, - RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V2DI_UNS, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V2DI_UNS, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V2DI_UNS, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V2DI_UNS, - RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V4SI_UNS, - RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V4SI, - RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V4SI, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V4SI, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V4SI_UNS, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V4SI_UNS, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V4SI_UNS, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V8HI_UNS, - RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V8HI, - RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V8HI, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V8HI, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V8HI_UNS, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V8HI_UNS, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V8HI_UNS, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V16QI, - RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V16QI_UNS, - RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V16QI, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V16QI, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V16QI_UNS, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V16QI_UNS, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V16QI_UNS, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - - { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V4SF, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, - { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V4SF, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_bool_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V4SF, - RS6000_BTI_V4SF, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SF, 0 }, - { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V2DF, - RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 }, - { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V2DF, - RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_bool_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V2DF, - RS6000_BTI_V2DF, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DF, 0 }, - { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V2DI, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V2DI, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V2DI, - RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V2DI_UNS, - RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V2DI_UNS, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V2DI_UNS, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V2DI_UNS, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V4SI_UNS, - RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V4SI, - RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V4SI, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V4SI, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V4SI_UNS, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V4SI_UNS, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V4SI_UNS, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V8HI_UNS, - RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V8HI, - RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V8HI, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V8HI, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V8HI_UNS, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V8HI_UNS, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V8HI_UNS, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V16QI, - RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V16QI_UNS, - RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V16QI, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V16QI, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V16QI_UNS, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V16QI_UNS, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V16QI_UNS, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - - { ALTIVEC_BUILTIN_VEC_AVG, ALTIVEC_BUILTIN_VAVGUB, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_AVG, ALTIVEC_BUILTIN_VAVGSB, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_AVG, ALTIVEC_BUILTIN_VAVGUH, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_AVG, ALTIVEC_BUILTIN_VAVGSH, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_AVG, ALTIVEC_BUILTIN_VAVGUW, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_AVG, ALTIVEC_BUILTIN_VAVGSW, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VAVGSW, ALTIVEC_BUILTIN_VAVGSW, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VAVGUW, ALTIVEC_BUILTIN_VAVGUW, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VAVGSH, ALTIVEC_BUILTIN_VAVGSH, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VAVGUH, ALTIVEC_BUILTIN_VAVGUH, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VAVGSB, ALTIVEC_BUILTIN_VAVGSB, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_VAVGUB, ALTIVEC_BUILTIN_VAVGUB, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_CMPB, ALTIVEC_BUILTIN_VCMPBFP, - RS6000_BTI_V4SI, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, - { ALTIVEC_BUILTIN_VEC_CMPEQ, ALTIVEC_BUILTIN_VCMPEQUB, - RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_CMPEQ, ALTIVEC_BUILTIN_VCMPEQUB, - RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_CMPEQ, ALTIVEC_BUILTIN_VCMPEQUB, - RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_CMPEQ, ALTIVEC_BUILTIN_VCMPEQUH, - RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_CMPEQ, ALTIVEC_BUILTIN_VCMPEQUH, - RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_CMPEQ, ALTIVEC_BUILTIN_VCMPEQUH, - RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_CMPEQ, ALTIVEC_BUILTIN_VCMPEQUW, - RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_CMPEQ, ALTIVEC_BUILTIN_VCMPEQUW, - RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_CMPEQ, ALTIVEC_BUILTIN_VCMPEQUW, - RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_CMPEQ, P8V_BUILTIN_VCMPEQUD, - RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_CMPEQ, P8V_BUILTIN_VCMPEQUD, - RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_CMPEQ, P8V_BUILTIN_VCMPEQUD, - RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_CMPEQ, P10V_BUILTIN_VCMPEQUT, - RS6000_BTI_bool_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, 0 }, - { ALTIVEC_BUILTIN_VEC_CMPEQ, P10V_BUILTIN_VCMPEQUT, - RS6000_BTI_bool_V1TI, RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, 0 }, - { ALTIVEC_BUILTIN_VEC_CMPEQ, ALTIVEC_BUILTIN_VCMPEQFP, - RS6000_BTI_bool_V4SI, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, - { ALTIVEC_BUILTIN_VEC_CMPEQ, VSX_BUILTIN_XVCMPEQDP, - RS6000_BTI_bool_V2DI, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 }, - { ALTIVEC_BUILTIN_VEC_VCMPEQFP, ALTIVEC_BUILTIN_VCMPEQFP, - RS6000_BTI_bool_V4SI, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, - - { ALTIVEC_BUILTIN_VEC_VCMPEQUW, ALTIVEC_BUILTIN_VCMPEQUW, - RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VCMPEQUW, ALTIVEC_BUILTIN_VCMPEQUW, - RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - - { ALTIVEC_BUILTIN_VEC_VCMPEQUH, ALTIVEC_BUILTIN_VCMPEQUH, - RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VCMPEQUH, ALTIVEC_BUILTIN_VCMPEQUH, - RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - - { ALTIVEC_BUILTIN_VEC_VCMPEQUB, ALTIVEC_BUILTIN_VCMPEQUB, - RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_VCMPEQUB, ALTIVEC_BUILTIN_VCMPEQUB, - RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - - { ALTIVEC_BUILTIN_VEC_CMPGE, ALTIVEC_BUILTIN_VCMPGEFP, - RS6000_BTI_bool_V4SI, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, - { ALTIVEC_BUILTIN_VEC_CMPGE, VSX_BUILTIN_XVCMPGEDP, - RS6000_BTI_bool_V2DI, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 }, - { ALTIVEC_BUILTIN_VEC_CMPGE, VSX_BUILTIN_CMPGE_16QI, - RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0}, - { ALTIVEC_BUILTIN_VEC_CMPGE, VSX_BUILTIN_CMPGE_U16QI, - RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, - RS6000_BTI_unsigned_V16QI, 0}, - { ALTIVEC_BUILTIN_VEC_CMPGE, VSX_BUILTIN_CMPGE_8HI, - RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0}, - { ALTIVEC_BUILTIN_VEC_CMPGE, VSX_BUILTIN_CMPGE_U8HI, - RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, - RS6000_BTI_unsigned_V8HI, 0}, - { ALTIVEC_BUILTIN_VEC_CMPGE, VSX_BUILTIN_CMPGE_4SI, - RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0}, - { ALTIVEC_BUILTIN_VEC_CMPGE, VSX_BUILTIN_CMPGE_U4SI, - RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, - RS6000_BTI_unsigned_V4SI, 0}, - { ALTIVEC_BUILTIN_VEC_CMPGE, VSX_BUILTIN_CMPGE_2DI, - RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0}, - { ALTIVEC_BUILTIN_VEC_CMPGE, VSX_BUILTIN_CMPGE_U2DI, - RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI, - RS6000_BTI_unsigned_V2DI, 0}, - - { ALTIVEC_BUILTIN_VEC_CMPGE, P10V_BUILTIN_CMPGE_1TI, - RS6000_BTI_bool_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, 0}, - { ALTIVEC_BUILTIN_VEC_CMPGE, P10V_BUILTIN_CMPGE_U1TI, - RS6000_BTI_bool_V1TI, RS6000_BTI_unsigned_V1TI, - RS6000_BTI_unsigned_V1TI, 0}, - { ALTIVEC_BUILTIN_VEC_CMPGT, ALTIVEC_BUILTIN_VCMPGTUB, - RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_CMPGT, ALTIVEC_BUILTIN_VCMPGTSB, - RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_CMPGT, ALTIVEC_BUILTIN_VCMPGTUH, - RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_CMPGT, ALTIVEC_BUILTIN_VCMPGTSH, - RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_CMPGT, ALTIVEC_BUILTIN_VCMPGTUW, - RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_CMPGT, ALTIVEC_BUILTIN_VCMPGTSW, - RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_CMPGT, P8V_BUILTIN_VCMPGTUD, - RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_CMPGT, P10V_BUILTIN_VCMPGTUT, - RS6000_BTI_bool_V1TI, RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, 0 }, - { ALTIVEC_BUILTIN_VEC_CMPGT, P8V_BUILTIN_VCMPGTSD, - RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_CMPGT, P10V_BUILTIN_VCMPGTST, - RS6000_BTI_bool_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, 0 }, - { ALTIVEC_BUILTIN_VEC_CMPGT, ALTIVEC_BUILTIN_VCMPGTFP, - RS6000_BTI_bool_V4SI, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, - { ALTIVEC_BUILTIN_VEC_CMPGT, VSX_BUILTIN_XVCMPGTDP, - RS6000_BTI_bool_V2DI, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 }, - { ALTIVEC_BUILTIN_VEC_VCMPGTFP, ALTIVEC_BUILTIN_VCMPGTFP, - RS6000_BTI_bool_V4SI, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, - { ALTIVEC_BUILTIN_VEC_VCMPGTSW, ALTIVEC_BUILTIN_VCMPGTSW, - RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VCMPGTUW, ALTIVEC_BUILTIN_VCMPGTUW, - RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VCMPGTSH, ALTIVEC_BUILTIN_VCMPGTSH, - RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VCMPGTUH, ALTIVEC_BUILTIN_VCMPGTUH, - RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VCMPGTSB, ALTIVEC_BUILTIN_VCMPGTSB, - RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_VCMPGTUB, ALTIVEC_BUILTIN_VCMPGTUB, - RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_CMPLE, ALTIVEC_BUILTIN_VCMPGEFP, - RS6000_BTI_bool_V4SI, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, - { ALTIVEC_BUILTIN_VEC_CMPLE, VSX_BUILTIN_XVCMPGEDP, - RS6000_BTI_bool_V2DI, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 }, - { ALTIVEC_BUILTIN_VEC_CMPLE, VSX_BUILTIN_CMPLE_16QI, - RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0}, - { ALTIVEC_BUILTIN_VEC_CMPLE, VSX_BUILTIN_CMPLE_U16QI, - RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, - RS6000_BTI_unsigned_V16QI, 0}, - { ALTIVEC_BUILTIN_VEC_CMPLE, VSX_BUILTIN_CMPLE_8HI, - RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0}, - { ALTIVEC_BUILTIN_VEC_CMPLE, VSX_BUILTIN_CMPLE_U8HI, - RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, - RS6000_BTI_unsigned_V8HI, 0}, - { ALTIVEC_BUILTIN_VEC_CMPLE, VSX_BUILTIN_CMPLE_4SI, - RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0}, - { ALTIVEC_BUILTIN_VEC_CMPLE, VSX_BUILTIN_CMPLE_U4SI, - RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, - RS6000_BTI_unsigned_V4SI, 0}, - { ALTIVEC_BUILTIN_VEC_CMPLE, VSX_BUILTIN_CMPLE_2DI, - RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0}, - { ALTIVEC_BUILTIN_VEC_CMPLE, VSX_BUILTIN_CMPLE_U2DI, - RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI, - RS6000_BTI_unsigned_V2DI, 0}, - { ALTIVEC_BUILTIN_VEC_CMPLE, P10V_BUILTIN_CMPLE_1TI, - RS6000_BTI_bool_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, 0}, - { ALTIVEC_BUILTIN_VEC_CMPLE, P10V_BUILTIN_CMPLE_U1TI, - RS6000_BTI_bool_V1TI, RS6000_BTI_unsigned_V1TI, - RS6000_BTI_unsigned_V1TI, 0}, - { ALTIVEC_BUILTIN_VEC_CMPLT, ALTIVEC_BUILTIN_VCMPGTUB, - RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_CMPLT, ALTIVEC_BUILTIN_VCMPGTSB, - RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_CMPLT, ALTIVEC_BUILTIN_VCMPGTUH, - RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_CMPLT, ALTIVEC_BUILTIN_VCMPGTSH, - RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_CMPLT, ALTIVEC_BUILTIN_VCMPGTUW, - RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_CMPLT, ALTIVEC_BUILTIN_VCMPGTSW, - RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_CMPLT, P8V_BUILTIN_VCMPGTUD, - RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_CMPLT, P8V_BUILTIN_VCMPGTSD, - RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_CMPLT, ALTIVEC_BUILTIN_VCMPGTFP, - RS6000_BTI_bool_V4SI, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, - { ALTIVEC_BUILTIN_VEC_CMPLT, VSX_BUILTIN_XVCMPGTDP, - RS6000_BTI_bool_V2DI, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 }, - { ALTIVEC_BUILTIN_VEC_COPYSIGN, VSX_BUILTIN_CPSGNDP, - RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 }, - { ALTIVEC_BUILTIN_VEC_COPYSIGN, ALTIVEC_BUILTIN_COPYSIGN_V4SF, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, - { ALTIVEC_BUILTIN_VEC_CTF, ALTIVEC_BUILTIN_VCFUX, - RS6000_BTI_V4SF, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, 0 }, - { ALTIVEC_BUILTIN_VEC_CTF, ALTIVEC_BUILTIN_VCFSX, - RS6000_BTI_V4SF, RS6000_BTI_V4SI, RS6000_BTI_INTSI, 0 }, - { ALTIVEC_BUILTIN_VEC_CTF, VSX_BUILTIN_XVCVSXDDP_SCALE, - RS6000_BTI_V2DF, RS6000_BTI_V2DI, RS6000_BTI_INTSI, 0}, - { ALTIVEC_BUILTIN_VEC_CTF, VSX_BUILTIN_XVCVUXDDP_SCALE, - RS6000_BTI_V2DF, RS6000_BTI_unsigned_V2DI, RS6000_BTI_INTSI, 0}, - { ALTIVEC_BUILTIN_VEC_VCFSX, ALTIVEC_BUILTIN_VCFSX, - RS6000_BTI_V4SF, RS6000_BTI_V4SI, RS6000_BTI_INTSI, 0 }, - { ALTIVEC_BUILTIN_VEC_VCFUX, ALTIVEC_BUILTIN_VCFUX, - RS6000_BTI_V4SF, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, 0 }, - { ALTIVEC_BUILTIN_VEC_CTS, ALTIVEC_BUILTIN_VCTSXS, - RS6000_BTI_V4SI, RS6000_BTI_V4SF, RS6000_BTI_INTSI, 0 }, - { ALTIVEC_BUILTIN_VEC_CTS, VSX_BUILTIN_XVCVDPSXDS_SCALE, - RS6000_BTI_V2DI, RS6000_BTI_V2DF, RS6000_BTI_INTSI, 0 }, - { ALTIVEC_BUILTIN_VEC_CTU, ALTIVEC_BUILTIN_VCTUXS, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_V4SF, RS6000_BTI_INTSI, 0 }, - { ALTIVEC_BUILTIN_VEC_CTU, VSX_BUILTIN_XVCVDPUXDS_SCALE, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_V2DF, RS6000_BTI_INTSI, 0 }, - - { P8V_BUILTIN_VEC_BCDADD, MISC_BUILTIN_BCDADD_V1TI, - RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_INTSI }, - { P8V_BUILTIN_VEC_BCDADD, MISC_BUILTIN_BCDADD_V16QI, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI }, - { P8V_BUILTIN_VEC_BCDADD_LT, MISC_BUILTIN_BCDADD_LT_V1TI, - RS6000_BTI_INTSI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_INTSI }, - { P8V_BUILTIN_VEC_BCDADD_LT, MISC_BUILTIN_BCDADD_LT_V16QI, - RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI }, - { P8V_BUILTIN_VEC_BCDADD_EQ, MISC_BUILTIN_BCDADD_EQ_V1TI, - RS6000_BTI_INTSI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_INTSI }, - { P8V_BUILTIN_VEC_BCDADD_EQ, MISC_BUILTIN_BCDADD_EQ_V16QI, - RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI }, - { P8V_BUILTIN_VEC_BCDADD_GT, MISC_BUILTIN_BCDADD_GT_V1TI, - RS6000_BTI_INTSI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_INTSI }, - { P8V_BUILTIN_VEC_BCDADD_GT, MISC_BUILTIN_BCDADD_GT_V16QI, - RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI }, - { P8V_BUILTIN_VEC_BCDADD_OV, MISC_BUILTIN_BCDADD_OV_V1TI, - RS6000_BTI_INTSI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_INTSI }, - { P8V_BUILTIN_VEC_BCDADD_OV, MISC_BUILTIN_BCDADD_OV_V16QI, - RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI }, - { P8V_BUILTIN_VEC_BCDINVALID, MISC_BUILTIN_BCDINVALID_V1TI, - RS6000_BTI_INTSI, RS6000_BTI_V1TI, 0, 0 }, - { P8V_BUILTIN_VEC_BCDINVALID, MISC_BUILTIN_BCDINVALID_V16QI, - RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI, 0, 0 }, - - { P9V_BUILTIN_VEC_BCDMUL10, P9V_BUILTIN_BCDMUL10_V16QI, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0, 0 }, - { P9V_BUILTIN_VEC_BCDDIV10, P9V_BUILTIN_BCDDIV10_V16QI, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0, 0 }, - - { P8V_BUILTIN_VEC_DENBCD, MISC_BUILTIN_DENBCD_V16QI, - RS6000_BTI_dfloat128, RS6000_BTI_unsigned_V16QI, 0, 0 }, - - { P8V_BUILTIN_VEC_BCDSUB, MISC_BUILTIN_BCDSUB_V1TI, - RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_INTSI }, - { P8V_BUILTIN_VEC_BCDSUB, MISC_BUILTIN_BCDSUB_V16QI, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI }, - { P8V_BUILTIN_VEC_BCDSUB_LT, MISC_BUILTIN_BCDSUB_LT_V1TI, - RS6000_BTI_INTSI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_INTSI }, - { P8V_BUILTIN_VEC_BCDSUB_LT, MISC_BUILTIN_BCDSUB_LT_V16QI, - RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI }, - { P8V_BUILTIN_VEC_BCDSUB_LE, MISC_BUILTIN_BCDSUB_LE_V1TI, - RS6000_BTI_INTSI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_INTSI }, - { P8V_BUILTIN_VEC_BCDSUB_LE, MISC_BUILTIN_BCDSUB_LE_V16QI, - RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI }, - { P8V_BUILTIN_VEC_BCDSUB_EQ, MISC_BUILTIN_BCDSUB_EQ_V1TI, - RS6000_BTI_INTSI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_INTSI }, - { P8V_BUILTIN_VEC_BCDSUB_EQ, MISC_BUILTIN_BCDSUB_EQ_V16QI, - RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI }, - { P8V_BUILTIN_VEC_BCDSUB_GT, MISC_BUILTIN_BCDSUB_GT_V1TI, - RS6000_BTI_INTSI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_INTSI }, - { P8V_BUILTIN_VEC_BCDSUB_GT, MISC_BUILTIN_BCDSUB_GT_V16QI, - RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI }, - { P8V_BUILTIN_VEC_BCDSUB_GE, MISC_BUILTIN_BCDSUB_GE_V1TI, - RS6000_BTI_INTSI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_INTSI }, - { P8V_BUILTIN_VEC_BCDSUB_GE, MISC_BUILTIN_BCDSUB_GE_V16QI, - RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI }, - { P8V_BUILTIN_VEC_BCDSUB_OV, MISC_BUILTIN_BCDSUB_OV_V1TI, - RS6000_BTI_INTSI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_INTSI }, - { P8V_BUILTIN_VEC_BCDSUB_OV, MISC_BUILTIN_BCDSUB_OV_V16QI, - RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI }, - - - { VSX_BUILTIN_VEC_DIV, VSX_BUILTIN_XVDIVSP, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, - { VSX_BUILTIN_VEC_DIV, VSX_BUILTIN_XVDIVDP, - RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 }, - { VSX_BUILTIN_VEC_DIV, VSX_BUILTIN_DIV_V2DI, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, - { VSX_BUILTIN_VEC_DIV, VSX_BUILTIN_UDIV_V2DI, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, - - { VSX_BUILTIN_VEC_DIV, P10V_BUILTIN_DIVS_V4SI, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, - { VSX_BUILTIN_VEC_DIV, P10V_BUILTIN_DIVU_V4SI, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, - RS6000_BTI_unsigned_V4SI, 0 }, - { VSX_BUILTIN_VEC_DIV, P10V_BUILTIN_DIVS_V2DI, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, - { VSX_BUILTIN_VEC_DIV, P10V_BUILTIN_DIVU_V2DI, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, - RS6000_BTI_unsigned_V2DI, 0 }, - { VSX_BUILTIN_VEC_DIV, P10V_BUILTIN_DIV_V1TI, - RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, 0 }, - { VSX_BUILTIN_VEC_DIV, P10V_BUILTIN_UDIV_V1TI, - RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, - RS6000_BTI_unsigned_V1TI, 0 }, - - { P10_BUILTIN_VEC_DIVE, P10V_BUILTIN_DIVES_V4SI, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, - { P10_BUILTIN_VEC_DIVE, P10V_BUILTIN_DIVEU_V4SI, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, - RS6000_BTI_unsigned_V4SI, 0 }, - { P10_BUILTIN_VEC_DIVE, P10V_BUILTIN_DIVES_V2DI, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, - { P10_BUILTIN_VEC_DIVE, P10V_BUILTIN_DIVEU_V2DI, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, - RS6000_BTI_unsigned_V2DI, 0 }, - { P10_BUILTIN_VEC_DIVE, P10V_BUILTIN_DIVES_V1TI, - RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, 0 }, - { P10_BUILTIN_VEC_DIVE, P10V_BUILTIN_DIVEU_V1TI, - RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, - RS6000_BTI_unsigned_V1TI, 0 }, - - { P10_BUILTIN_VEC_MOD, P10V_BUILTIN_MODS_V4SI, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, - { P10_BUILTIN_VEC_MOD, P10V_BUILTIN_MODU_V4SI, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, - RS6000_BTI_unsigned_V4SI, 0 }, - { P10_BUILTIN_VEC_MOD, P10V_BUILTIN_MODS_V2DI, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, - { P10_BUILTIN_VEC_MOD, P10V_BUILTIN_MODU_V2DI, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, - RS6000_BTI_unsigned_V2DI, 0 }, - { P10_BUILTIN_VEC_MOD, P10V_BUILTIN_MODS_V1TI, - RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, 0 }, - { P10_BUILTIN_VEC_MOD, P10V_BUILTIN_MODU_V1TI, - RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, - RS6000_BTI_unsigned_V1TI, 0 }, - - { VSX_BUILTIN_VEC_DOUBLE, VSX_BUILTIN_XVCVSXDDP, - RS6000_BTI_V2DF, RS6000_BTI_V2DI, 0, 0 }, - { VSX_BUILTIN_VEC_DOUBLE, VSX_BUILTIN_XVCVUXDDP, - RS6000_BTI_V2DF, RS6000_BTI_unsigned_V2DI, 0, 0 }, - - { VSX_BUILTIN_VEC_DOUBLEE, VSX_BUILTIN_DOUBLEE_V4SI, - RS6000_BTI_V2DF, RS6000_BTI_V4SI, 0, 0 }, - { VSX_BUILTIN_VEC_DOUBLEE, VSX_BUILTIN_UNS_DOUBLEE_V4SI, - RS6000_BTI_V2DF, RS6000_BTI_unsigned_V4SI, 0, 0 }, - { VSX_BUILTIN_VEC_DOUBLEE, VSX_BUILTIN_DOUBLEE_V4SF, - RS6000_BTI_V2DF, RS6000_BTI_V4SF, 0, 0 }, - - { VSX_BUILTIN_VEC_DOUBLEO, VSX_BUILTIN_DOUBLEO_V4SI, - RS6000_BTI_V2DF, RS6000_BTI_V4SI, 0, 0 }, - { VSX_BUILTIN_VEC_DOUBLEO, VSX_BUILTIN_UNS_DOUBLEO_V4SI, - RS6000_BTI_V2DF, RS6000_BTI_unsigned_V4SI, 0, 0 }, - { VSX_BUILTIN_VEC_DOUBLEO, VSX_BUILTIN_DOUBLEO_V4SF, - RS6000_BTI_V2DF, RS6000_BTI_V4SF, 0, 0 }, - - { VSX_BUILTIN_VEC_DOUBLEH, VSX_BUILTIN_DOUBLEH_V4SI, - RS6000_BTI_V2DF, RS6000_BTI_V4SI, 0, 0 }, - { VSX_BUILTIN_VEC_DOUBLEH, VSX_BUILTIN_UNS_DOUBLEH_V4SI, - RS6000_BTI_V2DF, RS6000_BTI_unsigned_V4SI, 0, 0 }, - { VSX_BUILTIN_VEC_DOUBLEH, VSX_BUILTIN_DOUBLEH_V4SF, - RS6000_BTI_V2DF, RS6000_BTI_V4SF, 0, 0 }, - - { VSX_BUILTIN_VEC_DOUBLEL, VSX_BUILTIN_DOUBLEL_V4SI, - RS6000_BTI_V2DF, RS6000_BTI_V4SI, 0, 0 }, - { VSX_BUILTIN_VEC_DOUBLEL, VSX_BUILTIN_UNS_DOUBLEL_V4SI, - RS6000_BTI_V2DF, RS6000_BTI_unsigned_V4SI, 0, 0 }, - { VSX_BUILTIN_VEC_DOUBLEL, VSX_BUILTIN_DOUBLEL_V4SF, - RS6000_BTI_V2DF, RS6000_BTI_V4SF, 0, 0 }, - - { VSX_BUILTIN_VEC_FLOAT, VSX_BUILTIN_XVCVSXWSP_V4SF, - RS6000_BTI_V4SF, RS6000_BTI_V4SI, 0, 0 }, - { VSX_BUILTIN_VEC_FLOAT, VSX_BUILTIN_XVCVUXWSP_V4SF, - RS6000_BTI_V4SF, RS6000_BTI_unsigned_V4SI, 0, 0 }, - { P8V_BUILTIN_VEC_FLOAT2, P8V_BUILTIN_FLOAT2_V2DF, - RS6000_BTI_V4SF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 }, - { P8V_BUILTIN_VEC_FLOAT2, P8V_BUILTIN_FLOAT2_V2DI, - RS6000_BTI_V4SF, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, - { P8V_BUILTIN_VEC_FLOAT2, P8V_BUILTIN_UNS_FLOAT2_V2DI, - RS6000_BTI_V4SF, RS6000_BTI_unsigned_V2DI, - RS6000_BTI_unsigned_V2DI, 0 }, - { VSX_BUILTIN_VEC_FLOATE, VSX_BUILTIN_FLOATE_V2DF, - RS6000_BTI_V4SF, RS6000_BTI_V2DF, 0, 0 }, - { VSX_BUILTIN_VEC_FLOATE, VSX_BUILTIN_FLOATE_V2DI, - RS6000_BTI_V4SF, RS6000_BTI_V2DI, 0, 0 }, - { VSX_BUILTIN_VEC_FLOATE, VSX_BUILTIN_UNS_FLOATE_V2DI, - RS6000_BTI_V4SF, RS6000_BTI_unsigned_V2DI, 0, 0 }, - { VSX_BUILTIN_VEC_FLOATO, VSX_BUILTIN_FLOATO_V2DF, - RS6000_BTI_V4SF, RS6000_BTI_V2DF, 0, 0 }, - { VSX_BUILTIN_VEC_FLOATO, VSX_BUILTIN_FLOATO_V2DI, - RS6000_BTI_V4SF, RS6000_BTI_V2DI, 0, 0 }, - { VSX_BUILTIN_VEC_FLOATO, VSX_BUILTIN_UNS_FLOATO_V2DI, - RS6000_BTI_V4SF, RS6000_BTI_unsigned_V2DI, 0, 0 }, - - { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V1TI, - RS6000_BTI_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_V1TI, 0 }, - { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V1TI, - RS6000_BTI_unsigned_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V1TI, 0 }, - { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V1TI, - RS6000_BTI_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_INTTI, 0 }, - { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V1TI, - RS6000_BTI_unsigned_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTTI, 0 }, - - { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V2DF, - RS6000_BTI_V2DF, RS6000_BTI_INTSI, ~RS6000_BTI_V2DF, 0 }, - { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V2DF, - RS6000_BTI_V2DF, RS6000_BTI_INTSI, ~RS6000_BTI_double, 0 }, - { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V2DI, - RS6000_BTI_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V2DI, - RS6000_BTI_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_long_long, 0 }, - { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V2DI, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_INTSI, - ~RS6000_BTI_unsigned_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V2DI, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_INTSI, - ~RS6000_BTI_unsigned_long_long, 0 }, - { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V2DI, - RS6000_BTI_bool_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V4SF, - RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_V4SF, 0 }, - { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V4SF, - RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float, 0 }, - { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V4SI, - RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V4SI, - RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V4SI, - RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI, 0 }, - { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V4SI, - RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_long, 0 }, - { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V4SI, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V4SI, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI, 0 }, - { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V4SI, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_long, 0 }, - { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V8HI, - RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V8HI, - RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_pixel_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V8HI, - RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V8HI, - RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI, 0 }, - { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V8HI, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V8HI, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI, 0 }, - { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V16QI, - RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V16QI, - RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V16QI, - RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI, 0 }, - { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V16QI, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V16QI, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI, 0 }, - { ALTIVEC_BUILTIN_VEC_LDE, ALTIVEC_BUILTIN_LVEBX, - RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI, 0 }, - { ALTIVEC_BUILTIN_VEC_LDE, ALTIVEC_BUILTIN_LVEBX, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI, 0 }, - { ALTIVEC_BUILTIN_VEC_LDE, ALTIVEC_BUILTIN_LVEHX, - RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI, 0 }, - { ALTIVEC_BUILTIN_VEC_LDE, ALTIVEC_BUILTIN_LVEHX, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI, 0 }, - { ALTIVEC_BUILTIN_VEC_LDE, ALTIVEC_BUILTIN_LVEWX, - RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float, 0 }, - { ALTIVEC_BUILTIN_VEC_LDE, ALTIVEC_BUILTIN_LVEWX, - RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI, 0 }, - { ALTIVEC_BUILTIN_VEC_LDE, ALTIVEC_BUILTIN_LVEWX, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI, 0 }, - { ALTIVEC_BUILTIN_VEC_LDE, ALTIVEC_BUILTIN_LVEWX, - RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_long, 0 }, - { ALTIVEC_BUILTIN_VEC_LDE, ALTIVEC_BUILTIN_LVEWX, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_long, 0 }, - { ALTIVEC_BUILTIN_VEC_LVEWX, ALTIVEC_BUILTIN_LVEWX, - RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float, 0 }, - { ALTIVEC_BUILTIN_VEC_LVEWX, ALTIVEC_BUILTIN_LVEWX, - RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVEWX, ALTIVEC_BUILTIN_LVEWX, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVEWX, ALTIVEC_BUILTIN_LVEWX, - RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_long, 0 }, - { ALTIVEC_BUILTIN_VEC_LVEWX, ALTIVEC_BUILTIN_LVEWX, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_long, 0 }, - { ALTIVEC_BUILTIN_VEC_LVEHX, ALTIVEC_BUILTIN_LVEHX, - RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVEHX, ALTIVEC_BUILTIN_LVEHX, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVEBX, ALTIVEC_BUILTIN_LVEBX, - RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVEBX, ALTIVEC_BUILTIN_LVEBX, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI, 0 }, - - /* vector signed__int128 vec_xl_sext (signed long long, signed char *); - vector signed__int128 vec_xl_sext (signed long long, signed short *); - vector signed__int128 vec_xl_sext (signed long long, signed int *); - vector signed__int128 vec_xl_sext (signed long long, signed longlong *); */ - { P10_BUILTIN_VEC_SE_LXVRX, P10_BUILTIN_SE_LXVRBX, - RS6000_BTI_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI, 0 }, - { P10_BUILTIN_VEC_SE_LXVRX, P10_BUILTIN_SE_LXVRHX, - RS6000_BTI_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI, 0 }, - { P10_BUILTIN_VEC_SE_LXVRX, P10_BUILTIN_SE_LXVRWX, - RS6000_BTI_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI, 0 }, - { P10_BUILTIN_VEC_SE_LXVRX, P10_BUILTIN_SE_LXVRDX, - RS6000_BTI_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_INTDI, 0 }, - { P10_BUILTIN_VEC_SE_LXVRX, P10_BUILTIN_SE_LXVRDX, - RS6000_BTI_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_long_long, 0 }, - - /* vector unsigned__int128 vec_xl_zext (signed long long, unsigned char *); - vector unsigned__int128 vec_xl_zext (signed long long, unsigned short *); - vector unsigned__int128 vec_xl_zext (signed long long, unsigned int *); - vector unsigned__int128 vec_xl_zext (signed long long, unsigned longlong *); */ - { P10_BUILTIN_VEC_ZE_LXVRX, P10_BUILTIN_ZE_LXVRBX, - RS6000_BTI_unsigned_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI, 0 }, - { P10_BUILTIN_VEC_ZE_LXVRX, P10_BUILTIN_ZE_LXVRHX, - RS6000_BTI_unsigned_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI, 0 }, - { P10_BUILTIN_VEC_ZE_LXVRX, P10_BUILTIN_ZE_LXVRWX, - RS6000_BTI_unsigned_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI, 0 }, - { P10_BUILTIN_VEC_ZE_LXVRX, P10_BUILTIN_ZE_LXVRDX, - RS6000_BTI_unsigned_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTDI, 0 }, - { P10_BUILTIN_VEC_ZE_LXVRX, P10_BUILTIN_ZE_LXVRDX, - RS6000_BTI_unsigned_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_long_long, 0 }, - - /* void vec_xst_trunc (vector signed __int128, signed long long, signed char *); - void vec_xst_trunc (vector unsigned __int128, signed long long, unsigned char *); - void vec_xst_trunc (vector signed __int128, signed long long, signed char *); - void vec_xst_trunc (vector unsigned __int128, signed long long, unsigned char *); - void vec_xst_trunc (vector signed __int128, signed long long, signed char *); - void vec_xst_trunc (vector unsigned __int128, signed long long, unsigned char *); - void vec_xst_trunc (vector signed __int128, signed long long, signed char *); - void vec_xst_trunc (vector unsigned __int128, signed long long, unsigned char *); */ - { P10_BUILTIN_VEC_TR_STXVRX, P10_BUILTIN_TR_STXVRBX, RS6000_BTI_void, - RS6000_BTI_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI }, - { P10_BUILTIN_VEC_TR_STXVRX, P10_BUILTIN_TR_STXVRBX, RS6000_BTI_void, - RS6000_BTI_unsigned_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI }, - { P10_BUILTIN_VEC_TR_STXVRX, P10_BUILTIN_TR_STXVRHX, RS6000_BTI_void, - RS6000_BTI_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI }, - { P10_BUILTIN_VEC_TR_STXVRX, P10_BUILTIN_TR_STXVRHX, RS6000_BTI_void, - RS6000_BTI_unsigned_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI }, - { P10_BUILTIN_VEC_TR_STXVRX, P10_BUILTIN_TR_STXVRWX, RS6000_BTI_void, - RS6000_BTI_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI }, - { P10_BUILTIN_VEC_TR_STXVRX, P10_BUILTIN_TR_STXVRWX, RS6000_BTI_void, - RS6000_BTI_unsigned_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI }, - { P10_BUILTIN_VEC_TR_STXVRX, P10_BUILTIN_TR_STXVRDX, RS6000_BTI_void, - RS6000_BTI_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_long_long }, - { P10_BUILTIN_VEC_TR_STXVRX, P10_BUILTIN_TR_STXVRDX, RS6000_BTI_void, - RS6000_BTI_unsigned_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_long_long }, - { P10_BUILTIN_VEC_TR_STXVRX, P10_BUILTIN_TR_STXVRDX, RS6000_BTI_void, - RS6000_BTI_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_INTDI }, - { P10_BUILTIN_VEC_TR_STXVRX, P10_BUILTIN_TR_STXVRDX, RS6000_BTI_void, - RS6000_BTI_unsigned_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTDI }, - - /* vector float vec_ldl (int, vector float *); - vector float vec_ldl (int, float *); */ - { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V4SF, - RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_V4SF, 0 }, - { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V4SF, - RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float, 0 }, - - /* vector bool int vec_ldl (int, vector bool int *); - vector bool int vec_ldl (int, bool int *); - vector int vec_ldl (int, vector int *); - vector int vec_ldl (int, int *); - vector unsigned int vec_ldl (int, vector unsigned int *); - vector unsigned int vec_ldl (int, unsigned int *); */ - { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V4SI, - RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V4SI, - RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_int, 0 }, - { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V4SI, - RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V4SI, - RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI, 0 }, - { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V4SI, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V4SI, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI, 0 }, - - /* vector bool short vec_ldl (int, vector bool short *); - vector bool short vec_ldl (int, bool short *); - vector pixel vec_ldl (int, vector pixel *); - vector short vec_ldl (int, vector short *); - vector short vec_ldl (int, short *); - vector unsigned short vec_ldl (int, vector unsigned short *); - vector unsigned short vec_ldl (int, unsigned short *); */ - { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V8HI, - RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V8HI, - RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_short, 0 }, - { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V8HI, - RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_pixel_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V8HI, - RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V8HI, - RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI, 0 }, - { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V8HI, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V8HI, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI, 0 }, - - /* vector bool char vec_ldl (int, vector bool char *); - vector bool char vec_ldl (int, bool char *); - vector char vec_ldl (int, vector char *); - vector char vec_ldl (int, char *); - vector unsigned char vec_ldl (int, vector unsigned char *); - vector unsigned char vec_ldl (int, unsigned char *); */ - { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V16QI, - RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V16QI, - RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_char, 0 }, - { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V16QI, - RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V16QI, - RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI, 0 }, - { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V16QI, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, - ~RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V16QI, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI, 0 }, - - /* vector double vec_ldl (int, vector double *); - vector double vec_ldl (int, double *); */ - { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V2DF, - RS6000_BTI_V2DF, RS6000_BTI_INTSI, ~RS6000_BTI_V2DF, 0 }, - { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V2DF, - RS6000_BTI_V2DF, RS6000_BTI_INTSI, ~RS6000_BTI_double, 0 }, - - /* vector long long vec_ldl (int, vector long long *); - vector long long vec_ldl (int, long long *); - vector unsigned long long vec_ldl (int, vector unsigned long long *); - vector unsigned long long vec_ldl (int, unsigned long long *); - vector bool long long vec_ldl (int, vector bool long long *); - vector bool long long vec_ldl (int, bool long long *); */ - { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V2DI, - RS6000_BTI_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V2DI, - RS6000_BTI_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_long_long, 0 }, - { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V2DI, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_INTSI, - ~RS6000_BTI_unsigned_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V2DI, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_INTSI, - ~RS6000_BTI_unsigned_long_long, 0 }, - { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V2DI, - RS6000_BTI_bool_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V2DI, - RS6000_BTI_bool_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_long_long, 0 }, - - { ALTIVEC_BUILTIN_VEC_LVSL, ALTIVEC_BUILTIN_LVSL, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVSL, ALTIVEC_BUILTIN_LVSL, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVSL, ALTIVEC_BUILTIN_LVSL, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVSL, ALTIVEC_BUILTIN_LVSL, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVSL, ALTIVEC_BUILTIN_LVSL, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVSL, ALTIVEC_BUILTIN_LVSL, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVSL, ALTIVEC_BUILTIN_LVSL, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_long, 0 }, - { ALTIVEC_BUILTIN_VEC_LVSL, ALTIVEC_BUILTIN_LVSL, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_long, 0 }, - { ALTIVEC_BUILTIN_VEC_LVSL, ALTIVEC_BUILTIN_LVSL, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_float, 0 }, - { ALTIVEC_BUILTIN_VEC_LVSL, ALTIVEC_BUILTIN_LVSL, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_double, 0 }, - { ALTIVEC_BUILTIN_VEC_LVSL, ALTIVEC_BUILTIN_LVSL, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTDI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVSL, ALTIVEC_BUILTIN_LVSL, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTDI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVSL, ALTIVEC_BUILTIN_LVSL, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_long_long, 0 }, - { ALTIVEC_BUILTIN_VEC_LVSL, ALTIVEC_BUILTIN_LVSL, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, - ~RS6000_BTI_unsigned_long_long, 0 }, - { ALTIVEC_BUILTIN_VEC_LVSR, ALTIVEC_BUILTIN_LVSR, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVSR, ALTIVEC_BUILTIN_LVSR, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVSR, ALTIVEC_BUILTIN_LVSR, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVSR, ALTIVEC_BUILTIN_LVSR, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVSR, ALTIVEC_BUILTIN_LVSR, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVSR, ALTIVEC_BUILTIN_LVSR, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVSR, ALTIVEC_BUILTIN_LVSR, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_long, 0 }, - { ALTIVEC_BUILTIN_VEC_LVSR, ALTIVEC_BUILTIN_LVSR, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_long, 0 }, - { ALTIVEC_BUILTIN_VEC_LVSR, ALTIVEC_BUILTIN_LVSR, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_float, 0 }, - { ALTIVEC_BUILTIN_VEC_LVSR, ALTIVEC_BUILTIN_LVSR, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_double, 0 }, - { ALTIVEC_BUILTIN_VEC_LVSR, ALTIVEC_BUILTIN_LVSR, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTDI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVSR, ALTIVEC_BUILTIN_LVSR, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTDI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVSR, ALTIVEC_BUILTIN_LVSR, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_long_long, 0 }, - { ALTIVEC_BUILTIN_VEC_LVSR, ALTIVEC_BUILTIN_LVSR, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, - ~RS6000_BTI_unsigned_long_long, 0 }, - { ALTIVEC_BUILTIN_VEC_LVLX, ALTIVEC_BUILTIN_LVLX, - RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_V4SF, 0 }, - { ALTIVEC_BUILTIN_VEC_LVLX, ALTIVEC_BUILTIN_LVLX, - RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float, 0 }, - { ALTIVEC_BUILTIN_VEC_LVLX, ALTIVEC_BUILTIN_LVLX, - RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVLX, ALTIVEC_BUILTIN_LVLX, - RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVLX, ALTIVEC_BUILTIN_LVLX, - RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVLX, ALTIVEC_BUILTIN_LVLX, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVLX, ALTIVEC_BUILTIN_LVLX, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVLX, ALTIVEC_BUILTIN_LVLX, - RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVLX, ALTIVEC_BUILTIN_LVLX, - RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_pixel_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVLX, ALTIVEC_BUILTIN_LVLX, - RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVLX, ALTIVEC_BUILTIN_LVLX, - RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVLX, ALTIVEC_BUILTIN_LVLX, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVLX, ALTIVEC_BUILTIN_LVLX, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVLX, ALTIVEC_BUILTIN_LVLX, - RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVLX, ALTIVEC_BUILTIN_LVLX, - RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVLX, ALTIVEC_BUILTIN_LVLX, - RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVLX, ALTIVEC_BUILTIN_LVLX, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVLX, ALTIVEC_BUILTIN_LVLX, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVLXL, ALTIVEC_BUILTIN_LVLXL, - RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_V4SF, 0 }, - { ALTIVEC_BUILTIN_VEC_LVLXL, ALTIVEC_BUILTIN_LVLXL, - RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float, 0 }, - { ALTIVEC_BUILTIN_VEC_LVLXL, ALTIVEC_BUILTIN_LVLXL, - RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVLXL, ALTIVEC_BUILTIN_LVLXL, - RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVLXL, ALTIVEC_BUILTIN_LVLXL, - RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVLXL, ALTIVEC_BUILTIN_LVLXL, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVLXL, ALTIVEC_BUILTIN_LVLXL, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVLXL, ALTIVEC_BUILTIN_LVLXL, - RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVLXL, ALTIVEC_BUILTIN_LVLXL, - RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_pixel_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVLXL, ALTIVEC_BUILTIN_LVLXL, - RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVLXL, ALTIVEC_BUILTIN_LVLXL, - RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVLXL, ALTIVEC_BUILTIN_LVLXL, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVLXL, ALTIVEC_BUILTIN_LVLXL, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVLXL, ALTIVEC_BUILTIN_LVLXL, - RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVLXL, ALTIVEC_BUILTIN_LVLXL, - RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVLXL, ALTIVEC_BUILTIN_LVLXL, - RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVLXL, ALTIVEC_BUILTIN_LVLXL, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVLXL, ALTIVEC_BUILTIN_LVLXL, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVRX, ALTIVEC_BUILTIN_LVRX, - RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_V4SF, 0 }, - { ALTIVEC_BUILTIN_VEC_LVRX, ALTIVEC_BUILTIN_LVRX, - RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float, 0 }, - { ALTIVEC_BUILTIN_VEC_LVRX, ALTIVEC_BUILTIN_LVRX, - RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVRX, ALTIVEC_BUILTIN_LVRX, - RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVRX, ALTIVEC_BUILTIN_LVRX, - RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVRX, ALTIVEC_BUILTIN_LVRX, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVRX, ALTIVEC_BUILTIN_LVRX, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVRX, ALTIVEC_BUILTIN_LVRX, - RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVRX, ALTIVEC_BUILTIN_LVRX, - RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_pixel_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVRX, ALTIVEC_BUILTIN_LVRX, - RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVRX, ALTIVEC_BUILTIN_LVRX, - RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVRX, ALTIVEC_BUILTIN_LVRX, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVRX, ALTIVEC_BUILTIN_LVRX, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVRX, ALTIVEC_BUILTIN_LVRX, - RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVRX, ALTIVEC_BUILTIN_LVRX, - RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVRX, ALTIVEC_BUILTIN_LVRX, - RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVRX, ALTIVEC_BUILTIN_LVRX, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVRX, ALTIVEC_BUILTIN_LVRX, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVRXL, ALTIVEC_BUILTIN_LVRXL, - RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_V4SF, 0 }, - { ALTIVEC_BUILTIN_VEC_LVRXL, ALTIVEC_BUILTIN_LVRXL, - RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float, 0 }, - { ALTIVEC_BUILTIN_VEC_LVRXL, ALTIVEC_BUILTIN_LVRXL, - RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVRXL, ALTIVEC_BUILTIN_LVRXL, - RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVRXL, ALTIVEC_BUILTIN_LVRXL, - RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVRXL, ALTIVEC_BUILTIN_LVRXL, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVRXL, ALTIVEC_BUILTIN_LVRXL, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVRXL, ALTIVEC_BUILTIN_LVRXL, - RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVRXL, ALTIVEC_BUILTIN_LVRXL, - RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_pixel_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVRXL, ALTIVEC_BUILTIN_LVRXL, - RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVRXL, ALTIVEC_BUILTIN_LVRXL, - RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVRXL, ALTIVEC_BUILTIN_LVRXL, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVRXL, ALTIVEC_BUILTIN_LVRXL, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVRXL, ALTIVEC_BUILTIN_LVRXL, - RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVRXL, ALTIVEC_BUILTIN_LVRXL, - RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVRXL, ALTIVEC_BUILTIN_LVRXL, - RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVRXL, ALTIVEC_BUILTIN_LVRXL, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVRXL, ALTIVEC_BUILTIN_LVRXL, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI, 0 }, - { ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXUB, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXUB, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXUB, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXSB, - RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXSB, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXSB, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXUH, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXUH, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXUH, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXSH, - RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXSH, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXSH, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXUW, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXUW, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXUW, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXSW, - RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXSW, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXSW, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_MAX, P8V_BUILTIN_VMAXUD, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_MAX, P8V_BUILTIN_VMAXUD, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_MAX, P8V_BUILTIN_VMAXUD, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_MAX, P8V_BUILTIN_VMAXSD, - RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_MAX, P8V_BUILTIN_VMAXSD, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_MAX, P8V_BUILTIN_VMAXSD, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXFP, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, - { ALTIVEC_BUILTIN_VEC_MAX, VSX_BUILTIN_XVMAXDP, - RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 }, - { ALTIVEC_BUILTIN_VEC_VMAXFP, ALTIVEC_BUILTIN_VMAXFP, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, - { ALTIVEC_BUILTIN_VEC_VMAXSW, ALTIVEC_BUILTIN_VMAXSW, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMAXSW, ALTIVEC_BUILTIN_VMAXSW, - RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMAXSW, ALTIVEC_BUILTIN_VMAXSW, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMAXUW, ALTIVEC_BUILTIN_VMAXUW, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMAXUW, ALTIVEC_BUILTIN_VMAXUW, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMAXUW, ALTIVEC_BUILTIN_VMAXUW, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMAXUW, ALTIVEC_BUILTIN_VMAXUW, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMAXUW, ALTIVEC_BUILTIN_VMAXUW, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMAXSH, ALTIVEC_BUILTIN_VMAXSH, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMAXSH, ALTIVEC_BUILTIN_VMAXSH, - RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMAXSH, ALTIVEC_BUILTIN_VMAXSH, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMAXUH, ALTIVEC_BUILTIN_VMAXUH, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMAXUH, ALTIVEC_BUILTIN_VMAXUH, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMAXUH, ALTIVEC_BUILTIN_VMAXUH, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMAXUH, ALTIVEC_BUILTIN_VMAXUH, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMAXUH, ALTIVEC_BUILTIN_VMAXUH, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMAXSB, ALTIVEC_BUILTIN_VMAXSB, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMAXSB, ALTIVEC_BUILTIN_VMAXSB, - RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMAXSB, ALTIVEC_BUILTIN_VMAXSB, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMAXUB, ALTIVEC_BUILTIN_VMAXUB, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMAXUB, ALTIVEC_BUILTIN_VMAXUB, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMAXUB, ALTIVEC_BUILTIN_VMAXUB, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMAXUB, ALTIVEC_BUILTIN_VMAXUB, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMAXUB, ALTIVEC_BUILTIN_VMAXUB, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_MERGEH, ALTIVEC_BUILTIN_VMRGHB, - RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_MERGEH, ALTIVEC_BUILTIN_VMRGHB, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_MERGEH, ALTIVEC_BUILTIN_VMRGHB, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_MERGEH, ALTIVEC_BUILTIN_VMRGHH, - RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_MERGEH, ALTIVEC_BUILTIN_VMRGHH, - RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_MERGEH, ALTIVEC_BUILTIN_VMRGHH, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_MERGEH, ALTIVEC_BUILTIN_VMRGHH, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_MERGEH, ALTIVEC_BUILTIN_VMRGHW, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, - { ALTIVEC_BUILTIN_VEC_MERGEH, ALTIVEC_BUILTIN_VMRGHW, - RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_MERGEH, ALTIVEC_BUILTIN_VMRGHW, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_MERGEH, ALTIVEC_BUILTIN_VMRGHW, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_MERGEH, VSX_BUILTIN_VEC_MERGEH_V2DF, - RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 }, - { ALTIVEC_BUILTIN_VEC_MERGEH, VSX_BUILTIN_VEC_MERGEH_V2DI, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_MERGEH, VSX_BUILTIN_VEC_MERGEH_V2DI, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_MERGEH, VSX_BUILTIN_VEC_MERGEH_V2DI, - RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_MERGEH, VSX_BUILTIN_VEC_MERGEH_V2DI, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_MERGEH, VSX_BUILTIN_VEC_MERGEH_V2DI, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_MERGEH, VSX_BUILTIN_VEC_MERGEH_V2DI, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_MERGEH, VSX_BUILTIN_VEC_MERGEH_V2DI, - RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMRGHW, ALTIVEC_BUILTIN_VMRGHW, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, - { ALTIVEC_BUILTIN_VEC_VMRGHW, ALTIVEC_BUILTIN_VMRGHW, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMRGHW, ALTIVEC_BUILTIN_VMRGHW, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMRGHW, ALTIVEC_BUILTIN_VMRGHW, - RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMRGHH, ALTIVEC_BUILTIN_VMRGHH, - RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMRGHH, ALTIVEC_BUILTIN_VMRGHH, - RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMRGHH, ALTIVEC_BUILTIN_VMRGHH, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMRGHH, ALTIVEC_BUILTIN_VMRGHH, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMRGHB, ALTIVEC_BUILTIN_VMRGHB, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMRGHB, ALTIVEC_BUILTIN_VMRGHB, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMRGHB, ALTIVEC_BUILTIN_VMRGHB, - RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_MERGEL, ALTIVEC_BUILTIN_VMRGLB, - RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_MERGEL, ALTIVEC_BUILTIN_VMRGLB, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_MERGEL, ALTIVEC_BUILTIN_VMRGLB, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_MERGEL, ALTIVEC_BUILTIN_VMRGLH, - RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_MERGEL, ALTIVEC_BUILTIN_VMRGLH, - RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_MERGEL, ALTIVEC_BUILTIN_VMRGLH, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_MERGEL, ALTIVEC_BUILTIN_VMRGLH, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_MERGEL, ALTIVEC_BUILTIN_VMRGLW, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, - { ALTIVEC_BUILTIN_VEC_MERGEL, ALTIVEC_BUILTIN_VMRGLW, - RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_MERGEL, ALTIVEC_BUILTIN_VMRGLW, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_MERGEL, ALTIVEC_BUILTIN_VMRGLW, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_MERGEL, VSX_BUILTIN_VEC_MERGEL_V2DF, - RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 }, - { ALTIVEC_BUILTIN_VEC_MERGEL, VSX_BUILTIN_VEC_MERGEL_V2DI, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_MERGEL, VSX_BUILTIN_VEC_MERGEL_V2DI, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_MERGEL, VSX_BUILTIN_VEC_MERGEL_V2DI, - RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_MERGEL, VSX_BUILTIN_VEC_MERGEL_V2DI, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_MERGEL, VSX_BUILTIN_VEC_MERGEL_V2DI, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_MERGEL, VSX_BUILTIN_VEC_MERGEL_V2DI, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_MERGEL, VSX_BUILTIN_VEC_MERGEL_V2DI, - RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMRGLW, ALTIVEC_BUILTIN_VMRGLW, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, - { ALTIVEC_BUILTIN_VEC_VMRGLW, ALTIVEC_BUILTIN_VMRGLW, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMRGLW, ALTIVEC_BUILTIN_VMRGLW, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMRGLW, ALTIVEC_BUILTIN_VMRGLW, - RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMRGLH, ALTIVEC_BUILTIN_VMRGLH, - RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMRGLH, ALTIVEC_BUILTIN_VMRGLH, - RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMRGLH, ALTIVEC_BUILTIN_VMRGLH, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMRGLH, ALTIVEC_BUILTIN_VMRGLH, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMRGLB, ALTIVEC_BUILTIN_VMRGLB, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMRGLB, ALTIVEC_BUILTIN_VMRGLB, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMRGLB, ALTIVEC_BUILTIN_VMRGLB, - RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINUB, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINUB, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINUB, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINSB, - RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINSB, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINSB, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINUH, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINUH, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINUH, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINSH, - RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINSH, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINSH, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINUW, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINUW, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINUW, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINSW, - RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINSW, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINSW, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_MIN, P8V_BUILTIN_VMINUD, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_MIN, P8V_BUILTIN_VMINUD, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_MIN, P8V_BUILTIN_VMINUD, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_MIN, P8V_BUILTIN_VMINSD, - RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_MIN, P8V_BUILTIN_VMINSD, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_MIN, P8V_BUILTIN_VMINSD, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINFP, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, - { ALTIVEC_BUILTIN_VEC_MIN, VSX_BUILTIN_XVMINDP, - RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 }, - { ALTIVEC_BUILTIN_VEC_VMINFP, ALTIVEC_BUILTIN_VMINFP, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, - { ALTIVEC_BUILTIN_VEC_VMINSW, ALTIVEC_BUILTIN_VMINSW, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMINSW, ALTIVEC_BUILTIN_VMINSW, - RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMINSW, ALTIVEC_BUILTIN_VMINSW, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMINUW, ALTIVEC_BUILTIN_VMINUW, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMINUW, ALTIVEC_BUILTIN_VMINUW, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMINUW, ALTIVEC_BUILTIN_VMINUW, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMINUW, ALTIVEC_BUILTIN_VMINUW, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMINUW, ALTIVEC_BUILTIN_VMINUW, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMINSH, ALTIVEC_BUILTIN_VMINSH, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMINSH, ALTIVEC_BUILTIN_VMINSH, - RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMINSH, ALTIVEC_BUILTIN_VMINSH, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMINSB, ALTIVEC_BUILTIN_VMINSB, - RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMINSB, ALTIVEC_BUILTIN_VMINSB, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMINSB, ALTIVEC_BUILTIN_VMINSB, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMINUH, ALTIVEC_BUILTIN_VMINUH, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMINUH, ALTIVEC_BUILTIN_VMINUH, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMINUH, ALTIVEC_BUILTIN_VMINUH, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMINUH, ALTIVEC_BUILTIN_VMINUH, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMINUH, ALTIVEC_BUILTIN_VMINUH, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMINUB, ALTIVEC_BUILTIN_VMINUB, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMINUB, ALTIVEC_BUILTIN_VMINUB, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMINUB, ALTIVEC_BUILTIN_VMINUB, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMINUB, ALTIVEC_BUILTIN_VMINUB, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMINUB, ALTIVEC_BUILTIN_VMINUB, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, 0 }, - { P10_BUILTIN_VEC_MULH, P10V_BUILTIN_MULHS_V4SI, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, - { P10_BUILTIN_VEC_MULH, P10V_BUILTIN_MULHU_V4SI, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, - RS6000_BTI_unsigned_V4SI, 0 }, - { P10_BUILTIN_VEC_MULH, P10V_BUILTIN_MULHS_V2DI, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, - { P10_BUILTIN_VEC_MULH, P10V_BUILTIN_MULHU_V2DI, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, - RS6000_BTI_unsigned_V2DI, 0 }, - - { ALTIVEC_BUILTIN_VEC_MULE, ALTIVEC_BUILTIN_VMULEUB, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_MULE, ALTIVEC_BUILTIN_VMULESB, - RS6000_BTI_V8HI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_MULE, ALTIVEC_BUILTIN_VMULEUH, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_MULE, ALTIVEC_BUILTIN_VMULESH, - RS6000_BTI_V4SI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_MULE, P8V_BUILTIN_VMULESW, - RS6000_BTI_V2DI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_MULE, P8V_BUILTIN_VMULEUW, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V4SI, - RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_MULE, P10V_BUILTIN_VMULESD, - RS6000_BTI_V1TI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_MULE, P10V_BUILTIN_VMULEUD, - RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V2DI, - RS6000_BTI_unsigned_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMULEUB, ALTIVEC_BUILTIN_VMULEUB, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMULESB, ALTIVEC_BUILTIN_VMULESB, - RS6000_BTI_V8HI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMULEUH, ALTIVEC_BUILTIN_VMULEUH, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMULESH, ALTIVEC_BUILTIN_VMULESH, - RS6000_BTI_V4SI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMULEUW, P8V_BUILTIN_VMULEUW, - RS6000_BTI_V2DI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMULESW, P8V_BUILTIN_VMULESW, - RS6000_BTI_V2DI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_MULO, ALTIVEC_BUILTIN_VMULOUB, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_MULO, ALTIVEC_BUILTIN_VMULOSB, - RS6000_BTI_V8HI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_MULO, ALTIVEC_BUILTIN_VMULOUH, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_MULO, P8V_BUILTIN_VMULOSW, - RS6000_BTI_V2DI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_MULO, P8V_BUILTIN_VMULOUW, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V4SI, - RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_MULO, P10V_BUILTIN_VMULOSD, - RS6000_BTI_V1TI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_MULO, P10V_BUILTIN_VMULOUD, - RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V2DI, - RS6000_BTI_unsigned_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_MULO, ALTIVEC_BUILTIN_VMULOSH, - RS6000_BTI_V4SI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMULOSH, ALTIVEC_BUILTIN_VMULOSH, - RS6000_BTI_V4SI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMULOUH, ALTIVEC_BUILTIN_VMULOUH, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMULOSB, ALTIVEC_BUILTIN_VMULOSB, - RS6000_BTI_V8HI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMULOUB, ALTIVEC_BUILTIN_VMULOUB, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMULOUW, P8V_BUILTIN_VMULOUW, - RS6000_BTI_V2DI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMULOSW, P8V_BUILTIN_VMULOSW, - RS6000_BTI_V2DI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, - - { ALTIVEC_BUILTIN_VEC_NABS, ALTIVEC_BUILTIN_NABS_V16QI, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_NABS, ALTIVEC_BUILTIN_NABS_V8HI, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_NABS, ALTIVEC_BUILTIN_NABS_V4SI, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_NABS, ALTIVEC_BUILTIN_NABS_V2DI, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_NABS, ALTIVEC_BUILTIN_NABS_V4SF, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_NABS, VSX_BUILTIN_XVNABSDP, - RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_NEARBYINT, VSX_BUILTIN_XVRDPI, - RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_NEARBYINT, VSX_BUILTIN_XVRSPI, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0, 0 }, - - { ALTIVEC_BUILTIN_VEC_NOR, ALTIVEC_BUILTIN_VNOR_V4SF, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, - { ALTIVEC_BUILTIN_VEC_NOR, ALTIVEC_BUILTIN_VNOR_V2DF, - RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 }, - { ALTIVEC_BUILTIN_VEC_NOR, ALTIVEC_BUILTIN_VNOR_V2DI, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_NOR, ALTIVEC_BUILTIN_VNOR_V2DI, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_NOR, ALTIVEC_BUILTIN_VNOR_V2DI, - RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_NOR, P10V_BUILTIN_VNOR_V1TI, - RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_bool_V1TI, 0 }, - { ALTIVEC_BUILTIN_VEC_NOR, P10V_BUILTIN_VNOR_V1TI, - RS6000_BTI_V1TI, RS6000_BTI_bool_V1TI, RS6000_BTI_V1TI, 0 }, - { ALTIVEC_BUILTIN_VEC_NOR, P10V_BUILTIN_VNOR_V1TI_UNS, - RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, 0 }, - { ALTIVEC_BUILTIN_VEC_NOR, P10V_BUILTIN_VNOR_V1TI_UNS, - RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, RS6000_BTI_bool_V1TI, 0 }, - { ALTIVEC_BUILTIN_VEC_NOR, P10V_BUILTIN_VNOR_V1TI_UNS, - RS6000_BTI_unsigned_V1TI, RS6000_BTI_bool_V1TI, RS6000_BTI_unsigned_V1TI, 0 }, - { ALTIVEC_BUILTIN_VEC_NOR, ALTIVEC_BUILTIN_VNOR_V2DI_UNS, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_NOR, ALTIVEC_BUILTIN_VNOR_V2DI_UNS, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_NOR, ALTIVEC_BUILTIN_VNOR_V2DI_UNS, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_NOR, ALTIVEC_BUILTIN_VNOR_V2DI_UNS, - RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_NOR, ALTIVEC_BUILTIN_VNOR_V4SI, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_NOR, ALTIVEC_BUILTIN_VNOR_V4SI_UNS, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_NOR, ALTIVEC_BUILTIN_VNOR_V4SI_UNS, - RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_NOR, ALTIVEC_BUILTIN_VNOR_V8HI, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_NOR, ALTIVEC_BUILTIN_VNOR_V8HI_UNS, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_NOR, ALTIVEC_BUILTIN_VNOR_V8HI_UNS, - RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_NOR, ALTIVEC_BUILTIN_VNOR_V16QI, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_NOR, ALTIVEC_BUILTIN_VNOR_V16QI_UNS, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_NOR, ALTIVEC_BUILTIN_VNOR_V16QI_UNS, - RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, 0 }, - - { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V4SF, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, - { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V4SF, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_bool_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V4SF, - RS6000_BTI_V4SF, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SF, 0 }, - { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V2DF, - RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 }, - { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V2DF, - RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_bool_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V2DF, - RS6000_BTI_V2DF, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DF, 0 }, - { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V2DI, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V2DI, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V2DI, - RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V2DI_UNS, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V2DI_UNS, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V2DI_UNS, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V2DI_UNS, - RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V4SI_UNS, - RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V4SI, - RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V4SI, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V4SI, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V4SI_UNS, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V4SI_UNS, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V4SI_UNS, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V8HI_UNS, - RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V8HI, - RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V8HI, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V8HI, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V8HI_UNS, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V8HI_UNS, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V8HI_UNS, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V16QI, - RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V16QI_UNS, - RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V16QI, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V16QI, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V16QI_UNS, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V16QI_UNS, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V16QI_UNS, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - - { ALTIVEC_BUILTIN_VEC_PACK, ALTIVEC_BUILTIN_VPKUHUM, - RS6000_BTI_V16QI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_PACK, ALTIVEC_BUILTIN_VPKUHUM, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_PACK, ALTIVEC_BUILTIN_VPKUHUM, - RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_PACK, ALTIVEC_BUILTIN_VPKUWUM, - RS6000_BTI_V8HI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_PACK, ALTIVEC_BUILTIN_VPKUWUM, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_PACK, ALTIVEC_BUILTIN_VPKUWUM, - RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_PACK, P8V_BUILTIN_VPKUDUM, - RS6000_BTI_V4SI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_PACK, P8V_BUILTIN_VPKUDUM, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_PACK, P8V_BUILTIN_VPKUDUM, - RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_PACK, P8V_BUILTIN_FLOAT2_V2DF, - RS6000_BTI_V4SF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 }, - - { P8V_BUILTIN_VEC_NEG, P8V_BUILTIN_NEG_V16QI, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0, 0 }, - { P8V_BUILTIN_VEC_NEG, P8V_BUILTIN_NEG_V8HI, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0, 0 }, - { P8V_BUILTIN_VEC_NEG, P8V_BUILTIN_NEG_V4SI, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0, 0 }, - { P8V_BUILTIN_VEC_NEG, P8V_BUILTIN_NEG_V2DI, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0, 0 }, - { P8V_BUILTIN_VEC_NEG, P8V_BUILTIN_NEG_V4SF, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0, 0 }, - { P8V_BUILTIN_VEC_NEG, P8V_BUILTIN_NEG_V2DF, - RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0, 0 }, - - { P9V_BUILTIN_VEC_CONVERT_4F32_8I16, P9V_BUILTIN_CONVERT_4F32_8I16, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, - { P9V_BUILTIN_VEC_CONVERT_4F32_8F16, P9V_BUILTIN_CONVERT_4F32_8F16, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, - - { P9V_BUILTIN_VEC_VFIRSTMATCHINDEX, P9V_BUILTIN_VFIRSTMATCHINDEX_V16QI, - RS6000_BTI_UINTSI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, - { P9V_BUILTIN_VEC_VFIRSTMATCHINDEX, P9V_BUILTIN_VFIRSTMATCHINDEX_V16QI, - RS6000_BTI_UINTSI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { P9V_BUILTIN_VEC_VFIRSTMATCHINDEX, P9V_BUILTIN_VFIRSTMATCHINDEX_V8HI, - RS6000_BTI_UINTSI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, - { P9V_BUILTIN_VEC_VFIRSTMATCHINDEX, P9V_BUILTIN_VFIRSTMATCHINDEX_V8HI, - RS6000_BTI_UINTSI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { P9V_BUILTIN_VEC_VFIRSTMATCHINDEX, P9V_BUILTIN_VFIRSTMATCHINDEX_V4SI, - RS6000_BTI_UINTSI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, - { P9V_BUILTIN_VEC_VFIRSTMATCHINDEX, P9V_BUILTIN_VFIRSTMATCHINDEX_V4SI, - RS6000_BTI_UINTSI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { P9V_BUILTIN_VEC_VFIRSTMATCHOREOSINDEX, P9V_BUILTIN_VFIRSTMATCHOREOSINDEX_V16QI, - RS6000_BTI_UINTSI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, - { P9V_BUILTIN_VEC_VFIRSTMATCHOREOSINDEX, P9V_BUILTIN_VFIRSTMATCHOREOSINDEX_V16QI, - RS6000_BTI_UINTSI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { P9V_BUILTIN_VEC_VFIRSTMATCHOREOSINDEX, P9V_BUILTIN_VFIRSTMATCHOREOSINDEX_V8HI, - RS6000_BTI_UINTSI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, - { P9V_BUILTIN_VEC_VFIRSTMATCHOREOSINDEX, P9V_BUILTIN_VFIRSTMATCHOREOSINDEX_V8HI, - RS6000_BTI_UINTSI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { P9V_BUILTIN_VEC_VFIRSTMATCHOREOSINDEX, P9V_BUILTIN_VFIRSTMATCHOREOSINDEX_V4SI, - RS6000_BTI_UINTSI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, - { P9V_BUILTIN_VEC_VFIRSTMATCHOREOSINDEX, P9V_BUILTIN_VFIRSTMATCHOREOSINDEX_V4SI, - RS6000_BTI_UINTSI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { P9V_BUILTIN_VEC_VFIRSTMISMATCHINDEX, P9V_BUILTIN_VFIRSTMISMATCHINDEX_V16QI, - RS6000_BTI_UINTSI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, - { P9V_BUILTIN_VEC_VFIRSTMISMATCHINDEX, P9V_BUILTIN_VFIRSTMISMATCHINDEX_V16QI, - RS6000_BTI_UINTSI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { P9V_BUILTIN_VEC_VFIRSTMISMATCHINDEX, P9V_BUILTIN_VFIRSTMISMATCHINDEX_V8HI, - RS6000_BTI_UINTSI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, - { P9V_BUILTIN_VEC_VFIRSTMISMATCHINDEX, P9V_BUILTIN_VFIRSTMISMATCHINDEX_V8HI, - RS6000_BTI_UINTSI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { P9V_BUILTIN_VEC_VFIRSTMISMATCHINDEX, P9V_BUILTIN_VFIRSTMISMATCHINDEX_V4SI, - RS6000_BTI_UINTSI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, - { P9V_BUILTIN_VEC_VFIRSTMISMATCHINDEX, P9V_BUILTIN_VFIRSTMISMATCHINDEX_V4SI, - RS6000_BTI_UINTSI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - - { P9V_BUILTIN_VEC_VFIRSTMISMATCHOREOSINDEX, - P9V_BUILTIN_VFIRSTMISMATCHOREOSINDEX_V16QI, - RS6000_BTI_UINTSI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, - { P9V_BUILTIN_VEC_VFIRSTMISMATCHOREOSINDEX, - P9V_BUILTIN_VFIRSTMISMATCHOREOSINDEX_V16QI, RS6000_BTI_UINTSI, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { P9V_BUILTIN_VEC_VFIRSTMISMATCHOREOSINDEX, - P9V_BUILTIN_VFIRSTMISMATCHOREOSINDEX_V8HI, - RS6000_BTI_UINTSI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, - { P9V_BUILTIN_VEC_VFIRSTMISMATCHOREOSINDEX, - P9V_BUILTIN_VFIRSTMISMATCHOREOSINDEX_V8HI, - RS6000_BTI_UINTSI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { P9V_BUILTIN_VEC_VFIRSTMISMATCHOREOSINDEX, - P9V_BUILTIN_VFIRSTMISMATCHOREOSINDEX_V4SI, - RS6000_BTI_UINTSI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, - { P9V_BUILTIN_VEC_VFIRSTMISMATCHOREOSINDEX, - P9V_BUILTIN_VFIRSTMISMATCHOREOSINDEX_V4SI, - RS6000_BTI_UINTSI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - - { ALTIVEC_BUILTIN_VEC_VPKUWUM, ALTIVEC_BUILTIN_VPKUWUM, - RS6000_BTI_V8HI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VPKUWUM, ALTIVEC_BUILTIN_VPKUWUM, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VPKUWUM, ALTIVEC_BUILTIN_VPKUWUM, - RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VPKUHUM, ALTIVEC_BUILTIN_VPKUHUM, - RS6000_BTI_V16QI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VPKUHUM, ALTIVEC_BUILTIN_VPKUHUM, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VPKUHUM, ALTIVEC_BUILTIN_VPKUHUM, - RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_PACKPX, ALTIVEC_BUILTIN_VPKPX, - RS6000_BTI_pixel_V8HI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_PACKS, ALTIVEC_BUILTIN_VPKUHUS, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_PACKS, ALTIVEC_BUILTIN_VPKSHSS, - RS6000_BTI_V16QI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_PACKS, ALTIVEC_BUILTIN_VPKUWUS, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_PACKS, ALTIVEC_BUILTIN_VPKSWSS, - RS6000_BTI_V8HI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_PACKS, P8V_BUILTIN_VPKUDUS, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_PACKS, P8V_BUILTIN_VPKSDSS, - RS6000_BTI_V4SI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_VPKSWSS, ALTIVEC_BUILTIN_VPKSWSS, - RS6000_BTI_V8HI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VPKUWUS, ALTIVEC_BUILTIN_VPKUWUS, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VPKSHSS, ALTIVEC_BUILTIN_VPKSHSS, - RS6000_BTI_V16QI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VPKUHUS, ALTIVEC_BUILTIN_VPKUHUS, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_PACKSU, ALTIVEC_BUILTIN_VPKUHUS, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_PACKSU, ALTIVEC_BUILTIN_VPKSHUS, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_PACKSU, ALTIVEC_BUILTIN_VPKUWUS, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_PACKSU, ALTIVEC_BUILTIN_VPKSWUS, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_PACKSU, P8V_BUILTIN_VPKSDUS, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_PACKSU, P8V_BUILTIN_VPKUDUS, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_VPKSWUS, ALTIVEC_BUILTIN_VPKSWUS, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VPKSHUS, ALTIVEC_BUILTIN_VPKSHUS, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_RINT, VSX_BUILTIN_XVRDPIC, - RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_RINT, VSX_BUILTIN_XVRSPIC, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_RL, ALTIVEC_BUILTIN_VRLB, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_RL, ALTIVEC_BUILTIN_VRLB, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_RL, ALTIVEC_BUILTIN_VRLH, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_RL, ALTIVEC_BUILTIN_VRLH, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_RL, ALTIVEC_BUILTIN_VRLW, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_RL, ALTIVEC_BUILTIN_VRLW, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_RL, P8V_BUILTIN_VRLD, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_RL, P8V_BUILTIN_VRLD, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_RL, P10V_BUILTIN_VRLQ, - RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_unsigned_V1TI, 0 }, - { ALTIVEC_BUILTIN_VEC_RL, P10V_BUILTIN_VRLQ, - RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, - RS6000_BTI_unsigned_V1TI, 0 }, - { ALTIVEC_BUILTIN_VEC_VRLW, ALTIVEC_BUILTIN_VRLW, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VRLW, ALTIVEC_BUILTIN_VRLW, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VRLH, ALTIVEC_BUILTIN_VRLH, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VRLH, ALTIVEC_BUILTIN_VRLH, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VRLB, ALTIVEC_BUILTIN_VRLB, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_VRLB, ALTIVEC_BUILTIN_VRLB, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { P9V_BUILTIN_VEC_RLMI, P9V_BUILTIN_VRLWMI, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI }, - { P9V_BUILTIN_VEC_RLMI, P9V_BUILTIN_VRLDMI, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI }, - { P9V_BUILTIN_VEC_RLMI, P10V_BUILTIN_VRLQMI, - RS6000_BTI_V1TI, RS6000_BTI_V1TI, - RS6000_BTI_V1TI, RS6000_BTI_unsigned_V1TI }, - { P9V_BUILTIN_VEC_RLMI, P10V_BUILTIN_VRLQMI, - RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, - RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI }, - { P9V_BUILTIN_VEC_RLNM, P9V_BUILTIN_VRLWNM, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, - RS6000_BTI_unsigned_V4SI, 0 }, - { P9V_BUILTIN_VEC_RLNM, P9V_BUILTIN_VRLDNM, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, - RS6000_BTI_unsigned_V2DI, 0 }, - { P9V_BUILTIN_VEC_RLNM, P10V_BUILTIN_VRLQNM, - RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, - RS6000_BTI_unsigned_V1TI, 0 }, - { P9V_BUILTIN_VEC_RLNM, P10V_BUILTIN_VRLQNM, - RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_unsigned_V1TI, 0 }, - { ALTIVEC_BUILTIN_VEC_SL, ALTIVEC_BUILTIN_VSLB, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SL, ALTIVEC_BUILTIN_VSLB, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SL, ALTIVEC_BUILTIN_VSLH, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_SL, ALTIVEC_BUILTIN_VSLH, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_SL, ALTIVEC_BUILTIN_VSLW, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_SL, ALTIVEC_BUILTIN_VSLW, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_SL, P8V_BUILTIN_VSLD, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_SL, P8V_BUILTIN_VSLD, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_SL, P10V_BUILTIN_VSLQ, - RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_unsigned_V1TI, 0 }, - { ALTIVEC_BUILTIN_VEC_SL, P10V_BUILTIN_VSLQ, - RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, - RS6000_BTI_unsigned_V1TI, 0 }, - { ALTIVEC_BUILTIN_VEC_SQRT, VSX_BUILTIN_XVSQRTDP, - RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_SQRT, VSX_BUILTIN_XVSQRTSP, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_VSLW, ALTIVEC_BUILTIN_VSLW, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSLW, ALTIVEC_BUILTIN_VSLW, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSLH, ALTIVEC_BUILTIN_VSLH, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSLH, ALTIVEC_BUILTIN_VSLH, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSLB, ALTIVEC_BUILTIN_VSLB, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSLB, ALTIVEC_BUILTIN_VSLB, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, - RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, - RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, - RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, - RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, - RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, - RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, - RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, - RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, - RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, - RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, - RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, - RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - - { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, - RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, - RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, - RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V8HI, 0 }, - - { ALTIVEC_BUILTIN_VEC_SLO, ALTIVEC_BUILTIN_VSLO, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SLO, ALTIVEC_BUILTIN_VSLO, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SLO, ALTIVEC_BUILTIN_VSLO, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SLO, ALTIVEC_BUILTIN_VSLO, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SLO, ALTIVEC_BUILTIN_VSLO, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SLO, ALTIVEC_BUILTIN_VSLO, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SLO, ALTIVEC_BUILTIN_VSLO, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SLO, ALTIVEC_BUILTIN_VSLO, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SLO, ALTIVEC_BUILTIN_VSLO, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SLO, ALTIVEC_BUILTIN_VSLO, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SLO, ALTIVEC_BUILTIN_VSLO, - RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SLO, ALTIVEC_BUILTIN_VSLO, - RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SLO, ALTIVEC_BUILTIN_VSLO, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SLO, ALTIVEC_BUILTIN_VSLO, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SLO, ALTIVEC_BUILTIN_VSLO, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SLO, ALTIVEC_BUILTIN_VSLO, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SLO, ALTIVEC_BUILTIN_VSLO, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SLO, ALTIVEC_BUILTIN_VSLO, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SLO, ALTIVEC_BUILTIN_VSLO, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SLO, ALTIVEC_BUILTIN_VSLO, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SPLAT, ALTIVEC_BUILTIN_VSPLTB, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_INTSI, 0 }, - { ALTIVEC_BUILTIN_VEC_SPLAT, ALTIVEC_BUILTIN_VSPLTB, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, 0 }, - { ALTIVEC_BUILTIN_VEC_SPLAT, ALTIVEC_BUILTIN_VSPLTB, - RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, 0 }, - { ALTIVEC_BUILTIN_VEC_SPLAT, ALTIVEC_BUILTIN_VSPLTH, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_INTSI, 0 }, - { ALTIVEC_BUILTIN_VEC_SPLAT, ALTIVEC_BUILTIN_VSPLTH, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, 0 }, - { ALTIVEC_BUILTIN_VEC_SPLAT, ALTIVEC_BUILTIN_VSPLTH, - RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, 0 }, - { ALTIVEC_BUILTIN_VEC_SPLAT, ALTIVEC_BUILTIN_VSPLTH, - RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, 0 }, - { ALTIVEC_BUILTIN_VEC_SPLAT, ALTIVEC_BUILTIN_VSPLTW, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_INTSI, 0 }, - { ALTIVEC_BUILTIN_VEC_SPLAT, ALTIVEC_BUILTIN_VSPLTW, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_INTSI, 0 }, - { ALTIVEC_BUILTIN_VEC_SPLAT, ALTIVEC_BUILTIN_VSPLTW, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, 0 }, - { ALTIVEC_BUILTIN_VEC_SPLAT, ALTIVEC_BUILTIN_VSPLTW, - RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, 0 }, - { ALTIVEC_BUILTIN_VEC_SPLAT, VSX_BUILTIN_XXSPLTD_V2DF, - RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_INTSI, 0 }, - { ALTIVEC_BUILTIN_VEC_SPLAT, VSX_BUILTIN_XXSPLTD_V2DI, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_INTSI, 0 }, - { ALTIVEC_BUILTIN_VEC_SPLAT, VSX_BUILTIN_XXSPLTD_V2DI, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_INTSI, 0 }, - { ALTIVEC_BUILTIN_VEC_SPLAT, VSX_BUILTIN_XXSPLTD_V2DI, - RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_INTSI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSPLTW, ALTIVEC_BUILTIN_VSPLTW, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_INTSI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSPLTW, ALTIVEC_BUILTIN_VSPLTW, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_INTSI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSPLTW, ALTIVEC_BUILTIN_VSPLTW, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSPLTW, ALTIVEC_BUILTIN_VSPLTW, - RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSPLTH, ALTIVEC_BUILTIN_VSPLTH, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_INTSI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSPLTH, ALTIVEC_BUILTIN_VSPLTH, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSPLTH, ALTIVEC_BUILTIN_VSPLTH, - RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSPLTH, ALTIVEC_BUILTIN_VSPLTH, - RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSPLTB, ALTIVEC_BUILTIN_VSPLTB, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_INTSI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSPLTB, ALTIVEC_BUILTIN_VSPLTB, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSPLTB, ALTIVEC_BUILTIN_VSPLTB, - RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, 0 }, - { ALTIVEC_BUILTIN_VEC_SR, ALTIVEC_BUILTIN_VSRB, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SR, ALTIVEC_BUILTIN_VSRB, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SR, ALTIVEC_BUILTIN_VSRH, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_SR, ALTIVEC_BUILTIN_VSRH, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_SR, ALTIVEC_BUILTIN_VSRW, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_SR, ALTIVEC_BUILTIN_VSRW, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_SR, P8V_BUILTIN_VSRD, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_SR, P8V_BUILTIN_VSRD, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_SR, P10V_BUILTIN_VSRQ, - RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_unsigned_V1TI, 0 }, - { ALTIVEC_BUILTIN_VEC_SR, P10V_BUILTIN_VSRQ, - RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, - RS6000_BTI_unsigned_V1TI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSRW, ALTIVEC_BUILTIN_VSRW, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSRW, ALTIVEC_BUILTIN_VSRW, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSRH, ALTIVEC_BUILTIN_VSRH, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSRH, ALTIVEC_BUILTIN_VSRH, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSRB, ALTIVEC_BUILTIN_VSRB, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSRB, ALTIVEC_BUILTIN_VSRB, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SRA, ALTIVEC_BUILTIN_VSRAB, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SRA, ALTIVEC_BUILTIN_VSRAB, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SRA, ALTIVEC_BUILTIN_VSRAH, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_SRA, ALTIVEC_BUILTIN_VSRAH, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_SRA, ALTIVEC_BUILTIN_VSRAW, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_SRA, ALTIVEC_BUILTIN_VSRAW, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_SRA, P8V_BUILTIN_VSRAD, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_SRA, P8V_BUILTIN_VSRAD, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_SRA, P10V_BUILTIN_VSRAQ, - RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_unsigned_V1TI, 0 }, - { ALTIVEC_BUILTIN_VEC_SRA, P10V_BUILTIN_VSRAQ, - RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, - RS6000_BTI_unsigned_V1TI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSRAW, ALTIVEC_BUILTIN_VSRAW, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSRAW, ALTIVEC_BUILTIN_VSRAW, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSRAH, ALTIVEC_BUILTIN_VSRAH, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSRAH, ALTIVEC_BUILTIN_VSRAH, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSRAB, ALTIVEC_BUILTIN_VSRAB, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSRAB, ALTIVEC_BUILTIN_VSRAB, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR, - RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR, - RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR, - RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR, - RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR, - RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR, - RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR, - RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR, - RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR, - RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR, - RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR, - RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR, - RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SRO, ALTIVEC_BUILTIN_VSRO, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SRO, ALTIVEC_BUILTIN_VSRO, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SRO, ALTIVEC_BUILTIN_VSRO, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SRO, ALTIVEC_BUILTIN_VSRO, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SRO, ALTIVEC_BUILTIN_VSRO, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SRO, ALTIVEC_BUILTIN_VSRO, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SRO, ALTIVEC_BUILTIN_VSRO, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SRO, ALTIVEC_BUILTIN_VSRO, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SRO, ALTIVEC_BUILTIN_VSRO, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SRO, ALTIVEC_BUILTIN_VSRO, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SRO, ALTIVEC_BUILTIN_VSRO, - RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SRO, ALTIVEC_BUILTIN_VSRO, - RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SRO, ALTIVEC_BUILTIN_VSRO, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SRO, ALTIVEC_BUILTIN_VSRO, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SRO, ALTIVEC_BUILTIN_VSRO, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SRO, ALTIVEC_BUILTIN_VSRO, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SRO, ALTIVEC_BUILTIN_VSRO, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SRO, ALTIVEC_BUILTIN_VSRO, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SRO, ALTIVEC_BUILTIN_VSRO, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SRO, ALTIVEC_BUILTIN_VSRO, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V16QI, 0 }, - - { ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBUBM, - RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBUBM, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBUBM, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBUBM, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBUBM, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBUBM, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBUHM, - RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBUHM, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBUHM, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBUHM, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBUHM, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBUHM, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBUWM, - RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBUWM, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBUWM, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBUWM, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBUWM, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBUWM, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_SUB, P8V_BUILTIN_VSUBUDM, - RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_SUB, P8V_BUILTIN_VSUBUDM, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_SUB, P8V_BUILTIN_VSUBUDM, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_SUB, P8V_BUILTIN_VSUBUDM, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_SUB, P8V_BUILTIN_VSUBUDM, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_SUB, P8V_BUILTIN_VSUBUDM, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBFP, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, - { ALTIVEC_BUILTIN_VEC_SUB, VSX_BUILTIN_XVSUBDP, - RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 }, - { ALTIVEC_BUILTIN_VEC_SUB, P8V_BUILTIN_VSUBUQM, - RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, 0 }, - { ALTIVEC_BUILTIN_VEC_SUB, P8V_BUILTIN_VSUBUQM, - RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, - RS6000_BTI_unsigned_V1TI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSUBFP, ALTIVEC_BUILTIN_VSUBFP, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, - { ALTIVEC_BUILTIN_VEC_VSUBUWM, ALTIVEC_BUILTIN_VSUBUWM, - RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSUBUWM, ALTIVEC_BUILTIN_VSUBUWM, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSUBUWM, ALTIVEC_BUILTIN_VSUBUWM, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSUBUWM, ALTIVEC_BUILTIN_VSUBUWM, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSUBUWM, ALTIVEC_BUILTIN_VSUBUWM, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSUBUWM, ALTIVEC_BUILTIN_VSUBUWM, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSUBUWM, ALTIVEC_BUILTIN_VSUBUWM, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSUBUWM, ALTIVEC_BUILTIN_VSUBUWM, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSUBUHM, ALTIVEC_BUILTIN_VSUBUHM, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSUBUHM, ALTIVEC_BUILTIN_VSUBUHM, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSUBUHM, ALTIVEC_BUILTIN_VSUBUHM, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSUBUHM, ALTIVEC_BUILTIN_VSUBUHM, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSUBUHM, ALTIVEC_BUILTIN_VSUBUHM, - RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSUBUHM, ALTIVEC_BUILTIN_VSUBUHM, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSUBUHM, ALTIVEC_BUILTIN_VSUBUHM, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSUBUHM, ALTIVEC_BUILTIN_VSUBUHM, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSUBUBM, ALTIVEC_BUILTIN_VSUBUBM, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSUBUBM, ALTIVEC_BUILTIN_VSUBUBM, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSUBUBM, ALTIVEC_BUILTIN_VSUBUBM, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSUBUBM, ALTIVEC_BUILTIN_VSUBUBM, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSUBUBM, ALTIVEC_BUILTIN_VSUBUBM, - RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSUBUBM, ALTIVEC_BUILTIN_VSUBUBM, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSUBUBM, ALTIVEC_BUILTIN_VSUBUBM, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSUBUBM, ALTIVEC_BUILTIN_VSUBUBM, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, 0 }, - - { ALTIVEC_BUILTIN_VEC_SUBC, ALTIVEC_BUILTIN_VSUBCUW, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_SUBC, ALTIVEC_BUILTIN_VSUBCUW, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_SUBC, P8V_BUILTIN_VSUBCUQ, - RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, - RS6000_BTI_unsigned_V1TI, 0 }, - { ALTIVEC_BUILTIN_VEC_SUBC, P8V_BUILTIN_VSUBCUQ, - RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, 0 }, - - { ALTIVEC_BUILTIN_VEC_SUBS, ALTIVEC_BUILTIN_VSUBUBS, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SUBS, ALTIVEC_BUILTIN_VSUBUBS, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SUBS, ALTIVEC_BUILTIN_VSUBUBS, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SUBS, ALTIVEC_BUILTIN_VSUBSBS, - RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SUBS, ALTIVEC_BUILTIN_VSUBSBS, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SUBS, ALTIVEC_BUILTIN_VSUBSBS, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SUBS, ALTIVEC_BUILTIN_VSUBUHS, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_SUBS, ALTIVEC_BUILTIN_VSUBUHS, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_SUBS, ALTIVEC_BUILTIN_VSUBUHS, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_SUBS, ALTIVEC_BUILTIN_VSUBSHS, - RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_SUBS, ALTIVEC_BUILTIN_VSUBSHS, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_SUBS, ALTIVEC_BUILTIN_VSUBSHS, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_SUBS, ALTIVEC_BUILTIN_VSUBUWS, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_SUBS, ALTIVEC_BUILTIN_VSUBUWS, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_SUBS, ALTIVEC_BUILTIN_VSUBUWS, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_SUBS, ALTIVEC_BUILTIN_VSUBSWS, - RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_SUBS, ALTIVEC_BUILTIN_VSUBSWS, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_SUBS, ALTIVEC_BUILTIN_VSUBSWS, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSUBSWS, ALTIVEC_BUILTIN_VSUBSWS, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSUBSWS, ALTIVEC_BUILTIN_VSUBSWS, - RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSUBSWS, ALTIVEC_BUILTIN_VSUBSWS, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSUBUWS, ALTIVEC_BUILTIN_VSUBUWS, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSUBUWS, ALTIVEC_BUILTIN_VSUBUWS, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSUBUWS, ALTIVEC_BUILTIN_VSUBUWS, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSUBUWS, ALTIVEC_BUILTIN_VSUBUWS, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSUBUWS, ALTIVEC_BUILTIN_VSUBUWS, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSUBSHS, ALTIVEC_BUILTIN_VSUBSHS, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSUBSHS, ALTIVEC_BUILTIN_VSUBSHS, - RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSUBSHS, ALTIVEC_BUILTIN_VSUBSHS, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSUBUHS, ALTIVEC_BUILTIN_VSUBUHS, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSUBUHS, ALTIVEC_BUILTIN_VSUBUHS, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSUBUHS, ALTIVEC_BUILTIN_VSUBUHS, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSUBUHS, ALTIVEC_BUILTIN_VSUBUHS, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSUBUHS, ALTIVEC_BUILTIN_VSUBUHS, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSUBSBS, ALTIVEC_BUILTIN_VSUBSBS, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSUBSBS, ALTIVEC_BUILTIN_VSUBSBS, - RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSUBSBS, ALTIVEC_BUILTIN_VSUBSBS, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSUBUBS, ALTIVEC_BUILTIN_VSUBUBS, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSUBUBS, ALTIVEC_BUILTIN_VSUBUBS, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSUBUBS, ALTIVEC_BUILTIN_VSUBUBS, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSUBUBS, ALTIVEC_BUILTIN_VSUBUBS, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSUBUBS, ALTIVEC_BUILTIN_VSUBUBS, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SUM4S, ALTIVEC_BUILTIN_VSUM4UBS, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_SUM4S, ALTIVEC_BUILTIN_VSUM4SBS, - RS6000_BTI_V4SI, RS6000_BTI_V16QI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_SUM4S, ALTIVEC_BUILTIN_VSUM4SHS, - RS6000_BTI_V4SI, RS6000_BTI_V8HI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSUM4SHS, ALTIVEC_BUILTIN_VSUM4SHS, - RS6000_BTI_V4SI, RS6000_BTI_V8HI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSUM4SBS, ALTIVEC_BUILTIN_VSUM4SBS, - RS6000_BTI_V4SI, RS6000_BTI_V16QI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSUM4UBS, ALTIVEC_BUILTIN_VSUM4UBS, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_SUM2S, ALTIVEC_BUILTIN_VSUM2SWS, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_SUMS, ALTIVEC_BUILTIN_VSUMSWS, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, - - { VSX_BUILTIN_VEC_XL, VSX_BUILTIN_LXVD2X_V2DF, - RS6000_BTI_V2DF, RS6000_BTI_INTSI, ~RS6000_BTI_V2DF, 0 }, - { VSX_BUILTIN_VEC_XL, VSX_BUILTIN_LXVD2X_V2DF, - RS6000_BTI_V2DF, RS6000_BTI_INTSI, ~RS6000_BTI_double, 0 }, - { VSX_BUILTIN_VEC_XL, VSX_BUILTIN_LXVD2X_V1TI, - RS6000_BTI_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_INTTI, 0 }, - { VSX_BUILTIN_VEC_XL, VSX_BUILTIN_LXVD2X_V1TI, - RS6000_BTI_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_V1TI, 0 }, - { VSX_BUILTIN_VEC_XL, VSX_BUILTIN_LXVD2X_V1TI, - RS6000_BTI_unsigned_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTTI, 0 }, - { VSX_BUILTIN_VEC_XL, VSX_BUILTIN_LXVD2X_V2DI, - RS6000_BTI_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_V2DI, 0 }, - { VSX_BUILTIN_VEC_XL, VSX_BUILTIN_LXVD2X_V2DI, - RS6000_BTI_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_long_long, 0 }, - { VSX_BUILTIN_VEC_XL, VSX_BUILTIN_LXVD2X_V2DI, - RS6000_BTI_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_INTDI, 0 }, - { VSX_BUILTIN_VEC_XL, VSX_BUILTIN_LXVD2X_V2DI, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_INTSI, - ~RS6000_BTI_unsigned_V2DI, 0 }, - { VSX_BUILTIN_VEC_XL, VSX_BUILTIN_LXVD2X_V2DI, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_INTSI, - ~RS6000_BTI_unsigned_long_long, 0 }, - { VSX_BUILTIN_VEC_XL, VSX_BUILTIN_LXVD2X_V2DI, - RS6000_BTI_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTDI, 0 }, - - { VSX_BUILTIN_VEC_XL, VSX_BUILTIN_LXVW4X_V4SF, - RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_V4SF, 0 }, - { VSX_BUILTIN_VEC_XL, VSX_BUILTIN_LXVW4X_V4SF, - RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float, 0 }, - { VSX_BUILTIN_VEC_XL, VSX_BUILTIN_LXVW4X_V4SI, - RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_V4SI, 0 }, - { VSX_BUILTIN_VEC_XL, VSX_BUILTIN_LXVW4X_V4SI, - RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI, 0 }, - { VSX_BUILTIN_VEC_XL, VSX_BUILTIN_LXVW4X_V4SI, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V4SI, 0 }, - { VSX_BUILTIN_VEC_XL, VSX_BUILTIN_LXVW4X_V4SI, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI, 0 }, - { VSX_BUILTIN_VEC_XL, VSX_BUILTIN_LXVW4X_V8HI, - RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_V8HI, 0 }, - { VSX_BUILTIN_VEC_XL, VSX_BUILTIN_LXVW4X_V8HI, - RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI, 0 }, - { VSX_BUILTIN_VEC_XL, VSX_BUILTIN_LXVW4X_V8HI, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V8HI, 0 }, - { VSX_BUILTIN_VEC_XL, VSX_BUILTIN_LXVW4X_V8HI, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI, 0 }, - { VSX_BUILTIN_VEC_XL, VSX_BUILTIN_LXVW4X_V16QI, - RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_V16QI, 0 }, - { VSX_BUILTIN_VEC_XL, VSX_BUILTIN_LXVW4X_V16QI, - RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI, 0 }, - { VSX_BUILTIN_VEC_XL, VSX_BUILTIN_LXVW4X_V16QI, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, - ~RS6000_BTI_unsigned_V16QI, 0 }, - { VSX_BUILTIN_VEC_XL, VSX_BUILTIN_LXVW4X_V16QI, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI, 0 }, - - { VSX_BUILTIN_VEC_XL_BE, VSX_BUILTIN_LD_ELEMREV_V2DF, - RS6000_BTI_V2DF, RS6000_BTI_INTSI, ~RS6000_BTI_V2DF, 0 }, - { VSX_BUILTIN_VEC_XL_BE, VSX_BUILTIN_LD_ELEMREV_V2DF, - RS6000_BTI_V2DF, RS6000_BTI_INTSI, ~RS6000_BTI_double, 0 }, - { VSX_BUILTIN_VEC_XL_BE, VSX_BUILTIN_LD_ELEMREV_V1TI, - RS6000_BTI_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_INTTI, 0 }, - { VSX_BUILTIN_VEC_XL_BE, VSX_BUILTIN_LD_ELEMREV_V1TI, - RS6000_BTI_unsigned_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTTI, 0 }, - { VSX_BUILTIN_VEC_XL_BE, VSX_BUILTIN_LD_ELEMREV_V2DI, - RS6000_BTI_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_V2DI, 0 }, - { VSX_BUILTIN_VEC_XL_BE, VSX_BUILTIN_LD_ELEMREV_V2DI, - RS6000_BTI_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_long_long, 0 }, - { VSX_BUILTIN_VEC_XL_BE, VSX_BUILTIN_LD_ELEMREV_V2DI, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_INTSI, - ~RS6000_BTI_unsigned_V2DI, 0 }, - { VSX_BUILTIN_VEC_XL_BE, VSX_BUILTIN_LD_ELEMREV_V2DI, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_INTSI, - ~RS6000_BTI_unsigned_long_long, 0 }, - { VSX_BUILTIN_VEC_XL_BE, VSX_BUILTIN_LD_ELEMREV_V4SF, - RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_V4SF, 0 }, - { VSX_BUILTIN_VEC_XL_BE, VSX_BUILTIN_LD_ELEMREV_V4SF, - RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float, 0 }, - { VSX_BUILTIN_VEC_XL_BE, VSX_BUILTIN_LD_ELEMREV_V4SI, - RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_V4SI, 0 }, - { VSX_BUILTIN_VEC_XL_BE, VSX_BUILTIN_LD_ELEMREV_V4SI, - RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI, 0 }, - { VSX_BUILTIN_VEC_XL_BE, VSX_BUILTIN_LD_ELEMREV_V4SI, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V4SI, 0 }, - { VSX_BUILTIN_VEC_XL_BE, VSX_BUILTIN_LD_ELEMREV_V4SI, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI, 0 }, - { VSX_BUILTIN_VEC_XL_BE, VSX_BUILTIN_LD_ELEMREV_V8HI, - RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_V8HI, 0 }, - { VSX_BUILTIN_VEC_XL_BE, VSX_BUILTIN_LD_ELEMREV_V8HI, - RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI, 0 }, - { VSX_BUILTIN_VEC_XL_BE, VSX_BUILTIN_LD_ELEMREV_V8HI, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V8HI, 0 }, - { VSX_BUILTIN_VEC_XL_BE, VSX_BUILTIN_LD_ELEMREV_V8HI, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI, 0 }, - { VSX_BUILTIN_VEC_XL_BE, VSX_BUILTIN_LD_ELEMREV_V16QI, - RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_V16QI, 0 }, - { VSX_BUILTIN_VEC_XL_BE, VSX_BUILTIN_LD_ELEMREV_V16QI, - RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI, 0 }, - { VSX_BUILTIN_VEC_XL_BE, VSX_BUILTIN_LD_ELEMREV_V16QI, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, - ~RS6000_BTI_unsigned_V16QI, 0 }, - { VSX_BUILTIN_VEC_XL_BE, VSX_BUILTIN_LD_ELEMREV_V16QI, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI, 0 }, - - { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V4SF, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, - { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V4SI, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_bool_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V4SF, - RS6000_BTI_V4SF, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SF, 0 }, - { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V2DF, - RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 }, - { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V2DI, - RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_bool_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V2DF, - RS6000_BTI_V2DF, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DF, 0 }, - { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V2DI, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V2DI, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V2DI, - RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V2DI_UNS, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V2DI_UNS, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V2DI_UNS, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V2DI_UNS, - RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V4SI_UNS, - RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V4SI, - RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V4SI, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V4SI, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V4SI_UNS, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V4SI_UNS, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V4SI_UNS, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V8HI_UNS, - RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V8HI, - RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V8HI, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V8HI, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V8HI_UNS, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V8HI_UNS, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V8HI_UNS, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - - { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V16QI, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V16QI, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V16QI, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V16QI_UNS, - RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V16QI_UNS, - RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V16QI_UNS, - RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V16QI_UNS, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V16QI_UNS, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V16QI_UNS, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - - /* Ternary AltiVec/VSX builtins. */ - { ALTIVEC_BUILTIN_VEC_DST, ALTIVEC_BUILTIN_DST, - RS6000_BTI_void, ~RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DST, ALTIVEC_BUILTIN_DST, - RS6000_BTI_void, ~RS6000_BTI_V16QI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DST, ALTIVEC_BUILTIN_DST, - RS6000_BTI_void, ~RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DST, ALTIVEC_BUILTIN_DST, - RS6000_BTI_void, ~RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DST, ALTIVEC_BUILTIN_DST, - RS6000_BTI_void, ~RS6000_BTI_V8HI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DST, ALTIVEC_BUILTIN_DST, - RS6000_BTI_void, ~RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DST, ALTIVEC_BUILTIN_DST, - RS6000_BTI_void, ~RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DST, ALTIVEC_BUILTIN_DST, - RS6000_BTI_void, ~RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DST, ALTIVEC_BUILTIN_DST, - RS6000_BTI_void, ~RS6000_BTI_V4SI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DST, ALTIVEC_BUILTIN_DST, - RS6000_BTI_void, ~RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DST, ALTIVEC_BUILTIN_DST, - RS6000_BTI_void, ~RS6000_BTI_V4SF, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DST, ALTIVEC_BUILTIN_DST, - RS6000_BTI_void, ~RS6000_BTI_UINTQI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DST, ALTIVEC_BUILTIN_DST, - RS6000_BTI_void, ~RS6000_BTI_INTQI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DST, ALTIVEC_BUILTIN_DST, - RS6000_BTI_void, ~RS6000_BTI_UINTHI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DST, ALTIVEC_BUILTIN_DST, - RS6000_BTI_void, ~RS6000_BTI_INTHI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DST, ALTIVEC_BUILTIN_DST, - RS6000_BTI_void, ~RS6000_BTI_UINTSI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DST, ALTIVEC_BUILTIN_DST, - RS6000_BTI_void, ~RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DST, ALTIVEC_BUILTIN_DST, - RS6000_BTI_void, ~RS6000_BTI_unsigned_long, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DST, ALTIVEC_BUILTIN_DST, - RS6000_BTI_void, ~RS6000_BTI_long, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DST, ALTIVEC_BUILTIN_DST, - RS6000_BTI_void, ~RS6000_BTI_float, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DSTST, ALTIVEC_BUILTIN_DSTST, - RS6000_BTI_void, ~RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DSTST, ALTIVEC_BUILTIN_DSTST, - RS6000_BTI_void, ~RS6000_BTI_V16QI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DSTST, ALTIVEC_BUILTIN_DSTST, - RS6000_BTI_void, ~RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DSTST, ALTIVEC_BUILTIN_DSTST, - RS6000_BTI_void, ~RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DSTST, ALTIVEC_BUILTIN_DSTST, - RS6000_BTI_void, ~RS6000_BTI_V8HI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DSTST, ALTIVEC_BUILTIN_DSTST, - RS6000_BTI_void, ~RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DSTST, ALTIVEC_BUILTIN_DSTST, - RS6000_BTI_void, ~RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DSTST, ALTIVEC_BUILTIN_DSTST, - RS6000_BTI_void, ~RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DSTST, ALTIVEC_BUILTIN_DSTST, - RS6000_BTI_void, ~RS6000_BTI_V4SI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DSTST, ALTIVEC_BUILTIN_DSTST, - RS6000_BTI_void, ~RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DSTST, ALTIVEC_BUILTIN_DSTST, - RS6000_BTI_void, ~RS6000_BTI_V4SF, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DSTST, ALTIVEC_BUILTIN_DSTST, - RS6000_BTI_void, ~RS6000_BTI_UINTQI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DSTST, ALTIVEC_BUILTIN_DSTST, - RS6000_BTI_void, ~RS6000_BTI_INTQI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DSTST, ALTIVEC_BUILTIN_DSTST, - RS6000_BTI_void, ~RS6000_BTI_UINTHI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DSTST, ALTIVEC_BUILTIN_DSTST, - RS6000_BTI_void, ~RS6000_BTI_INTHI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DSTST, ALTIVEC_BUILTIN_DSTST, - RS6000_BTI_void, ~RS6000_BTI_UINTSI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DSTST, ALTIVEC_BUILTIN_DSTST, - RS6000_BTI_void, ~RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DSTST, ALTIVEC_BUILTIN_DSTST, - RS6000_BTI_void, ~RS6000_BTI_unsigned_long, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DSTST, ALTIVEC_BUILTIN_DSTST, - RS6000_BTI_void, ~RS6000_BTI_long, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DSTST, ALTIVEC_BUILTIN_DSTST, - RS6000_BTI_void, ~RS6000_BTI_float, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DSTSTT, ALTIVEC_BUILTIN_DSTSTT, - RS6000_BTI_void, ~RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DSTSTT, ALTIVEC_BUILTIN_DSTSTT, - RS6000_BTI_void, ~RS6000_BTI_V16QI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DSTSTT, ALTIVEC_BUILTIN_DSTSTT, - RS6000_BTI_void, ~RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DSTSTT, ALTIVEC_BUILTIN_DSTSTT, - RS6000_BTI_void, ~RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DSTSTT, ALTIVEC_BUILTIN_DSTSTT, - RS6000_BTI_void, ~RS6000_BTI_V8HI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DSTSTT, ALTIVEC_BUILTIN_DSTSTT, - RS6000_BTI_void, ~RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DSTSTT, ALTIVEC_BUILTIN_DSTSTT, - RS6000_BTI_void, ~RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DSTSTT, ALTIVEC_BUILTIN_DSTSTT, - RS6000_BTI_void, ~RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DSTSTT, ALTIVEC_BUILTIN_DSTSTT, - RS6000_BTI_void, ~RS6000_BTI_V4SI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DSTSTT, ALTIVEC_BUILTIN_DSTSTT, - RS6000_BTI_void, ~RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DSTSTT, ALTIVEC_BUILTIN_DSTSTT, - RS6000_BTI_void, ~RS6000_BTI_V4SF, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DSTSTT, ALTIVEC_BUILTIN_DSTSTT, - RS6000_BTI_void, ~RS6000_BTI_UINTQI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DSTSTT, ALTIVEC_BUILTIN_DSTSTT, - RS6000_BTI_void, ~RS6000_BTI_INTQI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DSTSTT, ALTIVEC_BUILTIN_DSTSTT, - RS6000_BTI_void, ~RS6000_BTI_UINTHI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DSTSTT, ALTIVEC_BUILTIN_DSTSTT, - RS6000_BTI_void, ~RS6000_BTI_INTHI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DSTSTT, ALTIVEC_BUILTIN_DSTSTT, - RS6000_BTI_void, ~RS6000_BTI_UINTSI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DSTSTT, ALTIVEC_BUILTIN_DSTSTT, - RS6000_BTI_void, ~RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DSTSTT, ALTIVEC_BUILTIN_DSTSTT, - RS6000_BTI_void, ~RS6000_BTI_unsigned_long, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DSTSTT, ALTIVEC_BUILTIN_DSTSTT, - RS6000_BTI_void, ~RS6000_BTI_long, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DSTSTT, ALTIVEC_BUILTIN_DSTSTT, - RS6000_BTI_void, ~RS6000_BTI_float, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DSTT, ALTIVEC_BUILTIN_DSTT, - RS6000_BTI_void, ~RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DSTT, ALTIVEC_BUILTIN_DSTT, - RS6000_BTI_void, ~RS6000_BTI_V16QI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DSTT, ALTIVEC_BUILTIN_DSTT, - RS6000_BTI_void, ~RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DSTT, ALTIVEC_BUILTIN_DSTT, - RS6000_BTI_void, ~RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DSTT, ALTIVEC_BUILTIN_DSTT, - RS6000_BTI_void, ~RS6000_BTI_V8HI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DSTT, ALTIVEC_BUILTIN_DSTT, - RS6000_BTI_void, ~RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DSTT, ALTIVEC_BUILTIN_DSTT, - RS6000_BTI_void, ~RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DSTT, ALTIVEC_BUILTIN_DSTT, - RS6000_BTI_void, ~RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DSTT, ALTIVEC_BUILTIN_DSTT, - RS6000_BTI_void, ~RS6000_BTI_V4SI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DSTT, ALTIVEC_BUILTIN_DSTT, - RS6000_BTI_void, ~RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DSTT, ALTIVEC_BUILTIN_DSTT, - RS6000_BTI_void, ~RS6000_BTI_V4SF, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DSTT, ALTIVEC_BUILTIN_DSTT, - RS6000_BTI_void, ~RS6000_BTI_UINTQI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DSTT, ALTIVEC_BUILTIN_DSTT, - RS6000_BTI_void, ~RS6000_BTI_INTQI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DSTT, ALTIVEC_BUILTIN_DSTT, - RS6000_BTI_void, ~RS6000_BTI_UINTHI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DSTT, ALTIVEC_BUILTIN_DSTT, - RS6000_BTI_void, ~RS6000_BTI_INTHI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DSTT, ALTIVEC_BUILTIN_DSTT, - RS6000_BTI_void, ~RS6000_BTI_UINTSI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DSTT, ALTIVEC_BUILTIN_DSTT, - RS6000_BTI_void, ~RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DSTT, ALTIVEC_BUILTIN_DSTT, - RS6000_BTI_void, ~RS6000_BTI_unsigned_long, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DSTT, ALTIVEC_BUILTIN_DSTT, - RS6000_BTI_void, ~RS6000_BTI_long, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DSTT, ALTIVEC_BUILTIN_DSTT, - RS6000_BTI_void, ~RS6000_BTI_float, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_MADD, ALTIVEC_BUILTIN_VMADDFP, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF }, - { ALTIVEC_BUILTIN_VEC_MADD, VSX_BUILTIN_XVMADDDP, - RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF }, - { ALTIVEC_BUILTIN_VEC_MADD, ALTIVEC_BUILTIN_VMLADDUHM, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI }, - { ALTIVEC_BUILTIN_VEC_MADD, ALTIVEC_BUILTIN_VMLADDUHM, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI }, - { ALTIVEC_BUILTIN_VEC_MADD, ALTIVEC_BUILTIN_VMLADDUHM, - RS6000_BTI_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI }, - { ALTIVEC_BUILTIN_VEC_MADD, ALTIVEC_BUILTIN_VMLADDUHM, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI }, - { ALTIVEC_BUILTIN_VEC_MADDS, ALTIVEC_BUILTIN_VMHADDSHS, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI }, - { ALTIVEC_BUILTIN_VEC_MLADD, ALTIVEC_BUILTIN_VMLADDUHM, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI }, - { ALTIVEC_BUILTIN_VEC_MLADD, ALTIVEC_BUILTIN_VMLADDUHM, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI }, - { ALTIVEC_BUILTIN_VEC_MLADD, ALTIVEC_BUILTIN_VMLADDUHM, - RS6000_BTI_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI }, - { ALTIVEC_BUILTIN_VEC_MLADD, ALTIVEC_BUILTIN_VMLADDUHM, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI }, - { ALTIVEC_BUILTIN_VEC_MRADDS, ALTIVEC_BUILTIN_VMHRADDSHS, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI }, - { VSX_BUILTIN_VEC_MSUB, VSX_BUILTIN_XVMSUBSP, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF }, - { VSX_BUILTIN_VEC_MSUB, VSX_BUILTIN_XVMSUBDP, - RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF }, - { ALTIVEC_BUILTIN_VEC_MSUM, ALTIVEC_BUILTIN_VMSUMUBM, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V4SI }, - { ALTIVEC_BUILTIN_VEC_MSUM, ALTIVEC_BUILTIN_VMSUMMBM, - RS6000_BTI_V4SI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_V4SI }, - { ALTIVEC_BUILTIN_VEC_MSUM, ALTIVEC_BUILTIN_VMSUMUHM, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V4SI }, - { ALTIVEC_BUILTIN_VEC_MSUM, ALTIVEC_BUILTIN_VMSUMSHM, - RS6000_BTI_V4SI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V4SI }, - - { ALTIVEC_BUILTIN_VEC_MSUM, ALTIVEC_BUILTIN_VMSUMUDM, - RS6000_BTI_V1TI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V1TI }, - { ALTIVEC_BUILTIN_VEC_MSUM, ALTIVEC_BUILTIN_VMSUMUDM, - RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V1TI }, - - { ALTIVEC_BUILTIN_VEC_VMSUMSHM, ALTIVEC_BUILTIN_VMSUMSHM, - RS6000_BTI_V4SI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V4SI }, - { ALTIVEC_BUILTIN_VEC_VMSUMUHM, ALTIVEC_BUILTIN_VMSUMUHM, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V4SI }, - { ALTIVEC_BUILTIN_VEC_VMSUMMBM, ALTIVEC_BUILTIN_VMSUMMBM, - RS6000_BTI_V4SI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_V4SI }, - { ALTIVEC_BUILTIN_VEC_VMSUMUBM, ALTIVEC_BUILTIN_VMSUMUBM, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V4SI }, - { ALTIVEC_BUILTIN_VEC_MSUMS, ALTIVEC_BUILTIN_VMSUMUHS, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V4SI }, - { ALTIVEC_BUILTIN_VEC_MSUMS, ALTIVEC_BUILTIN_VMSUMSHS, - RS6000_BTI_V4SI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V4SI }, - { ALTIVEC_BUILTIN_VEC_VMSUMSHS, ALTIVEC_BUILTIN_VMSUMSHS, - RS6000_BTI_V4SI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V4SI }, - { ALTIVEC_BUILTIN_VEC_VMSUMUHS, ALTIVEC_BUILTIN_VMSUMUHS, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V4SI }, - { VSX_BUILTIN_VEC_NMADD, VSX_BUILTIN_XVNMADDSP, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF }, - { VSX_BUILTIN_VEC_NMADD, VSX_BUILTIN_XVNMADDDP, - RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF }, - { ALTIVEC_BUILTIN_VEC_NMSUB, ALTIVEC_BUILTIN_VNMSUBFP, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF }, - { ALTIVEC_BUILTIN_VEC_NMSUB, VSX_BUILTIN_XVNMSUBDP, - RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF }, - { ALTIVEC_BUILTIN_VEC_PERM, ALTIVEC_BUILTIN_VPERM_2DF, - RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_unsigned_V16QI }, - { ALTIVEC_BUILTIN_VEC_PERM, ALTIVEC_BUILTIN_VPERM_2DI, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_unsigned_V16QI }, - { ALTIVEC_BUILTIN_VEC_PERM, ALTIVEC_BUILTIN_VPERM_2DI, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V16QI }, - { ALTIVEC_BUILTIN_VEC_PERM, ALTIVEC_BUILTIN_VPERM_2DI, - RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, - RS6000_BTI_unsigned_V16QI }, - { ALTIVEC_BUILTIN_VEC_PERM, ALTIVEC_BUILTIN_VPERM_4SF, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_unsigned_V16QI }, - { ALTIVEC_BUILTIN_VEC_PERM, ALTIVEC_BUILTIN_VPERM_4SI, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V16QI }, - { ALTIVEC_BUILTIN_VEC_PERM, ALTIVEC_BUILTIN_VPERM_4SI, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V16QI }, - { ALTIVEC_BUILTIN_VEC_PERM, ALTIVEC_BUILTIN_VPERM_4SI, - RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V16QI }, - { ALTIVEC_BUILTIN_VEC_PERM, ALTIVEC_BUILTIN_VPERM_8HI, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V16QI }, - { ALTIVEC_BUILTIN_VEC_PERM, ALTIVEC_BUILTIN_VPERM_8HI, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V16QI }, - { ALTIVEC_BUILTIN_VEC_PERM, ALTIVEC_BUILTIN_VPERM_8HI, - RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V16QI }, - { ALTIVEC_BUILTIN_VEC_PERM, ALTIVEC_BUILTIN_VPERM_8HI, - RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, RS6000_BTI_unsigned_V16QI }, - { ALTIVEC_BUILTIN_VEC_PERM, ALTIVEC_BUILTIN_VPERM_16QI, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI }, - { ALTIVEC_BUILTIN_VEC_PERM, ALTIVEC_BUILTIN_VPERM_16QI, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI }, - { ALTIVEC_BUILTIN_VEC_PERM, ALTIVEC_BUILTIN_VPERM_16QI, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI }, - { ALTIVEC_BUILTIN_VEC_PERM, ALTIVEC_BUILTIN_VPERM_16QI, - RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI }, - { ALTIVEC_BUILTIN_VEC_PERM, ALTIVEC_BUILTIN_VPERM_16QI, - RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI }, - - { P8V_BUILTIN_VEC_VPERMXOR, P8V_BUILTIN_VPERMXOR, - RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, - RS6000_BTI_bool_V16QI }, - { P8V_BUILTIN_VEC_VPERMXOR, P8V_BUILTIN_VPERMXOR, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI }, - { P8V_BUILTIN_VEC_VPERMXOR, P8V_BUILTIN_VPERMXOR, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI }, - - { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_2DF, - RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_bool_V2DI }, - { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_2DF, - RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_unsigned_V2DI }, - { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_2DF, - RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DI }, - { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_2DF, - RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF }, - { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_2DI, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI }, - { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_2DI, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_unsigned_V2DI }, - { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_2DI, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI }, - { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_2DI, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI }, - { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_2DI, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI }, - { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_2DI, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_V2DI }, - { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_2DI, - RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, - RS6000_BTI_bool_V2DI }, - { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_2DI, - RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, - RS6000_BTI_unsigned_V2DI }, - { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_4SF, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_bool_V4SI }, - { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_4SF, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_unsigned_V4SI }, - { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_4SI, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF }, - { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_4SI, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SI }, - { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_4SI, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI }, - { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_4SI, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V4SI }, - { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_4SI, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI }, - { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_4SI, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI }, - { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_4SI, - RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI }, - { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_4SI, - RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI }, - { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_8HI, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI }, - { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_8HI, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V8HI }, - { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_8HI, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI }, - { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_8HI, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI }, - { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_8HI, - RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI }, - { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_8HI, - RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI }, - { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_16QI, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI }, - { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_16QI, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI }, - { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_16QI, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI }, - { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_16QI, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI }, - { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_16QI, - RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI }, - { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_16QI, - RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI }, - { ALTIVEC_BUILTIN_VEC_SLD, ALTIVEC_BUILTIN_VSLDOI_4SF, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_SLD, ALTIVEC_BUILTIN_VSLDOI_4SI, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_SLD, ALTIVEC_BUILTIN_VSLDOI_4SI, - RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_SLD, ALTIVEC_BUILTIN_VSLDOI_4SI, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_SLD, ALTIVEC_BUILTIN_VSLDOI_8HI, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_SLD, ALTIVEC_BUILTIN_VSLDOI_8HI, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_SLD, ALTIVEC_BUILTIN_VSLDOI_8HI, - RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_SLD, ALTIVEC_BUILTIN_VSLDOI_8HI, - RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_SLD, ALTIVEC_BUILTIN_VSLDOI_16QI, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_SLD, ALTIVEC_BUILTIN_VSLDOI_16QI, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_SLD, ALTIVEC_BUILTIN_VSLDOI_16QI, - RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_SLD, ALTIVEC_BUILTIN_VSLDOI_2DF, - RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_SLD, ALTIVEC_BUILTIN_VSLDOI_2DI, - RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_SLD, ALTIVEC_BUILTIN_VSLDOI_2DI, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_SLD, ALTIVEC_BUILTIN_VSLDOI_2DI, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_INTSI }, - - { ALTIVEC_BUILTIN_VEC_SLDW, VSX_BUILTIN_XXSLDWI_16QI, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, - RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_SLDW, VSX_BUILTIN_XXSLDWI_16QI, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_SLDW, VSX_BUILTIN_XXSLDWI_8HI, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, - RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_SLDW, VSX_BUILTIN_XXSLDWI_8HI, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_SLDW, VSX_BUILTIN_XXSLDWI_4SI, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, - RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_SLDW, VSX_BUILTIN_XXSLDWI_4SI, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_SLDW, VSX_BUILTIN_XXSLDWI_2DI, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, - RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_SLDW, VSX_BUILTIN_XXSLDWI_2DI, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_INTSI }, - - { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V2DF, - RS6000_BTI_void, RS6000_BTI_V2DF, RS6000_BTI_INTSI, ~RS6000_BTI_V2DF }, - { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V2DF, - RS6000_BTI_void, RS6000_BTI_V2DF, RS6000_BTI_INTSI, ~RS6000_BTI_double }, - { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V2DI, - RS6000_BTI_void, RS6000_BTI_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_V2DI }, - { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V2DI, - RS6000_BTI_void, RS6000_BTI_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_long_long }, - { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V2DI, - RS6000_BTI_void, RS6000_BTI_unsigned_V2DI, RS6000_BTI_INTSI, - ~RS6000_BTI_unsigned_V2DI }, - { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V2DI, - RS6000_BTI_void, RS6000_BTI_unsigned_V2DI, RS6000_BTI_INTSI, - ~RS6000_BTI_unsigned_long_long }, - { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V2DI, - RS6000_BTI_void, RS6000_BTI_bool_V2DI, RS6000_BTI_INTSI, - ~RS6000_BTI_bool_V2DI }, - { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V2DI, - RS6000_BTI_void, RS6000_BTI_bool_V2DI, RS6000_BTI_INTSI, - ~RS6000_BTI_long_long }, - { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V2DI, - RS6000_BTI_void, RS6000_BTI_bool_V2DI, RS6000_BTI_INTSI, - ~RS6000_BTI_unsigned_long_long }, - { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V4SF, - RS6000_BTI_void, RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_V4SF }, - { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V4SF, - RS6000_BTI_void, RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float }, - { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V4SI, - RS6000_BTI_void, RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_V4SI }, - { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V4SI, - RS6000_BTI_void, RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V4SI, - RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V4SI }, - { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V4SI, - RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI }, - { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V4SI, - RS6000_BTI_void, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V4SI }, - { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V4SI, - RS6000_BTI_void, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI }, - { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V4SI, - RS6000_BTI_void, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V8HI, - RS6000_BTI_void, RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_V8HI }, - { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V8HI, - RS6000_BTI_void, RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI }, - { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V8HI, - RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V8HI }, - { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V8HI, - RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI }, - { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V8HI, - RS6000_BTI_void, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V8HI }, - { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V8HI, - RS6000_BTI_void, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI }, - { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V8HI, - RS6000_BTI_void, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI }, - { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V16QI, - RS6000_BTI_void, RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_V16QI }, - { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V16QI, - RS6000_BTI_void, RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI }, - { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V16QI, - RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V16QI }, - { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V16QI, - RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI }, - { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V16QI, - RS6000_BTI_void, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V16QI }, - { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V16QI, - RS6000_BTI_void, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI }, - { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V16QI, - RS6000_BTI_void, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI }, - { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V8HI, - RS6000_BTI_void, RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_pixel_V8HI }, - { ALTIVEC_BUILTIN_VEC_STE, ALTIVEC_BUILTIN_STVEBX, - RS6000_BTI_void, RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI }, - { ALTIVEC_BUILTIN_VEC_STE, ALTIVEC_BUILTIN_STVEBX, - RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI }, - { ALTIVEC_BUILTIN_VEC_STE, ALTIVEC_BUILTIN_STVEBX, - RS6000_BTI_void, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI }, - { ALTIVEC_BUILTIN_VEC_STE, ALTIVEC_BUILTIN_STVEBX, - RS6000_BTI_void, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI }, - { ALTIVEC_BUILTIN_VEC_STE, ALTIVEC_BUILTIN_STVEHX, - RS6000_BTI_void, RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI }, - { ALTIVEC_BUILTIN_VEC_STE, ALTIVEC_BUILTIN_STVEHX, - RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI }, - { ALTIVEC_BUILTIN_VEC_STE, ALTIVEC_BUILTIN_STVEHX, - RS6000_BTI_void, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI }, - { ALTIVEC_BUILTIN_VEC_STE, ALTIVEC_BUILTIN_STVEHX, - RS6000_BTI_void, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI }, - { ALTIVEC_BUILTIN_VEC_STE, ALTIVEC_BUILTIN_STVEHX, - RS6000_BTI_void, RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI }, - { ALTIVEC_BUILTIN_VEC_STE, ALTIVEC_BUILTIN_STVEHX, - RS6000_BTI_void, RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI }, - { ALTIVEC_BUILTIN_VEC_STE, ALTIVEC_BUILTIN_STVEWX, - RS6000_BTI_void, RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float }, - { ALTIVEC_BUILTIN_VEC_STE, ALTIVEC_BUILTIN_STVEWX, - RS6000_BTI_void, RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_STE, ALTIVEC_BUILTIN_STVEWX, - RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI }, - { ALTIVEC_BUILTIN_VEC_STE, ALTIVEC_BUILTIN_STVEWX, - RS6000_BTI_void, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_STE, ALTIVEC_BUILTIN_STVEWX, - RS6000_BTI_void, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI }, - { ALTIVEC_BUILTIN_VEC_STVEWX, ALTIVEC_BUILTIN_STVEWX, - RS6000_BTI_void, RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float }, - { ALTIVEC_BUILTIN_VEC_STVEWX, ALTIVEC_BUILTIN_STVEWX, - RS6000_BTI_void, RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_STVEWX, ALTIVEC_BUILTIN_STVEWX, - RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI }, - { ALTIVEC_BUILTIN_VEC_STVEWX, ALTIVEC_BUILTIN_STVEWX, - RS6000_BTI_void, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_STVEWX, ALTIVEC_BUILTIN_STVEWX, - RS6000_BTI_void, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI }, - { ALTIVEC_BUILTIN_VEC_STVEWX, ALTIVEC_BUILTIN_STVEWX, - RS6000_BTI_void, RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_void }, - { ALTIVEC_BUILTIN_VEC_STVEWX, ALTIVEC_BUILTIN_STVEWX, - RS6000_BTI_void, RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_void }, - { ALTIVEC_BUILTIN_VEC_STVEWX, ALTIVEC_BUILTIN_STVEWX, - RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_void }, - { ALTIVEC_BUILTIN_VEC_STVEHX, ALTIVEC_BUILTIN_STVEHX, - RS6000_BTI_void, RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI }, - { ALTIVEC_BUILTIN_VEC_STVEHX, ALTIVEC_BUILTIN_STVEHX, - RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI }, - { ALTIVEC_BUILTIN_VEC_STVEHX, ALTIVEC_BUILTIN_STVEHX, - RS6000_BTI_void, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI }, - { ALTIVEC_BUILTIN_VEC_STVEHX, ALTIVEC_BUILTIN_STVEHX, - RS6000_BTI_void, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI }, - { ALTIVEC_BUILTIN_VEC_STVEHX, ALTIVEC_BUILTIN_STVEHX, - RS6000_BTI_void, RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_void }, - { ALTIVEC_BUILTIN_VEC_STVEHX, ALTIVEC_BUILTIN_STVEHX, - RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_void }, - { ALTIVEC_BUILTIN_VEC_STVEBX, ALTIVEC_BUILTIN_STVEBX, - RS6000_BTI_void, RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI }, - { ALTIVEC_BUILTIN_VEC_STVEBX, ALTIVEC_BUILTIN_STVEBX, - RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI }, - { ALTIVEC_BUILTIN_VEC_STVEBX, ALTIVEC_BUILTIN_STVEBX, - RS6000_BTI_void, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI }, - { ALTIVEC_BUILTIN_VEC_STVEBX, ALTIVEC_BUILTIN_STVEBX, - RS6000_BTI_void, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI }, - { ALTIVEC_BUILTIN_VEC_STVEBX, ALTIVEC_BUILTIN_STVEBX, - RS6000_BTI_void, RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_void }, - { ALTIVEC_BUILTIN_VEC_STVEBX, ALTIVEC_BUILTIN_STVEBX, - RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_void }, - { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V4SF, - RS6000_BTI_void, RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_V4SF }, - { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V4SF, - RS6000_BTI_void, RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float }, - { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V4SI, - RS6000_BTI_void, RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_V4SI }, - { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V4SI, - RS6000_BTI_void, RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V4SI, - RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V4SI }, - { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V4SI, - RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI }, - { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V4SI, - RS6000_BTI_void, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V4SI }, - { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V4SI, - RS6000_BTI_void, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI }, - { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V4SI, - RS6000_BTI_void, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V8HI, - RS6000_BTI_void, RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_V8HI }, - { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V8HI, - RS6000_BTI_void, RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI }, - { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V8HI, - RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V8HI }, - { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V8HI, - RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI }, - { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V8HI, - RS6000_BTI_void, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V8HI }, - { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V8HI, - RS6000_BTI_void, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI }, - { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V8HI, - RS6000_BTI_void, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI }, - { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V16QI, - RS6000_BTI_void, RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_V16QI }, - { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V16QI, - RS6000_BTI_void, RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI }, - { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V16QI, - RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V16QI }, - { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V16QI, - RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI }, - { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V16QI, - RS6000_BTI_void, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V16QI }, - { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V16QI, - RS6000_BTI_void, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI }, - { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V16QI, - RS6000_BTI_void, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI }, - { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V8HI, - RS6000_BTI_void, RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_pixel_V8HI }, - { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V2DF, - RS6000_BTI_void, RS6000_BTI_V2DF, RS6000_BTI_INTSI, ~RS6000_BTI_V2DF }, - { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V2DF, - RS6000_BTI_void, RS6000_BTI_V2DF, RS6000_BTI_INTSI, ~RS6000_BTI_double }, - { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V2DI, - RS6000_BTI_void, RS6000_BTI_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_V2DI }, - { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V2DI, - RS6000_BTI_void, RS6000_BTI_unsigned_V2DI, RS6000_BTI_INTSI, - ~RS6000_BTI_unsigned_V2DI }, - { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V2DI, - RS6000_BTI_void, RS6000_BTI_bool_V2DI, RS6000_BTI_INTSI, - ~RS6000_BTI_bool_V2DI }, - { ALTIVEC_BUILTIN_VEC_STVLX, ALTIVEC_BUILTIN_STVLX, - RS6000_BTI_void, RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_V4SF }, - { ALTIVEC_BUILTIN_VEC_STVLX, ALTIVEC_BUILTIN_STVLX, - RS6000_BTI_void, RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float }, - { ALTIVEC_BUILTIN_VEC_STVLX, ALTIVEC_BUILTIN_STVLX, - RS6000_BTI_void, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V4SI }, - { ALTIVEC_BUILTIN_VEC_STVLX, ALTIVEC_BUILTIN_STVLX, - RS6000_BTI_void, RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_V4SI }, - { ALTIVEC_BUILTIN_VEC_STVLX, ALTIVEC_BUILTIN_STVLX, - RS6000_BTI_void, RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_STVLX, ALTIVEC_BUILTIN_STVLX, - RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V4SI }, - { ALTIVEC_BUILTIN_VEC_STVLX, ALTIVEC_BUILTIN_STVLX, - RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI }, - { ALTIVEC_BUILTIN_VEC_STVLX, ALTIVEC_BUILTIN_STVLX, - RS6000_BTI_void, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V8HI }, - { ALTIVEC_BUILTIN_VEC_STVLX, ALTIVEC_BUILTIN_STVLX, - RS6000_BTI_void, RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_pixel_V8HI }, - { ALTIVEC_BUILTIN_VEC_STVLX, ALTIVEC_BUILTIN_STVLX, - RS6000_BTI_void, RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_V8HI }, - { ALTIVEC_BUILTIN_VEC_STVLX, ALTIVEC_BUILTIN_STVLX, - RS6000_BTI_void, RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI }, - { ALTIVEC_BUILTIN_VEC_STVLX, ALTIVEC_BUILTIN_STVLX, - RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V8HI }, - { ALTIVEC_BUILTIN_VEC_STVLX, ALTIVEC_BUILTIN_STVLX, - RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI }, - { ALTIVEC_BUILTIN_VEC_STVLX, ALTIVEC_BUILTIN_STVLX, - RS6000_BTI_void, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V16QI }, - { ALTIVEC_BUILTIN_VEC_STVLX, ALTIVEC_BUILTIN_STVLX, - RS6000_BTI_void, RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_V16QI }, - { ALTIVEC_BUILTIN_VEC_STVLX, ALTIVEC_BUILTIN_STVLX, - RS6000_BTI_void, RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI }, - { ALTIVEC_BUILTIN_VEC_STVLX, ALTIVEC_BUILTIN_STVLX, - RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V16QI }, - { ALTIVEC_BUILTIN_VEC_STVLX, ALTIVEC_BUILTIN_STVLX, - RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI }, - { ALTIVEC_BUILTIN_VEC_STVLXL, ALTIVEC_BUILTIN_STVLXL, - RS6000_BTI_void, RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_V4SF }, - { ALTIVEC_BUILTIN_VEC_STVLXL, ALTIVEC_BUILTIN_STVLXL, - RS6000_BTI_void, RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float }, - { ALTIVEC_BUILTIN_VEC_STVLXL, ALTIVEC_BUILTIN_STVLXL, - RS6000_BTI_void, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V4SI }, - { ALTIVEC_BUILTIN_VEC_STVLXL, ALTIVEC_BUILTIN_STVLXL, - RS6000_BTI_void, RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_V4SI }, - { ALTIVEC_BUILTIN_VEC_STVLXL, ALTIVEC_BUILTIN_STVLXL, - RS6000_BTI_void, RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_STVLXL, ALTIVEC_BUILTIN_STVLXL, - RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V4SI }, - { ALTIVEC_BUILTIN_VEC_STVLXL, ALTIVEC_BUILTIN_STVLXL, - RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI }, - { ALTIVEC_BUILTIN_VEC_STVLXL, ALTIVEC_BUILTIN_STVLXL, - RS6000_BTI_void, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V8HI }, - { ALTIVEC_BUILTIN_VEC_STVLXL, ALTIVEC_BUILTIN_STVLXL, - RS6000_BTI_void, RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_pixel_V8HI }, - { ALTIVEC_BUILTIN_VEC_STVLXL, ALTIVEC_BUILTIN_STVLXL, - RS6000_BTI_void, RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_V8HI }, - { ALTIVEC_BUILTIN_VEC_STVLXL, ALTIVEC_BUILTIN_STVLXL, - RS6000_BTI_void, RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI }, - { ALTIVEC_BUILTIN_VEC_STVLXL, ALTIVEC_BUILTIN_STVLXL, - RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V8HI }, - { ALTIVEC_BUILTIN_VEC_STVLXL, ALTIVEC_BUILTIN_STVLXL, - RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI }, - { ALTIVEC_BUILTIN_VEC_STVLXL, ALTIVEC_BUILTIN_STVLXL, - RS6000_BTI_void, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V16QI }, - { ALTIVEC_BUILTIN_VEC_STVLXL, ALTIVEC_BUILTIN_STVLXL, - RS6000_BTI_void, RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_V16QI }, - { ALTIVEC_BUILTIN_VEC_STVLXL, ALTIVEC_BUILTIN_STVLXL, - RS6000_BTI_void, RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI }, - { ALTIVEC_BUILTIN_VEC_STVLXL, ALTIVEC_BUILTIN_STVLXL, - RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V16QI }, - { ALTIVEC_BUILTIN_VEC_STVLXL, ALTIVEC_BUILTIN_STVLXL, - RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI }, - { ALTIVEC_BUILTIN_VEC_STVRX, ALTIVEC_BUILTIN_STVRX, - RS6000_BTI_void, RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_V4SF }, - { ALTIVEC_BUILTIN_VEC_STVRX, ALTIVEC_BUILTIN_STVRX, - RS6000_BTI_void, RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float }, - { ALTIVEC_BUILTIN_VEC_STVRX, ALTIVEC_BUILTIN_STVRX, - RS6000_BTI_void, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V4SI }, - { ALTIVEC_BUILTIN_VEC_STVRX, ALTIVEC_BUILTIN_STVRX, - RS6000_BTI_void, RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_V4SI }, - { ALTIVEC_BUILTIN_VEC_STVRX, ALTIVEC_BUILTIN_STVRX, - RS6000_BTI_void, RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_STVRX, ALTIVEC_BUILTIN_STVRX, - RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V4SI }, - { ALTIVEC_BUILTIN_VEC_STVRX, ALTIVEC_BUILTIN_STVRX, - RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI }, - { ALTIVEC_BUILTIN_VEC_STVRX, ALTIVEC_BUILTIN_STVRX, - RS6000_BTI_void, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V8HI }, - { ALTIVEC_BUILTIN_VEC_STVRX, ALTIVEC_BUILTIN_STVRX, - RS6000_BTI_void, RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_pixel_V8HI }, - { ALTIVEC_BUILTIN_VEC_STVRX, ALTIVEC_BUILTIN_STVRX, - RS6000_BTI_void, RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_V8HI }, - { ALTIVEC_BUILTIN_VEC_STVRX, ALTIVEC_BUILTIN_STVRX, - RS6000_BTI_void, RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI }, - { ALTIVEC_BUILTIN_VEC_STVRX, ALTIVEC_BUILTIN_STVRX, - RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V8HI }, - { ALTIVEC_BUILTIN_VEC_STVRX, ALTIVEC_BUILTIN_STVRX, - RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI }, - { ALTIVEC_BUILTIN_VEC_STVRX, ALTIVEC_BUILTIN_STVRX, - RS6000_BTI_void, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V16QI }, - { ALTIVEC_BUILTIN_VEC_STVRX, ALTIVEC_BUILTIN_STVRX, - RS6000_BTI_void, RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_V16QI }, - { ALTIVEC_BUILTIN_VEC_STVRX, ALTIVEC_BUILTIN_STVRX, - RS6000_BTI_void, RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI }, - { ALTIVEC_BUILTIN_VEC_STVRX, ALTIVEC_BUILTIN_STVRX, - RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V16QI }, - { ALTIVEC_BUILTIN_VEC_STVRX, ALTIVEC_BUILTIN_STVRX, - RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI }, - { ALTIVEC_BUILTIN_VEC_STVRXL, ALTIVEC_BUILTIN_STVRXL, - RS6000_BTI_void, RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_V4SF }, - { ALTIVEC_BUILTIN_VEC_STVRXL, ALTIVEC_BUILTIN_STVRXL, - RS6000_BTI_void, RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float }, - { ALTIVEC_BUILTIN_VEC_STVRXL, ALTIVEC_BUILTIN_STVRXL, - RS6000_BTI_void, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V4SI }, - { ALTIVEC_BUILTIN_VEC_STVRXL, ALTIVEC_BUILTIN_STVRXL, - RS6000_BTI_void, RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_V4SI }, - { ALTIVEC_BUILTIN_VEC_STVRXL, ALTIVEC_BUILTIN_STVRXL, - RS6000_BTI_void, RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_STVRXL, ALTIVEC_BUILTIN_STVRXL, - RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V4SI }, - { ALTIVEC_BUILTIN_VEC_STVRXL, ALTIVEC_BUILTIN_STVRXL, - RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI }, - { ALTIVEC_BUILTIN_VEC_STVRXL, ALTIVEC_BUILTIN_STVRXL, - RS6000_BTI_void, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V8HI }, - { ALTIVEC_BUILTIN_VEC_STVRXL, ALTIVEC_BUILTIN_STVRXL, - RS6000_BTI_void, RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_pixel_V8HI }, - { ALTIVEC_BUILTIN_VEC_STVRXL, ALTIVEC_BUILTIN_STVRXL, - RS6000_BTI_void, RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_V8HI }, - { ALTIVEC_BUILTIN_VEC_STVRXL, ALTIVEC_BUILTIN_STVRXL, - RS6000_BTI_void, RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI }, - { ALTIVEC_BUILTIN_VEC_STVRXL, ALTIVEC_BUILTIN_STVRXL, - RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V8HI }, - { ALTIVEC_BUILTIN_VEC_STVRXL, ALTIVEC_BUILTIN_STVRXL, - RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI }, - { ALTIVEC_BUILTIN_VEC_STVRXL, ALTIVEC_BUILTIN_STVRXL, - RS6000_BTI_void, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V16QI }, - { ALTIVEC_BUILTIN_VEC_STVRXL, ALTIVEC_BUILTIN_STVRXL, - RS6000_BTI_void, RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_V16QI }, - { ALTIVEC_BUILTIN_VEC_STVRXL, ALTIVEC_BUILTIN_STVRXL, - RS6000_BTI_void, RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI }, - { ALTIVEC_BUILTIN_VEC_STVRXL, ALTIVEC_BUILTIN_STVRXL, - RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V16QI }, - { ALTIVEC_BUILTIN_VEC_STVRXL, ALTIVEC_BUILTIN_STVRXL, - RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI }, - { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_STXVD2X_V2DF, - RS6000_BTI_void, RS6000_BTI_V2DF, RS6000_BTI_INTSI, ~RS6000_BTI_V2DF }, - { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_STXVD2X_V2DF, - RS6000_BTI_void, RS6000_BTI_V2DF, RS6000_BTI_INTSI, ~RS6000_BTI_double }, - { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_STXVD2X_V2DI, - RS6000_BTI_void, RS6000_BTI_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_V2DI }, - { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_STXVD2X_V2DI, - RS6000_BTI_void, RS6000_BTI_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_long_long }, - { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_STXVD2X_V2DI, RS6000_BTI_void, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_long_long }, - { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_STXVD2X_V2DI, - RS6000_BTI_void, RS6000_BTI_unsigned_V2DI, RS6000_BTI_INTSI, - ~RS6000_BTI_unsigned_V2DI }, - { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_STXVD2X_V2DI, - RS6000_BTI_void, RS6000_BTI_bool_V2DI, RS6000_BTI_INTSI, - ~RS6000_BTI_bool_V2DI }, - { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_STXVW4X_V4SF, - RS6000_BTI_void, RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_V4SF }, - { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_STXVW4X_V4SF, - RS6000_BTI_void, RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float }, - { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_STXVW4X_V4SI, - RS6000_BTI_void, RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_V4SI }, - { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_STXVW4X_V4SI, - RS6000_BTI_void, RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI }, - { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_STXVW4X_V4SI, - RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V4SI }, - { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_STXVW4X_V4SI, - RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI }, - { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_STXVW4X_V4SI, - RS6000_BTI_void, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V4SI }, - { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_STXVW4X_V4SI, - RS6000_BTI_void, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI }, - { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_STXVW4X_V4SI, - RS6000_BTI_void, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI }, - { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_STXVW4X_V8HI, - RS6000_BTI_void, RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_V8HI }, - { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_STXVW4X_V8HI, - RS6000_BTI_void, RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI }, - { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_STXVW4X_V8HI, - RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V8HI }, - { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_STXVW4X_V8HI, - RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI }, - { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_STXVW4X_V8HI, - RS6000_BTI_void, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V8HI }, - { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_STXVW4X_V8HI, - RS6000_BTI_void, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI }, - { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_STXVW4X_V8HI, - RS6000_BTI_void, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI }, - { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_STXVW4X_V16QI, - RS6000_BTI_void, RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_V16QI }, - { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_STXVW4X_V16QI, - RS6000_BTI_void, RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI }, - { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_STXVW4X_V16QI, - RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V16QI }, - { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_STXVW4X_V16QI, - RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI }, - { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_STXVW4X_V16QI, - RS6000_BTI_void, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V16QI }, - { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_STXVW4X_V16QI, - RS6000_BTI_void, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI }, - { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_STXVW4X_V16QI, - RS6000_BTI_void, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI }, - { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_STXVW4X_V8HI, - RS6000_BTI_void, RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_pixel_V8HI }, - { VSX_BUILTIN_VEC_XST_BE, VSX_BUILTIN_ST_ELEMREV_V2DF, - RS6000_BTI_void, RS6000_BTI_V2DF, RS6000_BTI_INTSI, ~RS6000_BTI_V2DF }, - { VSX_BUILTIN_VEC_XST_BE, VSX_BUILTIN_ST_ELEMREV_V2DF, - RS6000_BTI_void, RS6000_BTI_V2DF, RS6000_BTI_INTSI, ~RS6000_BTI_double }, - { VSX_BUILTIN_VEC_XST_BE, VSX_BUILTIN_ST_ELEMREV_V1TI, - RS6000_BTI_void, RS6000_BTI_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_INTTI }, - { VSX_BUILTIN_VEC_XST_BE, VSX_BUILTIN_ST_ELEMREV_V1TI, - RS6000_BTI_void, RS6000_BTI_unsigned_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTTI }, - { VSX_BUILTIN_VEC_XST_BE, VSX_BUILTIN_ST_ELEMREV_V2DI, - RS6000_BTI_void, RS6000_BTI_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_V2DI }, - { VSX_BUILTIN_VEC_XST_BE, VSX_BUILTIN_ST_ELEMREV_V2DI, - RS6000_BTI_void, RS6000_BTI_V2DI, RS6000_BTI_INTSI, - ~RS6000_BTI_long_long }, - { VSX_BUILTIN_VEC_XST_BE, VSX_BUILTIN_ST_ELEMREV_V2DI, - RS6000_BTI_void, RS6000_BTI_unsigned_V2DI, RS6000_BTI_INTSI, - ~RS6000_BTI_unsigned_V2DI }, - { VSX_BUILTIN_VEC_XST_BE, VSX_BUILTIN_ST_ELEMREV_V2DI, - RS6000_BTI_void, RS6000_BTI_unsigned_V2DI, RS6000_BTI_INTSI, - ~RS6000_BTI_unsigned_long_long }, - { VSX_BUILTIN_VEC_XST_BE, VSX_BUILTIN_ST_ELEMREV_V4SF, - RS6000_BTI_void, RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_V4SF }, - { VSX_BUILTIN_VEC_XST_BE, VSX_BUILTIN_ST_ELEMREV_V4SF, - RS6000_BTI_void, RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float }, - { VSX_BUILTIN_VEC_XST_BE, VSX_BUILTIN_ST_ELEMREV_V4SI, - RS6000_BTI_void, RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_V4SI }, - { VSX_BUILTIN_VEC_XST_BE, VSX_BUILTIN_ST_ELEMREV_V4SI, - RS6000_BTI_void, RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI }, - { VSX_BUILTIN_VEC_XST_BE, VSX_BUILTIN_ST_ELEMREV_V4SI, - RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, - ~RS6000_BTI_unsigned_V4SI }, - { VSX_BUILTIN_VEC_XST_BE, VSX_BUILTIN_ST_ELEMREV_V4SI, - RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, - ~RS6000_BTI_UINTSI }, - { VSX_BUILTIN_VEC_XST_BE, VSX_BUILTIN_ST_ELEMREV_V8HI, - RS6000_BTI_void, RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_V8HI }, - { VSX_BUILTIN_VEC_XST_BE, VSX_BUILTIN_ST_ELEMREV_V8HI, - RS6000_BTI_void, RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI }, - { VSX_BUILTIN_VEC_XST_BE, VSX_BUILTIN_ST_ELEMREV_V8HI, - RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, - ~RS6000_BTI_unsigned_V8HI }, - { VSX_BUILTIN_VEC_XST_BE, VSX_BUILTIN_ST_ELEMREV_V8HI, - RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, - ~RS6000_BTI_UINTHI }, - { VSX_BUILTIN_VEC_XST_BE, VSX_BUILTIN_ST_ELEMREV_V16QI, - RS6000_BTI_void, RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_V16QI }, - { VSX_BUILTIN_VEC_XST_BE, VSX_BUILTIN_ST_ELEMREV_V16QI, - RS6000_BTI_void, RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI }, - { VSX_BUILTIN_VEC_XST_BE, VSX_BUILTIN_ST_ELEMREV_V16QI, - RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, - ~RS6000_BTI_unsigned_V16QI }, - { VSX_BUILTIN_VEC_XST_BE, VSX_BUILTIN_ST_ELEMREV_V16QI, - RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, - ~RS6000_BTI_UINTQI }, - { VSX_BUILTIN_VEC_XXSLDWI, VSX_BUILTIN_XXSLDWI_16QI, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_INTSI }, - { VSX_BUILTIN_VEC_XXSLDWI, VSX_BUILTIN_XXSLDWI_16QI, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, - RS6000_BTI_INTSI }, - { VSX_BUILTIN_VEC_XXSLDWI, VSX_BUILTIN_XXSLDWI_8HI, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_INTSI }, - { VSX_BUILTIN_VEC_XXSLDWI, VSX_BUILTIN_XXSLDWI_8HI, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, - RS6000_BTI_INTSI }, - { VSX_BUILTIN_VEC_XXSLDWI, VSX_BUILTIN_XXSLDWI_4SI, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_INTSI }, - { VSX_BUILTIN_VEC_XXSLDWI, VSX_BUILTIN_XXSLDWI_4SI, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, - RS6000_BTI_INTSI }, - { VSX_BUILTIN_VEC_XXSLDWI, VSX_BUILTIN_XXSLDWI_2DI, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_INTSI }, - { VSX_BUILTIN_VEC_XXSLDWI, VSX_BUILTIN_XXSLDWI_2DI, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, - RS6000_BTI_INTSI }, - { VSX_BUILTIN_VEC_XXSLDWI, VSX_BUILTIN_XXSLDWI_4SF, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_INTSI }, - { VSX_BUILTIN_VEC_XXSLDWI, VSX_BUILTIN_XXSLDWI_2DF, - RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_INTSI }, - - { VSX_BUILTIN_VEC_XXPERMDI, VSX_BUILTIN_XXPERMDI_2DF, - RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_INTSI }, - { VSX_BUILTIN_VEC_XXPERMDI, VSX_BUILTIN_XXPERMDI_2DI, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_INTSI }, - { VSX_BUILTIN_VEC_XXPERMDI, VSX_BUILTIN_XXPERMDI_2DI, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, - RS6000_BTI_INTSI }, - { VSX_BUILTIN_VEC_XXPERMDI, VSX_BUILTIN_XXPERMDI_4SF, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_INTSI }, - { VSX_BUILTIN_VEC_XXPERMDI, VSX_BUILTIN_XXPERMDI_4SI, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_INTSI }, - { VSX_BUILTIN_VEC_XXPERMDI, VSX_BUILTIN_XXPERMDI_4SI, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, - RS6000_BTI_INTSI }, - { VSX_BUILTIN_VEC_XXPERMDI, VSX_BUILTIN_XXPERMDI_8HI, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_INTSI }, - { VSX_BUILTIN_VEC_XXPERMDI, VSX_BUILTIN_XXPERMDI_8HI, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, - RS6000_BTI_INTSI }, - { VSX_BUILTIN_VEC_XXPERMDI, VSX_BUILTIN_XXPERMDI_16QI, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_INTSI }, - { VSX_BUILTIN_VEC_XXPERMDI, VSX_BUILTIN_XXPERMDI_16QI, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, - RS6000_BTI_INTSI }, - - { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVD2X_V2DF, - RS6000_BTI_V2DF, RS6000_BTI_INTSI, ~RS6000_BTI_V2DF, 0 }, - { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVD2X_V2DF, - RS6000_BTI_V2DF, RS6000_BTI_INTSI, ~RS6000_BTI_double, 0 }, - { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVD2X_V2DI, - RS6000_BTI_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_V2DI, 0 }, - { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVD2X_V2DI, - RS6000_BTI_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_INTTI, 0 }, - { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVD2X_V2DI, - RS6000_BTI_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_long_long, 0 }, - { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVD2X_V2DI, - RS6000_BTI_unsigned_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTTI, 0 }, - { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVD2X_V2DI, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_INTSI, - ~RS6000_BTI_unsigned_V2DI, 0 }, - { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVD2X_V2DI, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_long_long, 0 }, - { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVD2X_V2DI, - RS6000_BTI_bool_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V2DI, 0 }, - { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVW4X_V4SF, - RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_V4SF, 0 }, - { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVW4X_V4SF, - RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float, 0 }, - { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVW4X_V4SI, - RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V4SI, 0 }, - { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVW4X_V4SI, - RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_V4SI, 0 }, - { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVW4X_V4SI, - RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI, 0 }, - { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVW4X_V4SI, - RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_long, 0 }, - { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVW4X_V4SI, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, - ~RS6000_BTI_unsigned_V4SI, 0 }, - { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVW4X_V4SI, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI, 0 }, - { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVW4X_V4SI, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, - ~RS6000_BTI_unsigned_long, 0 }, - { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVW4X_V8HI, - RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V8HI, 0 }, - { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVW4X_V8HI, - RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_pixel_V8HI, 0 }, - { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVW4X_V8HI, - RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_V8HI, 0 }, - { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVW4X_V8HI, - RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI, 0 }, - { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVW4X_V8HI, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, - ~RS6000_BTI_unsigned_V8HI, 0 }, - { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVW4X_V8HI, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI, 0 }, - { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVW4X_V16QI, - RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V16QI, 0 }, - { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVW4X_V16QI, - RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_V16QI, 0 }, - { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVW4X_V16QI, - RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI, 0 }, - { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVW4X_V16QI, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, - ~RS6000_BTI_unsigned_V16QI, 0 }, - { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVW4X_V16QI, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI, 0 }, - - { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVD2X_V2DF, - RS6000_BTI_void, RS6000_BTI_V2DF, RS6000_BTI_INTSI, ~RS6000_BTI_V2DF }, - { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVD2X_V2DF, - RS6000_BTI_void, RS6000_BTI_V2DF, RS6000_BTI_INTSI, ~RS6000_BTI_double }, - { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVD2X_V2DI, - RS6000_BTI_void, RS6000_BTI_V2DI, RS6000_BTI_INTDI, - ~RS6000_BTI_long_long }, - { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVD2X_V2DI, - RS6000_BTI_void, RS6000_BTI_unsigned_V2DI, RS6000_BTI_INTDI, - ~RS6000_BTI_unsigned_long_long }, - { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVD2X_V1TI, - RS6000_BTI_void, RS6000_BTI_V1TI, RS6000_BTI_INTDI, ~RS6000_BTI_INTTI }, - { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVD2X_V1TI, - RS6000_BTI_void, RS6000_BTI_unsigned_V1TI, RS6000_BTI_INTDI, ~RS6000_BTI_UINTTI }, - { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVD2X_V2DI, - RS6000_BTI_void, RS6000_BTI_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_V2DI }, - { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVD2X_V2DI, - RS6000_BTI_void, RS6000_BTI_unsigned_V2DI, RS6000_BTI_INTSI, - ~RS6000_BTI_unsigned_V2DI }, - { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVD2X_V2DI, - RS6000_BTI_void, RS6000_BTI_bool_V2DI, RS6000_BTI_INTSI, - ~RS6000_BTI_bool_V2DI }, - { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V4SF, - RS6000_BTI_void, RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_V4SF }, - { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V4SF, - RS6000_BTI_void, RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float }, - { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V4SI, - RS6000_BTI_void, RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_V4SI }, - { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V4SI, - RS6000_BTI_void, RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI }, - { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V4SI, - RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, - ~RS6000_BTI_unsigned_V4SI }, - { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V4SI, - RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, - ~RS6000_BTI_UINTSI }, - { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V4SI, - RS6000_BTI_void, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, - ~RS6000_BTI_bool_V4SI }, - { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V4SI, - RS6000_BTI_void, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, - ~RS6000_BTI_UINTSI }, - { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V4SI, - RS6000_BTI_void, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, - ~RS6000_BTI_INTSI }, - { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V8HI, - RS6000_BTI_void, RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_V8HI }, - { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V8HI, - RS6000_BTI_void, RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI }, - { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V8HI, - RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, - ~RS6000_BTI_unsigned_V8HI }, - { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V8HI, - RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, - ~RS6000_BTI_UINTHI }, - { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V8HI, - RS6000_BTI_void, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, - ~RS6000_BTI_bool_V8HI }, - { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V8HI, - RS6000_BTI_void, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, - ~RS6000_BTI_UINTHI }, - { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V8HI, - RS6000_BTI_void, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, - ~RS6000_BTI_INTHI }, - { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V16QI, - RS6000_BTI_void, RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_V16QI }, - { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V16QI, - RS6000_BTI_void, RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI }, - { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V16QI, - RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, - ~RS6000_BTI_unsigned_V16QI }, - { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V16QI, - RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, - ~RS6000_BTI_UINTQI }, - { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V16QI, - RS6000_BTI_void, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, - ~RS6000_BTI_bool_V16QI }, - { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V16QI, - RS6000_BTI_void, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, - ~RS6000_BTI_UINTQI }, - { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V16QI, - RS6000_BTI_void, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, - ~RS6000_BTI_INTQI }, - { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V16QI, - RS6000_BTI_void, RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, - ~RS6000_BTI_pixel_V8HI }, - - /* Predicates. */ - { ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTUB_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI }, - { ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTUB_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI }, - { ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTUB_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI }, - { ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTSB_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI }, - { ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTSB_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI }, - { ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTSB_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V16QI, RS6000_BTI_V16QI }, - { ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTUH_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI }, - { ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTUH_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI }, - { ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTUH_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI }, - { ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTSH_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V8HI, RS6000_BTI_V8HI }, - { ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTSH_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI }, - { ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTSH_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI }, - { ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTUW_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI }, - { ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTUW_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI }, - { ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTUW_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI }, - { ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTSW_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI }, - { ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTSW_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI }, - { ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTSW_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V4SI, RS6000_BTI_V4SI }, - { ALTIVEC_BUILTIN_VEC_VCMPGT_P, P8V_BUILTIN_VCMPGTUD_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI }, - { ALTIVEC_BUILTIN_VEC_VCMPGT_P, P8V_BUILTIN_VCMPGTUD_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI }, - { ALTIVEC_BUILTIN_VEC_VCMPGT_P, P8V_BUILTIN_VCMPGTUD_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI }, - { ALTIVEC_BUILTIN_VEC_VCMPGT_P, P10V_BUILTIN_VCMPGTUT_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI }, - { ALTIVEC_BUILTIN_VEC_VCMPGT_P, P8V_BUILTIN_VCMPGTSD_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI }, - { ALTIVEC_BUILTIN_VEC_VCMPGT_P, P8V_BUILTIN_VCMPGTSD_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI }, - { ALTIVEC_BUILTIN_VEC_VCMPGT_P, P8V_BUILTIN_VCMPGTSD_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V2DI, RS6000_BTI_V2DI }, - { ALTIVEC_BUILTIN_VEC_VCMPGT_P, P10V_BUILTIN_VCMPGTST_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V1TI, RS6000_BTI_V1TI }, - { ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTFP_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V4SF, RS6000_BTI_V4SF }, - { ALTIVEC_BUILTIN_VEC_VCMPGT_P, VSX_BUILTIN_XVCMPGTDP_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V2DF, RS6000_BTI_V2DF }, - - - { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUB_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI }, - { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUB_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI }, - { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUB_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI }, - { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUB_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI }, - { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUB_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI }, - { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUB_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V16QI, RS6000_BTI_V16QI }, - { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUB_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI }, - { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUH_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI }, - { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUH_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI }, - { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUH_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI }, - { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUH_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V8HI, RS6000_BTI_V8HI }, - { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUH_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI }, - { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUH_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI }, - { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUH_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI }, - { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUH_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI }, - { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUW_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI }, - { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUW_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI }, - { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUW_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI }, - { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUW_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI }, - { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUW_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI }, - { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUW_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V4SI, RS6000_BTI_V4SI }, - { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUW_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI }, - { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, P8V_BUILTIN_VCMPEQUD_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI }, - { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, P8V_BUILTIN_VCMPEQUD_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI }, - { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, P8V_BUILTIN_VCMPEQUD_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI }, - { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, P8V_BUILTIN_VCMPEQUD_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI }, - { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, P8V_BUILTIN_VCMPEQUD_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI }, - { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, P8V_BUILTIN_VCMPEQUD_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V2DI, RS6000_BTI_V2DI }, - { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, P8V_BUILTIN_VCMPEQUD_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI }, - { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, P10V_BUILTIN_VCMPEQUT_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V1TI, RS6000_BTI_V1TI }, - { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, P10V_BUILTIN_VCMPEQUT_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI }, - { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQFP_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V4SF, RS6000_BTI_V4SF }, - { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, VSX_BUILTIN_XVCMPEQDP_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V2DF, RS6000_BTI_V2DF }, - - - /* cmpge is the same as cmpgt for all cases except floating point. - There is further code to deal with this special case in - altivec_build_resolved_builtin. */ - { ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTUB_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI }, - { ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTUB_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI }, - { ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTUB_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI }, - { ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTSB_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI }, - { ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTSB_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI }, - { ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTSB_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V16QI, RS6000_BTI_V16QI }, - { ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTUH_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI }, - { ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTUH_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI }, - { ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTUH_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI }, - { ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTSH_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V8HI, RS6000_BTI_V8HI }, - { ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTSH_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI }, - { ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTSH_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI }, - { ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTUW_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI }, - { ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTUW_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI }, - { ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTUW_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI }, - { ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTSW_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI }, - { ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTSW_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI }, - { ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTSW_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V4SI, RS6000_BTI_V4SI }, - { ALTIVEC_BUILTIN_VEC_VCMPGE_P, P8V_BUILTIN_VCMPGTUD_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI }, - { ALTIVEC_BUILTIN_VEC_VCMPGE_P, P8V_BUILTIN_VCMPGTUD_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI }, - { ALTIVEC_BUILTIN_VEC_VCMPGE_P, P8V_BUILTIN_VCMPGTUD_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI }, - { ALTIVEC_BUILTIN_VEC_VCMPGE_P, P10V_BUILTIN_VCMPGTUT_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI }, - { ALTIVEC_BUILTIN_VEC_VCMPGE_P, P8V_BUILTIN_VCMPGTSD_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI }, - { ALTIVEC_BUILTIN_VEC_VCMPGE_P, P8V_BUILTIN_VCMPGTSD_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI }, - { ALTIVEC_BUILTIN_VEC_VCMPGE_P, P8V_BUILTIN_VCMPGTSD_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V2DI, RS6000_BTI_V2DI }, - { ALTIVEC_BUILTIN_VEC_VCMPGE_P, P10V_BUILTIN_VCMPGTST_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V1TI, RS6000_BTI_V1TI }, - { ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGEFP_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V4SF, RS6000_BTI_V4SF }, - { ALTIVEC_BUILTIN_VEC_VCMPGE_P, VSX_BUILTIN_XVCMPGEDP_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V2DF, RS6000_BTI_V2DF }, - - /* Power8 vector overloaded functions. */ - { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V16QI, - RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 }, - { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V16QI, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, 0 }, - { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V16QI, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, - { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V16QI_UNS, - RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, 0 }, - { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V16QI_UNS, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, - RS6000_BTI_unsigned_V16QI, 0 }, - { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V16QI_UNS, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, - RS6000_BTI_bool_V16QI, 0 }, - { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V16QI_UNS, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, - RS6000_BTI_unsigned_V16QI, 0 }, - { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V8HI, - RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, 0 }, - { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V8HI, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, 0 }, - { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V8HI, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, - { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V8HI_UNS, - RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, 0 }, - { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V8HI_UNS, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, - RS6000_BTI_unsigned_V8HI, 0 }, - { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V8HI_UNS, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, - RS6000_BTI_bool_V8HI, 0 }, - { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V8HI_UNS, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, - RS6000_BTI_unsigned_V8HI, 0 }, - { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V4SI, - RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, 0 }, - { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V4SI, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, 0 }, - { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V4SI, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, - { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V4SI_UNS, - RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, 0 }, - { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V4SI_UNS, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, - RS6000_BTI_unsigned_V4SI, 0 }, - { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V4SI_UNS, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, - RS6000_BTI_bool_V4SI, 0 }, - { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V4SI_UNS, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, - RS6000_BTI_unsigned_V4SI, 0 }, - { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V2DI, - RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, 0 }, - { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V2DI, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, 0 }, - { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V2DI, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, - { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V2DI_UNS, - RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, 0 }, - { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V2DI_UNS, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, - RS6000_BTI_unsigned_V2DI, 0 }, - { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V2DI_UNS, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, - RS6000_BTI_bool_V2DI, 0 }, - { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V2DI_UNS, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, - RS6000_BTI_unsigned_V2DI, 0 }, - { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V4SF, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, - { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V2DF, - RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 }, - - { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V16QI, - RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 }, - { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V16QI, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, 0 }, - { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V16QI, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, - { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V16QI_UNS, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, - RS6000_BTI_unsigned_V16QI, 0 }, - { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V16QI_UNS, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, - RS6000_BTI_bool_V16QI, 0 }, - { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V16QI_UNS, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, - RS6000_BTI_unsigned_V16QI, 0 }, - { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V16QI_UNS, - RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, 0 }, - { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V8HI, - RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, 0 }, - { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V8HI, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, 0 }, - { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V8HI, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, - { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V8HI_UNS, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, - RS6000_BTI_unsigned_V8HI, 0 }, - { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V8HI_UNS, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, - RS6000_BTI_bool_V8HI, 0 }, - { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V8HI_UNS, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, - RS6000_BTI_unsigned_V8HI, 0 }, - { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V8HI_UNS, - RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, 0 }, - { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V4SI, - RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, 0 }, - { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V4SI, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, 0 }, - { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V4SI, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, - { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V4SI_UNS, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, - RS6000_BTI_unsigned_V4SI, 0 }, - { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V4SI_UNS, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, - RS6000_BTI_bool_V4SI, 0 }, - { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V4SI_UNS, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, - RS6000_BTI_unsigned_V4SI, 0 }, - { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V4SI_UNS, - RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, 0 }, - { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V2DI, - RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, 0 }, - { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V2DI, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, 0 }, - { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V2DI, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, - { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V2DI_UNS, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, - RS6000_BTI_unsigned_V2DI, 0 }, - { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V2DI_UNS, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, - RS6000_BTI_bool_V2DI, 0 }, - { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V2DI_UNS, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, - RS6000_BTI_unsigned_V2DI, 0 }, - { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V2DI_UNS, - RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, 0 }, - { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V4SF, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, - { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V2DF, - RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 }, - - { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V16QI, - RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 }, - { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V16QI, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, 0 }, - { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V16QI, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, - { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V16QI_UNS, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, - RS6000_BTI_unsigned_V16QI, 0 }, - { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V16QI_UNS, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, - RS6000_BTI_bool_V16QI, 0 }, - { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V16QI_UNS, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, - RS6000_BTI_unsigned_V16QI, 0 }, - { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V16QI_UNS, - RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, 0 }, - { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V8HI, - RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, 0 }, - { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V8HI, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, 0 }, - { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V8HI, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, - { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V8HI_UNS, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, - RS6000_BTI_unsigned_V8HI, 0 }, - { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V8HI_UNS, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, - RS6000_BTI_bool_V8HI, 0 }, - { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V8HI_UNS, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, - RS6000_BTI_unsigned_V8HI, 0 }, - { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V8HI_UNS, - RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, 0 }, - { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V4SI, - RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, 0 }, - { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V4SI, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, 0 }, - { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V4SI, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, - { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V4SI_UNS, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, - RS6000_BTI_unsigned_V4SI, 0 }, - { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V4SI_UNS, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, - RS6000_BTI_bool_V4SI, 0 }, - { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V4SI_UNS, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, - RS6000_BTI_unsigned_V4SI, 0 }, - { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V4SI_UNS, - RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, 0 }, - { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V2DI, - RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, 0 }, - { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V2DI, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, 0 }, - { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V2DI, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, - { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V2DI_UNS, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, - RS6000_BTI_unsigned_V2DI, 0 }, - { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V2DI_UNS, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, - RS6000_BTI_bool_V2DI, 0 }, - { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V2DI_UNS, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, - RS6000_BTI_unsigned_V2DI, 0 }, - { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V2DI_UNS, - RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, 0 }, - { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V4SF, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, - { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V2DF, - RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 }, - - { P8V_BUILTIN_VEC_VADDCUQ, P8V_BUILTIN_VADDCUQ, - RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, 0 }, - { P8V_BUILTIN_VEC_VADDCUQ, P8V_BUILTIN_VADDCUQ, - RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, - RS6000_BTI_unsigned_V1TI, 0 }, - - { P8V_BUILTIN_VEC_VADDUDM, P8V_BUILTIN_VADDUDM, - RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, 0 }, - { P8V_BUILTIN_VEC_VADDUDM, P8V_BUILTIN_VADDUDM, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, 0 }, - { P8V_BUILTIN_VEC_VADDUDM, P8V_BUILTIN_VADDUDM, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, - { P8V_BUILTIN_VEC_VADDUDM, P8V_BUILTIN_VADDUDM, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, - { P8V_BUILTIN_VEC_VADDUDM, P8V_BUILTIN_VADDUDM, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, 0 }, - { P8V_BUILTIN_VEC_VADDUDM, P8V_BUILTIN_VADDUDM, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, - - { P8V_BUILTIN_VEC_VADDUQM, P8V_BUILTIN_VADDUQM, - RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, 0 }, - { P8V_BUILTIN_VEC_VADDUQM, P8V_BUILTIN_VADDUQM, - RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, - RS6000_BTI_unsigned_V1TI, 0 }, - - { P9V_BUILTIN_VEC_VBPERM, P9V_BUILTIN_VBPERMD, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, - RS6000_BTI_unsigned_V16QI, 0 }, - { P9V_BUILTIN_VEC_VBPERM, P8V_BUILTIN_VBPERMQ, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V1TI, - RS6000_BTI_unsigned_V16QI, 0 }, - { P9V_BUILTIN_VEC_VBPERM, P8V_BUILTIN_VBPERMQ2, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, - RS6000_BTI_unsigned_V16QI, 0 }, - - { P8V_BUILTIN_VEC_VBPERMQ, P8V_BUILTIN_VBPERMQ, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, - RS6000_BTI_unsigned_V16QI, 0 }, - { P8V_BUILTIN_VEC_VBPERMQ, P8V_BUILTIN_VBPERMQ, - RS6000_BTI_V2DI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, - { P8V_BUILTIN_VEC_VBPERMQ, P8V_BUILTIN_VBPERMQ, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V16QI, - RS6000_BTI_unsigned_V16QI, 0 }, - { P8V_BUILTIN_VEC_VBPERMQ, P8V_BUILTIN_VBPERMQ, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V1TI, - RS6000_BTI_unsigned_V16QI, 0 }, - - { P8V_BUILTIN_VEC_VCLZ, P8V_BUILTIN_VCLZB, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0, 0 }, - { P8V_BUILTIN_VEC_VCLZ, P8V_BUILTIN_VCLZB, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0, 0 }, - { P8V_BUILTIN_VEC_VCLZ, P8V_BUILTIN_VCLZH, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0, 0 }, - { P8V_BUILTIN_VEC_VCLZ, P8V_BUILTIN_VCLZH, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0, 0 }, - { P8V_BUILTIN_VEC_VCLZ, P8V_BUILTIN_VCLZW, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0, 0 }, - { P8V_BUILTIN_VEC_VCLZ, P8V_BUILTIN_VCLZW, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0, 0 }, - { P8V_BUILTIN_VEC_VCLZ, P8V_BUILTIN_VCLZD, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0, 0 }, - { P8V_BUILTIN_VEC_VCLZ, P8V_BUILTIN_VCLZD, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0, 0 }, - - { P8V_BUILTIN_VEC_VCLZB, P8V_BUILTIN_VCLZB, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0, 0 }, - { P8V_BUILTIN_VEC_VCLZB, P8V_BUILTIN_VCLZB, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0, 0 }, - - { P8V_BUILTIN_VEC_VCLZH, P8V_BUILTIN_VCLZH, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0, 0 }, - { P8V_BUILTIN_VEC_VCLZH, P8V_BUILTIN_VCLZH, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0, 0 }, - - { P8V_BUILTIN_VEC_VCLZW, P8V_BUILTIN_VCLZW, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0, 0 }, - { P8V_BUILTIN_VEC_VCLZW, P8V_BUILTIN_VCLZW, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0, 0 }, - - { P8V_BUILTIN_VEC_VCLZD, P8V_BUILTIN_VCLZD, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0, 0 }, - { P8V_BUILTIN_VEC_VCLZD, P8V_BUILTIN_VCLZD, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0, 0 }, - - { P9_BUILTIN_DFP_TSTSFI_LT, MISC_BUILTIN_TSTSFI_LT_TD, - RS6000_BTI_INTSI, RS6000_BTI_UINTSI, RS6000_BTI_dfloat128, 0 }, - { P9_BUILTIN_DFP_TSTSFI_LT, MISC_BUILTIN_TSTSFI_LT_DD, - RS6000_BTI_INTSI, RS6000_BTI_UINTSI, RS6000_BTI_dfloat64, 0 }, - - { P9_BUILTIN_DFP_TSTSFI_LT_TD, MISC_BUILTIN_TSTSFI_LT_TD, - RS6000_BTI_INTSI, RS6000_BTI_UINTSI, RS6000_BTI_dfloat128, 0 }, - { P9_BUILTIN_DFP_TSTSFI_LT_DD, MISC_BUILTIN_TSTSFI_LT_DD, - RS6000_BTI_INTSI, RS6000_BTI_UINTSI, RS6000_BTI_dfloat64, 0 }, - - { P9_BUILTIN_DFP_TSTSFI_EQ, MISC_BUILTIN_TSTSFI_EQ_TD, - RS6000_BTI_INTSI, RS6000_BTI_UINTSI, RS6000_BTI_dfloat128, 0 }, - { P9_BUILTIN_DFP_TSTSFI_EQ, MISC_BUILTIN_TSTSFI_EQ_DD, - RS6000_BTI_INTSI, RS6000_BTI_UINTSI, RS6000_BTI_dfloat64, 0 }, - - { P9_BUILTIN_DFP_TSTSFI_EQ_TD, MISC_BUILTIN_TSTSFI_EQ_TD, - RS6000_BTI_INTSI, RS6000_BTI_UINTSI, RS6000_BTI_dfloat128, 0 }, - { P9_BUILTIN_DFP_TSTSFI_EQ_DD, MISC_BUILTIN_TSTSFI_EQ_DD, - RS6000_BTI_INTSI, RS6000_BTI_UINTSI, RS6000_BTI_dfloat64, 0 }, - - { P9_BUILTIN_DFP_TSTSFI_GT, MISC_BUILTIN_TSTSFI_GT_TD, - RS6000_BTI_INTSI, RS6000_BTI_UINTSI, RS6000_BTI_dfloat128, 0 }, - { P9_BUILTIN_DFP_TSTSFI_GT, MISC_BUILTIN_TSTSFI_GT_DD, - RS6000_BTI_INTSI, RS6000_BTI_UINTSI, RS6000_BTI_dfloat64, 0 }, - - { P9_BUILTIN_DFP_TSTSFI_GT_TD, MISC_BUILTIN_TSTSFI_GT_TD, - RS6000_BTI_INTSI, RS6000_BTI_UINTSI, RS6000_BTI_dfloat128, 0 }, - { P9_BUILTIN_DFP_TSTSFI_GT_DD, MISC_BUILTIN_TSTSFI_GT_DD, - RS6000_BTI_INTSI, RS6000_BTI_UINTSI, RS6000_BTI_dfloat64, 0 }, - - { P9_BUILTIN_DFP_TSTSFI_OV, MISC_BUILTIN_TSTSFI_OV_TD, - RS6000_BTI_INTSI, RS6000_BTI_UINTSI, RS6000_BTI_dfloat128, 0 }, - { P9_BUILTIN_DFP_TSTSFI_OV, MISC_BUILTIN_TSTSFI_OV_DD, - RS6000_BTI_INTSI, RS6000_BTI_UINTSI, RS6000_BTI_dfloat64, 0 }, - - { P9_BUILTIN_DFP_TSTSFI_OV_TD, MISC_BUILTIN_TSTSFI_OV_TD, - RS6000_BTI_INTSI, RS6000_BTI_UINTSI, RS6000_BTI_dfloat128, 0 }, - { P9_BUILTIN_DFP_TSTSFI_OV_DD, MISC_BUILTIN_TSTSFI_OV_DD, - RS6000_BTI_INTSI, RS6000_BTI_UINTSI, RS6000_BTI_dfloat64, 0 }, - - { P9V_BUILTIN_VEC_VCTZ, P9V_BUILTIN_VCTZB, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0, 0 }, - { P9V_BUILTIN_VEC_VCTZ, P9V_BUILTIN_VCTZB, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0, 0 }, - { P9V_BUILTIN_VEC_VCTZ, P9V_BUILTIN_VCTZH, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0, 0 }, - { P9V_BUILTIN_VEC_VCTZ, P9V_BUILTIN_VCTZH, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0, 0 }, - { P9V_BUILTIN_VEC_VCTZ, P9V_BUILTIN_VCTZW, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0, 0 }, - { P9V_BUILTIN_VEC_VCTZ, P9V_BUILTIN_VCTZW, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0, 0 }, - { P9V_BUILTIN_VEC_VCTZ, P9V_BUILTIN_VCTZD, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0, 0 }, - { P9V_BUILTIN_VEC_VCTZ, P9V_BUILTIN_VCTZD, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0, 0 }, - - { P9V_BUILTIN_VEC_VCTZB, P9V_BUILTIN_VCTZB, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0, 0 }, - { P9V_BUILTIN_VEC_VCTZB, P9V_BUILTIN_VCTZB, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0, 0 }, - - { P9V_BUILTIN_VEC_VCTZH, P9V_BUILTIN_VCTZH, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0, 0 }, - { P9V_BUILTIN_VEC_VCTZH, P9V_BUILTIN_VCTZH, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0, 0 }, - - { P9V_BUILTIN_VEC_VCTZW, P9V_BUILTIN_VCTZW, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0, 0 }, - { P9V_BUILTIN_VEC_VCTZW, P9V_BUILTIN_VCTZW, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0, 0 }, - - { P9V_BUILTIN_VEC_VCTZD, P9V_BUILTIN_VCTZD, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0, 0 }, - { P9V_BUILTIN_VEC_VCTZD, P9V_BUILTIN_VCTZD, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0, 0 }, - - { P9V_BUILTIN_VEC_VADU, P9V_BUILTIN_VADUB, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, - RS6000_BTI_unsigned_V16QI, 0 }, - { P9V_BUILTIN_VEC_VADU, P9V_BUILTIN_VADUH, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, - RS6000_BTI_unsigned_V8HI, 0 }, - { P9V_BUILTIN_VEC_VADU, P9V_BUILTIN_VADUW, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, - RS6000_BTI_unsigned_V4SI, 0 }, - - { P9V_BUILTIN_VEC_VADUB, P9V_BUILTIN_VADUB, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, - RS6000_BTI_unsigned_V16QI, 0 }, - - { P9V_BUILTIN_VEC_VADUH, P9V_BUILTIN_VADUH, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, - RS6000_BTI_unsigned_V8HI, 0 }, - - { P9V_BUILTIN_VEC_VADUW, P9V_BUILTIN_VADUW, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, - RS6000_BTI_unsigned_V4SI, 0 }, - - { P9V_BUILTIN_VEC_VES, P9V_BUILTIN_VESSP, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_V4SF, 0, 0 }, - { P9V_BUILTIN_VEC_VES, P9V_BUILTIN_VESDP, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_V2DF, 0, 0 }, - - { P9V_BUILTIN_VEC_VESSP, P9V_BUILTIN_VESSP, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_V4SF, 0, 0 }, - { P9V_BUILTIN_VEC_VESDP, P9V_BUILTIN_VESDP, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_V2DF, 0, 0 }, - - { P9V_BUILTIN_VEC_VEE, P9V_BUILTIN_VEESP, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_V4SF, 0, 0 }, - { P9V_BUILTIN_VEC_VEE, P9V_BUILTIN_VEEDP, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_V2DF, 0, 0 }, - - { P9V_BUILTIN_VEC_VEESP, P9V_BUILTIN_VEESP, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_V4SF, 0, 0 }, - { P9V_BUILTIN_VEC_VEEDP, P9V_BUILTIN_VEEDP, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_V2DF, 0, 0 }, - - { P9V_BUILTIN_VEC_VTDC, P9V_BUILTIN_VTDCSP, - RS6000_BTI_bool_V4SI, RS6000_BTI_V4SF, RS6000_BTI_INTSI, 0 }, - { P9V_BUILTIN_VEC_VTDC, P9V_BUILTIN_VTDCDP, - RS6000_BTI_bool_V2DI, RS6000_BTI_V2DF, RS6000_BTI_INTSI, 0 }, - - { P9V_BUILTIN_VEC_VTDCSP, P9V_BUILTIN_VTDCSP, - RS6000_BTI_bool_V4SI, RS6000_BTI_V4SF, RS6000_BTI_INTSI, 0 }, - { P9V_BUILTIN_VEC_VTDCDP, P9V_BUILTIN_VTDCDP, - RS6000_BTI_bool_V2DI, RS6000_BTI_V2DF, RS6000_BTI_INTSI, 0 }, - - { P9V_BUILTIN_VEC_VIE, P9V_BUILTIN_VIESP, - RS6000_BTI_V4SF, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { P9V_BUILTIN_VEC_VIE, P9V_BUILTIN_VIESP, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_unsigned_V4SI, 0 }, - - { P9V_BUILTIN_VEC_VIE, P9V_BUILTIN_VIEDP, - RS6000_BTI_V2DF, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, - { P9V_BUILTIN_VEC_VIE, P9V_BUILTIN_VIEDP, - RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_unsigned_V2DI, 0 }, - - { P9V_BUILTIN_VEC_VIESP, P9V_BUILTIN_VIESP, - RS6000_BTI_V4SF, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { P9V_BUILTIN_VEC_VIESP, P9V_BUILTIN_VIESP, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_unsigned_V4SI, 0 }, - - { P9V_BUILTIN_VEC_VIEDP, P9V_BUILTIN_VIEDP, - RS6000_BTI_V2DF, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, - { P9V_BUILTIN_VEC_VIEDP, P9V_BUILTIN_VIEDP, - RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_unsigned_V2DI, 0 }, - - { P9V_BUILTIN_VEC_VSTDC, P9V_BUILTIN_VSTDCSP, - RS6000_BTI_bool_int, RS6000_BTI_float, RS6000_BTI_INTSI, 0 }, - { P9V_BUILTIN_VEC_VSTDC, P9V_BUILTIN_VSTDCDP, - RS6000_BTI_bool_int, RS6000_BTI_double, RS6000_BTI_INTSI, 0 }, - { P9V_BUILTIN_VEC_VSTDC, P9V_BUILTIN_VSTDCQP, - RS6000_BTI_bool_int, RS6000_BTI_ieee128_float, RS6000_BTI_INTSI, 0 }, - - { P9V_BUILTIN_VEC_VSTDCSP, P9V_BUILTIN_VSTDCSP, - RS6000_BTI_bool_int, RS6000_BTI_float, RS6000_BTI_INTSI, 0 }, - { P9V_BUILTIN_VEC_VSTDCDP, P9V_BUILTIN_VSTDCDP, - RS6000_BTI_bool_int, RS6000_BTI_double, RS6000_BTI_INTSI, 0 }, - { P9V_BUILTIN_VEC_VSTDCQP, P9V_BUILTIN_VSTDCQP, - RS6000_BTI_bool_int, RS6000_BTI_ieee128_float, RS6000_BTI_INTSI, 0 }, - - { P9V_BUILTIN_VEC_VSTDCN, P9V_BUILTIN_VSTDCNSP, - RS6000_BTI_bool_int, RS6000_BTI_float, 0, 0 }, - { P9V_BUILTIN_VEC_VSTDCN, P9V_BUILTIN_VSTDCNDP, - RS6000_BTI_bool_int, RS6000_BTI_double, 0, 0 }, - { P9V_BUILTIN_VEC_VSTDCN, P9V_BUILTIN_VSTDCNQP, - RS6000_BTI_bool_int, RS6000_BTI_ieee128_float, 0, 0 }, - - { P9V_BUILTIN_VEC_VSTDCNSP, P9V_BUILTIN_VSTDCNSP, - RS6000_BTI_bool_int, RS6000_BTI_float, 0, 0 }, - { P9V_BUILTIN_VEC_VSTDCNDP, P9V_BUILTIN_VSTDCNDP, - RS6000_BTI_bool_int, RS6000_BTI_double, 0, 0 }, - { P9V_BUILTIN_VEC_VSTDCNQP, P9V_BUILTIN_VSTDCNQP, - RS6000_BTI_bool_int, RS6000_BTI_ieee128_float, 0, 0 }, - - { P9V_BUILTIN_VEC_VSEEDP, P9V_BUILTIN_VSEEDP, - RS6000_BTI_UINTSI, RS6000_BTI_double, 0, 0 }, - { P9V_BUILTIN_VEC_VSEEDP, P9V_BUILTIN_VSEEQP, - RS6000_BTI_UINTDI, RS6000_BTI_ieee128_float, 0, 0 }, - - { P9V_BUILTIN_VEC_VSESDP, P9V_BUILTIN_VSESDP, - RS6000_BTI_UINTDI, RS6000_BTI_double, 0, 0 }, - { P9V_BUILTIN_VEC_VSESDP, P9V_BUILTIN_VSESQP, - RS6000_BTI_UINTTI, RS6000_BTI_ieee128_float, 0, 0 }, - - { P9V_BUILTIN_VEC_VSIEDP, P9V_BUILTIN_VSIEDP, - RS6000_BTI_double, RS6000_BTI_UINTDI, RS6000_BTI_UINTDI, 0 }, - { P9V_BUILTIN_VEC_VSIEDP, P9V_BUILTIN_VSIEDPF, - RS6000_BTI_double, RS6000_BTI_double, RS6000_BTI_UINTDI, 0 }, - - { P9V_BUILTIN_VEC_VSIEDP, P9V_BUILTIN_VSIEQP, - RS6000_BTI_ieee128_float, RS6000_BTI_UINTTI, RS6000_BTI_UINTDI, 0 }, - { P9V_BUILTIN_VEC_VSIEDP, P9V_BUILTIN_VSIEQPF, - RS6000_BTI_ieee128_float, RS6000_BTI_ieee128_float, RS6000_BTI_UINTDI, 0 }, - - { P9V_BUILTIN_VEC_VSCEGT, P9V_BUILTIN_VSCEDPGT, - RS6000_BTI_INTSI, RS6000_BTI_double, RS6000_BTI_double, 0 }, - { P9V_BUILTIN_VEC_VSCEGT, P9V_BUILTIN_VSCEQPGT, - RS6000_BTI_INTSI, RS6000_BTI_ieee128_float, RS6000_BTI_ieee128_float, 0 }, - { P9V_BUILTIN_VEC_VSCELT, P9V_BUILTIN_VSCEDPLT, - RS6000_BTI_INTSI, RS6000_BTI_double, RS6000_BTI_double, 0 }, - { P9V_BUILTIN_VEC_VSCELT, P9V_BUILTIN_VSCEQPLT, - RS6000_BTI_INTSI, RS6000_BTI_ieee128_float, RS6000_BTI_ieee128_float, 0 }, - { P9V_BUILTIN_VEC_VSCEEQ, P9V_BUILTIN_VSCEDPEQ, - RS6000_BTI_INTSI, RS6000_BTI_double, RS6000_BTI_double, 0 }, - { P9V_BUILTIN_VEC_VSCEEQ, P9V_BUILTIN_VSCEQPEQ, - RS6000_BTI_INTSI, RS6000_BTI_ieee128_float, RS6000_BTI_ieee128_float, 0 }, - { P9V_BUILTIN_VEC_VSCEUO, P9V_BUILTIN_VSCEDPUO, - RS6000_BTI_INTSI, RS6000_BTI_double, RS6000_BTI_double, 0 }, - { P9V_BUILTIN_VEC_VSCEUO, P9V_BUILTIN_VSCEQPUO, - RS6000_BTI_INTSI, RS6000_BTI_ieee128_float, RS6000_BTI_ieee128_float, 0 }, - - { P9V_BUILTIN_VEC_XL_LEN_R, P9V_BUILTIN_XL_LEN_R, - RS6000_BTI_unsigned_V16QI, ~RS6000_BTI_UINTQI, - RS6000_BTI_unsigned_long_long, 0 }, - - { P9V_BUILTIN_VEC_LXVL, P9V_BUILTIN_LXVL, - RS6000_BTI_V16QI, ~RS6000_BTI_INTQI, - RS6000_BTI_unsigned_long_long, 0 }, - { P9V_BUILTIN_VEC_LXVL, P9V_BUILTIN_LXVL, - RS6000_BTI_unsigned_V16QI, ~RS6000_BTI_UINTQI, - RS6000_BTI_unsigned_long_long, 0 }, - - { P9V_BUILTIN_VEC_LXVL, P9V_BUILTIN_LXVL, - RS6000_BTI_V4SI, ~RS6000_BTI_INTSI, - RS6000_BTI_unsigned_long_long, 0 }, - { P9V_BUILTIN_VEC_LXVL, P9V_BUILTIN_LXVL, - RS6000_BTI_unsigned_V4SI, ~RS6000_BTI_UINTSI, - RS6000_BTI_unsigned_long_long, 0 }, - - { P9V_BUILTIN_VEC_LXVL, P9V_BUILTIN_LXVL, - RS6000_BTI_V1TI, ~RS6000_BTI_INTTI, - RS6000_BTI_unsigned_long_long, 0 }, - { P9V_BUILTIN_VEC_LXVL, P9V_BUILTIN_LXVL, - RS6000_BTI_unsigned_V1TI, ~RS6000_BTI_UINTTI, - RS6000_BTI_unsigned_long_long, 0 }, - - { P9V_BUILTIN_VEC_LXVL, P9V_BUILTIN_LXVL, - RS6000_BTI_V2DI, ~RS6000_BTI_long_long, - RS6000_BTI_unsigned_long_long, 0 }, - { P9V_BUILTIN_VEC_LXVL, P9V_BUILTIN_LXVL, - RS6000_BTI_unsigned_V2DI, ~RS6000_BTI_unsigned_long_long, - RS6000_BTI_unsigned_long_long, 0 }, - - { P9V_BUILTIN_VEC_LXVL, P9V_BUILTIN_LXVL, - RS6000_BTI_V8HI, ~RS6000_BTI_INTHI, - RS6000_BTI_unsigned_long_long, 0 }, - { P9V_BUILTIN_VEC_LXVL, P9V_BUILTIN_LXVL, - RS6000_BTI_unsigned_V8HI, ~RS6000_BTI_UINTHI, - RS6000_BTI_unsigned_long_long, 0 }, - - { P9V_BUILTIN_VEC_LXVL, P9V_BUILTIN_LXVL, - RS6000_BTI_V2DF, ~RS6000_BTI_double, - RS6000_BTI_unsigned_long_long, 0 }, - { P9V_BUILTIN_VEC_LXVL, P9V_BUILTIN_LXVL, - RS6000_BTI_V4SF, ~RS6000_BTI_float, - RS6000_BTI_unsigned_long_long, 0 }, - /* At an appropriate future time, add support for the - RS6000_BTI_Float16 (exact name to be determined) type here. */ - - { P9V_BUILTIN_VEC_XST_LEN_R, P9V_BUILTIN_XST_LEN_R, - RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, - ~RS6000_BTI_UINTQI, RS6000_BTI_unsigned_long_long}, - - { P9V_BUILTIN_VEC_STXVL, P9V_BUILTIN_STXVL, - RS6000_BTI_void, RS6000_BTI_V16QI, ~RS6000_BTI_INTQI, - RS6000_BTI_unsigned_long_long }, - { P9V_BUILTIN_VEC_STXVL, P9V_BUILTIN_STXVL, - RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, ~RS6000_BTI_UINTQI, - RS6000_BTI_unsigned_long_long }, - - { P9V_BUILTIN_VEC_STXVL, P9V_BUILTIN_STXVL, - RS6000_BTI_void, RS6000_BTI_V4SI, ~RS6000_BTI_INTSI, - RS6000_BTI_unsigned_long_long }, - { P9V_BUILTIN_VEC_STXVL, P9V_BUILTIN_STXVL, - RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, ~RS6000_BTI_UINTSI, - RS6000_BTI_unsigned_long_long }, - - { P9V_BUILTIN_VEC_STXVL, P9V_BUILTIN_STXVL, - RS6000_BTI_void, RS6000_BTI_V1TI, ~RS6000_BTI_INTTI, - RS6000_BTI_unsigned_long_long }, - { P9V_BUILTIN_VEC_STXVL, P9V_BUILTIN_STXVL, - RS6000_BTI_void, RS6000_BTI_unsigned_V1TI, ~RS6000_BTI_UINTTI, - RS6000_BTI_unsigned_long_long }, - - { P9V_BUILTIN_VEC_STXVL, P9V_BUILTIN_STXVL, - RS6000_BTI_void, RS6000_BTI_V2DI, ~RS6000_BTI_long_long, - RS6000_BTI_unsigned_long_long }, - { P9V_BUILTIN_VEC_STXVL, P9V_BUILTIN_STXVL, - RS6000_BTI_void, RS6000_BTI_unsigned_V2DI, ~RS6000_BTI_unsigned_long_long, - RS6000_BTI_unsigned_long_long }, - - { P9V_BUILTIN_VEC_STXVL, P9V_BUILTIN_STXVL, - RS6000_BTI_void, RS6000_BTI_V8HI, ~RS6000_BTI_INTHI, - RS6000_BTI_unsigned_long_long }, - { P9V_BUILTIN_VEC_STXVL, P9V_BUILTIN_STXVL, - RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, ~RS6000_BTI_UINTHI, - RS6000_BTI_unsigned_long_long }, - - { P9V_BUILTIN_VEC_STXVL, P9V_BUILTIN_STXVL, - RS6000_BTI_void, RS6000_BTI_V2DF, ~RS6000_BTI_double, - RS6000_BTI_unsigned_long_long }, - { P9V_BUILTIN_VEC_STXVL, P9V_BUILTIN_STXVL, - RS6000_BTI_void, RS6000_BTI_V4SF, ~RS6000_BTI_float, - RS6000_BTI_unsigned_long_long }, - /* At an appropriate future time, add support for the - RS6000_BTI_Float16 (exact name to be determined) type here. */ - - { ALTIVEC_BUILTIN_VEC_CMPNE, P9V_BUILTIN_CMPNEB, - RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, - RS6000_BTI_bool_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_CMPNE, P9V_BUILTIN_CMPNEB, - RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, - RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_CMPNE, P9V_BUILTIN_CMPNEB, - RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, - RS6000_BTI_unsigned_V16QI, 0 }, - - { ALTIVEC_BUILTIN_VEC_CMPNE, P9V_BUILTIN_CMPNEH, - RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, - RS6000_BTI_bool_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_CMPNE, P9V_BUILTIN_CMPNEH, - RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, - RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_CMPNE, P9V_BUILTIN_CMPNEH, - RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, - RS6000_BTI_unsigned_V8HI, 0 }, - - { ALTIVEC_BUILTIN_VEC_CMPNE, P9V_BUILTIN_CMPNEW, - RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, - RS6000_BTI_bool_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_CMPNE, P9V_BUILTIN_CMPNEW, - RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, - RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_CMPNE, P9V_BUILTIN_CMPNEW, - RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, - RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_CMPNE, P10V_BUILTIN_CMPNET, - RS6000_BTI_bool_V1TI, RS6000_BTI_V1TI, - RS6000_BTI_V1TI, 0 }, - { ALTIVEC_BUILTIN_VEC_CMPNE, P10V_BUILTIN_CMPNET, - RS6000_BTI_bool_V1TI, RS6000_BTI_unsigned_V1TI, - RS6000_BTI_unsigned_V1TI, 0 }, - - /* The following 2 entries have been deprecated. */ - { P9V_BUILTIN_VEC_VCMPNE_P, P9V_BUILTIN_VCMPNEB_P, - RS6000_BTI_INTSI, RS6000_BTI_bool_V16QI, - RS6000_BTI_unsigned_V16QI, 0 }, - { P9V_BUILTIN_VEC_VCMPNE_P, P9V_BUILTIN_VCMPNEB_P, - RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI, - RS6000_BTI_bool_V16QI, 0 }, - { P9V_BUILTIN_VEC_VCMPNE_P, P9V_BUILTIN_VCMPNEB_P, - RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI, - RS6000_BTI_unsigned_V16QI, 0 }, - - /* The following 2 entries have been deprecated. */ - { P9V_BUILTIN_VEC_VCMPNE_P, P9V_BUILTIN_VCMPNEB_P, - RS6000_BTI_INTSI, RS6000_BTI_bool_V16QI, - RS6000_BTI_V16QI, 0 }, - { P9V_BUILTIN_VEC_VCMPNE_P, P9V_BUILTIN_VCMPNEB_P, - RS6000_BTI_INTSI, RS6000_BTI_V16QI, - RS6000_BTI_bool_V16QI, 0 }, - { P9V_BUILTIN_VEC_VCMPNE_P, P9V_BUILTIN_VCMPNEB_P, - RS6000_BTI_INTSI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, - { P9V_BUILTIN_VEC_VCMPNE_P, P9V_BUILTIN_VCMPNEB_P, - RS6000_BTI_INTSI, RS6000_BTI_bool_V16QI, - RS6000_BTI_bool_V16QI, 0 }, - - /* The following 2 entries have been deprecated. */ - { P9V_BUILTIN_VEC_VCMPNE_P, P9V_BUILTIN_VCMPNEH_P, - RS6000_BTI_INTSI, RS6000_BTI_bool_V8HI, - RS6000_BTI_unsigned_V8HI, 0 }, - { P9V_BUILTIN_VEC_VCMPNE_P, P9V_BUILTIN_VCMPNEH_P, - RS6000_BTI_INTSI, RS6000_BTI_unsigned_V8HI, - RS6000_BTI_bool_V8HI, 0 }, - { P9V_BUILTIN_VEC_VCMPNE_P, P9V_BUILTIN_VCMPNEH_P, - RS6000_BTI_INTSI, RS6000_BTI_unsigned_V8HI, - RS6000_BTI_unsigned_V8HI, 0 }, - { P9V_BUILTIN_VEC_VCMPNE_P, P9V_BUILTIN_VCMPNEH_P, - RS6000_BTI_INTSI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, - - /* The following 2 entries have been deprecated. */ - { P9V_BUILTIN_VEC_VCMPNE_P, P9V_BUILTIN_VCMPNEH_P, - RS6000_BTI_INTSI, RS6000_BTI_bool_V8HI, - RS6000_BTI_V8HI, 0 }, - { P9V_BUILTIN_VEC_VCMPNE_P, P9V_BUILTIN_VCMPNEH_P, - RS6000_BTI_INTSI, RS6000_BTI_V8HI, - RS6000_BTI_bool_V8HI, 0 }, - { P9V_BUILTIN_VEC_VCMPNE_P, P9V_BUILTIN_VCMPNEH_P, - RS6000_BTI_INTSI, RS6000_BTI_bool_V8HI, - RS6000_BTI_bool_V8HI, 0 }, - { P9V_BUILTIN_VEC_VCMPNE_P, P9V_BUILTIN_VCMPNEH_P, - RS6000_BTI_INTSI, RS6000_BTI_pixel_V8HI, - RS6000_BTI_pixel_V8HI, 0 }, - - /* The following 2 entries have been deprecated. */ - { P9V_BUILTIN_VEC_VCMPNE_P, P9V_BUILTIN_VCMPNEW_P, - RS6000_BTI_INTSI, RS6000_BTI_bool_V4SI, - RS6000_BTI_unsigned_V4SI, 0 }, - { P9V_BUILTIN_VEC_VCMPNE_P, P9V_BUILTIN_VCMPNEW_P, - RS6000_BTI_INTSI, RS6000_BTI_unsigned_V4SI, - RS6000_BTI_bool_V4SI, 0 }, - { P9V_BUILTIN_VEC_VCMPNE_P, P9V_BUILTIN_VCMPNEW_P, - RS6000_BTI_INTSI, RS6000_BTI_unsigned_V4SI, - RS6000_BTI_unsigned_V4SI, 0 }, - - /* The following 2 entries have been deprecated. */ - { P9V_BUILTIN_VEC_VCMPNE_P, P9V_BUILTIN_VCMPNEW_P, - RS6000_BTI_INTSI, RS6000_BTI_bool_V4SI, - RS6000_BTI_V4SI, 0 }, - { P9V_BUILTIN_VEC_VCMPNE_P, P9V_BUILTIN_VCMPNEW_P, - RS6000_BTI_INTSI, RS6000_BTI_V4SI, - RS6000_BTI_bool_V4SI, 0 }, - { P9V_BUILTIN_VEC_VCMPNE_P, P9V_BUILTIN_VCMPNEW_P, - RS6000_BTI_INTSI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, - { P9V_BUILTIN_VEC_VCMPNE_P, P9V_BUILTIN_VCMPNEW_P, - RS6000_BTI_INTSI, RS6000_BTI_bool_V4SI, - RS6000_BTI_bool_V4SI, 0 }, - - /* The following 2 entries have been deprecated. */ - { P9V_BUILTIN_VEC_VCMPNE_P, P9V_BUILTIN_VCMPNED_P, - RS6000_BTI_INTSI, RS6000_BTI_bool_V2DI, - RS6000_BTI_unsigned_V2DI, 0 }, - { P9V_BUILTIN_VEC_VCMPNE_P, P9V_BUILTIN_VCMPNED_P, - RS6000_BTI_INTSI, RS6000_BTI_unsigned_V2DI, - RS6000_BTI_bool_V2DI, 0 }, - { P9V_BUILTIN_VEC_VCMPNE_P, P9V_BUILTIN_VCMPNED_P, - RS6000_BTI_INTSI, RS6000_BTI_unsigned_V2DI, - RS6000_BTI_unsigned_V2DI, 0 - }, - - /* The following 2 entries have been deprecated. */ - { P9V_BUILTIN_VEC_VCMPNE_P, P9V_BUILTIN_VCMPNED_P, - RS6000_BTI_INTSI, RS6000_BTI_bool_V2DI, - RS6000_BTI_V2DI, 0 }, - { P9V_BUILTIN_VEC_VCMPNE_P, P9V_BUILTIN_VCMPNED_P, - RS6000_BTI_INTSI, RS6000_BTI_V2DI, - RS6000_BTI_bool_V2DI, 0 }, - { P9V_BUILTIN_VEC_VCMPNE_P, P9V_BUILTIN_VCMPNED_P, - RS6000_BTI_INTSI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, - { P9V_BUILTIN_VEC_VCMPNE_P, P9V_BUILTIN_VCMPNED_P, - RS6000_BTI_INTSI, RS6000_BTI_bool_V2DI, - RS6000_BTI_bool_V2DI, 0 }, - { P9V_BUILTIN_VEC_VCMPNE_P, P10V_BUILTIN_VCMPNET_P, - RS6000_BTI_INTSI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, 0 }, - { P9V_BUILTIN_VEC_VCMPNE_P, P10V_BUILTIN_VCMPNET_P, - RS6000_BTI_INTSI, RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, 0 }, - - { P9V_BUILTIN_VEC_VCMPNE_P, P9V_BUILTIN_VCMPNEFP_P, - RS6000_BTI_INTSI, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, - { P9V_BUILTIN_VEC_VCMPNE_P, P9V_BUILTIN_VCMPNEDP_P, - RS6000_BTI_INTSI, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 }, - - /* The following 2 entries have been deprecated. */ - { P9V_BUILTIN_VEC_VCMPAE_P, P9V_BUILTIN_VCMPAEB_P, - RS6000_BTI_INTSI, RS6000_BTI_bool_V16QI, - RS6000_BTI_unsigned_V16QI, 0 }, - { P9V_BUILTIN_VEC_VCMPAE_P, P9V_BUILTIN_VCMPAEB_P, - RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI, - RS6000_BTI_bool_V16QI, 0 }, - { P9V_BUILTIN_VEC_VCMPAE_P, P9V_BUILTIN_VCMPAEB_P, - RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI, - RS6000_BTI_unsigned_V16QI, 0 }, - - /* The following 2 entries have been deprecated. */ - { P9V_BUILTIN_VEC_VCMPAE_P, P9V_BUILTIN_VCMPAEB_P, - RS6000_BTI_INTSI, RS6000_BTI_bool_V16QI, - RS6000_BTI_V16QI, 0 }, - { P9V_BUILTIN_VEC_VCMPAE_P, P9V_BUILTIN_VCMPAEB_P, - RS6000_BTI_INTSI, RS6000_BTI_V16QI, - RS6000_BTI_bool_V16QI, 0 }, - { P9V_BUILTIN_VEC_VCMPAE_P, P9V_BUILTIN_VCMPAEB_P, - RS6000_BTI_INTSI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, - { P9V_BUILTIN_VEC_VCMPAE_P, P9V_BUILTIN_VCMPAEB_P, - RS6000_BTI_INTSI, RS6000_BTI_bool_V16QI, - RS6000_BTI_bool_V16QI, 0 }, - - /* The following 2 entries have been deprecated. */ - { P9V_BUILTIN_VEC_VCMPAE_P, P9V_BUILTIN_VCMPAEH_P, - RS6000_BTI_INTSI, RS6000_BTI_bool_V8HI, - RS6000_BTI_unsigned_V8HI, 0 }, - { P9V_BUILTIN_VEC_VCMPAE_P, P9V_BUILTIN_VCMPAEH_P, - RS6000_BTI_INTSI, RS6000_BTI_unsigned_V8HI, - RS6000_BTI_bool_V8HI, 0 }, - { P9V_BUILTIN_VEC_VCMPAE_P, P9V_BUILTIN_VCMPAEH_P, - RS6000_BTI_INTSI, RS6000_BTI_unsigned_V8HI, - RS6000_BTI_unsigned_V8HI, 0 }, - { P9V_BUILTIN_VEC_VCMPAE_P, P9V_BUILTIN_VCMPAEH_P, - RS6000_BTI_INTSI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, - - /* The following 2 entries have been deprecated. */ - { P9V_BUILTIN_VEC_VCMPAE_P, P9V_BUILTIN_VCMPAEH_P, - RS6000_BTI_INTSI, RS6000_BTI_bool_V8HI, - RS6000_BTI_V8HI, 0 }, - { P9V_BUILTIN_VEC_VCMPAE_P, P9V_BUILTIN_VCMPAEH_P, - RS6000_BTI_INTSI, RS6000_BTI_V8HI, - RS6000_BTI_bool_V8HI, 0 }, - { P9V_BUILTIN_VEC_VCMPAE_P, P9V_BUILTIN_VCMPAEH_P, - RS6000_BTI_INTSI, RS6000_BTI_bool_V8HI, - RS6000_BTI_bool_V8HI, 0 }, - { P9V_BUILTIN_VEC_VCMPAE_P, P9V_BUILTIN_VCMPAEH_P, - RS6000_BTI_INTSI, RS6000_BTI_pixel_V8HI, - RS6000_BTI_pixel_V8HI, 0 }, - - /* The following 2 entries have been deprecated. */ - { P9V_BUILTIN_VEC_VCMPAE_P, P9V_BUILTIN_VCMPAEW_P, - RS6000_BTI_INTSI, RS6000_BTI_bool_V4SI, - RS6000_BTI_unsigned_V4SI, 0 }, - { P9V_BUILTIN_VEC_VCMPAE_P, P9V_BUILTIN_VCMPAEW_P, - RS6000_BTI_INTSI, RS6000_BTI_unsigned_V4SI, - RS6000_BTI_bool_V4SI, 0 }, - { P9V_BUILTIN_VEC_VCMPAE_P, P9V_BUILTIN_VCMPAEW_P, - RS6000_BTI_INTSI, RS6000_BTI_unsigned_V4SI, - RS6000_BTI_unsigned_V4SI, 0 }, - - /* The following 2 entries have been deprecated. */ - { P9V_BUILTIN_VEC_VCMPAE_P, P9V_BUILTIN_VCMPAEW_P, - RS6000_BTI_INTSI, RS6000_BTI_bool_V4SI, - RS6000_BTI_V4SI, 0 }, - { P9V_BUILTIN_VEC_VCMPAE_P, P9V_BUILTIN_VCMPAEW_P, - RS6000_BTI_INTSI, RS6000_BTI_V4SI, - RS6000_BTI_bool_V4SI, 0 }, - { P9V_BUILTIN_VEC_VCMPAE_P, P9V_BUILTIN_VCMPAEW_P, - RS6000_BTI_INTSI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, - { P9V_BUILTIN_VEC_VCMPAE_P, P9V_BUILTIN_VCMPAEW_P, - RS6000_BTI_INTSI, RS6000_BTI_bool_V4SI, - RS6000_BTI_bool_V4SI, 0 }, - - /* The following 2 entries have been deprecated. */ - { P9V_BUILTIN_VEC_VCMPAE_P, P9V_BUILTIN_VCMPAED_P, - RS6000_BTI_INTSI, RS6000_BTI_bool_V2DI, - RS6000_BTI_unsigned_V2DI, 0 }, - { P9V_BUILTIN_VEC_VCMPAE_P, P9V_BUILTIN_VCMPAED_P, - RS6000_BTI_INTSI, RS6000_BTI_unsigned_V2DI, - RS6000_BTI_bool_V2DI, 0 }, - { P9V_BUILTIN_VEC_VCMPAE_P, P9V_BUILTIN_VCMPAED_P, - RS6000_BTI_INTSI, RS6000_BTI_unsigned_V2DI, - RS6000_BTI_unsigned_V2DI, 0 - }, - - /* The following 2 entries have been deprecated. */ - { P9V_BUILTIN_VEC_VCMPAE_P, P9V_BUILTIN_VCMPAED_P, - RS6000_BTI_INTSI, RS6000_BTI_bool_V2DI, - RS6000_BTI_V2DI, 0 }, - { P9V_BUILTIN_VEC_VCMPAE_P, P9V_BUILTIN_VCMPAED_P, - RS6000_BTI_INTSI, RS6000_BTI_V2DI, - RS6000_BTI_bool_V2DI, 0 }, - { P9V_BUILTIN_VEC_VCMPAE_P, P9V_BUILTIN_VCMPAED_P, - RS6000_BTI_INTSI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, - { P9V_BUILTIN_VEC_VCMPAE_P, P9V_BUILTIN_VCMPAED_P, - RS6000_BTI_INTSI, RS6000_BTI_bool_V2DI, - RS6000_BTI_bool_V2DI, 0 }, - { P9V_BUILTIN_VEC_VCMPAE_P, P10V_BUILTIN_VCMPAET_P, - RS6000_BTI_INTSI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, 0 }, - { P9V_BUILTIN_VEC_VCMPAE_P, P10V_BUILTIN_VCMPAET_P, - RS6000_BTI_INTSI, RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, 0 }, - { P9V_BUILTIN_VEC_VCMPAE_P, P9V_BUILTIN_VCMPAEFP_P, - RS6000_BTI_INTSI, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, - { P9V_BUILTIN_VEC_VCMPAE_P, P9V_BUILTIN_VCMPAEDP_P, - RS6000_BTI_INTSI, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 }, - - { P9V_BUILTIN_VEC_VCMPNEZ_P, P9V_BUILTIN_VCMPNEZB_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI, - RS6000_BTI_unsigned_V16QI }, - { P9V_BUILTIN_VEC_VCMPNEZ_P, P9V_BUILTIN_VCMPNEZB_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V16QI, RS6000_BTI_V16QI }, - - { P9V_BUILTIN_VEC_VCMPNEZ_P, P9V_BUILTIN_VCMPNEZH_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V8HI, - RS6000_BTI_unsigned_V8HI }, - { P9V_BUILTIN_VEC_VCMPNEZ_P, P9V_BUILTIN_VCMPNEZH_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V8HI, RS6000_BTI_V8HI }, - - { P9V_BUILTIN_VEC_VCMPNEZ_P, P9V_BUILTIN_VCMPNEZW_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V4SI, - RS6000_BTI_unsigned_V4SI }, - { P9V_BUILTIN_VEC_VCMPNEZ_P, P9V_BUILTIN_VCMPNEZW_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V4SI, RS6000_BTI_V4SI }, - - { P9V_BUILTIN_VEC_CMPNEZ, P9V_BUILTIN_CMPNEZB, - RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, - RS6000_BTI_V16QI, 0 }, - { P9V_BUILTIN_VEC_CMPNEZ, P9V_BUILTIN_CMPNEZB, - RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, - RS6000_BTI_unsigned_V16QI, 0 }, - - { P9V_BUILTIN_VEC_CMPNEZ, P9V_BUILTIN_CMPNEZH, - RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, - RS6000_BTI_V8HI, 0 }, - { P9V_BUILTIN_VEC_CMPNEZ, P9V_BUILTIN_CMPNEZH, - RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, - RS6000_BTI_unsigned_V8HI, 0 }, - - { P9V_BUILTIN_VEC_CMPNEZ, P9V_BUILTIN_CMPNEZW, - RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, - RS6000_BTI_V4SI, 0 }, - { P9V_BUILTIN_VEC_CMPNEZ, P9V_BUILTIN_CMPNEZW, - RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, - RS6000_BTI_unsigned_V4SI, 0 }, - - { P9V_BUILTIN_VEC_VCLZLSBB, P9V_BUILTIN_VCLZLSBB_V16QI, - RS6000_BTI_INTSI, RS6000_BTI_V16QI, 0, 0 }, - { P9V_BUILTIN_VEC_VCLZLSBB, P9V_BUILTIN_VCLZLSBB_V16QI, - RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI, 0, 0 }, - - { P9V_BUILTIN_VEC_VCTZLSBB, P9V_BUILTIN_VCTZLSBB_V16QI, - RS6000_BTI_INTSI, RS6000_BTI_V16QI, 0, 0 }, - { P9V_BUILTIN_VEC_VCTZLSBB, P9V_BUILTIN_VCTZLSBB_V16QI, - RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI, 0, 0 }, - { P9V_BUILTIN_VEC_VCTZLSBB, P9V_BUILTIN_VCTZLSBB_V8HI, - RS6000_BTI_INTSI, RS6000_BTI_V8HI, 0, 0 }, - { P9V_BUILTIN_VEC_VCTZLSBB, P9V_BUILTIN_VCTZLSBB_V4SI, - RS6000_BTI_INTSI, RS6000_BTI_V4SI, 0, 0 }, - - { P9V_BUILTIN_VEC_EXTRACT4B, P9V_BUILTIN_EXTRACT4B, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, 0 }, - - { P9V_BUILTIN_VEC_VEXTRACT_FP_FROM_SHORTH, P9V_BUILTIN_VEXTRACT_FP_FROM_SHORTH, - RS6000_BTI_V4SF, RS6000_BTI_unsigned_V8HI, 0, 0 }, - { P9V_BUILTIN_VEC_VEXTRACT_FP_FROM_SHORTL, P9V_BUILTIN_VEXTRACT_FP_FROM_SHORTL, - RS6000_BTI_V4SF, RS6000_BTI_unsigned_V8HI, 0, 0 }, - - { P9V_BUILTIN_VEC_VEXTULX, P9V_BUILTIN_VEXTUBLX, - RS6000_BTI_INTQI, RS6000_BTI_UINTSI, - RS6000_BTI_V16QI, 0 }, - { P9V_BUILTIN_VEC_VEXTULX, P9V_BUILTIN_VEXTUBLX, - RS6000_BTI_UINTQI, RS6000_BTI_UINTSI, - RS6000_BTI_unsigned_V16QI, 0 }, - - { P9V_BUILTIN_VEC_VEXTULX, P9V_BUILTIN_VEXTUHLX, - RS6000_BTI_INTHI, RS6000_BTI_UINTSI, - RS6000_BTI_V8HI, 0 }, - { P9V_BUILTIN_VEC_VEXTULX, P9V_BUILTIN_VEXTUHLX, - RS6000_BTI_UINTHI, RS6000_BTI_UINTSI, - RS6000_BTI_unsigned_V8HI, 0 }, - - { P9V_BUILTIN_VEC_VEXTULX, P9V_BUILTIN_VEXTUWLX, - RS6000_BTI_INTSI, RS6000_BTI_UINTSI, - RS6000_BTI_V4SI, 0 }, - { P9V_BUILTIN_VEC_VEXTULX, P9V_BUILTIN_VEXTUWLX, - RS6000_BTI_UINTSI, RS6000_BTI_UINTSI, - RS6000_BTI_unsigned_V4SI, 0 }, - { P9V_BUILTIN_VEC_VEXTULX, P9V_BUILTIN_VEXTUWLX, - RS6000_BTI_float, RS6000_BTI_UINTSI, - RS6000_BTI_V4SF, 0 }, - - { P9V_BUILTIN_VEC_VEXTURX, P9V_BUILTIN_VEXTUBRX, - RS6000_BTI_INTQI, RS6000_BTI_UINTSI, - RS6000_BTI_V16QI, 0 }, - { P9V_BUILTIN_VEC_VEXTURX, P9V_BUILTIN_VEXTUBRX, - RS6000_BTI_UINTQI, RS6000_BTI_UINTSI, - RS6000_BTI_unsigned_V16QI, 0 }, - - { P9V_BUILTIN_VEC_VEXTURX, P9V_BUILTIN_VEXTUHRX, - RS6000_BTI_INTHI, RS6000_BTI_UINTSI, - RS6000_BTI_V8HI, 0 }, - { P9V_BUILTIN_VEC_VEXTURX, P9V_BUILTIN_VEXTUHRX, - RS6000_BTI_UINTHI, RS6000_BTI_UINTSI, - RS6000_BTI_unsigned_V8HI, 0 }, - - { P9V_BUILTIN_VEC_VEXTURX, P9V_BUILTIN_VEXTUWRX, - RS6000_BTI_INTSI, RS6000_BTI_UINTSI, - RS6000_BTI_V4SI, 0 }, - { P9V_BUILTIN_VEC_VEXTURX, P9V_BUILTIN_VEXTUWRX, - RS6000_BTI_UINTSI, RS6000_BTI_UINTSI, - RS6000_BTI_unsigned_V4SI, 0 }, - { P9V_BUILTIN_VEC_VEXTURX, P9V_BUILTIN_VEXTUWRX, - RS6000_BTI_float, RS6000_BTI_UINTSI, - RS6000_BTI_V4SF, 0 }, - - { P8V_BUILTIN_VEC_VGBBD, P8V_BUILTIN_VGBBD, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0, 0 }, - { P8V_BUILTIN_VEC_VGBBD, P8V_BUILTIN_VGBBD, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0, 0 }, - - { P9V_BUILTIN_VEC_INSERT4B, P9V_BUILTIN_INSERT4B, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_V4SI, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI }, - { P9V_BUILTIN_VEC_INSERT4B, P9V_BUILTIN_INSERT4B, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V4SI, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI }, - - { P8V_BUILTIN_VEC_VADDECUQ, P8V_BUILTIN_VADDECUQ, - RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI }, - { P8V_BUILTIN_VEC_VADDECUQ, P8V_BUILTIN_VADDECUQ, - RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, - RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI }, - - { P8V_BUILTIN_VEC_VADDEUQM, P8V_BUILTIN_VADDEUQM, - RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI }, - { P8V_BUILTIN_VEC_VADDEUQM, P8V_BUILTIN_VADDEUQM, - RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, - RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI }, - - { P8V_BUILTIN_VEC_VSUBECUQ, P8V_BUILTIN_VSUBECUQ, - RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI }, - { P8V_BUILTIN_VEC_VSUBECUQ, P8V_BUILTIN_VSUBECUQ, - RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, - RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI }, - - { P8V_BUILTIN_VEC_VSUBEUQM, P8V_BUILTIN_VSUBEUQM, - RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI }, - { P8V_BUILTIN_VEC_VSUBEUQM, P8V_BUILTIN_VSUBEUQM, - RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, - RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI }, - - { P8V_BUILTIN_VEC_VMINSD, P8V_BUILTIN_VMINSD, - RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, 0 }, - { P8V_BUILTIN_VEC_VMINSD, P8V_BUILTIN_VMINSD, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, 0 }, - { P8V_BUILTIN_VEC_VMINSD, P8V_BUILTIN_VMINSD, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, - - { P8V_BUILTIN_VEC_VMAXSD, P8V_BUILTIN_VMAXSD, - RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, 0 }, - { P8V_BUILTIN_VEC_VMAXSD, P8V_BUILTIN_VMAXSD, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, 0 }, - { P8V_BUILTIN_VEC_VMAXSD, P8V_BUILTIN_VMAXSD, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, - - { P8V_BUILTIN_VEC_VMINUD, P8V_BUILTIN_VMINUD, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, - RS6000_BTI_unsigned_V2DI, 0 }, - { P8V_BUILTIN_VEC_VMINUD, P8V_BUILTIN_VMINUD, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, - RS6000_BTI_bool_V2DI, 0 }, - { P8V_BUILTIN_VEC_VMINUD, P8V_BUILTIN_VMINUD, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, - RS6000_BTI_unsigned_V2DI, 0 }, - - { P8V_BUILTIN_VEC_VMAXUD, P8V_BUILTIN_VMAXUD, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, - RS6000_BTI_unsigned_V2DI, 0 }, - { P8V_BUILTIN_VEC_VMAXUD, P8V_BUILTIN_VMAXUD, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, - RS6000_BTI_bool_V2DI, 0 }, - { P8V_BUILTIN_VEC_VMAXUD, P8V_BUILTIN_VMAXUD, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, - RS6000_BTI_unsigned_V2DI, 0 }, - - { P8V_BUILTIN_VEC_VMRGEW, P8V_BUILTIN_VMRGEW_V2DI, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, - { P8V_BUILTIN_VEC_VMRGEW, P8V_BUILTIN_VMRGEW_V2DI, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, - RS6000_BTI_unsigned_V2DI, 0 }, - { P8V_BUILTIN_VEC_VMRGEW, P8V_BUILTIN_VMRGEW_V2DI, - RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, 0 }, - { P8V_BUILTIN_VEC_VMRGEW, P8V_BUILTIN_VMRGEW_V4SF, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, - { P8V_BUILTIN_VEC_VMRGEW, P8V_BUILTIN_VMRGEW_V2DF, - RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 }, - { P8V_BUILTIN_VEC_VMRGEW, P8V_BUILTIN_VMRGEW_V4SI, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, - { P8V_BUILTIN_VEC_VMRGEW, P8V_BUILTIN_VMRGEW_V4SI, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, - RS6000_BTI_unsigned_V4SI, 0 }, - { P8V_BUILTIN_VEC_VMRGEW, P8V_BUILTIN_VMRGEW_V4SI, - RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, 0 }, - - { P8V_BUILTIN_VEC_VMRGOW, P8V_BUILTIN_VMRGOW_V4SI, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, - { P8V_BUILTIN_VEC_VMRGOW, P8V_BUILTIN_VMRGOW_V4SI, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, - RS6000_BTI_unsigned_V4SI, 0 }, - { P8V_BUILTIN_VEC_VMRGOW, P8V_BUILTIN_VMRGOW_V4SI, - RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, 0 }, - { P8V_BUILTIN_VEC_VMRGOW, P8V_BUILTIN_VMRGOW_V2DI, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, - { P8V_BUILTIN_VEC_VMRGOW, P8V_BUILTIN_VMRGOW_V2DI, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, - RS6000_BTI_unsigned_V2DI, 0 }, - { P8V_BUILTIN_VEC_VMRGOW, P8V_BUILTIN_VMRGOW_V2DI, - RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, 0 }, - { P8V_BUILTIN_VEC_VMRGOW, P8V_BUILTIN_VMRGOW_V2DF, - RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 }, - { P8V_BUILTIN_VEC_VMRGOW, P8V_BUILTIN_VMRGOW_V4SF, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, - - { P8V_BUILTIN_VEC_VPMSUM, P8V_BUILTIN_VPMSUMB, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V16QI, - RS6000_BTI_unsigned_V16QI, 0 }, - { P8V_BUILTIN_VEC_VPMSUM, P8V_BUILTIN_VPMSUMH, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V8HI, - RS6000_BTI_unsigned_V8HI, 0 }, - { P8V_BUILTIN_VEC_VPMSUM, P8V_BUILTIN_VPMSUMW, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V4SI, - RS6000_BTI_unsigned_V4SI, 0 }, - { P8V_BUILTIN_VEC_VPMSUM, P8V_BUILTIN_VPMSUMD, - RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V2DI, - RS6000_BTI_unsigned_V2DI, 0 }, - - { P8V_BUILTIN_VEC_VPOPCNT, P8V_BUILTIN_VPOPCNTB, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0, 0 }, - { P8V_BUILTIN_VEC_VPOPCNT, P8V_BUILTIN_VPOPCNTB, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0, 0 }, - { P8V_BUILTIN_VEC_VPOPCNT, P8V_BUILTIN_VPOPCNTH, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0, 0 }, - { P8V_BUILTIN_VEC_VPOPCNT, P8V_BUILTIN_VPOPCNTH, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0, 0 }, - { P8V_BUILTIN_VEC_VPOPCNT, P8V_BUILTIN_VPOPCNTW, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0, 0 }, - { P8V_BUILTIN_VEC_VPOPCNT, P8V_BUILTIN_VPOPCNTW, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0, 0 }, - { P8V_BUILTIN_VEC_VPOPCNT, P8V_BUILTIN_VPOPCNTD, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0, 0 }, - { P8V_BUILTIN_VEC_VPOPCNT, P8V_BUILTIN_VPOPCNTD, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0, 0 }, - - { P8V_BUILTIN_VEC_VPOPCNTB, P8V_BUILTIN_VPOPCNTB, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0, 0 }, - { P8V_BUILTIN_VEC_VPOPCNTB, P8V_BUILTIN_VPOPCNTB, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0, 0 }, - - { P8V_BUILTIN_VEC_VPOPCNTU, P8V_BUILTIN_VPOPCNTUB, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_V16QI, 0, 0 }, - { P8V_BUILTIN_VEC_VPOPCNTU, P8V_BUILTIN_VPOPCNTUB, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0, 0 }, - - { P8V_BUILTIN_VEC_VPOPCNTU, P8V_BUILTIN_VPOPCNTUH, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_V8HI, 0, 0 }, - { P8V_BUILTIN_VEC_VPOPCNTU, P8V_BUILTIN_VPOPCNTUH, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0, 0 }, - - { P8V_BUILTIN_VEC_VPOPCNTU, P8V_BUILTIN_VPOPCNTUW, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_V4SI, 0, 0 }, - { P8V_BUILTIN_VEC_VPOPCNTU, P8V_BUILTIN_VPOPCNTUW, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0, 0 }, - - { P8V_BUILTIN_VEC_VPOPCNTU, P8V_BUILTIN_VPOPCNTUD, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_V2DI, 0, 0 }, - { P8V_BUILTIN_VEC_VPOPCNTU, P8V_BUILTIN_VPOPCNTUD, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0, 0 }, - - { P8V_BUILTIN_VEC_VPOPCNTH, P8V_BUILTIN_VPOPCNTH, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0, 0 }, - { P8V_BUILTIN_VEC_VPOPCNTH, P8V_BUILTIN_VPOPCNTH, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0, 0 }, - - { P8V_BUILTIN_VEC_VPOPCNTW, P8V_BUILTIN_VPOPCNTW, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0, 0 }, - { P8V_BUILTIN_VEC_VPOPCNTW, P8V_BUILTIN_VPOPCNTW, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0, 0 }, - - { P8V_BUILTIN_VEC_VPOPCNTD, P8V_BUILTIN_VPOPCNTD, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0, 0 }, - { P8V_BUILTIN_VEC_VPOPCNTD, P8V_BUILTIN_VPOPCNTD, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0, 0 }, - - { P9V_BUILTIN_VEC_VPRTYB, P9V_BUILTIN_VPRTYBW, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0, 0 }, - { P9V_BUILTIN_VEC_VPRTYB, P9V_BUILTIN_VPRTYBW, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0, 0 }, - { P9V_BUILTIN_VEC_VPRTYB, P9V_BUILTIN_VPRTYBD, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0, 0 }, - { P9V_BUILTIN_VEC_VPRTYB, P9V_BUILTIN_VPRTYBD, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0, 0 }, - { P9V_BUILTIN_VEC_VPRTYB, P9V_BUILTIN_VPRTYBQ, - RS6000_BTI_V1TI, RS6000_BTI_V1TI, 0, 0 }, - { P9V_BUILTIN_VEC_VPRTYB, P9V_BUILTIN_VPRTYBQ, - RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, 0, 0 }, - { P9V_BUILTIN_VEC_VPRTYB, P9V_BUILTIN_VPRTYBQ, - RS6000_BTI_INTTI, RS6000_BTI_INTTI, 0, 0 }, - { P9V_BUILTIN_VEC_VPRTYB, P9V_BUILTIN_VPRTYBQ, - RS6000_BTI_UINTTI, RS6000_BTI_UINTTI, 0, 0 }, - - { P9V_BUILTIN_VEC_VPRTYBW, P9V_BUILTIN_VPRTYBW, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0, 0 }, - { P9V_BUILTIN_VEC_VPRTYBW, P9V_BUILTIN_VPRTYBW, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0, 0 }, - - { P9V_BUILTIN_VEC_VPRTYBD, P9V_BUILTIN_VPRTYBD, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0, 0 }, - { P9V_BUILTIN_VEC_VPRTYBD, P9V_BUILTIN_VPRTYBD, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0, 0 }, - - { P9V_BUILTIN_VEC_VPRTYBQ, P9V_BUILTIN_VPRTYBQ, - RS6000_BTI_V1TI, RS6000_BTI_V1TI, 0, 0 }, - { P9V_BUILTIN_VEC_VPRTYBQ, P9V_BUILTIN_VPRTYBQ, - RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, 0, 0 }, - { P9V_BUILTIN_VEC_VPRTYBQ, P9V_BUILTIN_VPRTYBQ, - RS6000_BTI_INTTI, RS6000_BTI_INTTI, 0, 0 }, - { P9V_BUILTIN_VEC_VPRTYBQ, P9V_BUILTIN_VPRTYBQ, - RS6000_BTI_UINTTI, RS6000_BTI_UINTTI, 0, 0 }, - - { P9V_BUILTIN_VEC_VPARITY_LSBB, P9V_BUILTIN_VPRTYBW, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_V4SI, 0, 0 }, - { P9V_BUILTIN_VEC_VPARITY_LSBB, P9V_BUILTIN_VPRTYBW, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0, 0 }, - { P9V_BUILTIN_VEC_VPARITY_LSBB, P9V_BUILTIN_VPRTYBD, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_V2DI, 0, 0 }, - { P9V_BUILTIN_VEC_VPARITY_LSBB, P9V_BUILTIN_VPRTYBD, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0, 0 }, - { P9V_BUILTIN_VEC_VPARITY_LSBB, P9V_BUILTIN_VPRTYBQ, - RS6000_BTI_unsigned_V1TI, RS6000_BTI_V1TI, 0, 0 }, - { P9V_BUILTIN_VEC_VPARITY_LSBB, P9V_BUILTIN_VPRTYBQ, - RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, 0, 0 }, - - { P9_BUILTIN_CMPRB, P9_BUILTIN_SCALAR_CMPRB, - RS6000_BTI_INTSI, RS6000_BTI_UINTQI, RS6000_BTI_UINTSI, 0 }, - { P9_BUILTIN_CMPRB2, P9_BUILTIN_SCALAR_CMPRB2, - RS6000_BTI_INTSI, RS6000_BTI_UINTQI, RS6000_BTI_UINTSI, 0 }, - { P9_BUILTIN_CMPEQB, P9_BUILTIN_SCALAR_CMPEQB, - RS6000_BTI_INTSI, RS6000_BTI_UINTQI, RS6000_BTI_UINTDI, 0 }, - - { P8V_BUILTIN_VEC_VPKUDUM, P8V_BUILTIN_VPKUDUM, - RS6000_BTI_V4SI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, - { P8V_BUILTIN_VEC_VPKUDUM, P8V_BUILTIN_VPKUDUM, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, - { P8V_BUILTIN_VEC_VPKUDUM, P8V_BUILTIN_VPKUDUM, - RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, 0 }, - - { P8V_BUILTIN_VEC_VPKSDSS, P8V_BUILTIN_VPKSDSS, - RS6000_BTI_V4SI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, - - { P8V_BUILTIN_VEC_VPKUDUS, P8V_BUILTIN_VPKUDUS, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, - - { P8V_BUILTIN_VEC_VPKSDUS, P8V_BUILTIN_VPKSDUS, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, - - { P8V_BUILTIN_VEC_VRLD, P8V_BUILTIN_VRLD, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, - { P8V_BUILTIN_VEC_VRLD, P8V_BUILTIN_VRLD, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, - - { P8V_BUILTIN_VEC_VSLD, P8V_BUILTIN_VSLD, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, - { P8V_BUILTIN_VEC_VSLD, P8V_BUILTIN_VSLD, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, - - { P8V_BUILTIN_VEC_VSRD, P8V_BUILTIN_VSRD, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, - { P8V_BUILTIN_VEC_VSRD, P8V_BUILTIN_VSRD, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, - - { P8V_BUILTIN_VEC_VSRAD, P8V_BUILTIN_VSRAD, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, - { P8V_BUILTIN_VEC_VSRAD, P8V_BUILTIN_VSRAD, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, - - { P8V_BUILTIN_VEC_VSUBCUQ, P8V_BUILTIN_VSUBCUQ, - RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, 0 }, - { P8V_BUILTIN_VEC_VSUBCUQ, P8V_BUILTIN_VSUBCUQ, - RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, - RS6000_BTI_unsigned_V1TI, 0 }, - - { P8V_BUILTIN_VEC_VSUBUDM, P8V_BUILTIN_VSUBUDM, - RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, 0 }, - { P8V_BUILTIN_VEC_VSUBUDM, P8V_BUILTIN_VSUBUDM, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, 0 }, - { P8V_BUILTIN_VEC_VSUBUDM, P8V_BUILTIN_VSUBUDM, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, - { P8V_BUILTIN_VEC_VSUBUDM, P8V_BUILTIN_VSUBUDM, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, - { P8V_BUILTIN_VEC_VSUBUDM, P8V_BUILTIN_VSUBUDM, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, 0 }, - { P8V_BUILTIN_VEC_VSUBUDM, P8V_BUILTIN_VSUBUDM, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, - - { P8V_BUILTIN_VEC_VSUBUQM, P8V_BUILTIN_VSUBUQM, - RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, 0 }, - { P8V_BUILTIN_VEC_VSUBUQM, P8V_BUILTIN_VSUBUQM, - RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, - RS6000_BTI_unsigned_V1TI, 0 }, - - { P6_OV_BUILTIN_CMPB, P6_BUILTIN_CMPB_32, - RS6000_BTI_UINTSI, RS6000_BTI_UINTSI, RS6000_BTI_UINTSI, 0 }, - { P6_OV_BUILTIN_CMPB, P6_BUILTIN_CMPB, - RS6000_BTI_UINTDI, RS6000_BTI_UINTDI, RS6000_BTI_UINTDI, 0 }, - - { P8V_BUILTIN_VEC_VUPKHSW, P8V_BUILTIN_VUPKHSW, - RS6000_BTI_V2DI, RS6000_BTI_V4SI, 0, 0 }, - { P8V_BUILTIN_VEC_VUPKHSW, P8V_BUILTIN_VUPKHSW, - RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V4SI, 0, 0 }, - - { P8V_BUILTIN_VEC_VUPKLSW, P8V_BUILTIN_VUPKLSW, - RS6000_BTI_V2DI, RS6000_BTI_V4SI, 0, 0 }, - { P8V_BUILTIN_VEC_VUPKLSW, P8V_BUILTIN_VUPKLSW, - RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V4SI, 0, 0 }, - - { P9V_BUILTIN_VEC_VSLV, P9V_BUILTIN_VSLV, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, - RS6000_BTI_unsigned_V16QI, 0 }, - { P9V_BUILTIN_VEC_VSRV, P9V_BUILTIN_VSRV, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, - RS6000_BTI_unsigned_V16QI, 0 }, - - { P8V_BUILTIN_VEC_REVB, P8V_BUILTIN_REVB_V1TI, - RS6000_BTI_V1TI, RS6000_BTI_V1TI, 0, 0 }, - { P8V_BUILTIN_VEC_REVB, P8V_BUILTIN_REVB_V1TI, - RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, 0, 0 }, - { P8V_BUILTIN_VEC_REVB, P8V_BUILTIN_REVB_V2DI, - RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, 0, 0 }, - { P8V_BUILTIN_VEC_REVB, P8V_BUILTIN_REVB_V2DI, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0, 0 }, - { P8V_BUILTIN_VEC_REVB, P8V_BUILTIN_REVB_V2DI, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0, 0 }, - { P8V_BUILTIN_VEC_REVB, P8V_BUILTIN_REVB_V4SI, - RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, 0, 0 }, - { P8V_BUILTIN_VEC_REVB, P8V_BUILTIN_REVB_V4SI, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0, 0 }, - { P8V_BUILTIN_VEC_REVB, P8V_BUILTIN_REVB_V4SI, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0, 0 }, - { P8V_BUILTIN_VEC_REVB, P8V_BUILTIN_REVB_V8HI, - RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, 0, 0 }, - { P8V_BUILTIN_VEC_REVB, P8V_BUILTIN_REVB_V8HI, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0, 0 }, - { P8V_BUILTIN_VEC_REVB, P8V_BUILTIN_REVB_V8HI, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0, 0 }, - { P8V_BUILTIN_VEC_REVB, P8V_BUILTIN_REVB_V16QI, - RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, 0, 0 }, - { P8V_BUILTIN_VEC_REVB, P8V_BUILTIN_REVB_V16QI, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0, 0 }, - { P8V_BUILTIN_VEC_REVB, P8V_BUILTIN_REVB_V16QI, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0, 0 }, - { P8V_BUILTIN_VEC_REVB, P8V_BUILTIN_REVB_V2DF, - RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0, 0 }, - { P8V_BUILTIN_VEC_REVB, P8V_BUILTIN_REVB_V4SF, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0, 0 }, - - { ALTIVEC_BUILTIN_VEC_VREVE, ALTIVEC_BUILTIN_VREVE_V2DI, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_VREVE, ALTIVEC_BUILTIN_VREVE_V4SI, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_VREVE, ALTIVEC_BUILTIN_VREVE_V8HI, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_VREVE, ALTIVEC_BUILTIN_VREVE_V16QI, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_VREVE, ALTIVEC_BUILTIN_VREVE_V2DI, - RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_VREVE, ALTIVEC_BUILTIN_VREVE_V4SI, - RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_VREVE, ALTIVEC_BUILTIN_VREVE_V8HI, - RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_VREVE, ALTIVEC_BUILTIN_VREVE_V16QI, - RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_VREVE, ALTIVEC_BUILTIN_VREVE_V2DF, - RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_VREVE, ALTIVEC_BUILTIN_VREVE_V4SF, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_VREVE, ALTIVEC_BUILTIN_VREVE_V2DI, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_VREVE, ALTIVEC_BUILTIN_VREVE_V4SI, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_VREVE, ALTIVEC_BUILTIN_VREVE_V8HI, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_VREVE, ALTIVEC_BUILTIN_VREVE_V16QI, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0, 0 }, - - { VSX_BUILTIN_VEC_VSIGNED, VSX_BUILTIN_VEC_VSIGNED_V4SF, - RS6000_BTI_V4SI, RS6000_BTI_V4SF, 0, 0 }, - { VSX_BUILTIN_VEC_VSIGNED, VSX_BUILTIN_VEC_VSIGNED_V2DF, - RS6000_BTI_V2DI, RS6000_BTI_V2DF, 0, 0 }, - { VSX_BUILTIN_VEC_VSIGNEDE, VSX_BUILTIN_VEC_VSIGNEDE_V2DF, - RS6000_BTI_V4SI, RS6000_BTI_V2DF, 0, 0 }, - { VSX_BUILTIN_VEC_VSIGNEDO, VSX_BUILTIN_VEC_VSIGNEDO_V2DF, - RS6000_BTI_V4SI, RS6000_BTI_V2DF, 0, 0 }, - { P8V_BUILTIN_VEC_VSIGNED2, P8V_BUILTIN_VEC_VSIGNED2_V2DF, - RS6000_BTI_V4SI, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 }, - - { VSX_BUILTIN_VEC_VUNSIGNED, VSX_BUILTIN_VEC_VUNSIGNED_V4SF, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_V4SF, 0, 0 }, - { VSX_BUILTIN_VEC_VUNSIGNED, VSX_BUILTIN_VEC_VUNSIGNED_V2DF, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_V2DF, 0, 0 }, - { VSX_BUILTIN_VEC_VUNSIGNEDE, VSX_BUILTIN_VEC_VUNSIGNEDE_V2DF, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_V2DF, 0, 0 }, - { VSX_BUILTIN_VEC_VUNSIGNEDO, VSX_BUILTIN_VEC_VUNSIGNEDO_V2DF, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_V2DF, 0, 0 }, - { P8V_BUILTIN_VEC_VUNSIGNED2, P8V_BUILTIN_VEC_VUNSIGNED2_V2DF, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_V2DF, - RS6000_BTI_V2DF, 0 }, - - /* Crypto builtins. */ - { CRYPTO_BUILTIN_VPERMXOR, CRYPTO_BUILTIN_VPERMXOR_V16QI, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI }, - { CRYPTO_BUILTIN_VPERMXOR, CRYPTO_BUILTIN_VPERMXOR_V8HI, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI }, - { CRYPTO_BUILTIN_VPERMXOR, CRYPTO_BUILTIN_VPERMXOR_V4SI, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI }, - { CRYPTO_BUILTIN_VPERMXOR, CRYPTO_BUILTIN_VPERMXOR_V2DI, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI }, - - { CRYPTO_BUILTIN_VPMSUM, CRYPTO_BUILTIN_VPMSUMB, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, - RS6000_BTI_unsigned_V16QI, 0 }, - { CRYPTO_BUILTIN_VPMSUM, CRYPTO_BUILTIN_VPMSUMH, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, - RS6000_BTI_unsigned_V8HI, 0 }, - { CRYPTO_BUILTIN_VPMSUM, CRYPTO_BUILTIN_VPMSUMW, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, - RS6000_BTI_unsigned_V4SI, 0 }, - { CRYPTO_BUILTIN_VPMSUM, CRYPTO_BUILTIN_VPMSUMD, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, - RS6000_BTI_unsigned_V2DI, 0 }, - - { CRYPTO_BUILTIN_VSHASIGMA, CRYPTO_BUILTIN_VSHASIGMAW, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, - RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { CRYPTO_BUILTIN_VSHASIGMA, CRYPTO_BUILTIN_VSHASIGMAD, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, - RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - - /* Sign extend builtins that work work on ISA 3.0, not added until ISA 3.1 */ - { P9V_BUILTIN_VEC_VSIGNEXTI, P9V_BUILTIN_VSIGNEXTSB2W, - RS6000_BTI_V4SI, RS6000_BTI_V16QI, 0, 0 }, - { P9V_BUILTIN_VEC_VSIGNEXTI, P9V_BUILTIN_VSIGNEXTSH2W, - RS6000_BTI_V4SI, RS6000_BTI_V8HI, 0, 0 }, - - { P9V_BUILTIN_VEC_VSIGNEXTLL, P9V_BUILTIN_VSIGNEXTSB2D, - RS6000_BTI_V2DI, RS6000_BTI_V16QI, 0, 0 }, - { P9V_BUILTIN_VEC_VSIGNEXTLL, P9V_BUILTIN_VSIGNEXTSH2D, - RS6000_BTI_V2DI, RS6000_BTI_V8HI, 0, 0 }, - { P9V_BUILTIN_VEC_VSIGNEXTLL, P9V_BUILTIN_VSIGNEXTSW2D, - RS6000_BTI_V2DI, RS6000_BTI_V4SI, 0, 0 }, - - /* Overloaded built-in functions for ISA3.1 (power10). */ - { P10_BUILTIN_VEC_CLRL, P10V_BUILTIN_VCLRLB, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_UINTSI, 0 }, - { P10_BUILTIN_VEC_CLRL, P10V_BUILTIN_VCLRLB, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, - RS6000_BTI_UINTSI, 0 }, - { P10_BUILTIN_VEC_CLRR, P10V_BUILTIN_VCLRRB, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_UINTSI, 0 }, - { P10_BUILTIN_VEC_CLRR, P10V_BUILTIN_VCLRRB, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, - RS6000_BTI_UINTSI, 0 }, - - { P10_BUILTIN_VEC_GNB, P10V_BUILTIN_VGNB, RS6000_BTI_unsigned_long_long, - RS6000_BTI_unsigned_V1TI, RS6000_BTI_UINTQI, 0 }, - { P10_BUILTIN_VEC_XXGENPCVM, P10V_BUILTIN_XXGENPCVM_V2DI, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_INTSI, 0 }, - { P10_BUILTIN_VEC_XXGENPCVM, P10V_BUILTIN_XXGENPCVM_V4SI, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, 0 }, - { P10_BUILTIN_VEC_XXGENPCVM, P10V_BUILTIN_XXGENPCVM_V8HI, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, 0 }, - { P10_BUILTIN_VEC_XXGENPCVM, P10V_BUILTIN_XXGENPCVM_V16QI, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, - RS6000_BTI_INTSI, 0 }, - - /* The overloaded XXEVAL definitions are handled specially because the - fourth unsigned char operand is not encoded in this table. */ - { P10_BUILTIN_VEC_XXEVAL, P10V_BUILTIN_XXEVAL, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI }, - { P10_BUILTIN_VEC_XXEVAL, P10V_BUILTIN_XXEVAL, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI }, - { P10_BUILTIN_VEC_XXEVAL, P10V_BUILTIN_XXEVAL, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI }, - { P10_BUILTIN_VEC_XXEVAL, P10V_BUILTIN_XXEVAL, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI }, - { P10_BUILTIN_VEC_XXEVAL, P10V_BUILTIN_XXEVAL, - RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, - RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI }, - - /* The overloaded XXPERMX definitions are handled specially because the - fourth unsigned char operand is not encoded in this table. */ - { P10_BUILTIN_VEC_XXPERMX, P10V_BUILTIN_VXXPERMX, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, - RS6000_BTI_unsigned_V16QI }, - { P10_BUILTIN_VEC_XXPERMX, P10V_BUILTIN_VXXPERMX, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI }, - { P10_BUILTIN_VEC_XXPERMX, P10V_BUILTIN_VXXPERMX, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, - RS6000_BTI_unsigned_V16QI }, - { P10_BUILTIN_VEC_XXPERMX, P10V_BUILTIN_VXXPERMX, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V16QI }, - { P10_BUILTIN_VEC_XXPERMX, P10V_BUILTIN_VXXPERMX, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, - RS6000_BTI_unsigned_V16QI }, - { P10_BUILTIN_VEC_XXPERMX, P10V_BUILTIN_VXXPERMX, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V16QI }, - { P10_BUILTIN_VEC_XXPERMX, P10V_BUILTIN_VXXPERMX, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, - RS6000_BTI_unsigned_V16QI }, - { P10_BUILTIN_VEC_XXPERMX, P10V_BUILTIN_VXXPERMX, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V16QI }, - { P10_BUILTIN_VEC_XXPERMX, P10V_BUILTIN_VXXPERMX, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, - RS6000_BTI_unsigned_V16QI }, - { P10_BUILTIN_VEC_XXPERMX, P10V_BUILTIN_VXXPERMX, - RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, - RS6000_BTI_unsigned_V16QI }, - - { P10_BUILTIN_VEC_EXTRACTL, P10V_BUILTIN_VEXTRACTBL, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V16QI, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_UINTQI }, - { P10_BUILTIN_VEC_EXTRACTL, P10V_BUILTIN_VEXTRACTHL, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V8HI, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_UINTQI }, - { P10_BUILTIN_VEC_EXTRACTL, P10V_BUILTIN_VEXTRACTWL, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V4SI, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_UINTQI }, - { P10_BUILTIN_VEC_EXTRACTL, P10V_BUILTIN_VEXTRACTDL, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_UINTQI }, - - { P10_BUILTIN_VEC_INSERTL, P10V_BUILTIN_VINSERTGPRBL, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_UINTQI, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_UINTSI }, - { P10_BUILTIN_VEC_INSERTL, P10V_BUILTIN_VINSERTGPRHL, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_UINTHI, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_UINTSI }, - { P10_BUILTIN_VEC_INSERTL, P10V_BUILTIN_VINSERTGPRWL, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_UINTSI, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_UINTSI }, - { P10_BUILTIN_VEC_INSERTL, P10V_BUILTIN_VINSERTGPRDL, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_UINTDI, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_UINTSI }, - { P10_BUILTIN_VEC_INSERTL, P10V_BUILTIN_VINSERTVPRBL, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_UINTQI }, - { P10_BUILTIN_VEC_INSERTL, P10V_BUILTIN_VINSERTVPRHL, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_UINTQI }, - { P10_BUILTIN_VEC_INSERTL, P10V_BUILTIN_VINSERTVPRWL, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_UINTQI }, - - { P10_BUILTIN_VEC_EXTRACTH, P10V_BUILTIN_VEXTRACTBR, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V16QI, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_UINTQI }, - { P10_BUILTIN_VEC_EXTRACTH, P10V_BUILTIN_VEXTRACTHR, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V8HI, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_UINTQI }, - { P10_BUILTIN_VEC_EXTRACTH, P10V_BUILTIN_VEXTRACTWR, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V4SI, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_UINTQI }, - { P10_BUILTIN_VEC_EXTRACTH, P10V_BUILTIN_VEXTRACTDR, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_UINTQI }, - - { P10_BUILTIN_VEC_INSERTH, P10V_BUILTIN_VINSERTGPRBR, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_UINTQI, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_UINTSI }, - { P10_BUILTIN_VEC_INSERTH, P10V_BUILTIN_VINSERTGPRHR, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_UINTHI, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_UINTSI }, - { P10_BUILTIN_VEC_INSERTH, P10V_BUILTIN_VINSERTGPRWR, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_UINTSI, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_UINTSI }, - { P10_BUILTIN_VEC_INSERTH, P10V_BUILTIN_VINSERTGPRDR, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_UINTDI, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_UINTSI }, - { P10_BUILTIN_VEC_INSERTH, P10V_BUILTIN_VINSERTVPRBR, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_UINTQI }, - { P10_BUILTIN_VEC_INSERTH, P10V_BUILTIN_VINSERTVPRHR, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_UINTQI }, - { P10_BUILTIN_VEC_INSERTH, P10V_BUILTIN_VINSERTVPRWR, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_UINTQI }, - - { P10_BUILTIN_VEC_REPLACE_ELT, P10V_BUILTIN_VREPLACE_ELT_UV4SI, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, - RS6000_BTI_UINTSI, RS6000_BTI_UINTQI }, - { P10_BUILTIN_VEC_REPLACE_ELT, P10V_BUILTIN_VREPLACE_ELT_V4SI, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_INTSI, RS6000_BTI_INTQI }, - { P10_BUILTIN_VEC_REPLACE_ELT, P10V_BUILTIN_VREPLACE_ELT_V4SF, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_float, RS6000_BTI_INTQI }, - { P10_BUILTIN_VEC_REPLACE_ELT, P10V_BUILTIN_VREPLACE_ELT_UV2DI, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, - RS6000_BTI_UINTDI, RS6000_BTI_UINTQI }, - { P10_BUILTIN_VEC_REPLACE_ELT, P10V_BUILTIN_VREPLACE_ELT_V2DI, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_INTDI, RS6000_BTI_INTQI }, - { P10_BUILTIN_VEC_REPLACE_ELT, P10V_BUILTIN_VREPLACE_ELT_V2DF, - RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_double, RS6000_BTI_INTQI }, - - { P10_BUILTIN_VEC_REPLACE_UN, P10V_BUILTIN_VREPLACE_UN_UV4SI, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, - RS6000_BTI_UINTSI, RS6000_BTI_UINTQI }, - { P10_BUILTIN_VEC_REPLACE_UN, P10V_BUILTIN_VREPLACE_UN_V4SI, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_INTSI, RS6000_BTI_INTQI }, - { P10_BUILTIN_VEC_REPLACE_UN, P10V_BUILTIN_VREPLACE_UN_V4SF, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_float, RS6000_BTI_INTQI }, - { P10_BUILTIN_VEC_REPLACE_UN, P10V_BUILTIN_VREPLACE_UN_UV2DI, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, - RS6000_BTI_UINTDI, RS6000_BTI_UINTQI }, - { P10_BUILTIN_VEC_REPLACE_UN, P10V_BUILTIN_VREPLACE_UN_V2DI, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_INTDI, RS6000_BTI_INTQI }, - { P10_BUILTIN_VEC_REPLACE_UN, P10V_BUILTIN_VREPLACE_UN_V2DF, - RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_double, RS6000_BTI_INTQI }, - - { P10_BUILTIN_VEC_SLDB, P10V_BUILTIN_VSLDB_V16QI, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, - RS6000_BTI_V16QI, RS6000_BTI_UINTQI }, - { P10_BUILTIN_VEC_SLDB, P10V_BUILTIN_VSLDB_V16QI, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_UINTQI }, - { P10_BUILTIN_VEC_SLDB, P10V_BUILTIN_VSLDB_V8HI, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, - RS6000_BTI_V8HI, RS6000_BTI_UINTQI }, - { P10_BUILTIN_VEC_SLDB, P10V_BUILTIN_VSLDB_V8HI, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_UINTQI }, - { P10_BUILTIN_VEC_SLDB, P10V_BUILTIN_VSLDB_V4SI, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, - RS6000_BTI_V4SI, RS6000_BTI_UINTQI }, - { P10_BUILTIN_VEC_SLDB, P10V_BUILTIN_VSLDB_V4SI, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_UINTQI }, - { P10_BUILTIN_VEC_SLDB, P10V_BUILTIN_VSLDB_V2DI, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, - RS6000_BTI_V2DI, RS6000_BTI_UINTQI }, - { P10_BUILTIN_VEC_SLDB, P10V_BUILTIN_VSLDB_V2DI, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_UINTQI }, - - { P10_BUILTIN_VEC_XXSPLTIW, P10V_BUILTIN_VXXSPLTIW_V4SI, - RS6000_BTI_V4SI, RS6000_BTI_INTSI, 0, 0 }, - { P10_BUILTIN_VEC_XXSPLTIW, P10V_BUILTIN_VXXSPLTIW_V4SF, - RS6000_BTI_V4SF, RS6000_BTI_float, 0, 0 }, - - { P10_BUILTIN_VEC_XXSPLTID, P10V_BUILTIN_VXXSPLTID, - RS6000_BTI_V2DF, RS6000_BTI_float, 0, 0 }, - - { P10_BUILTIN_VEC_XXSPLTI32DX, P10V_BUILTIN_VXXSPLTI32DX_V4SI, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_UINTQI, RS6000_BTI_INTSI }, - { P10_BUILTIN_VEC_XXSPLTI32DX, P10V_BUILTIN_VXXSPLTI32DX_V4SI, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_UINTQI, - RS6000_BTI_UINTSI }, - { P10_BUILTIN_VEC_XXSPLTI32DX, P10V_BUILTIN_VXXSPLTI32DX_V4SF, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_UINTQI, RS6000_BTI_float }, - - { P10_BUILTIN_VEC_XXBLEND, P10V_BUILTIN_VXXBLEND_V16QI, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, - RS6000_BTI_unsigned_V16QI }, - { P10_BUILTIN_VEC_XXBLEND, P10V_BUILTIN_VXXBLEND_V16QI, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI }, - { P10_BUILTIN_VEC_XXBLEND, P10V_BUILTIN_VXXBLEND_V8HI, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, - RS6000_BTI_unsigned_V8HI }, - { P10_BUILTIN_VEC_XXBLEND, P10V_BUILTIN_VXXBLEND_V8HI, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI }, - { P10_BUILTIN_VEC_XXBLEND, P10V_BUILTIN_VXXBLEND_V4SI, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, - RS6000_BTI_unsigned_V4SI }, - { P10_BUILTIN_VEC_XXBLEND, P10V_BUILTIN_VXXBLEND_V4SI, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI }, - { P10_BUILTIN_VEC_XXBLEND, P10V_BUILTIN_VXXBLEND_V2DI, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, - RS6000_BTI_unsigned_V2DI }, - { P10_BUILTIN_VEC_XXBLEND, P10V_BUILTIN_VXXBLEND_V2DI, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI }, - { P10_BUILTIN_VEC_XXBLEND, P10V_BUILTIN_VXXBLEND_V4SF, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, - RS6000_BTI_unsigned_V4SI }, - { P10_BUILTIN_VEC_XXBLEND, P10V_BUILTIN_VXXBLEND_V2DF, - RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, - RS6000_BTI_unsigned_V2DI }, - - { P10_BUILTIN_VEC_SRDB, P10V_BUILTIN_VSRDB_V16QI, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, - RS6000_BTI_V16QI, RS6000_BTI_UINTQI }, - { P10_BUILTIN_VEC_SRDB, P10V_BUILTIN_VSRDB_V16QI, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_UINTQI }, - { P10_BUILTIN_VEC_SRDB, P10V_BUILTIN_VSRDB_V8HI, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, - RS6000_BTI_V8HI, RS6000_BTI_UINTQI }, - { P10_BUILTIN_VEC_SRDB, P10V_BUILTIN_VSRDB_V8HI, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_UINTQI }, - { P10_BUILTIN_VEC_SRDB, P10V_BUILTIN_VSRDB_V4SI, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, - RS6000_BTI_V4SI, RS6000_BTI_UINTQI }, - { P10_BUILTIN_VEC_SRDB, P10V_BUILTIN_VSRDB_V4SI, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_UINTQI }, - { P10_BUILTIN_VEC_SRDB, P10V_BUILTIN_VSRDB_V2DI, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, - RS6000_BTI_V2DI, RS6000_BTI_UINTQI }, - { P10_BUILTIN_VEC_SRDB, P10V_BUILTIN_VSRDB_V2DI, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_UINTQI }, - - { P10_BUILTIN_VEC_VSTRIL, P10V_BUILTIN_VSTRIBL, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0, 0 }, - { P10_BUILTIN_VEC_VSTRIL, P10V_BUILTIN_VSTRIBL, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0, 0 }, - - { P10_BUILTIN_VEC_VSTRIL, P10V_BUILTIN_VSTRIHL, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0, 0 }, - { P10_BUILTIN_VEC_VSTRIL, P10V_BUILTIN_VSTRIHL, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0, 0 }, - - { P10_BUILTIN_VEC_VSTRIL_P, P10V_BUILTIN_VSTRIBL_P, - RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI, 0, 0 }, - { P10_BUILTIN_VEC_VSTRIL_P, P10V_BUILTIN_VSTRIBL_P, - RS6000_BTI_INTSI, RS6000_BTI_V16QI, 0, 0 }, - - { P10_BUILTIN_VEC_VSTRIL_P, P10V_BUILTIN_VSTRIHL_P, - RS6000_BTI_INTSI, RS6000_BTI_unsigned_V8HI, 0, 0 }, - { P10_BUILTIN_VEC_VSTRIL_P, P10V_BUILTIN_VSTRIHL_P, - RS6000_BTI_INTSI, RS6000_BTI_V8HI, 0, 0 }, - - { P10_BUILTIN_VEC_VSTRIR, P10V_BUILTIN_VSTRIBR, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0, 0 }, - { P10_BUILTIN_VEC_VSTRIR, P10V_BUILTIN_VSTRIBR, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0, 0 }, - - { P10_BUILTIN_VEC_VSTRIR, P10V_BUILTIN_VSTRIHR, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0, 0 }, - { P10_BUILTIN_VEC_VSTRIR, P10V_BUILTIN_VSTRIHR, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0, 0 }, - - { P10_BUILTIN_VEC_VSTRIR_P, P10V_BUILTIN_VSTRIBR_P, - RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI, 0, 0 }, - { P10_BUILTIN_VEC_VSTRIR_P, P10V_BUILTIN_VSTRIBR_P, - RS6000_BTI_INTSI, RS6000_BTI_V16QI, 0, 0 }, - - { P10_BUILTIN_VEC_VSTRIR_P, P10V_BUILTIN_VSTRIHR_P, - RS6000_BTI_INTSI, RS6000_BTI_unsigned_V8HI, 0, 0 }, - { P10_BUILTIN_VEC_VSTRIR_P, P10V_BUILTIN_VSTRIHR_P, - RS6000_BTI_INTSI, RS6000_BTI_V8HI, 0, 0 }, - - { P10_BUILTIN_VEC_MTVSRBM, P10V_BUILTIN_MTVSRBM, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_UINTDI, 0, 0 }, - { P10_BUILTIN_VEC_MTVSRHM, P10V_BUILTIN_MTVSRHM, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_UINTDI, 0, 0 }, - { P10_BUILTIN_VEC_MTVSRWM, P10V_BUILTIN_MTVSRWM, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_UINTDI, 0, 0 }, - { P10_BUILTIN_VEC_MTVSRDM, P10V_BUILTIN_MTVSRDM, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_UINTDI, 0, 0 }, - { P10_BUILTIN_VEC_MTVSRQM, P10V_BUILTIN_MTVSRQM, - RS6000_BTI_unsigned_V1TI, RS6000_BTI_UINTDI, 0, 0 }, - - { P10_BUILTIN_VEC_VCNTM, P10V_BUILTIN_VCNTMBB, - RS6000_BTI_unsigned_long_long, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_UINTQI, 0 }, - { P10_BUILTIN_VEC_VCNTM, P10V_BUILTIN_VCNTMBH, - RS6000_BTI_unsigned_long_long, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_UINTQI, 0 }, - { P10_BUILTIN_VEC_VCNTM, P10V_BUILTIN_VCNTMBW, - RS6000_BTI_unsigned_long_long, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_UINTQI, 0 }, - { P10_BUILTIN_VEC_VCNTM, P10V_BUILTIN_VCNTMBD, - RS6000_BTI_unsigned_long_long, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_UINTQI, 0 }, - - { P10_BUILTIN_VEC_VEXPANDM, P10V_BUILTIN_VEXPANDMB, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0, 0 }, - { P10_BUILTIN_VEC_VEXPANDM, P10V_BUILTIN_VEXPANDMH, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0, 0 }, - { P10_BUILTIN_VEC_VEXPANDM, P10V_BUILTIN_VEXPANDMW, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0, 0 }, - { P10_BUILTIN_VEC_VEXPANDM, P10V_BUILTIN_VEXPANDMD, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0, 0 }, - { P10_BUILTIN_VEC_VEXPANDM, P10V_BUILTIN_VEXPANDMQ, - RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, 0, 0 }, - - { P10_BUILTIN_VEC_VEXTRACTM, P10V_BUILTIN_VEXTRACTMB, - RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI, 0, 0 }, - { P10_BUILTIN_VEC_VEXTRACTM, P10V_BUILTIN_VEXTRACTMH, - RS6000_BTI_INTSI, RS6000_BTI_unsigned_V8HI, 0, 0 }, - { P10_BUILTIN_VEC_VEXTRACTM, P10V_BUILTIN_VEXTRACTMW, - RS6000_BTI_INTSI, RS6000_BTI_unsigned_V4SI, 0, 0 }, - { P10_BUILTIN_VEC_VEXTRACTM, P10V_BUILTIN_VEXTRACTMD, - RS6000_BTI_INTSI, RS6000_BTI_unsigned_V2DI, 0, 0 }, - { P10_BUILTIN_VEC_VEXTRACTM, P10V_BUILTIN_VEXTRACTMQ, - RS6000_BTI_INTSI, RS6000_BTI_unsigned_V1TI, 0, 0 }, - - { P10_BUILTIN_VEC_XVTLSBB_ZEROS, P10V_BUILTIN_XVTLSBB_ZEROS, - RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI, 0, 0 }, - { P10_BUILTIN_VEC_XVTLSBB_ONES, P10V_BUILTIN_XVTLSBB_ONES, - RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI, 0, 0 }, - - { P10_BUILTIN_VEC_SIGNEXT, P10V_BUILTIN_VSIGNEXTSD2Q, - RS6000_BTI_V1TI, RS6000_BTI_V2DI, 0, 0 }, - - { RS6000_BUILTIN_NONE, RS6000_BUILTIN_NONE, 0, 0, 0, 0 } -}; \f /* Nonzero if we can use a floating-point register to pass this arg. */ #define USE_FP_FOR_ARG_P(CUM,MODE) \ diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h index 3eba1c072cf..b12ee8bfe5b 100644 --- a/gcc/config/rs6000/rs6000.h +++ b/gcc/config/rs6000/rs6000.h @@ -2399,7 +2399,6 @@ struct altivec_builtin_types signed char op2; signed char op3; }; -extern const struct altivec_builtin_types altivec_overloaded_builtins[]; enum rs6000_builtin_type_index { -- 2.27.0 ^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [PATCH v2 2/6] rs6000: Remove altivec_overloaded_builtins array and initialization 2021-12-06 20:49 ` [PATCH 2/6] rs6000: Remove altivec_overloaded_builtins array and initialization Bill Schmidt @ 2021-12-14 17:57 ` Bill Schmidt 2021-12-14 18:04 ` [PATCH " David Edelsohn 1 sibling, 0 replies; 20+ messages in thread From: Bill Schmidt @ 2021-12-14 17:57 UTC (permalink / raw) To: gcc-patches; +Cc: dje.gcc, segher There was confusion about which version of the patches I meant, so pinging them individually. Ping! :-) On 12/6/21 2:49 PM, Bill Schmidt via Gcc-patches wrote: > Hi! > > This patch just removes the huge altivec_overloaded_builtins array. > > Bootstrapped and tested on powerpc64le-linux-gnu with no regressions. Is this > okay for trunk? > > Thanks! > Bill > > 2021-12-02 Bill Schmidt <wschmidt@linux.ibm.com> > > gcc/ > * config/rs6000/rs6000-call.c (altivec_overloaded_builtins): Remove. > * config/rs6000/rs6000.h (altivec_overloaded_builtins): Remove. > --- > gcc/config/rs6000/rs6000-call.c | 5892 ------------------------------- > gcc/config/rs6000/rs6000.h | 1 - > 2 files changed, 5893 deletions(-) > > diff --git a/gcc/config/rs6000/rs6000-call.c b/gcc/config/rs6000/rs6000-call.c > index 175d26186d3..86054f75756 100644 > --- a/gcc/config/rs6000/rs6000-call.c > +++ b/gcc/config/rs6000/rs6000-call.c > @@ -305,5898 +305,6 @@ static const struct rs6000_builtin_info_type rs6000_builtin_info[] = > #undef RS6000_BUILTIN_P > #undef RS6000_BUILTIN_X > > -const struct altivec_builtin_types altivec_overloaded_builtins[] = { > - /* Unary AltiVec/VSX builtins. */ > - { ALTIVEC_BUILTIN_VEC_ABS, ALTIVEC_BUILTIN_ABS_V16QI, > - RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0, 0 }, > - { ALTIVEC_BUILTIN_VEC_ABS, ALTIVEC_BUILTIN_ABS_V8HI, > - RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0, 0 }, > - { ALTIVEC_BUILTIN_VEC_ABS, ALTIVEC_BUILTIN_ABS_V4SI, > - RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0, 0 }, > - { ALTIVEC_BUILTIN_VEC_ABS, P8V_BUILTIN_ABS_V2DI, > - RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0, 0 }, > - { ALTIVEC_BUILTIN_VEC_ABS, ALTIVEC_BUILTIN_ABS_V4SF, > - RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0, 0 }, > - { ALTIVEC_BUILTIN_VEC_ABS, VSX_BUILTIN_XVABSDP, > - RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0, 0 }, > - { ALTIVEC_BUILTIN_VEC_ABSS, ALTIVEC_BUILTIN_ABSS_V16QI, > - RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0, 0 }, > - { ALTIVEC_BUILTIN_VEC_ABSS, ALTIVEC_BUILTIN_ABSS_V8HI, > - RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0, 0 }, > - { ALTIVEC_BUILTIN_VEC_ABSS, ALTIVEC_BUILTIN_ABSS_V4SI, > - RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0, 0 }, > - { ALTIVEC_BUILTIN_VEC_CEIL, ALTIVEC_BUILTIN_VRFIP, > - RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0, 0 }, > - { ALTIVEC_BUILTIN_VEC_CEIL, VSX_BUILTIN_XVRDPIP, > - RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0, 0 }, > - { ALTIVEC_BUILTIN_VEC_EXPTE, ALTIVEC_BUILTIN_VEXPTEFP, > - RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0, 0 }, > - { ALTIVEC_BUILTIN_VEC_FLOOR, VSX_BUILTIN_XVRDPIM, > - RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0, 0 }, > - { ALTIVEC_BUILTIN_VEC_FLOOR, ALTIVEC_BUILTIN_VRFIM, > - RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0, 0 }, > - { ALTIVEC_BUILTIN_VEC_LOGE, ALTIVEC_BUILTIN_VLOGEFP, > - RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0, 0 }, > - { ALTIVEC_BUILTIN_VEC_MTVSCR, ALTIVEC_BUILTIN_MTVSCR, > - RS6000_BTI_void, RS6000_BTI_V4SI, 0, 0 }, > - { ALTIVEC_BUILTIN_VEC_MTVSCR, ALTIVEC_BUILTIN_MTVSCR, > - RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, 0, 0 }, > - { ALTIVEC_BUILTIN_VEC_MTVSCR, ALTIVEC_BUILTIN_MTVSCR, > - RS6000_BTI_void, RS6000_BTI_bool_V4SI, 0, 0 }, > - { ALTIVEC_BUILTIN_VEC_MTVSCR, ALTIVEC_BUILTIN_MTVSCR, > - RS6000_BTI_void, RS6000_BTI_V8HI, 0, 0 }, > - { ALTIVEC_BUILTIN_VEC_MTVSCR, ALTIVEC_BUILTIN_MTVSCR, > - RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, 0, 0 }, > - { ALTIVEC_BUILTIN_VEC_MTVSCR, ALTIVEC_BUILTIN_MTVSCR, > - RS6000_BTI_void, RS6000_BTI_bool_V8HI, 0, 0 }, > - { ALTIVEC_BUILTIN_VEC_MTVSCR, ALTIVEC_BUILTIN_MTVSCR, > - RS6000_BTI_void, RS6000_BTI_pixel_V8HI, 0, 0 }, > - { ALTIVEC_BUILTIN_VEC_MTVSCR, ALTIVEC_BUILTIN_MTVSCR, > - RS6000_BTI_void, RS6000_BTI_V16QI, 0, 0 }, > - { ALTIVEC_BUILTIN_VEC_MTVSCR, ALTIVEC_BUILTIN_MTVSCR, > - RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, 0, 0 }, > - { ALTIVEC_BUILTIN_VEC_MTVSCR, ALTIVEC_BUILTIN_MTVSCR, > - RS6000_BTI_void, RS6000_BTI_bool_V16QI, 0, 0 }, > - { ALTIVEC_BUILTIN_VEC_RE, ALTIVEC_BUILTIN_VREFP, > - RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0, 0 }, > - { ALTIVEC_BUILTIN_VEC_RE, VSX_BUILTIN_XVREDP, > - RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0, 0 }, > - { ALTIVEC_BUILTIN_VEC_ROUND, ALTIVEC_BUILTIN_VRFIN, > - RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0, 0 }, > - { ALTIVEC_BUILTIN_VEC_ROUND, VSX_BUILTIN_XVRDPI, > - RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0, 0 }, > - { ALTIVEC_BUILTIN_VEC_RECIP, ALTIVEC_BUILTIN_VRECIPFP, > - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, > - { ALTIVEC_BUILTIN_VEC_RECIP, VSX_BUILTIN_RECIP_V2DF, > - RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 }, > - { ALTIVEC_BUILTIN_VEC_RSQRT, ALTIVEC_BUILTIN_VRSQRTFP, > - RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0, 0 }, > - { ALTIVEC_BUILTIN_VEC_RSQRT, VSX_BUILTIN_RSQRT_2DF, > - RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0, 0 }, > - { ALTIVEC_BUILTIN_VEC_RSQRTE, ALTIVEC_BUILTIN_VRSQRTEFP, > - RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0, 0 }, > - { ALTIVEC_BUILTIN_VEC_RSQRTE, VSX_BUILTIN_XVRSQRTEDP, > - RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0, 0 }, > - { ALTIVEC_BUILTIN_VEC_TRUNC, ALTIVEC_BUILTIN_VRFIZ, > - RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0, 0 }, > - { ALTIVEC_BUILTIN_VEC_TRUNC, VSX_BUILTIN_XVRDPIZ, > - RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0, 0 }, > - { ALTIVEC_BUILTIN_VEC_UNPACKH, ALTIVEC_BUILTIN_VUPKHSB, > - RS6000_BTI_V8HI, RS6000_BTI_V16QI, 0, 0 }, > - { ALTIVEC_BUILTIN_VEC_UNPACKH, ALTIVEC_BUILTIN_VUPKHSB, > - RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V16QI, 0, 0 }, > - { ALTIVEC_BUILTIN_VEC_UNPACKH, ALTIVEC_BUILTIN_VUPKHSH, > - RS6000_BTI_V4SI, RS6000_BTI_V8HI, 0, 0 }, > - { ALTIVEC_BUILTIN_VEC_UNPACKH, ALTIVEC_BUILTIN_VUPKHSH, > - RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V8HI, 0, 0 }, > - { ALTIVEC_BUILTIN_VEC_UNPACKH, P8V_BUILTIN_VUPKHSW, > - RS6000_BTI_V2DI, RS6000_BTI_V4SI, 0, 0 }, > - { ALTIVEC_BUILTIN_VEC_UNPACKH, P8V_BUILTIN_VUPKHSW, > - RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V4SI, 0, 0 }, > - { ALTIVEC_BUILTIN_VEC_UNPACKH, ALTIVEC_BUILTIN_VUPKHPX, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_pixel_V8HI, 0, 0 }, > - { ALTIVEC_BUILTIN_VEC_UNPACKH, VSX_BUILTIN_DOUBLEH_V4SF, > - RS6000_BTI_V2DF, RS6000_BTI_V4SF, 0, 0 }, > - { ALTIVEC_BUILTIN_VEC_VUPKHSH, ALTIVEC_BUILTIN_VUPKHSH, > - RS6000_BTI_V4SI, RS6000_BTI_V8HI, 0, 0 }, > - { ALTIVEC_BUILTIN_VEC_VUPKHSH, ALTIVEC_BUILTIN_VUPKHSH, > - RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V8HI, 0, 0 }, > - { ALTIVEC_BUILTIN_VEC_VUPKHSH, P8V_BUILTIN_VUPKHSW, > - RS6000_BTI_V2DI, RS6000_BTI_V4SI, 0, 0 }, > - { ALTIVEC_BUILTIN_VEC_VUPKHSH, P8V_BUILTIN_VUPKHSW, > - RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V4SI, 0, 0 }, > - { ALTIVEC_BUILTIN_VEC_VUPKHPX, ALTIVEC_BUILTIN_VUPKHPX, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V8HI, 0, 0 }, > - { ALTIVEC_BUILTIN_VEC_VUPKHPX, ALTIVEC_BUILTIN_VUPKHPX, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_pixel_V8HI, 0, 0 }, > - { ALTIVEC_BUILTIN_VEC_VUPKHSB, ALTIVEC_BUILTIN_VUPKHSB, > - RS6000_BTI_V8HI, RS6000_BTI_V16QI, 0, 0 }, > - { ALTIVEC_BUILTIN_VEC_VUPKHSB, ALTIVEC_BUILTIN_VUPKHSB, > - RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V16QI, 0, 0 }, > - { ALTIVEC_BUILTIN_VEC_UNPACKL, ALTIVEC_BUILTIN_VUPKLSB, > - RS6000_BTI_V8HI, RS6000_BTI_V16QI, 0, 0 }, > - { ALTIVEC_BUILTIN_VEC_UNPACKL, ALTIVEC_BUILTIN_VUPKLSB, > - RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V16QI, 0, 0 }, > - { ALTIVEC_BUILTIN_VEC_UNPACKL, ALTIVEC_BUILTIN_VUPKLPX, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_pixel_V8HI, 0, 0 }, > - { ALTIVEC_BUILTIN_VEC_UNPACKL, ALTIVEC_BUILTIN_VUPKLSH, > - RS6000_BTI_V4SI, RS6000_BTI_V8HI, 0, 0 }, > - { ALTIVEC_BUILTIN_VEC_UNPACKL, ALTIVEC_BUILTIN_VUPKLSH, > - RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V8HI, 0, 0 }, > - { ALTIVEC_BUILTIN_VEC_UNPACKL, P8V_BUILTIN_VUPKLSW, > - RS6000_BTI_V2DI, RS6000_BTI_V4SI, 0, 0 }, > - { ALTIVEC_BUILTIN_VEC_UNPACKL, P8V_BUILTIN_VUPKLSW, > - RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V4SI, 0, 0 }, > - { ALTIVEC_BUILTIN_VEC_UNPACKL, VSX_BUILTIN_DOUBLEL_V4SF, > - RS6000_BTI_V2DF, RS6000_BTI_V4SF, 0, 0 }, > - { ALTIVEC_BUILTIN_VEC_VUPKLPX, ALTIVEC_BUILTIN_VUPKLPX, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V8HI, 0, 0 }, > - { ALTIVEC_BUILTIN_VEC_VUPKLPX, ALTIVEC_BUILTIN_VUPKLPX, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_pixel_V8HI, 0, 0 }, > - { ALTIVEC_BUILTIN_VEC_VUPKLSH, ALTIVEC_BUILTIN_VUPKLSH, > - RS6000_BTI_V4SI, RS6000_BTI_V8HI, 0, 0 }, > - { ALTIVEC_BUILTIN_VEC_VUPKLSH, ALTIVEC_BUILTIN_VUPKLSH, > - RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V8HI, 0, 0 }, > - { ALTIVEC_BUILTIN_VEC_VUPKLSB, ALTIVEC_BUILTIN_VUPKLSB, > - RS6000_BTI_V8HI, RS6000_BTI_V16QI, 0, 0 }, > - { ALTIVEC_BUILTIN_VEC_VUPKLSB, ALTIVEC_BUILTIN_VUPKLSB, > - RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V16QI, 0, 0 }, > - > - /* Binary AltiVec/VSX builtins. */ > - { ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUBM, > - RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUBM, > - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUBM, > - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUBM, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUBM, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUBM, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUHM, > - RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUHM, > - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUHM, > - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUHM, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUHM, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUHM, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUWM, > - RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUWM, > - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUWM, > - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUWM, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUWM, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUWM, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_ADD, P8V_BUILTIN_VADDUDM, > - RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, 0 }, > - { ALTIVEC_BUILTIN_VEC_ADD, P8V_BUILTIN_VADDUDM, > - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, 0 }, > - { ALTIVEC_BUILTIN_VEC_ADD, P8V_BUILTIN_VADDUDM, > - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, > - { ALTIVEC_BUILTIN_VEC_ADD, P8V_BUILTIN_VADDUDM, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, > - { ALTIVEC_BUILTIN_VEC_ADD, P8V_BUILTIN_VADDUDM, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, 0 }, > - { ALTIVEC_BUILTIN_VEC_ADD, P8V_BUILTIN_VADDUDM, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, > - { ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDFP, > - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, > - { ALTIVEC_BUILTIN_VEC_ADD, VSX_BUILTIN_XVADDDP, > - RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 }, > - { ALTIVEC_BUILTIN_VEC_ADD, P8V_BUILTIN_VADDUQM, > - RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, 0 }, > - { ALTIVEC_BUILTIN_VEC_ADD, P8V_BUILTIN_VADDUQM, > - RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, > - RS6000_BTI_unsigned_V1TI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VADDFP, ALTIVEC_BUILTIN_VADDFP, > - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, > - { ALTIVEC_BUILTIN_VEC_VADDUWM, ALTIVEC_BUILTIN_VADDUWM, > - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VADDUWM, ALTIVEC_BUILTIN_VADDUWM, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VADDUWM, ALTIVEC_BUILTIN_VADDUWM, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VADDUWM, ALTIVEC_BUILTIN_VADDUWM, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VADDUWM, ALTIVEC_BUILTIN_VADDUWM, > - RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VADDUWM, ALTIVEC_BUILTIN_VADDUWM, > - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VADDUWM, ALTIVEC_BUILTIN_VADDUWM, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VADDUWM, ALTIVEC_BUILTIN_VADDUWM, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VADDUHM, ALTIVEC_BUILTIN_VADDUHM, > - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VADDUHM, ALTIVEC_BUILTIN_VADDUHM, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VADDUHM, ALTIVEC_BUILTIN_VADDUHM, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VADDUHM, ALTIVEC_BUILTIN_VADDUHM, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VADDUHM, ALTIVEC_BUILTIN_VADDUHM, > - RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VADDUHM, ALTIVEC_BUILTIN_VADDUHM, > - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VADDUHM, ALTIVEC_BUILTIN_VADDUHM, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VADDUHM, ALTIVEC_BUILTIN_VADDUHM, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VADDUBM, ALTIVEC_BUILTIN_VADDUBM, > - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VADDUBM, ALTIVEC_BUILTIN_VADDUBM, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VADDUBM, ALTIVEC_BUILTIN_VADDUBM, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VADDUBM, ALTIVEC_BUILTIN_VADDUBM, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VADDUBM, ALTIVEC_BUILTIN_VADDUBM, > - RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VADDUBM, ALTIVEC_BUILTIN_VADDUBM, > - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VADDUBM, ALTIVEC_BUILTIN_VADDUBM, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VADDUBM, ALTIVEC_BUILTIN_VADDUBM, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_ADDC, ALTIVEC_BUILTIN_VADDCUW, > - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_ADDC, ALTIVEC_BUILTIN_VADDCUW, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, > - RS6000_BTI_unsigned_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_ADDC, P8V_BUILTIN_VADDCUQ, > - RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, > - RS6000_BTI_unsigned_V1TI, 0 }, > - { ALTIVEC_BUILTIN_VEC_ADDC, P8V_BUILTIN_VADDCUQ, > - RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, 0 }, > - { ALTIVEC_BUILTIN_VEC_ADDEC, P8V_BUILTIN_VADDECUQ, > - RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, > - RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI }, > - { ALTIVEC_BUILTIN_VEC_ADDEC, P8V_BUILTIN_VADDECUQ, > - RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI }, > - { ALTIVEC_BUILTIN_VEC_ADDS, ALTIVEC_BUILTIN_VADDUBS, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_ADDS, ALTIVEC_BUILTIN_VADDUBS, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_ADDS, ALTIVEC_BUILTIN_VADDUBS, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_ADDS, ALTIVEC_BUILTIN_VADDSBS, > - RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_ADDS, ALTIVEC_BUILTIN_VADDSBS, > - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_ADDS, ALTIVEC_BUILTIN_VADDSBS, > - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_ADDS, ALTIVEC_BUILTIN_VADDUHS, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_ADDS, ALTIVEC_BUILTIN_VADDUHS, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_ADDS, ALTIVEC_BUILTIN_VADDUHS, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_ADDS, ALTIVEC_BUILTIN_VADDSHS, > - RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_ADDS, ALTIVEC_BUILTIN_VADDSHS, > - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_ADDS, ALTIVEC_BUILTIN_VADDSHS, > - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_ADDS, ALTIVEC_BUILTIN_VADDUWS, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_ADDS, ALTIVEC_BUILTIN_VADDUWS, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_ADDS, ALTIVEC_BUILTIN_VADDUWS, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_ADDS, ALTIVEC_BUILTIN_VADDSWS, > - RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_ADDS, ALTIVEC_BUILTIN_VADDSWS, > - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_ADDS, ALTIVEC_BUILTIN_VADDSWS, > - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VADDSWS, ALTIVEC_BUILTIN_VADDSWS, > - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VADDSWS, ALTIVEC_BUILTIN_VADDSWS, > - RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VADDSWS, ALTIVEC_BUILTIN_VADDSWS, > - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VADDUWS, ALTIVEC_BUILTIN_VADDUWS, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VADDUWS, ALTIVEC_BUILTIN_VADDUWS, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VADDUWS, ALTIVEC_BUILTIN_VADDUWS, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VADDUWS, ALTIVEC_BUILTIN_VADDUWS, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VADDUWS, ALTIVEC_BUILTIN_VADDUWS, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VADDSHS, ALTIVEC_BUILTIN_VADDSHS, > - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VADDSHS, ALTIVEC_BUILTIN_VADDSHS, > - RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VADDSHS, ALTIVEC_BUILTIN_VADDSHS, > - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VADDUHS, ALTIVEC_BUILTIN_VADDUHS, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VADDUHS, ALTIVEC_BUILTIN_VADDUHS, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VADDUHS, ALTIVEC_BUILTIN_VADDUHS, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VADDUHS, ALTIVEC_BUILTIN_VADDUHS, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VADDUHS, ALTIVEC_BUILTIN_VADDUHS, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VADDSBS, ALTIVEC_BUILTIN_VADDSBS, > - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VADDSBS, ALTIVEC_BUILTIN_VADDSBS, > - RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VADDSBS, ALTIVEC_BUILTIN_VADDSBS, > - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VADDUBS, ALTIVEC_BUILTIN_VADDUBS, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VADDUBS, ALTIVEC_BUILTIN_VADDUBS, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VADDUBS, ALTIVEC_BUILTIN_VADDUBS, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VADDUBS, ALTIVEC_BUILTIN_VADDUBS, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VADDUBS, ALTIVEC_BUILTIN_VADDUBS, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, 0 }, > - > - { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V4SF, > - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, > - { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V4SF, > - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_bool_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V4SF, > - RS6000_BTI_V4SF, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SF, 0 }, > - { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V2DF, > - RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 }, > - { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V2DF, > - RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_bool_V2DI, 0 }, > - { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V2DF, > - RS6000_BTI_V2DF, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DF, 0 }, > - { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V2DI, > - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, > - { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V2DI, > - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, 0 }, > - { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V2DI, > - RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, 0 }, > - { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V2DI_UNS, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, > - { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V2DI_UNS, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, 0 }, > - { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V2DI_UNS, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, > - { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V2DI_UNS, > - RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, 0 }, > - { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V4SI_UNS, > - RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V4SI, > - RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V4SI, > - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V4SI, > - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V4SI_UNS, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V4SI_UNS, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V4SI_UNS, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V8HI_UNS, > - RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V8HI, > - RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V8HI, > - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V8HI, > - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V8HI_UNS, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V8HI_UNS, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V8HI_UNS, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V16QI, > - RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V16QI_UNS, > - RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V16QI, > - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V16QI, > - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V16QI_UNS, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V16QI_UNS, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V16QI_UNS, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, > - > - { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V4SF, > - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, > - { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V4SF, > - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_bool_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V4SF, > - RS6000_BTI_V4SF, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SF, 0 }, > - { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V2DF, > - RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 }, > - { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V2DF, > - RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_bool_V2DI, 0 }, > - { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V2DF, > - RS6000_BTI_V2DF, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DF, 0 }, > - { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V2DI, > - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, > - { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V2DI, > - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, 0 }, > - { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V2DI, > - RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, 0 }, > - { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V2DI_UNS, > - RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, 0 }, > - { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V2DI_UNS, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, > - { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V2DI_UNS, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, 0 }, > - { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V2DI_UNS, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, > - { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V4SI_UNS, > - RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V4SI, > - RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V4SI, > - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V4SI, > - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V4SI_UNS, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V4SI_UNS, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V4SI_UNS, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V8HI_UNS, > - RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V8HI, > - RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V8HI, > - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V8HI, > - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V8HI_UNS, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V8HI_UNS, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V8HI_UNS, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V16QI, > - RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V16QI_UNS, > - RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V16QI, > - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V16QI, > - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V16QI_UNS, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V16QI_UNS, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V16QI_UNS, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, > - > - { ALTIVEC_BUILTIN_VEC_AVG, ALTIVEC_BUILTIN_VAVGUB, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_AVG, ALTIVEC_BUILTIN_VAVGSB, > - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_AVG, ALTIVEC_BUILTIN_VAVGUH, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_AVG, ALTIVEC_BUILTIN_VAVGSH, > - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_AVG, ALTIVEC_BUILTIN_VAVGUW, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_AVG, ALTIVEC_BUILTIN_VAVGSW, > - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VAVGSW, ALTIVEC_BUILTIN_VAVGSW, > - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VAVGUW, ALTIVEC_BUILTIN_VAVGUW, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VAVGSH, ALTIVEC_BUILTIN_VAVGSH, > - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VAVGUH, ALTIVEC_BUILTIN_VAVGUH, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VAVGSB, ALTIVEC_BUILTIN_VAVGSB, > - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VAVGUB, ALTIVEC_BUILTIN_VAVGUB, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_CMPB, ALTIVEC_BUILTIN_VCMPBFP, > - RS6000_BTI_V4SI, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, > - { ALTIVEC_BUILTIN_VEC_CMPEQ, ALTIVEC_BUILTIN_VCMPEQUB, > - RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_CMPEQ, ALTIVEC_BUILTIN_VCMPEQUB, > - RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_CMPEQ, ALTIVEC_BUILTIN_VCMPEQUB, > - RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_CMPEQ, ALTIVEC_BUILTIN_VCMPEQUH, > - RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_CMPEQ, ALTIVEC_BUILTIN_VCMPEQUH, > - RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_CMPEQ, ALTIVEC_BUILTIN_VCMPEQUH, > - RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_CMPEQ, ALTIVEC_BUILTIN_VCMPEQUW, > - RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_CMPEQ, ALTIVEC_BUILTIN_VCMPEQUW, > - RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_CMPEQ, ALTIVEC_BUILTIN_VCMPEQUW, > - RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_CMPEQ, P8V_BUILTIN_VCMPEQUD, > - RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, 0 }, > - { ALTIVEC_BUILTIN_VEC_CMPEQ, P8V_BUILTIN_VCMPEQUD, > - RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, > - { ALTIVEC_BUILTIN_VEC_CMPEQ, P8V_BUILTIN_VCMPEQUD, > - RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, > - { ALTIVEC_BUILTIN_VEC_CMPEQ, P10V_BUILTIN_VCMPEQUT, > - RS6000_BTI_bool_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, 0 }, > - { ALTIVEC_BUILTIN_VEC_CMPEQ, P10V_BUILTIN_VCMPEQUT, > - RS6000_BTI_bool_V1TI, RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, 0 }, > - { ALTIVEC_BUILTIN_VEC_CMPEQ, ALTIVEC_BUILTIN_VCMPEQFP, > - RS6000_BTI_bool_V4SI, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, > - { ALTIVEC_BUILTIN_VEC_CMPEQ, VSX_BUILTIN_XVCMPEQDP, > - RS6000_BTI_bool_V2DI, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 }, > - { ALTIVEC_BUILTIN_VEC_VCMPEQFP, ALTIVEC_BUILTIN_VCMPEQFP, > - RS6000_BTI_bool_V4SI, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, > - > - { ALTIVEC_BUILTIN_VEC_VCMPEQUW, ALTIVEC_BUILTIN_VCMPEQUW, > - RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VCMPEQUW, ALTIVEC_BUILTIN_VCMPEQUW, > - RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, > - > - { ALTIVEC_BUILTIN_VEC_VCMPEQUH, ALTIVEC_BUILTIN_VCMPEQUH, > - RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VCMPEQUH, ALTIVEC_BUILTIN_VCMPEQUH, > - RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, > - > - { ALTIVEC_BUILTIN_VEC_VCMPEQUB, ALTIVEC_BUILTIN_VCMPEQUB, > - RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VCMPEQUB, ALTIVEC_BUILTIN_VCMPEQUB, > - RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, > - > - { ALTIVEC_BUILTIN_VEC_CMPGE, ALTIVEC_BUILTIN_VCMPGEFP, > - RS6000_BTI_bool_V4SI, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, > - { ALTIVEC_BUILTIN_VEC_CMPGE, VSX_BUILTIN_XVCMPGEDP, > - RS6000_BTI_bool_V2DI, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 }, > - { ALTIVEC_BUILTIN_VEC_CMPGE, VSX_BUILTIN_CMPGE_16QI, > - RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0}, > - { ALTIVEC_BUILTIN_VEC_CMPGE, VSX_BUILTIN_CMPGE_U16QI, > - RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, > - RS6000_BTI_unsigned_V16QI, 0}, > - { ALTIVEC_BUILTIN_VEC_CMPGE, VSX_BUILTIN_CMPGE_8HI, > - RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0}, > - { ALTIVEC_BUILTIN_VEC_CMPGE, VSX_BUILTIN_CMPGE_U8HI, > - RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, > - RS6000_BTI_unsigned_V8HI, 0}, > - { ALTIVEC_BUILTIN_VEC_CMPGE, VSX_BUILTIN_CMPGE_4SI, > - RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0}, > - { ALTIVEC_BUILTIN_VEC_CMPGE, VSX_BUILTIN_CMPGE_U4SI, > - RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, > - RS6000_BTI_unsigned_V4SI, 0}, > - { ALTIVEC_BUILTIN_VEC_CMPGE, VSX_BUILTIN_CMPGE_2DI, > - RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0}, > - { ALTIVEC_BUILTIN_VEC_CMPGE, VSX_BUILTIN_CMPGE_U2DI, > - RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI, > - RS6000_BTI_unsigned_V2DI, 0}, > - > - { ALTIVEC_BUILTIN_VEC_CMPGE, P10V_BUILTIN_CMPGE_1TI, > - RS6000_BTI_bool_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, 0}, > - { ALTIVEC_BUILTIN_VEC_CMPGE, P10V_BUILTIN_CMPGE_U1TI, > - RS6000_BTI_bool_V1TI, RS6000_BTI_unsigned_V1TI, > - RS6000_BTI_unsigned_V1TI, 0}, > - { ALTIVEC_BUILTIN_VEC_CMPGT, ALTIVEC_BUILTIN_VCMPGTUB, > - RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_CMPGT, ALTIVEC_BUILTIN_VCMPGTSB, > - RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_CMPGT, ALTIVEC_BUILTIN_VCMPGTUH, > - RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_CMPGT, ALTIVEC_BUILTIN_VCMPGTSH, > - RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_CMPGT, ALTIVEC_BUILTIN_VCMPGTUW, > - RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_CMPGT, ALTIVEC_BUILTIN_VCMPGTSW, > - RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_CMPGT, P8V_BUILTIN_VCMPGTUD, > - RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, > - { ALTIVEC_BUILTIN_VEC_CMPGT, P10V_BUILTIN_VCMPGTUT, > - RS6000_BTI_bool_V1TI, RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, 0 }, > - { ALTIVEC_BUILTIN_VEC_CMPGT, P8V_BUILTIN_VCMPGTSD, > - RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, > - { ALTIVEC_BUILTIN_VEC_CMPGT, P10V_BUILTIN_VCMPGTST, > - RS6000_BTI_bool_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, 0 }, > - { ALTIVEC_BUILTIN_VEC_CMPGT, ALTIVEC_BUILTIN_VCMPGTFP, > - RS6000_BTI_bool_V4SI, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, > - { ALTIVEC_BUILTIN_VEC_CMPGT, VSX_BUILTIN_XVCMPGTDP, > - RS6000_BTI_bool_V2DI, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 }, > - { ALTIVEC_BUILTIN_VEC_VCMPGTFP, ALTIVEC_BUILTIN_VCMPGTFP, > - RS6000_BTI_bool_V4SI, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, > - { ALTIVEC_BUILTIN_VEC_VCMPGTSW, ALTIVEC_BUILTIN_VCMPGTSW, > - RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VCMPGTUW, ALTIVEC_BUILTIN_VCMPGTUW, > - RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VCMPGTSH, ALTIVEC_BUILTIN_VCMPGTSH, > - RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VCMPGTUH, ALTIVEC_BUILTIN_VCMPGTUH, > - RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VCMPGTSB, ALTIVEC_BUILTIN_VCMPGTSB, > - RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VCMPGTUB, ALTIVEC_BUILTIN_VCMPGTUB, > - RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_CMPLE, ALTIVEC_BUILTIN_VCMPGEFP, > - RS6000_BTI_bool_V4SI, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, > - { ALTIVEC_BUILTIN_VEC_CMPLE, VSX_BUILTIN_XVCMPGEDP, > - RS6000_BTI_bool_V2DI, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 }, > - { ALTIVEC_BUILTIN_VEC_CMPLE, VSX_BUILTIN_CMPLE_16QI, > - RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0}, > - { ALTIVEC_BUILTIN_VEC_CMPLE, VSX_BUILTIN_CMPLE_U16QI, > - RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, > - RS6000_BTI_unsigned_V16QI, 0}, > - { ALTIVEC_BUILTIN_VEC_CMPLE, VSX_BUILTIN_CMPLE_8HI, > - RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0}, > - { ALTIVEC_BUILTIN_VEC_CMPLE, VSX_BUILTIN_CMPLE_U8HI, > - RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, > - RS6000_BTI_unsigned_V8HI, 0}, > - { ALTIVEC_BUILTIN_VEC_CMPLE, VSX_BUILTIN_CMPLE_4SI, > - RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0}, > - { ALTIVEC_BUILTIN_VEC_CMPLE, VSX_BUILTIN_CMPLE_U4SI, > - RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, > - RS6000_BTI_unsigned_V4SI, 0}, > - { ALTIVEC_BUILTIN_VEC_CMPLE, VSX_BUILTIN_CMPLE_2DI, > - RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0}, > - { ALTIVEC_BUILTIN_VEC_CMPLE, VSX_BUILTIN_CMPLE_U2DI, > - RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI, > - RS6000_BTI_unsigned_V2DI, 0}, > - { ALTIVEC_BUILTIN_VEC_CMPLE, P10V_BUILTIN_CMPLE_1TI, > - RS6000_BTI_bool_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, 0}, > - { ALTIVEC_BUILTIN_VEC_CMPLE, P10V_BUILTIN_CMPLE_U1TI, > - RS6000_BTI_bool_V1TI, RS6000_BTI_unsigned_V1TI, > - RS6000_BTI_unsigned_V1TI, 0}, > - { ALTIVEC_BUILTIN_VEC_CMPLT, ALTIVEC_BUILTIN_VCMPGTUB, > - RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_CMPLT, ALTIVEC_BUILTIN_VCMPGTSB, > - RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_CMPLT, ALTIVEC_BUILTIN_VCMPGTUH, > - RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_CMPLT, ALTIVEC_BUILTIN_VCMPGTSH, > - RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_CMPLT, ALTIVEC_BUILTIN_VCMPGTUW, > - RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_CMPLT, ALTIVEC_BUILTIN_VCMPGTSW, > - RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_CMPLT, P8V_BUILTIN_VCMPGTUD, > - RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, > - { ALTIVEC_BUILTIN_VEC_CMPLT, P8V_BUILTIN_VCMPGTSD, > - RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, > - { ALTIVEC_BUILTIN_VEC_CMPLT, ALTIVEC_BUILTIN_VCMPGTFP, > - RS6000_BTI_bool_V4SI, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, > - { ALTIVEC_BUILTIN_VEC_CMPLT, VSX_BUILTIN_XVCMPGTDP, > - RS6000_BTI_bool_V2DI, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 }, > - { ALTIVEC_BUILTIN_VEC_COPYSIGN, VSX_BUILTIN_CPSGNDP, > - RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 }, > - { ALTIVEC_BUILTIN_VEC_COPYSIGN, ALTIVEC_BUILTIN_COPYSIGN_V4SF, > - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, > - { ALTIVEC_BUILTIN_VEC_CTF, ALTIVEC_BUILTIN_VCFUX, > - RS6000_BTI_V4SF, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, 0 }, > - { ALTIVEC_BUILTIN_VEC_CTF, ALTIVEC_BUILTIN_VCFSX, > - RS6000_BTI_V4SF, RS6000_BTI_V4SI, RS6000_BTI_INTSI, 0 }, > - { ALTIVEC_BUILTIN_VEC_CTF, VSX_BUILTIN_XVCVSXDDP_SCALE, > - RS6000_BTI_V2DF, RS6000_BTI_V2DI, RS6000_BTI_INTSI, 0}, > - { ALTIVEC_BUILTIN_VEC_CTF, VSX_BUILTIN_XVCVUXDDP_SCALE, > - RS6000_BTI_V2DF, RS6000_BTI_unsigned_V2DI, RS6000_BTI_INTSI, 0}, > - { ALTIVEC_BUILTIN_VEC_VCFSX, ALTIVEC_BUILTIN_VCFSX, > - RS6000_BTI_V4SF, RS6000_BTI_V4SI, RS6000_BTI_INTSI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VCFUX, ALTIVEC_BUILTIN_VCFUX, > - RS6000_BTI_V4SF, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, 0 }, > - { ALTIVEC_BUILTIN_VEC_CTS, ALTIVEC_BUILTIN_VCTSXS, > - RS6000_BTI_V4SI, RS6000_BTI_V4SF, RS6000_BTI_INTSI, 0 }, > - { ALTIVEC_BUILTIN_VEC_CTS, VSX_BUILTIN_XVCVDPSXDS_SCALE, > - RS6000_BTI_V2DI, RS6000_BTI_V2DF, RS6000_BTI_INTSI, 0 }, > - { ALTIVEC_BUILTIN_VEC_CTU, ALTIVEC_BUILTIN_VCTUXS, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_V4SF, RS6000_BTI_INTSI, 0 }, > - { ALTIVEC_BUILTIN_VEC_CTU, VSX_BUILTIN_XVCVDPUXDS_SCALE, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_V2DF, RS6000_BTI_INTSI, 0 }, > - > - { P8V_BUILTIN_VEC_BCDADD, MISC_BUILTIN_BCDADD_V1TI, > - RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_INTSI }, > - { P8V_BUILTIN_VEC_BCDADD, MISC_BUILTIN_BCDADD_V16QI, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI }, > - { P8V_BUILTIN_VEC_BCDADD_LT, MISC_BUILTIN_BCDADD_LT_V1TI, > - RS6000_BTI_INTSI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_INTSI }, > - { P8V_BUILTIN_VEC_BCDADD_LT, MISC_BUILTIN_BCDADD_LT_V16QI, > - RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI }, > - { P8V_BUILTIN_VEC_BCDADD_EQ, MISC_BUILTIN_BCDADD_EQ_V1TI, > - RS6000_BTI_INTSI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_INTSI }, > - { P8V_BUILTIN_VEC_BCDADD_EQ, MISC_BUILTIN_BCDADD_EQ_V16QI, > - RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI }, > - { P8V_BUILTIN_VEC_BCDADD_GT, MISC_BUILTIN_BCDADD_GT_V1TI, > - RS6000_BTI_INTSI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_INTSI }, > - { P8V_BUILTIN_VEC_BCDADD_GT, MISC_BUILTIN_BCDADD_GT_V16QI, > - RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI }, > - { P8V_BUILTIN_VEC_BCDADD_OV, MISC_BUILTIN_BCDADD_OV_V1TI, > - RS6000_BTI_INTSI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_INTSI }, > - { P8V_BUILTIN_VEC_BCDADD_OV, MISC_BUILTIN_BCDADD_OV_V16QI, > - RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI }, > - { P8V_BUILTIN_VEC_BCDINVALID, MISC_BUILTIN_BCDINVALID_V1TI, > - RS6000_BTI_INTSI, RS6000_BTI_V1TI, 0, 0 }, > - { P8V_BUILTIN_VEC_BCDINVALID, MISC_BUILTIN_BCDINVALID_V16QI, > - RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI, 0, 0 }, > - > - { P9V_BUILTIN_VEC_BCDMUL10, P9V_BUILTIN_BCDMUL10_V16QI, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0, 0 }, > - { P9V_BUILTIN_VEC_BCDDIV10, P9V_BUILTIN_BCDDIV10_V16QI, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0, 0 }, > - > - { P8V_BUILTIN_VEC_DENBCD, MISC_BUILTIN_DENBCD_V16QI, > - RS6000_BTI_dfloat128, RS6000_BTI_unsigned_V16QI, 0, 0 }, > - > - { P8V_BUILTIN_VEC_BCDSUB, MISC_BUILTIN_BCDSUB_V1TI, > - RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_INTSI }, > - { P8V_BUILTIN_VEC_BCDSUB, MISC_BUILTIN_BCDSUB_V16QI, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI }, > - { P8V_BUILTIN_VEC_BCDSUB_LT, MISC_BUILTIN_BCDSUB_LT_V1TI, > - RS6000_BTI_INTSI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_INTSI }, > - { P8V_BUILTIN_VEC_BCDSUB_LT, MISC_BUILTIN_BCDSUB_LT_V16QI, > - RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI }, > - { P8V_BUILTIN_VEC_BCDSUB_LE, MISC_BUILTIN_BCDSUB_LE_V1TI, > - RS6000_BTI_INTSI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_INTSI }, > - { P8V_BUILTIN_VEC_BCDSUB_LE, MISC_BUILTIN_BCDSUB_LE_V16QI, > - RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI }, > - { P8V_BUILTIN_VEC_BCDSUB_EQ, MISC_BUILTIN_BCDSUB_EQ_V1TI, > - RS6000_BTI_INTSI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_INTSI }, > - { P8V_BUILTIN_VEC_BCDSUB_EQ, MISC_BUILTIN_BCDSUB_EQ_V16QI, > - RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI }, > - { P8V_BUILTIN_VEC_BCDSUB_GT, MISC_BUILTIN_BCDSUB_GT_V1TI, > - RS6000_BTI_INTSI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_INTSI }, > - { P8V_BUILTIN_VEC_BCDSUB_GT, MISC_BUILTIN_BCDSUB_GT_V16QI, > - RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI }, > - { P8V_BUILTIN_VEC_BCDSUB_GE, MISC_BUILTIN_BCDSUB_GE_V1TI, > - RS6000_BTI_INTSI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_INTSI }, > - { P8V_BUILTIN_VEC_BCDSUB_GE, MISC_BUILTIN_BCDSUB_GE_V16QI, > - RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI }, > - { P8V_BUILTIN_VEC_BCDSUB_OV, MISC_BUILTIN_BCDSUB_OV_V1TI, > - RS6000_BTI_INTSI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_INTSI }, > - { P8V_BUILTIN_VEC_BCDSUB_OV, MISC_BUILTIN_BCDSUB_OV_V16QI, > - RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI }, > - > - > - { VSX_BUILTIN_VEC_DIV, VSX_BUILTIN_XVDIVSP, > - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, > - { VSX_BUILTIN_VEC_DIV, VSX_BUILTIN_XVDIVDP, > - RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 }, > - { VSX_BUILTIN_VEC_DIV, VSX_BUILTIN_DIV_V2DI, > - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, > - { VSX_BUILTIN_VEC_DIV, VSX_BUILTIN_UDIV_V2DI, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, > - > - { VSX_BUILTIN_VEC_DIV, P10V_BUILTIN_DIVS_V4SI, > - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, > - { VSX_BUILTIN_VEC_DIV, P10V_BUILTIN_DIVU_V4SI, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, > - RS6000_BTI_unsigned_V4SI, 0 }, > - { VSX_BUILTIN_VEC_DIV, P10V_BUILTIN_DIVS_V2DI, > - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, > - { VSX_BUILTIN_VEC_DIV, P10V_BUILTIN_DIVU_V2DI, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, > - RS6000_BTI_unsigned_V2DI, 0 }, > - { VSX_BUILTIN_VEC_DIV, P10V_BUILTIN_DIV_V1TI, > - RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, 0 }, > - { VSX_BUILTIN_VEC_DIV, P10V_BUILTIN_UDIV_V1TI, > - RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, > - RS6000_BTI_unsigned_V1TI, 0 }, > - > - { P10_BUILTIN_VEC_DIVE, P10V_BUILTIN_DIVES_V4SI, > - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, > - { P10_BUILTIN_VEC_DIVE, P10V_BUILTIN_DIVEU_V4SI, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, > - RS6000_BTI_unsigned_V4SI, 0 }, > - { P10_BUILTIN_VEC_DIVE, P10V_BUILTIN_DIVES_V2DI, > - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, > - { P10_BUILTIN_VEC_DIVE, P10V_BUILTIN_DIVEU_V2DI, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, > - RS6000_BTI_unsigned_V2DI, 0 }, > - { P10_BUILTIN_VEC_DIVE, P10V_BUILTIN_DIVES_V1TI, > - RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, 0 }, > - { P10_BUILTIN_VEC_DIVE, P10V_BUILTIN_DIVEU_V1TI, > - RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, > - RS6000_BTI_unsigned_V1TI, 0 }, > - > - { P10_BUILTIN_VEC_MOD, P10V_BUILTIN_MODS_V4SI, > - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, > - { P10_BUILTIN_VEC_MOD, P10V_BUILTIN_MODU_V4SI, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, > - RS6000_BTI_unsigned_V4SI, 0 }, > - { P10_BUILTIN_VEC_MOD, P10V_BUILTIN_MODS_V2DI, > - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, > - { P10_BUILTIN_VEC_MOD, P10V_BUILTIN_MODU_V2DI, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, > - RS6000_BTI_unsigned_V2DI, 0 }, > - { P10_BUILTIN_VEC_MOD, P10V_BUILTIN_MODS_V1TI, > - RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, 0 }, > - { P10_BUILTIN_VEC_MOD, P10V_BUILTIN_MODU_V1TI, > - RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, > - RS6000_BTI_unsigned_V1TI, 0 }, > - > - { VSX_BUILTIN_VEC_DOUBLE, VSX_BUILTIN_XVCVSXDDP, > - RS6000_BTI_V2DF, RS6000_BTI_V2DI, 0, 0 }, > - { VSX_BUILTIN_VEC_DOUBLE, VSX_BUILTIN_XVCVUXDDP, > - RS6000_BTI_V2DF, RS6000_BTI_unsigned_V2DI, 0, 0 }, > - > - { VSX_BUILTIN_VEC_DOUBLEE, VSX_BUILTIN_DOUBLEE_V4SI, > - RS6000_BTI_V2DF, RS6000_BTI_V4SI, 0, 0 }, > - { VSX_BUILTIN_VEC_DOUBLEE, VSX_BUILTIN_UNS_DOUBLEE_V4SI, > - RS6000_BTI_V2DF, RS6000_BTI_unsigned_V4SI, 0, 0 }, > - { VSX_BUILTIN_VEC_DOUBLEE, VSX_BUILTIN_DOUBLEE_V4SF, > - RS6000_BTI_V2DF, RS6000_BTI_V4SF, 0, 0 }, > - > - { VSX_BUILTIN_VEC_DOUBLEO, VSX_BUILTIN_DOUBLEO_V4SI, > - RS6000_BTI_V2DF, RS6000_BTI_V4SI, 0, 0 }, > - { VSX_BUILTIN_VEC_DOUBLEO, VSX_BUILTIN_UNS_DOUBLEO_V4SI, > - RS6000_BTI_V2DF, RS6000_BTI_unsigned_V4SI, 0, 0 }, > - { VSX_BUILTIN_VEC_DOUBLEO, VSX_BUILTIN_DOUBLEO_V4SF, > - RS6000_BTI_V2DF, RS6000_BTI_V4SF, 0, 0 }, > - > - { VSX_BUILTIN_VEC_DOUBLEH, VSX_BUILTIN_DOUBLEH_V4SI, > - RS6000_BTI_V2DF, RS6000_BTI_V4SI, 0, 0 }, > - { VSX_BUILTIN_VEC_DOUBLEH, VSX_BUILTIN_UNS_DOUBLEH_V4SI, > - RS6000_BTI_V2DF, RS6000_BTI_unsigned_V4SI, 0, 0 }, > - { VSX_BUILTIN_VEC_DOUBLEH, VSX_BUILTIN_DOUBLEH_V4SF, > - RS6000_BTI_V2DF, RS6000_BTI_V4SF, 0, 0 }, > - > - { VSX_BUILTIN_VEC_DOUBLEL, VSX_BUILTIN_DOUBLEL_V4SI, > - RS6000_BTI_V2DF, RS6000_BTI_V4SI, 0, 0 }, > - { VSX_BUILTIN_VEC_DOUBLEL, VSX_BUILTIN_UNS_DOUBLEL_V4SI, > - RS6000_BTI_V2DF, RS6000_BTI_unsigned_V4SI, 0, 0 }, > - { VSX_BUILTIN_VEC_DOUBLEL, VSX_BUILTIN_DOUBLEL_V4SF, > - RS6000_BTI_V2DF, RS6000_BTI_V4SF, 0, 0 }, > - > - { VSX_BUILTIN_VEC_FLOAT, VSX_BUILTIN_XVCVSXWSP_V4SF, > - RS6000_BTI_V4SF, RS6000_BTI_V4SI, 0, 0 }, > - { VSX_BUILTIN_VEC_FLOAT, VSX_BUILTIN_XVCVUXWSP_V4SF, > - RS6000_BTI_V4SF, RS6000_BTI_unsigned_V4SI, 0, 0 }, > - { P8V_BUILTIN_VEC_FLOAT2, P8V_BUILTIN_FLOAT2_V2DF, > - RS6000_BTI_V4SF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 }, > - { P8V_BUILTIN_VEC_FLOAT2, P8V_BUILTIN_FLOAT2_V2DI, > - RS6000_BTI_V4SF, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, > - { P8V_BUILTIN_VEC_FLOAT2, P8V_BUILTIN_UNS_FLOAT2_V2DI, > - RS6000_BTI_V4SF, RS6000_BTI_unsigned_V2DI, > - RS6000_BTI_unsigned_V2DI, 0 }, > - { VSX_BUILTIN_VEC_FLOATE, VSX_BUILTIN_FLOATE_V2DF, > - RS6000_BTI_V4SF, RS6000_BTI_V2DF, 0, 0 }, > - { VSX_BUILTIN_VEC_FLOATE, VSX_BUILTIN_FLOATE_V2DI, > - RS6000_BTI_V4SF, RS6000_BTI_V2DI, 0, 0 }, > - { VSX_BUILTIN_VEC_FLOATE, VSX_BUILTIN_UNS_FLOATE_V2DI, > - RS6000_BTI_V4SF, RS6000_BTI_unsigned_V2DI, 0, 0 }, > - { VSX_BUILTIN_VEC_FLOATO, VSX_BUILTIN_FLOATO_V2DF, > - RS6000_BTI_V4SF, RS6000_BTI_V2DF, 0, 0 }, > - { VSX_BUILTIN_VEC_FLOATO, VSX_BUILTIN_FLOATO_V2DI, > - RS6000_BTI_V4SF, RS6000_BTI_V2DI, 0, 0 }, > - { VSX_BUILTIN_VEC_FLOATO, VSX_BUILTIN_UNS_FLOATO_V2DI, > - RS6000_BTI_V4SF, RS6000_BTI_unsigned_V2DI, 0, 0 }, > - > - { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V1TI, > - RS6000_BTI_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_V1TI, 0 }, > - { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V1TI, > - RS6000_BTI_unsigned_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V1TI, 0 }, > - { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V1TI, > - RS6000_BTI_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_INTTI, 0 }, > - { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V1TI, > - RS6000_BTI_unsigned_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTTI, 0 }, > - > - { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V2DF, > - RS6000_BTI_V2DF, RS6000_BTI_INTSI, ~RS6000_BTI_V2DF, 0 }, > - { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V2DF, > - RS6000_BTI_V2DF, RS6000_BTI_INTSI, ~RS6000_BTI_double, 0 }, > - { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V2DI, > - RS6000_BTI_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_V2DI, 0 }, > - { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V2DI, > - RS6000_BTI_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_long_long, 0 }, > - { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V2DI, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_INTSI, > - ~RS6000_BTI_unsigned_V2DI, 0 }, > - { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V2DI, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_INTSI, > - ~RS6000_BTI_unsigned_long_long, 0 }, > - { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V2DI, > - RS6000_BTI_bool_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V2DI, 0 }, > - { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V4SF, > - RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_V4SF, 0 }, > - { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V4SF, > - RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float, 0 }, > - { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V4SI, > - RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V4SI, > - RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V4SI, > - RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI, 0 }, > - { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V4SI, > - RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_long, 0 }, > - { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V4SI, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V4SI, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI, 0 }, > - { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V4SI, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_long, 0 }, > - { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V8HI, > - RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V8HI, > - RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_pixel_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V8HI, > - RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V8HI, > - RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI, 0 }, > - { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V8HI, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V8HI, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI, 0 }, > - { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V16QI, > - RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V16QI, > - RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V16QI, > - RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI, 0 }, > - { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V16QI, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V16QI, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI, 0 }, > - { ALTIVEC_BUILTIN_VEC_LDE, ALTIVEC_BUILTIN_LVEBX, > - RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI, 0 }, > - { ALTIVEC_BUILTIN_VEC_LDE, ALTIVEC_BUILTIN_LVEBX, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI, 0 }, > - { ALTIVEC_BUILTIN_VEC_LDE, ALTIVEC_BUILTIN_LVEHX, > - RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI, 0 }, > - { ALTIVEC_BUILTIN_VEC_LDE, ALTIVEC_BUILTIN_LVEHX, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI, 0 }, > - { ALTIVEC_BUILTIN_VEC_LDE, ALTIVEC_BUILTIN_LVEWX, > - RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float, 0 }, > - { ALTIVEC_BUILTIN_VEC_LDE, ALTIVEC_BUILTIN_LVEWX, > - RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI, 0 }, > - { ALTIVEC_BUILTIN_VEC_LDE, ALTIVEC_BUILTIN_LVEWX, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI, 0 }, > - { ALTIVEC_BUILTIN_VEC_LDE, ALTIVEC_BUILTIN_LVEWX, > - RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_long, 0 }, > - { ALTIVEC_BUILTIN_VEC_LDE, ALTIVEC_BUILTIN_LVEWX, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_long, 0 }, > - { ALTIVEC_BUILTIN_VEC_LVEWX, ALTIVEC_BUILTIN_LVEWX, > - RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float, 0 }, > - { ALTIVEC_BUILTIN_VEC_LVEWX, ALTIVEC_BUILTIN_LVEWX, > - RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI, 0 }, > - { ALTIVEC_BUILTIN_VEC_LVEWX, ALTIVEC_BUILTIN_LVEWX, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI, 0 }, > - { ALTIVEC_BUILTIN_VEC_LVEWX, ALTIVEC_BUILTIN_LVEWX, > - RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_long, 0 }, > - { ALTIVEC_BUILTIN_VEC_LVEWX, ALTIVEC_BUILTIN_LVEWX, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_long, 0 }, > - { ALTIVEC_BUILTIN_VEC_LVEHX, ALTIVEC_BUILTIN_LVEHX, > - RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI, 0 }, > - { ALTIVEC_BUILTIN_VEC_LVEHX, ALTIVEC_BUILTIN_LVEHX, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI, 0 }, > - { ALTIVEC_BUILTIN_VEC_LVEBX, ALTIVEC_BUILTIN_LVEBX, > - RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI, 0 }, > - { ALTIVEC_BUILTIN_VEC_LVEBX, ALTIVEC_BUILTIN_LVEBX, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI, 0 }, > - > - /* vector signed__int128 vec_xl_sext (signed long long, signed char *); > - vector signed__int128 vec_xl_sext (signed long long, signed short *); > - vector signed__int128 vec_xl_sext (signed long long, signed int *); > - vector signed__int128 vec_xl_sext (signed long long, signed longlong *); */ > - { P10_BUILTIN_VEC_SE_LXVRX, P10_BUILTIN_SE_LXVRBX, > - RS6000_BTI_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI, 0 }, > - { P10_BUILTIN_VEC_SE_LXVRX, P10_BUILTIN_SE_LXVRHX, > - RS6000_BTI_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI, 0 }, > - { P10_BUILTIN_VEC_SE_LXVRX, P10_BUILTIN_SE_LXVRWX, > - RS6000_BTI_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI, 0 }, > - { P10_BUILTIN_VEC_SE_LXVRX, P10_BUILTIN_SE_LXVRDX, > - RS6000_BTI_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_INTDI, 0 }, > - { P10_BUILTIN_VEC_SE_LXVRX, P10_BUILTIN_SE_LXVRDX, > - RS6000_BTI_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_long_long, 0 }, > - > - /* vector unsigned__int128 vec_xl_zext (signed long long, unsigned char *); > - vector unsigned__int128 vec_xl_zext (signed long long, unsigned short *); > - vector unsigned__int128 vec_xl_zext (signed long long, unsigned int *); > - vector unsigned__int128 vec_xl_zext (signed long long, unsigned longlong *); */ > - { P10_BUILTIN_VEC_ZE_LXVRX, P10_BUILTIN_ZE_LXVRBX, > - RS6000_BTI_unsigned_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI, 0 }, > - { P10_BUILTIN_VEC_ZE_LXVRX, P10_BUILTIN_ZE_LXVRHX, > - RS6000_BTI_unsigned_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI, 0 }, > - { P10_BUILTIN_VEC_ZE_LXVRX, P10_BUILTIN_ZE_LXVRWX, > - RS6000_BTI_unsigned_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI, 0 }, > - { P10_BUILTIN_VEC_ZE_LXVRX, P10_BUILTIN_ZE_LXVRDX, > - RS6000_BTI_unsigned_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTDI, 0 }, > - { P10_BUILTIN_VEC_ZE_LXVRX, P10_BUILTIN_ZE_LXVRDX, > - RS6000_BTI_unsigned_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_long_long, 0 }, > - > - /* void vec_xst_trunc (vector signed __int128, signed long long, signed char *); > - void vec_xst_trunc (vector unsigned __int128, signed long long, unsigned char *); > - void vec_xst_trunc (vector signed __int128, signed long long, signed char *); > - void vec_xst_trunc (vector unsigned __int128, signed long long, unsigned char *); > - void vec_xst_trunc (vector signed __int128, signed long long, signed char *); > - void vec_xst_trunc (vector unsigned __int128, signed long long, unsigned char *); > - void vec_xst_trunc (vector signed __int128, signed long long, signed char *); > - void vec_xst_trunc (vector unsigned __int128, signed long long, unsigned char *); */ > - { P10_BUILTIN_VEC_TR_STXVRX, P10_BUILTIN_TR_STXVRBX, RS6000_BTI_void, > - RS6000_BTI_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI }, > - { P10_BUILTIN_VEC_TR_STXVRX, P10_BUILTIN_TR_STXVRBX, RS6000_BTI_void, > - RS6000_BTI_unsigned_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI }, > - { P10_BUILTIN_VEC_TR_STXVRX, P10_BUILTIN_TR_STXVRHX, RS6000_BTI_void, > - RS6000_BTI_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI }, > - { P10_BUILTIN_VEC_TR_STXVRX, P10_BUILTIN_TR_STXVRHX, RS6000_BTI_void, > - RS6000_BTI_unsigned_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI }, > - { P10_BUILTIN_VEC_TR_STXVRX, P10_BUILTIN_TR_STXVRWX, RS6000_BTI_void, > - RS6000_BTI_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI }, > - { P10_BUILTIN_VEC_TR_STXVRX, P10_BUILTIN_TR_STXVRWX, RS6000_BTI_void, > - RS6000_BTI_unsigned_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI }, > - { P10_BUILTIN_VEC_TR_STXVRX, P10_BUILTIN_TR_STXVRDX, RS6000_BTI_void, > - RS6000_BTI_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_long_long }, > - { P10_BUILTIN_VEC_TR_STXVRX, P10_BUILTIN_TR_STXVRDX, RS6000_BTI_void, > - RS6000_BTI_unsigned_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_long_long }, > - { P10_BUILTIN_VEC_TR_STXVRX, P10_BUILTIN_TR_STXVRDX, RS6000_BTI_void, > - RS6000_BTI_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_INTDI }, > - { P10_BUILTIN_VEC_TR_STXVRX, P10_BUILTIN_TR_STXVRDX, RS6000_BTI_void, > - RS6000_BTI_unsigned_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTDI }, > - > - /* vector float vec_ldl (int, vector float *); > - vector float vec_ldl (int, float *); */ > - { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V4SF, > - RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_V4SF, 0 }, > - { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V4SF, > - RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float, 0 }, > - > - /* vector bool int vec_ldl (int, vector bool int *); > - vector bool int vec_ldl (int, bool int *); > - vector int vec_ldl (int, vector int *); > - vector int vec_ldl (int, int *); > - vector unsigned int vec_ldl (int, vector unsigned int *); > - vector unsigned int vec_ldl (int, unsigned int *); */ > - { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V4SI, > - RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V4SI, > - RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_int, 0 }, > - { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V4SI, > - RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V4SI, > - RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI, 0 }, > - { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V4SI, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V4SI, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI, 0 }, > - > - /* vector bool short vec_ldl (int, vector bool short *); > - vector bool short vec_ldl (int, bool short *); > - vector pixel vec_ldl (int, vector pixel *); > - vector short vec_ldl (int, vector short *); > - vector short vec_ldl (int, short *); > - vector unsigned short vec_ldl (int, vector unsigned short *); > - vector unsigned short vec_ldl (int, unsigned short *); */ > - { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V8HI, > - RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V8HI, > - RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_short, 0 }, > - { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V8HI, > - RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_pixel_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V8HI, > - RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V8HI, > - RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI, 0 }, > - { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V8HI, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V8HI, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI, 0 }, > - > - /* vector bool char vec_ldl (int, vector bool char *); > - vector bool char vec_ldl (int, bool char *); > - vector char vec_ldl (int, vector char *); > - vector char vec_ldl (int, char *); > - vector unsigned char vec_ldl (int, vector unsigned char *); > - vector unsigned char vec_ldl (int, unsigned char *); */ > - { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V16QI, > - RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V16QI, > - RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_char, 0 }, > - { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V16QI, > - RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V16QI, > - RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI, 0 }, > - { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V16QI, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, > - ~RS6000_BTI_unsigned_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V16QI, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI, 0 }, > - > - /* vector double vec_ldl (int, vector double *); > - vector double vec_ldl (int, double *); */ > - { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V2DF, > - RS6000_BTI_V2DF, RS6000_BTI_INTSI, ~RS6000_BTI_V2DF, 0 }, > - { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V2DF, > - RS6000_BTI_V2DF, RS6000_BTI_INTSI, ~RS6000_BTI_double, 0 }, > - > - /* vector long long vec_ldl (int, vector long long *); > - vector long long vec_ldl (int, long long *); > - vector unsigned long long vec_ldl (int, vector unsigned long long *); > - vector unsigned long long vec_ldl (int, unsigned long long *); > - vector bool long long vec_ldl (int, vector bool long long *); > - vector bool long long vec_ldl (int, bool long long *); */ > - { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V2DI, > - RS6000_BTI_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_V2DI, 0 }, > - { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V2DI, > - RS6000_BTI_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_long_long, 0 }, > - { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V2DI, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_INTSI, > - ~RS6000_BTI_unsigned_V2DI, 0 }, > - { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V2DI, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_INTSI, > - ~RS6000_BTI_unsigned_long_long, 0 }, > - { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V2DI, > - RS6000_BTI_bool_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V2DI, 0 }, > - { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V2DI, > - RS6000_BTI_bool_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_long_long, 0 }, > - > - { ALTIVEC_BUILTIN_VEC_LVSL, ALTIVEC_BUILTIN_LVSL, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI, 0 }, > - { ALTIVEC_BUILTIN_VEC_LVSL, ALTIVEC_BUILTIN_LVSL, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI, 0 }, > - { ALTIVEC_BUILTIN_VEC_LVSL, ALTIVEC_BUILTIN_LVSL, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI, 0 }, > - { ALTIVEC_BUILTIN_VEC_LVSL, ALTIVEC_BUILTIN_LVSL, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI, 0 }, > - { ALTIVEC_BUILTIN_VEC_LVSL, ALTIVEC_BUILTIN_LVSL, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI, 0 }, > - { ALTIVEC_BUILTIN_VEC_LVSL, ALTIVEC_BUILTIN_LVSL, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI, 0 }, > - { ALTIVEC_BUILTIN_VEC_LVSL, ALTIVEC_BUILTIN_LVSL, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_long, 0 }, > - { ALTIVEC_BUILTIN_VEC_LVSL, ALTIVEC_BUILTIN_LVSL, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_long, 0 }, > - { ALTIVEC_BUILTIN_VEC_LVSL, ALTIVEC_BUILTIN_LVSL, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_float, 0 }, > - { ALTIVEC_BUILTIN_VEC_LVSL, ALTIVEC_BUILTIN_LVSL, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_double, 0 }, > - { ALTIVEC_BUILTIN_VEC_LVSL, ALTIVEC_BUILTIN_LVSL, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTDI, 0 }, > - { ALTIVEC_BUILTIN_VEC_LVSL, ALTIVEC_BUILTIN_LVSL, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTDI, 0 }, > - { ALTIVEC_BUILTIN_VEC_LVSL, ALTIVEC_BUILTIN_LVSL, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_long_long, 0 }, > - { ALTIVEC_BUILTIN_VEC_LVSL, ALTIVEC_BUILTIN_LVSL, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, > - ~RS6000_BTI_unsigned_long_long, 0 }, > - { ALTIVEC_BUILTIN_VEC_LVSR, ALTIVEC_BUILTIN_LVSR, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI, 0 }, > - { ALTIVEC_BUILTIN_VEC_LVSR, ALTIVEC_BUILTIN_LVSR, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI, 0 }, > - { ALTIVEC_BUILTIN_VEC_LVSR, ALTIVEC_BUILTIN_LVSR, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI, 0 }, > - { ALTIVEC_BUILTIN_VEC_LVSR, ALTIVEC_BUILTIN_LVSR, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI, 0 }, > - { ALTIVEC_BUILTIN_VEC_LVSR, ALTIVEC_BUILTIN_LVSR, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI, 0 }, > - { ALTIVEC_BUILTIN_VEC_LVSR, ALTIVEC_BUILTIN_LVSR, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI, 0 }, > - { ALTIVEC_BUILTIN_VEC_LVSR, ALTIVEC_BUILTIN_LVSR, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_long, 0 }, > - { ALTIVEC_BUILTIN_VEC_LVSR, ALTIVEC_BUILTIN_LVSR, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_long, 0 }, > - { ALTIVEC_BUILTIN_VEC_LVSR, ALTIVEC_BUILTIN_LVSR, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_float, 0 }, > - { ALTIVEC_BUILTIN_VEC_LVSR, ALTIVEC_BUILTIN_LVSR, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_double, 0 }, > - { ALTIVEC_BUILTIN_VEC_LVSR, ALTIVEC_BUILTIN_LVSR, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTDI, 0 }, > - { ALTIVEC_BUILTIN_VEC_LVSR, ALTIVEC_BUILTIN_LVSR, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTDI, 0 }, > - { ALTIVEC_BUILTIN_VEC_LVSR, ALTIVEC_BUILTIN_LVSR, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_long_long, 0 }, > - { ALTIVEC_BUILTIN_VEC_LVSR, ALTIVEC_BUILTIN_LVSR, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, > - ~RS6000_BTI_unsigned_long_long, 0 }, > - { ALTIVEC_BUILTIN_VEC_LVLX, ALTIVEC_BUILTIN_LVLX, > - RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_V4SF, 0 }, > - { ALTIVEC_BUILTIN_VEC_LVLX, ALTIVEC_BUILTIN_LVLX, > - RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float, 0 }, > - { ALTIVEC_BUILTIN_VEC_LVLX, ALTIVEC_BUILTIN_LVLX, > - RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_LVLX, ALTIVEC_BUILTIN_LVLX, > - RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_LVLX, ALTIVEC_BUILTIN_LVLX, > - RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI, 0 }, > - { ALTIVEC_BUILTIN_VEC_LVLX, ALTIVEC_BUILTIN_LVLX, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_LVLX, ALTIVEC_BUILTIN_LVLX, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI, 0 }, > - { ALTIVEC_BUILTIN_VEC_LVLX, ALTIVEC_BUILTIN_LVLX, > - RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_LVLX, ALTIVEC_BUILTIN_LVLX, > - RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_pixel_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_LVLX, ALTIVEC_BUILTIN_LVLX, > - RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_LVLX, ALTIVEC_BUILTIN_LVLX, > - RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI, 0 }, > - { ALTIVEC_BUILTIN_VEC_LVLX, ALTIVEC_BUILTIN_LVLX, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_LVLX, ALTIVEC_BUILTIN_LVLX, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI, 0 }, > - { ALTIVEC_BUILTIN_VEC_LVLX, ALTIVEC_BUILTIN_LVLX, > - RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_LVLX, ALTIVEC_BUILTIN_LVLX, > - RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_LVLX, ALTIVEC_BUILTIN_LVLX, > - RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI, 0 }, > - { ALTIVEC_BUILTIN_VEC_LVLX, ALTIVEC_BUILTIN_LVLX, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_LVLX, ALTIVEC_BUILTIN_LVLX, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI, 0 }, > - { ALTIVEC_BUILTIN_VEC_LVLXL, ALTIVEC_BUILTIN_LVLXL, > - RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_V4SF, 0 }, > - { ALTIVEC_BUILTIN_VEC_LVLXL, ALTIVEC_BUILTIN_LVLXL, > - RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float, 0 }, > - { ALTIVEC_BUILTIN_VEC_LVLXL, ALTIVEC_BUILTIN_LVLXL, > - RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_LVLXL, ALTIVEC_BUILTIN_LVLXL, > - RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_LVLXL, ALTIVEC_BUILTIN_LVLXL, > - RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI, 0 }, > - { ALTIVEC_BUILTIN_VEC_LVLXL, ALTIVEC_BUILTIN_LVLXL, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_LVLXL, ALTIVEC_BUILTIN_LVLXL, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI, 0 }, > - { ALTIVEC_BUILTIN_VEC_LVLXL, ALTIVEC_BUILTIN_LVLXL, > - RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_LVLXL, ALTIVEC_BUILTIN_LVLXL, > - RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_pixel_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_LVLXL, ALTIVEC_BUILTIN_LVLXL, > - RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_LVLXL, ALTIVEC_BUILTIN_LVLXL, > - RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI, 0 }, > - { ALTIVEC_BUILTIN_VEC_LVLXL, ALTIVEC_BUILTIN_LVLXL, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_LVLXL, ALTIVEC_BUILTIN_LVLXL, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI, 0 }, > - { ALTIVEC_BUILTIN_VEC_LVLXL, ALTIVEC_BUILTIN_LVLXL, > - RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_LVLXL, ALTIVEC_BUILTIN_LVLXL, > - RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_LVLXL, ALTIVEC_BUILTIN_LVLXL, > - RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI, 0 }, > - { ALTIVEC_BUILTIN_VEC_LVLXL, ALTIVEC_BUILTIN_LVLXL, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_LVLXL, ALTIVEC_BUILTIN_LVLXL, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI, 0 }, > - { ALTIVEC_BUILTIN_VEC_LVRX, ALTIVEC_BUILTIN_LVRX, > - RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_V4SF, 0 }, > - { ALTIVEC_BUILTIN_VEC_LVRX, ALTIVEC_BUILTIN_LVRX, > - RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float, 0 }, > - { ALTIVEC_BUILTIN_VEC_LVRX, ALTIVEC_BUILTIN_LVRX, > - RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_LVRX, ALTIVEC_BUILTIN_LVRX, > - RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_LVRX, ALTIVEC_BUILTIN_LVRX, > - RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI, 0 }, > - { ALTIVEC_BUILTIN_VEC_LVRX, ALTIVEC_BUILTIN_LVRX, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_LVRX, ALTIVEC_BUILTIN_LVRX, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI, 0 }, > - { ALTIVEC_BUILTIN_VEC_LVRX, ALTIVEC_BUILTIN_LVRX, > - RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_LVRX, ALTIVEC_BUILTIN_LVRX, > - RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_pixel_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_LVRX, ALTIVEC_BUILTIN_LVRX, > - RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_LVRX, ALTIVEC_BUILTIN_LVRX, > - RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI, 0 }, > - { ALTIVEC_BUILTIN_VEC_LVRX, ALTIVEC_BUILTIN_LVRX, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_LVRX, ALTIVEC_BUILTIN_LVRX, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI, 0 }, > - { ALTIVEC_BUILTIN_VEC_LVRX, ALTIVEC_BUILTIN_LVRX, > - RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_LVRX, ALTIVEC_BUILTIN_LVRX, > - RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_LVRX, ALTIVEC_BUILTIN_LVRX, > - RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI, 0 }, > - { ALTIVEC_BUILTIN_VEC_LVRX, ALTIVEC_BUILTIN_LVRX, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_LVRX, ALTIVEC_BUILTIN_LVRX, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI, 0 }, > - { ALTIVEC_BUILTIN_VEC_LVRXL, ALTIVEC_BUILTIN_LVRXL, > - RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_V4SF, 0 }, > - { ALTIVEC_BUILTIN_VEC_LVRXL, ALTIVEC_BUILTIN_LVRXL, > - RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float, 0 }, > - { ALTIVEC_BUILTIN_VEC_LVRXL, ALTIVEC_BUILTIN_LVRXL, > - RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_LVRXL, ALTIVEC_BUILTIN_LVRXL, > - RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_LVRXL, ALTIVEC_BUILTIN_LVRXL, > - RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI, 0 }, > - { ALTIVEC_BUILTIN_VEC_LVRXL, ALTIVEC_BUILTIN_LVRXL, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_LVRXL, ALTIVEC_BUILTIN_LVRXL, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI, 0 }, > - { ALTIVEC_BUILTIN_VEC_LVRXL, ALTIVEC_BUILTIN_LVRXL, > - RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_LVRXL, ALTIVEC_BUILTIN_LVRXL, > - RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_pixel_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_LVRXL, ALTIVEC_BUILTIN_LVRXL, > - RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_LVRXL, ALTIVEC_BUILTIN_LVRXL, > - RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI, 0 }, > - { ALTIVEC_BUILTIN_VEC_LVRXL, ALTIVEC_BUILTIN_LVRXL, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_LVRXL, ALTIVEC_BUILTIN_LVRXL, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI, 0 }, > - { ALTIVEC_BUILTIN_VEC_LVRXL, ALTIVEC_BUILTIN_LVRXL, > - RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_LVRXL, ALTIVEC_BUILTIN_LVRXL, > - RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_LVRXL, ALTIVEC_BUILTIN_LVRXL, > - RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI, 0 }, > - { ALTIVEC_BUILTIN_VEC_LVRXL, ALTIVEC_BUILTIN_LVRXL, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_LVRXL, ALTIVEC_BUILTIN_LVRXL, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI, 0 }, > - { ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXUB, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXUB, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXUB, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXSB, > - RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXSB, > - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXSB, > - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXUH, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXUH, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXUH, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXSH, > - RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXSH, > - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXSH, > - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXUW, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXUW, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXUW, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXSW, > - RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXSW, > - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXSW, > - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_MAX, P8V_BUILTIN_VMAXUD, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, > - { ALTIVEC_BUILTIN_VEC_MAX, P8V_BUILTIN_VMAXUD, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, 0 }, > - { ALTIVEC_BUILTIN_VEC_MAX, P8V_BUILTIN_VMAXUD, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, > - { ALTIVEC_BUILTIN_VEC_MAX, P8V_BUILTIN_VMAXSD, > - RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, 0 }, > - { ALTIVEC_BUILTIN_VEC_MAX, P8V_BUILTIN_VMAXSD, > - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, 0 }, > - { ALTIVEC_BUILTIN_VEC_MAX, P8V_BUILTIN_VMAXSD, > - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, > - { ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXFP, > - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, > - { ALTIVEC_BUILTIN_VEC_MAX, VSX_BUILTIN_XVMAXDP, > - RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 }, > - { ALTIVEC_BUILTIN_VEC_VMAXFP, ALTIVEC_BUILTIN_VMAXFP, > - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, > - { ALTIVEC_BUILTIN_VEC_VMAXSW, ALTIVEC_BUILTIN_VMAXSW, > - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VMAXSW, ALTIVEC_BUILTIN_VMAXSW, > - RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VMAXSW, ALTIVEC_BUILTIN_VMAXSW, > - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VMAXUW, ALTIVEC_BUILTIN_VMAXUW, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VMAXUW, ALTIVEC_BUILTIN_VMAXUW, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VMAXUW, ALTIVEC_BUILTIN_VMAXUW, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VMAXUW, ALTIVEC_BUILTIN_VMAXUW, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VMAXUW, ALTIVEC_BUILTIN_VMAXUW, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VMAXSH, ALTIVEC_BUILTIN_VMAXSH, > - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VMAXSH, ALTIVEC_BUILTIN_VMAXSH, > - RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VMAXSH, ALTIVEC_BUILTIN_VMAXSH, > - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VMAXUH, ALTIVEC_BUILTIN_VMAXUH, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VMAXUH, ALTIVEC_BUILTIN_VMAXUH, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VMAXUH, ALTIVEC_BUILTIN_VMAXUH, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VMAXUH, ALTIVEC_BUILTIN_VMAXUH, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VMAXUH, ALTIVEC_BUILTIN_VMAXUH, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VMAXSB, ALTIVEC_BUILTIN_VMAXSB, > - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VMAXSB, ALTIVEC_BUILTIN_VMAXSB, > - RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VMAXSB, ALTIVEC_BUILTIN_VMAXSB, > - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VMAXUB, ALTIVEC_BUILTIN_VMAXUB, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VMAXUB, ALTIVEC_BUILTIN_VMAXUB, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VMAXUB, ALTIVEC_BUILTIN_VMAXUB, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VMAXUB, ALTIVEC_BUILTIN_VMAXUB, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VMAXUB, ALTIVEC_BUILTIN_VMAXUB, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_MERGEH, ALTIVEC_BUILTIN_VMRGHB, > - RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_MERGEH, ALTIVEC_BUILTIN_VMRGHB, > - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_MERGEH, ALTIVEC_BUILTIN_VMRGHB, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_MERGEH, ALTIVEC_BUILTIN_VMRGHH, > - RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_MERGEH, ALTIVEC_BUILTIN_VMRGHH, > - RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_MERGEH, ALTIVEC_BUILTIN_VMRGHH, > - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_MERGEH, ALTIVEC_BUILTIN_VMRGHH, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_MERGEH, ALTIVEC_BUILTIN_VMRGHW, > - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, > - { ALTIVEC_BUILTIN_VEC_MERGEH, ALTIVEC_BUILTIN_VMRGHW, > - RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_MERGEH, ALTIVEC_BUILTIN_VMRGHW, > - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_MERGEH, ALTIVEC_BUILTIN_VMRGHW, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_MERGEH, VSX_BUILTIN_VEC_MERGEH_V2DF, > - RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 }, > - { ALTIVEC_BUILTIN_VEC_MERGEH, VSX_BUILTIN_VEC_MERGEH_V2DI, > - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, > - { ALTIVEC_BUILTIN_VEC_MERGEH, VSX_BUILTIN_VEC_MERGEH_V2DI, > - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, 0 }, > - { ALTIVEC_BUILTIN_VEC_MERGEH, VSX_BUILTIN_VEC_MERGEH_V2DI, > - RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, 0 }, > - { ALTIVEC_BUILTIN_VEC_MERGEH, VSX_BUILTIN_VEC_MERGEH_V2DI, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, > - { ALTIVEC_BUILTIN_VEC_MERGEH, VSX_BUILTIN_VEC_MERGEH_V2DI, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, 0 }, > - { ALTIVEC_BUILTIN_VEC_MERGEH, VSX_BUILTIN_VEC_MERGEH_V2DI, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, > - { ALTIVEC_BUILTIN_VEC_MERGEH, VSX_BUILTIN_VEC_MERGEH_V2DI, > - RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VMRGHW, ALTIVEC_BUILTIN_VMRGHW, > - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, > - { ALTIVEC_BUILTIN_VEC_VMRGHW, ALTIVEC_BUILTIN_VMRGHW, > - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VMRGHW, ALTIVEC_BUILTIN_VMRGHW, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VMRGHW, ALTIVEC_BUILTIN_VMRGHW, > - RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VMRGHH, ALTIVEC_BUILTIN_VMRGHH, > - RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VMRGHH, ALTIVEC_BUILTIN_VMRGHH, > - RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VMRGHH, ALTIVEC_BUILTIN_VMRGHH, > - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VMRGHH, ALTIVEC_BUILTIN_VMRGHH, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VMRGHB, ALTIVEC_BUILTIN_VMRGHB, > - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VMRGHB, ALTIVEC_BUILTIN_VMRGHB, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VMRGHB, ALTIVEC_BUILTIN_VMRGHB, > - RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_MERGEL, ALTIVEC_BUILTIN_VMRGLB, > - RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_MERGEL, ALTIVEC_BUILTIN_VMRGLB, > - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_MERGEL, ALTIVEC_BUILTIN_VMRGLB, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_MERGEL, ALTIVEC_BUILTIN_VMRGLH, > - RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_MERGEL, ALTIVEC_BUILTIN_VMRGLH, > - RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_MERGEL, ALTIVEC_BUILTIN_VMRGLH, > - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_MERGEL, ALTIVEC_BUILTIN_VMRGLH, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_MERGEL, ALTIVEC_BUILTIN_VMRGLW, > - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, > - { ALTIVEC_BUILTIN_VEC_MERGEL, ALTIVEC_BUILTIN_VMRGLW, > - RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_MERGEL, ALTIVEC_BUILTIN_VMRGLW, > - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_MERGEL, ALTIVEC_BUILTIN_VMRGLW, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_MERGEL, VSX_BUILTIN_VEC_MERGEL_V2DF, > - RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 }, > - { ALTIVEC_BUILTIN_VEC_MERGEL, VSX_BUILTIN_VEC_MERGEL_V2DI, > - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, > - { ALTIVEC_BUILTIN_VEC_MERGEL, VSX_BUILTIN_VEC_MERGEL_V2DI, > - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, 0 }, > - { ALTIVEC_BUILTIN_VEC_MERGEL, VSX_BUILTIN_VEC_MERGEL_V2DI, > - RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, 0 }, > - { ALTIVEC_BUILTIN_VEC_MERGEL, VSX_BUILTIN_VEC_MERGEL_V2DI, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, > - { ALTIVEC_BUILTIN_VEC_MERGEL, VSX_BUILTIN_VEC_MERGEL_V2DI, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, 0 }, > - { ALTIVEC_BUILTIN_VEC_MERGEL, VSX_BUILTIN_VEC_MERGEL_V2DI, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, > - { ALTIVEC_BUILTIN_VEC_MERGEL, VSX_BUILTIN_VEC_MERGEL_V2DI, > - RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VMRGLW, ALTIVEC_BUILTIN_VMRGLW, > - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, > - { ALTIVEC_BUILTIN_VEC_VMRGLW, ALTIVEC_BUILTIN_VMRGLW, > - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VMRGLW, ALTIVEC_BUILTIN_VMRGLW, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VMRGLW, ALTIVEC_BUILTIN_VMRGLW, > - RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VMRGLH, ALTIVEC_BUILTIN_VMRGLH, > - RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VMRGLH, ALTIVEC_BUILTIN_VMRGLH, > - RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VMRGLH, ALTIVEC_BUILTIN_VMRGLH, > - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VMRGLH, ALTIVEC_BUILTIN_VMRGLH, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VMRGLB, ALTIVEC_BUILTIN_VMRGLB, > - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VMRGLB, ALTIVEC_BUILTIN_VMRGLB, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VMRGLB, ALTIVEC_BUILTIN_VMRGLB, > - RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINUB, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINUB, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINUB, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINSB, > - RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINSB, > - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINSB, > - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINUH, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINUH, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINUH, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINSH, > - RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINSH, > - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINSH, > - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINUW, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINUW, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINUW, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINSW, > - RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINSW, > - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINSW, > - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_MIN, P8V_BUILTIN_VMINUD, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, > - { ALTIVEC_BUILTIN_VEC_MIN, P8V_BUILTIN_VMINUD, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, 0 }, > - { ALTIVEC_BUILTIN_VEC_MIN, P8V_BUILTIN_VMINUD, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, > - { ALTIVEC_BUILTIN_VEC_MIN, P8V_BUILTIN_VMINSD, > - RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, 0 }, > - { ALTIVEC_BUILTIN_VEC_MIN, P8V_BUILTIN_VMINSD, > - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, 0 }, > - { ALTIVEC_BUILTIN_VEC_MIN, P8V_BUILTIN_VMINSD, > - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, > - { ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINFP, > - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, > - { ALTIVEC_BUILTIN_VEC_MIN, VSX_BUILTIN_XVMINDP, > - RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 }, > - { ALTIVEC_BUILTIN_VEC_VMINFP, ALTIVEC_BUILTIN_VMINFP, > - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, > - { ALTIVEC_BUILTIN_VEC_VMINSW, ALTIVEC_BUILTIN_VMINSW, > - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VMINSW, ALTIVEC_BUILTIN_VMINSW, > - RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VMINSW, ALTIVEC_BUILTIN_VMINSW, > - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VMINUW, ALTIVEC_BUILTIN_VMINUW, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VMINUW, ALTIVEC_BUILTIN_VMINUW, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VMINUW, ALTIVEC_BUILTIN_VMINUW, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VMINUW, ALTIVEC_BUILTIN_VMINUW, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VMINUW, ALTIVEC_BUILTIN_VMINUW, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VMINSH, ALTIVEC_BUILTIN_VMINSH, > - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VMINSH, ALTIVEC_BUILTIN_VMINSH, > - RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VMINSH, ALTIVEC_BUILTIN_VMINSH, > - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VMINSB, ALTIVEC_BUILTIN_VMINSB, > - RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VMINSB, ALTIVEC_BUILTIN_VMINSB, > - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VMINSB, ALTIVEC_BUILTIN_VMINSB, > - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VMINUH, ALTIVEC_BUILTIN_VMINUH, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VMINUH, ALTIVEC_BUILTIN_VMINUH, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VMINUH, ALTIVEC_BUILTIN_VMINUH, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VMINUH, ALTIVEC_BUILTIN_VMINUH, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VMINUH, ALTIVEC_BUILTIN_VMINUH, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VMINUB, ALTIVEC_BUILTIN_VMINUB, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VMINUB, ALTIVEC_BUILTIN_VMINUB, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VMINUB, ALTIVEC_BUILTIN_VMINUB, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VMINUB, ALTIVEC_BUILTIN_VMINUB, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VMINUB, ALTIVEC_BUILTIN_VMINUB, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, 0 }, > - { P10_BUILTIN_VEC_MULH, P10V_BUILTIN_MULHS_V4SI, > - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, > - { P10_BUILTIN_VEC_MULH, P10V_BUILTIN_MULHU_V4SI, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, > - RS6000_BTI_unsigned_V4SI, 0 }, > - { P10_BUILTIN_VEC_MULH, P10V_BUILTIN_MULHS_V2DI, > - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, > - { P10_BUILTIN_VEC_MULH, P10V_BUILTIN_MULHU_V2DI, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, > - RS6000_BTI_unsigned_V2DI, 0 }, > - > - { ALTIVEC_BUILTIN_VEC_MULE, ALTIVEC_BUILTIN_VMULEUB, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_MULE, ALTIVEC_BUILTIN_VMULESB, > - RS6000_BTI_V8HI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_MULE, ALTIVEC_BUILTIN_VMULEUH, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_MULE, ALTIVEC_BUILTIN_VMULESH, > - RS6000_BTI_V4SI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_MULE, P8V_BUILTIN_VMULESW, > - RS6000_BTI_V2DI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_MULE, P8V_BUILTIN_VMULEUW, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V4SI, > - RS6000_BTI_unsigned_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_MULE, P10V_BUILTIN_VMULESD, > - RS6000_BTI_V1TI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, > - { ALTIVEC_BUILTIN_VEC_MULE, P10V_BUILTIN_VMULEUD, > - RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V2DI, > - RS6000_BTI_unsigned_V2DI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VMULEUB, ALTIVEC_BUILTIN_VMULEUB, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VMULESB, ALTIVEC_BUILTIN_VMULESB, > - RS6000_BTI_V8HI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VMULEUH, ALTIVEC_BUILTIN_VMULEUH, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VMULESH, ALTIVEC_BUILTIN_VMULESH, > - RS6000_BTI_V4SI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VMULEUW, P8V_BUILTIN_VMULEUW, > - RS6000_BTI_V2DI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VMULESW, P8V_BUILTIN_VMULESW, > - RS6000_BTI_V2DI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_MULO, ALTIVEC_BUILTIN_VMULOUB, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_MULO, ALTIVEC_BUILTIN_VMULOSB, > - RS6000_BTI_V8HI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_MULO, ALTIVEC_BUILTIN_VMULOUH, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_MULO, P8V_BUILTIN_VMULOSW, > - RS6000_BTI_V2DI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_MULO, P8V_BUILTIN_VMULOUW, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V4SI, > - RS6000_BTI_unsigned_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_MULO, P10V_BUILTIN_VMULOSD, > - RS6000_BTI_V1TI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, > - { ALTIVEC_BUILTIN_VEC_MULO, P10V_BUILTIN_VMULOUD, > - RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V2DI, > - RS6000_BTI_unsigned_V2DI, 0 }, > - { ALTIVEC_BUILTIN_VEC_MULO, ALTIVEC_BUILTIN_VMULOSH, > - RS6000_BTI_V4SI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VMULOSH, ALTIVEC_BUILTIN_VMULOSH, > - RS6000_BTI_V4SI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VMULOUH, ALTIVEC_BUILTIN_VMULOUH, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VMULOSB, ALTIVEC_BUILTIN_VMULOSB, > - RS6000_BTI_V8HI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VMULOUB, ALTIVEC_BUILTIN_VMULOUB, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VMULOUW, P8V_BUILTIN_VMULOUW, > - RS6000_BTI_V2DI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VMULOSW, P8V_BUILTIN_VMULOSW, > - RS6000_BTI_V2DI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, > - > - { ALTIVEC_BUILTIN_VEC_NABS, ALTIVEC_BUILTIN_NABS_V16QI, > - RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0, 0 }, > - { ALTIVEC_BUILTIN_VEC_NABS, ALTIVEC_BUILTIN_NABS_V8HI, > - RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0, 0 }, > - { ALTIVEC_BUILTIN_VEC_NABS, ALTIVEC_BUILTIN_NABS_V4SI, > - RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0, 0 }, > - { ALTIVEC_BUILTIN_VEC_NABS, ALTIVEC_BUILTIN_NABS_V2DI, > - RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0, 0 }, > - { ALTIVEC_BUILTIN_VEC_NABS, ALTIVEC_BUILTIN_NABS_V4SF, > - RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0, 0 }, > - { ALTIVEC_BUILTIN_VEC_NABS, VSX_BUILTIN_XVNABSDP, > - RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0, 0 }, > - { ALTIVEC_BUILTIN_VEC_NEARBYINT, VSX_BUILTIN_XVRDPI, > - RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0, 0 }, > - { ALTIVEC_BUILTIN_VEC_NEARBYINT, VSX_BUILTIN_XVRSPI, > - RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0, 0 }, > - > - { ALTIVEC_BUILTIN_VEC_NOR, ALTIVEC_BUILTIN_VNOR_V4SF, > - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, > - { ALTIVEC_BUILTIN_VEC_NOR, ALTIVEC_BUILTIN_VNOR_V2DF, > - RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 }, > - { ALTIVEC_BUILTIN_VEC_NOR, ALTIVEC_BUILTIN_VNOR_V2DI, > - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, > - { ALTIVEC_BUILTIN_VEC_NOR, ALTIVEC_BUILTIN_VNOR_V2DI, > - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, 0 }, > - { ALTIVEC_BUILTIN_VEC_NOR, ALTIVEC_BUILTIN_VNOR_V2DI, > - RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, 0 }, > - { ALTIVEC_BUILTIN_VEC_NOR, P10V_BUILTIN_VNOR_V1TI, > - RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_bool_V1TI, 0 }, > - { ALTIVEC_BUILTIN_VEC_NOR, P10V_BUILTIN_VNOR_V1TI, > - RS6000_BTI_V1TI, RS6000_BTI_bool_V1TI, RS6000_BTI_V1TI, 0 }, > - { ALTIVEC_BUILTIN_VEC_NOR, P10V_BUILTIN_VNOR_V1TI_UNS, > - RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, 0 }, > - { ALTIVEC_BUILTIN_VEC_NOR, P10V_BUILTIN_VNOR_V1TI_UNS, > - RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, RS6000_BTI_bool_V1TI, 0 }, > - { ALTIVEC_BUILTIN_VEC_NOR, P10V_BUILTIN_VNOR_V1TI_UNS, > - RS6000_BTI_unsigned_V1TI, RS6000_BTI_bool_V1TI, RS6000_BTI_unsigned_V1TI, 0 }, > - { ALTIVEC_BUILTIN_VEC_NOR, ALTIVEC_BUILTIN_VNOR_V2DI_UNS, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, > - { ALTIVEC_BUILTIN_VEC_NOR, ALTIVEC_BUILTIN_VNOR_V2DI_UNS, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, 0 }, > - { ALTIVEC_BUILTIN_VEC_NOR, ALTIVEC_BUILTIN_VNOR_V2DI_UNS, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, > - { ALTIVEC_BUILTIN_VEC_NOR, ALTIVEC_BUILTIN_VNOR_V2DI_UNS, > - RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, 0 }, > - { ALTIVEC_BUILTIN_VEC_NOR, ALTIVEC_BUILTIN_VNOR_V4SI, > - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_NOR, ALTIVEC_BUILTIN_VNOR_V4SI_UNS, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_NOR, ALTIVEC_BUILTIN_VNOR_V4SI_UNS, > - RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_NOR, ALTIVEC_BUILTIN_VNOR_V8HI, > - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_NOR, ALTIVEC_BUILTIN_VNOR_V8HI_UNS, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_NOR, ALTIVEC_BUILTIN_VNOR_V8HI_UNS, > - RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_NOR, ALTIVEC_BUILTIN_VNOR_V16QI, > - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_NOR, ALTIVEC_BUILTIN_VNOR_V16QI_UNS, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_NOR, ALTIVEC_BUILTIN_VNOR_V16QI_UNS, > - RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, 0 }, > - > - { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V4SF, > - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, > - { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V4SF, > - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_bool_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V4SF, > - RS6000_BTI_V4SF, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SF, 0 }, > - { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V2DF, > - RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 }, > - { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V2DF, > - RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_bool_V2DI, 0 }, > - { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V2DF, > - RS6000_BTI_V2DF, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DF, 0 }, > - { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V2DI, > - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, > - { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V2DI, > - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, 0 }, > - { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V2DI, > - RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, 0 }, > - { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V2DI_UNS, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, > - { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V2DI_UNS, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, 0 }, > - { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V2DI_UNS, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, > - { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V2DI_UNS, > - RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, 0 }, > - { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V4SI_UNS, > - RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V4SI, > - RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V4SI, > - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V4SI, > - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V4SI_UNS, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V4SI_UNS, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V4SI_UNS, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V8HI_UNS, > - RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V8HI, > - RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V8HI, > - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V8HI, > - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V8HI_UNS, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V8HI_UNS, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V8HI_UNS, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V16QI, > - RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V16QI_UNS, > - RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V16QI, > - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V16QI, > - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V16QI_UNS, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V16QI_UNS, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V16QI_UNS, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, > - > - { ALTIVEC_BUILTIN_VEC_PACK, ALTIVEC_BUILTIN_VPKUHUM, > - RS6000_BTI_V16QI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_PACK, ALTIVEC_BUILTIN_VPKUHUM, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_PACK, ALTIVEC_BUILTIN_VPKUHUM, > - RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_PACK, ALTIVEC_BUILTIN_VPKUWUM, > - RS6000_BTI_V8HI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_PACK, ALTIVEC_BUILTIN_VPKUWUM, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_PACK, ALTIVEC_BUILTIN_VPKUWUM, > - RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_PACK, P8V_BUILTIN_VPKUDUM, > - RS6000_BTI_V4SI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, > - { ALTIVEC_BUILTIN_VEC_PACK, P8V_BUILTIN_VPKUDUM, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, > - { ALTIVEC_BUILTIN_VEC_PACK, P8V_BUILTIN_VPKUDUM, > - RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, 0 }, > - { ALTIVEC_BUILTIN_VEC_PACK, P8V_BUILTIN_FLOAT2_V2DF, > - RS6000_BTI_V4SF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 }, > - > - { P8V_BUILTIN_VEC_NEG, P8V_BUILTIN_NEG_V16QI, > - RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0, 0 }, > - { P8V_BUILTIN_VEC_NEG, P8V_BUILTIN_NEG_V8HI, > - RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0, 0 }, > - { P8V_BUILTIN_VEC_NEG, P8V_BUILTIN_NEG_V4SI, > - RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0, 0 }, > - { P8V_BUILTIN_VEC_NEG, P8V_BUILTIN_NEG_V2DI, > - RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0, 0 }, > - { P8V_BUILTIN_VEC_NEG, P8V_BUILTIN_NEG_V4SF, > - RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0, 0 }, > - { P8V_BUILTIN_VEC_NEG, P8V_BUILTIN_NEG_V2DF, > - RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0, 0 }, > - > - { P9V_BUILTIN_VEC_CONVERT_4F32_8I16, P9V_BUILTIN_CONVERT_4F32_8I16, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, > - { P9V_BUILTIN_VEC_CONVERT_4F32_8F16, P9V_BUILTIN_CONVERT_4F32_8F16, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, > - > - { P9V_BUILTIN_VEC_VFIRSTMATCHINDEX, P9V_BUILTIN_VFIRSTMATCHINDEX_V16QI, > - RS6000_BTI_UINTSI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, > - { P9V_BUILTIN_VEC_VFIRSTMATCHINDEX, P9V_BUILTIN_VFIRSTMATCHINDEX_V16QI, > - RS6000_BTI_UINTSI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, > - { P9V_BUILTIN_VEC_VFIRSTMATCHINDEX, P9V_BUILTIN_VFIRSTMATCHINDEX_V8HI, > - RS6000_BTI_UINTSI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, > - { P9V_BUILTIN_VEC_VFIRSTMATCHINDEX, P9V_BUILTIN_VFIRSTMATCHINDEX_V8HI, > - RS6000_BTI_UINTSI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, > - { P9V_BUILTIN_VEC_VFIRSTMATCHINDEX, P9V_BUILTIN_VFIRSTMATCHINDEX_V4SI, > - RS6000_BTI_UINTSI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, > - { P9V_BUILTIN_VEC_VFIRSTMATCHINDEX, P9V_BUILTIN_VFIRSTMATCHINDEX_V4SI, > - RS6000_BTI_UINTSI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, > - { P9V_BUILTIN_VEC_VFIRSTMATCHOREOSINDEX, P9V_BUILTIN_VFIRSTMATCHOREOSINDEX_V16QI, > - RS6000_BTI_UINTSI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, > - { P9V_BUILTIN_VEC_VFIRSTMATCHOREOSINDEX, P9V_BUILTIN_VFIRSTMATCHOREOSINDEX_V16QI, > - RS6000_BTI_UINTSI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, > - { P9V_BUILTIN_VEC_VFIRSTMATCHOREOSINDEX, P9V_BUILTIN_VFIRSTMATCHOREOSINDEX_V8HI, > - RS6000_BTI_UINTSI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, > - { P9V_BUILTIN_VEC_VFIRSTMATCHOREOSINDEX, P9V_BUILTIN_VFIRSTMATCHOREOSINDEX_V8HI, > - RS6000_BTI_UINTSI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, > - { P9V_BUILTIN_VEC_VFIRSTMATCHOREOSINDEX, P9V_BUILTIN_VFIRSTMATCHOREOSINDEX_V4SI, > - RS6000_BTI_UINTSI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, > - { P9V_BUILTIN_VEC_VFIRSTMATCHOREOSINDEX, P9V_BUILTIN_VFIRSTMATCHOREOSINDEX_V4SI, > - RS6000_BTI_UINTSI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, > - { P9V_BUILTIN_VEC_VFIRSTMISMATCHINDEX, P9V_BUILTIN_VFIRSTMISMATCHINDEX_V16QI, > - RS6000_BTI_UINTSI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, > - { P9V_BUILTIN_VEC_VFIRSTMISMATCHINDEX, P9V_BUILTIN_VFIRSTMISMATCHINDEX_V16QI, > - RS6000_BTI_UINTSI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, > - { P9V_BUILTIN_VEC_VFIRSTMISMATCHINDEX, P9V_BUILTIN_VFIRSTMISMATCHINDEX_V8HI, > - RS6000_BTI_UINTSI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, > - { P9V_BUILTIN_VEC_VFIRSTMISMATCHINDEX, P9V_BUILTIN_VFIRSTMISMATCHINDEX_V8HI, > - RS6000_BTI_UINTSI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, > - { P9V_BUILTIN_VEC_VFIRSTMISMATCHINDEX, P9V_BUILTIN_VFIRSTMISMATCHINDEX_V4SI, > - RS6000_BTI_UINTSI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, > - { P9V_BUILTIN_VEC_VFIRSTMISMATCHINDEX, P9V_BUILTIN_VFIRSTMISMATCHINDEX_V4SI, > - RS6000_BTI_UINTSI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, > - > - { P9V_BUILTIN_VEC_VFIRSTMISMATCHOREOSINDEX, > - P9V_BUILTIN_VFIRSTMISMATCHOREOSINDEX_V16QI, > - RS6000_BTI_UINTSI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, > - { P9V_BUILTIN_VEC_VFIRSTMISMATCHOREOSINDEX, > - P9V_BUILTIN_VFIRSTMISMATCHOREOSINDEX_V16QI, RS6000_BTI_UINTSI, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, > - { P9V_BUILTIN_VEC_VFIRSTMISMATCHOREOSINDEX, > - P9V_BUILTIN_VFIRSTMISMATCHOREOSINDEX_V8HI, > - RS6000_BTI_UINTSI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, > - { P9V_BUILTIN_VEC_VFIRSTMISMATCHOREOSINDEX, > - P9V_BUILTIN_VFIRSTMISMATCHOREOSINDEX_V8HI, > - RS6000_BTI_UINTSI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, > - { P9V_BUILTIN_VEC_VFIRSTMISMATCHOREOSINDEX, > - P9V_BUILTIN_VFIRSTMISMATCHOREOSINDEX_V4SI, > - RS6000_BTI_UINTSI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, > - { P9V_BUILTIN_VEC_VFIRSTMISMATCHOREOSINDEX, > - P9V_BUILTIN_VFIRSTMISMATCHOREOSINDEX_V4SI, > - RS6000_BTI_UINTSI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, > - > - { ALTIVEC_BUILTIN_VEC_VPKUWUM, ALTIVEC_BUILTIN_VPKUWUM, > - RS6000_BTI_V8HI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VPKUWUM, ALTIVEC_BUILTIN_VPKUWUM, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VPKUWUM, ALTIVEC_BUILTIN_VPKUWUM, > - RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VPKUHUM, ALTIVEC_BUILTIN_VPKUHUM, > - RS6000_BTI_V16QI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VPKUHUM, ALTIVEC_BUILTIN_VPKUHUM, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VPKUHUM, ALTIVEC_BUILTIN_VPKUHUM, > - RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_PACKPX, ALTIVEC_BUILTIN_VPKPX, > - RS6000_BTI_pixel_V8HI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_PACKS, ALTIVEC_BUILTIN_VPKUHUS, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_PACKS, ALTIVEC_BUILTIN_VPKSHSS, > - RS6000_BTI_V16QI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_PACKS, ALTIVEC_BUILTIN_VPKUWUS, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_PACKS, ALTIVEC_BUILTIN_VPKSWSS, > - RS6000_BTI_V8HI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_PACKS, P8V_BUILTIN_VPKUDUS, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, > - { ALTIVEC_BUILTIN_VEC_PACKS, P8V_BUILTIN_VPKSDSS, > - RS6000_BTI_V4SI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VPKSWSS, ALTIVEC_BUILTIN_VPKSWSS, > - RS6000_BTI_V8HI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VPKUWUS, ALTIVEC_BUILTIN_VPKUWUS, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VPKSHSS, ALTIVEC_BUILTIN_VPKSHSS, > - RS6000_BTI_V16QI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VPKUHUS, ALTIVEC_BUILTIN_VPKUHUS, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_PACKSU, ALTIVEC_BUILTIN_VPKUHUS, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_PACKSU, ALTIVEC_BUILTIN_VPKSHUS, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_PACKSU, ALTIVEC_BUILTIN_VPKUWUS, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_PACKSU, ALTIVEC_BUILTIN_VPKSWUS, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_PACKSU, P8V_BUILTIN_VPKSDUS, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, > - { ALTIVEC_BUILTIN_VEC_PACKSU, P8V_BUILTIN_VPKUDUS, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VPKSWUS, ALTIVEC_BUILTIN_VPKSWUS, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VPKSHUS, ALTIVEC_BUILTIN_VPKSHUS, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_RINT, VSX_BUILTIN_XVRDPIC, > - RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0, 0 }, > - { ALTIVEC_BUILTIN_VEC_RINT, VSX_BUILTIN_XVRSPIC, > - RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0, 0 }, > - { ALTIVEC_BUILTIN_VEC_RL, ALTIVEC_BUILTIN_VRLB, > - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_RL, ALTIVEC_BUILTIN_VRLB, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_RL, ALTIVEC_BUILTIN_VRLH, > - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_RL, ALTIVEC_BUILTIN_VRLH, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_RL, ALTIVEC_BUILTIN_VRLW, > - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_RL, ALTIVEC_BUILTIN_VRLW, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_RL, P8V_BUILTIN_VRLD, > - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, > - { ALTIVEC_BUILTIN_VEC_RL, P8V_BUILTIN_VRLD, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, > - { ALTIVEC_BUILTIN_VEC_RL, P10V_BUILTIN_VRLQ, > - RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_unsigned_V1TI, 0 }, > - { ALTIVEC_BUILTIN_VEC_RL, P10V_BUILTIN_VRLQ, > - RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, > - RS6000_BTI_unsigned_V1TI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VRLW, ALTIVEC_BUILTIN_VRLW, > - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VRLW, ALTIVEC_BUILTIN_VRLW, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VRLH, ALTIVEC_BUILTIN_VRLH, > - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VRLH, ALTIVEC_BUILTIN_VRLH, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VRLB, ALTIVEC_BUILTIN_VRLB, > - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VRLB, ALTIVEC_BUILTIN_VRLB, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, > - { P9V_BUILTIN_VEC_RLMI, P9V_BUILTIN_VRLWMI, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI }, > - { P9V_BUILTIN_VEC_RLMI, P9V_BUILTIN_VRLDMI, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI }, > - { P9V_BUILTIN_VEC_RLMI, P10V_BUILTIN_VRLQMI, > - RS6000_BTI_V1TI, RS6000_BTI_V1TI, > - RS6000_BTI_V1TI, RS6000_BTI_unsigned_V1TI }, > - { P9V_BUILTIN_VEC_RLMI, P10V_BUILTIN_VRLQMI, > - RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, > - RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI }, > - { P9V_BUILTIN_VEC_RLNM, P9V_BUILTIN_VRLWNM, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, > - RS6000_BTI_unsigned_V4SI, 0 }, > - { P9V_BUILTIN_VEC_RLNM, P9V_BUILTIN_VRLDNM, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, > - RS6000_BTI_unsigned_V2DI, 0 }, > - { P9V_BUILTIN_VEC_RLNM, P10V_BUILTIN_VRLQNM, > - RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, > - RS6000_BTI_unsigned_V1TI, 0 }, > - { P9V_BUILTIN_VEC_RLNM, P10V_BUILTIN_VRLQNM, > - RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_unsigned_V1TI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SL, ALTIVEC_BUILTIN_VSLB, > - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SL, ALTIVEC_BUILTIN_VSLB, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SL, ALTIVEC_BUILTIN_VSLH, > - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SL, ALTIVEC_BUILTIN_VSLH, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SL, ALTIVEC_BUILTIN_VSLW, > - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SL, ALTIVEC_BUILTIN_VSLW, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SL, P8V_BUILTIN_VSLD, > - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SL, P8V_BUILTIN_VSLD, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SL, P10V_BUILTIN_VSLQ, > - RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_unsigned_V1TI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SL, P10V_BUILTIN_VSLQ, > - RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, > - RS6000_BTI_unsigned_V1TI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SQRT, VSX_BUILTIN_XVSQRTDP, > - RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0, 0 }, > - { ALTIVEC_BUILTIN_VEC_SQRT, VSX_BUILTIN_XVSQRTSP, > - RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0, 0 }, > - { ALTIVEC_BUILTIN_VEC_VSLW, ALTIVEC_BUILTIN_VSLW, > - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VSLW, ALTIVEC_BUILTIN_VSLW, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VSLH, ALTIVEC_BUILTIN_VSLH, > - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VSLH, ALTIVEC_BUILTIN_VSLH, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VSLB, ALTIVEC_BUILTIN_VSLB, > - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VSLB, ALTIVEC_BUILTIN_VSLB, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, > - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, > - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, > - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, > - RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, > - RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, > - RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, > - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, > - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, > - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, > - RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, > - RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, > - RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, > - RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, RS6000_BTI_unsigned_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, > - RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, > - RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, RS6000_BTI_unsigned_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, > - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, > - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, > - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, > - RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, > - RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, > - RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, > - > - { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, > - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_unsigned_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, > - RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, > - RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, > - RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V8HI, 0 }, > - > - { ALTIVEC_BUILTIN_VEC_SLO, ALTIVEC_BUILTIN_VSLO, > - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SLO, ALTIVEC_BUILTIN_VSLO, > - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_unsigned_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SLO, ALTIVEC_BUILTIN_VSLO, > - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SLO, ALTIVEC_BUILTIN_VSLO, > - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SLO, ALTIVEC_BUILTIN_VSLO, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SLO, ALTIVEC_BUILTIN_VSLO, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SLO, ALTIVEC_BUILTIN_VSLO, > - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SLO, ALTIVEC_BUILTIN_VSLO, > - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SLO, ALTIVEC_BUILTIN_VSLO, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SLO, ALTIVEC_BUILTIN_VSLO, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SLO, ALTIVEC_BUILTIN_VSLO, > - RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, RS6000_BTI_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SLO, ALTIVEC_BUILTIN_VSLO, > - RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, RS6000_BTI_unsigned_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SLO, ALTIVEC_BUILTIN_VSLO, > - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SLO, ALTIVEC_BUILTIN_VSLO, > - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SLO, ALTIVEC_BUILTIN_VSLO, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SLO, ALTIVEC_BUILTIN_VSLO, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SLO, ALTIVEC_BUILTIN_VSLO, > - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SLO, ALTIVEC_BUILTIN_VSLO, > - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_unsigned_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SLO, ALTIVEC_BUILTIN_VSLO, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SLO, ALTIVEC_BUILTIN_VSLO, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SPLAT, ALTIVEC_BUILTIN_VSPLTB, > - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_INTSI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SPLAT, ALTIVEC_BUILTIN_VSPLTB, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SPLAT, ALTIVEC_BUILTIN_VSPLTB, > - RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SPLAT, ALTIVEC_BUILTIN_VSPLTH, > - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_INTSI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SPLAT, ALTIVEC_BUILTIN_VSPLTH, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SPLAT, ALTIVEC_BUILTIN_VSPLTH, > - RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SPLAT, ALTIVEC_BUILTIN_VSPLTH, > - RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SPLAT, ALTIVEC_BUILTIN_VSPLTW, > - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_INTSI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SPLAT, ALTIVEC_BUILTIN_VSPLTW, > - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_INTSI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SPLAT, ALTIVEC_BUILTIN_VSPLTW, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SPLAT, ALTIVEC_BUILTIN_VSPLTW, > - RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SPLAT, VSX_BUILTIN_XXSPLTD_V2DF, > - RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_INTSI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SPLAT, VSX_BUILTIN_XXSPLTD_V2DI, > - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_INTSI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SPLAT, VSX_BUILTIN_XXSPLTD_V2DI, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_INTSI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SPLAT, VSX_BUILTIN_XXSPLTD_V2DI, > - RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_INTSI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VSPLTW, ALTIVEC_BUILTIN_VSPLTW, > - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_INTSI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VSPLTW, ALTIVEC_BUILTIN_VSPLTW, > - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_INTSI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VSPLTW, ALTIVEC_BUILTIN_VSPLTW, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VSPLTW, ALTIVEC_BUILTIN_VSPLTW, > - RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VSPLTH, ALTIVEC_BUILTIN_VSPLTH, > - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_INTSI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VSPLTH, ALTIVEC_BUILTIN_VSPLTH, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VSPLTH, ALTIVEC_BUILTIN_VSPLTH, > - RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VSPLTH, ALTIVEC_BUILTIN_VSPLTH, > - RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VSPLTB, ALTIVEC_BUILTIN_VSPLTB, > - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_INTSI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VSPLTB, ALTIVEC_BUILTIN_VSPLTB, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VSPLTB, ALTIVEC_BUILTIN_VSPLTB, > - RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SR, ALTIVEC_BUILTIN_VSRB, > - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SR, ALTIVEC_BUILTIN_VSRB, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SR, ALTIVEC_BUILTIN_VSRH, > - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SR, ALTIVEC_BUILTIN_VSRH, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SR, ALTIVEC_BUILTIN_VSRW, > - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SR, ALTIVEC_BUILTIN_VSRW, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SR, P8V_BUILTIN_VSRD, > - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SR, P8V_BUILTIN_VSRD, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SR, P10V_BUILTIN_VSRQ, > - RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_unsigned_V1TI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SR, P10V_BUILTIN_VSRQ, > - RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, > - RS6000_BTI_unsigned_V1TI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VSRW, ALTIVEC_BUILTIN_VSRW, > - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VSRW, ALTIVEC_BUILTIN_VSRW, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VSRH, ALTIVEC_BUILTIN_VSRH, > - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VSRH, ALTIVEC_BUILTIN_VSRH, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VSRB, ALTIVEC_BUILTIN_VSRB, > - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VSRB, ALTIVEC_BUILTIN_VSRB, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SRA, ALTIVEC_BUILTIN_VSRAB, > - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SRA, ALTIVEC_BUILTIN_VSRAB, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SRA, ALTIVEC_BUILTIN_VSRAH, > - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SRA, ALTIVEC_BUILTIN_VSRAH, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SRA, ALTIVEC_BUILTIN_VSRAW, > - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SRA, ALTIVEC_BUILTIN_VSRAW, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SRA, P8V_BUILTIN_VSRAD, > - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SRA, P8V_BUILTIN_VSRAD, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SRA, P10V_BUILTIN_VSRAQ, > - RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_unsigned_V1TI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SRA, P10V_BUILTIN_VSRAQ, > - RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, > - RS6000_BTI_unsigned_V1TI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VSRAW, ALTIVEC_BUILTIN_VSRAW, > - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VSRAW, ALTIVEC_BUILTIN_VSRAW, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VSRAH, ALTIVEC_BUILTIN_VSRAH, > - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VSRAH, ALTIVEC_BUILTIN_VSRAH, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VSRAB, ALTIVEC_BUILTIN_VSRAB, > - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VSRAB, ALTIVEC_BUILTIN_VSRAB, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR, > - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR, > - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR, > - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR, > - RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR, > - RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR, > - RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR, > - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR, > - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR, > - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR, > - RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR, > - RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR, > - RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR, > - RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, RS6000_BTI_unsigned_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR, > - RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR, > - RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, RS6000_BTI_unsigned_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR, > - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR, > - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR, > - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR, > - RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR, > - RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR, > - RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR, > - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_unsigned_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SRO, ALTIVEC_BUILTIN_VSRO, > - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SRO, ALTIVEC_BUILTIN_VSRO, > - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_unsigned_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SRO, ALTIVEC_BUILTIN_VSRO, > - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SRO, ALTIVEC_BUILTIN_VSRO, > - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SRO, ALTIVEC_BUILTIN_VSRO, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SRO, ALTIVEC_BUILTIN_VSRO, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SRO, ALTIVEC_BUILTIN_VSRO, > - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SRO, ALTIVEC_BUILTIN_VSRO, > - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SRO, ALTIVEC_BUILTIN_VSRO, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SRO, ALTIVEC_BUILTIN_VSRO, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SRO, ALTIVEC_BUILTIN_VSRO, > - RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, RS6000_BTI_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SRO, ALTIVEC_BUILTIN_VSRO, > - RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, RS6000_BTI_unsigned_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SRO, ALTIVEC_BUILTIN_VSRO, > - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SRO, ALTIVEC_BUILTIN_VSRO, > - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SRO, ALTIVEC_BUILTIN_VSRO, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SRO, ALTIVEC_BUILTIN_VSRO, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SRO, ALTIVEC_BUILTIN_VSRO, > - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SRO, ALTIVEC_BUILTIN_VSRO, > - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_unsigned_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SRO, ALTIVEC_BUILTIN_VSRO, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SRO, ALTIVEC_BUILTIN_VSRO, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V16QI, 0 }, > - > - { ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBUBM, > - RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBUBM, > - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBUBM, > - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBUBM, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBUBM, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBUBM, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBUHM, > - RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBUHM, > - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBUHM, > - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBUHM, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBUHM, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBUHM, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBUWM, > - RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBUWM, > - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBUWM, > - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBUWM, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBUWM, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBUWM, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SUB, P8V_BUILTIN_VSUBUDM, > - RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SUB, P8V_BUILTIN_VSUBUDM, > - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SUB, P8V_BUILTIN_VSUBUDM, > - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SUB, P8V_BUILTIN_VSUBUDM, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SUB, P8V_BUILTIN_VSUBUDM, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SUB, P8V_BUILTIN_VSUBUDM, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBFP, > - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, > - { ALTIVEC_BUILTIN_VEC_SUB, VSX_BUILTIN_XVSUBDP, > - RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 }, > - { ALTIVEC_BUILTIN_VEC_SUB, P8V_BUILTIN_VSUBUQM, > - RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SUB, P8V_BUILTIN_VSUBUQM, > - RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, > - RS6000_BTI_unsigned_V1TI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VSUBFP, ALTIVEC_BUILTIN_VSUBFP, > - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, > - { ALTIVEC_BUILTIN_VEC_VSUBUWM, ALTIVEC_BUILTIN_VSUBUWM, > - RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VSUBUWM, ALTIVEC_BUILTIN_VSUBUWM, > - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VSUBUWM, ALTIVEC_BUILTIN_VSUBUWM, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VSUBUWM, ALTIVEC_BUILTIN_VSUBUWM, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VSUBUWM, ALTIVEC_BUILTIN_VSUBUWM, > - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VSUBUWM, ALTIVEC_BUILTIN_VSUBUWM, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VSUBUWM, ALTIVEC_BUILTIN_VSUBUWM, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VSUBUWM, ALTIVEC_BUILTIN_VSUBUWM, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VSUBUHM, ALTIVEC_BUILTIN_VSUBUHM, > - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VSUBUHM, ALTIVEC_BUILTIN_VSUBUHM, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VSUBUHM, ALTIVEC_BUILTIN_VSUBUHM, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VSUBUHM, ALTIVEC_BUILTIN_VSUBUHM, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VSUBUHM, ALTIVEC_BUILTIN_VSUBUHM, > - RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VSUBUHM, ALTIVEC_BUILTIN_VSUBUHM, > - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VSUBUHM, ALTIVEC_BUILTIN_VSUBUHM, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VSUBUHM, ALTIVEC_BUILTIN_VSUBUHM, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VSUBUBM, ALTIVEC_BUILTIN_VSUBUBM, > - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VSUBUBM, ALTIVEC_BUILTIN_VSUBUBM, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VSUBUBM, ALTIVEC_BUILTIN_VSUBUBM, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VSUBUBM, ALTIVEC_BUILTIN_VSUBUBM, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VSUBUBM, ALTIVEC_BUILTIN_VSUBUBM, > - RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VSUBUBM, ALTIVEC_BUILTIN_VSUBUBM, > - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VSUBUBM, ALTIVEC_BUILTIN_VSUBUBM, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VSUBUBM, ALTIVEC_BUILTIN_VSUBUBM, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, 0 }, > - > - { ALTIVEC_BUILTIN_VEC_SUBC, ALTIVEC_BUILTIN_VSUBCUW, > - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SUBC, ALTIVEC_BUILTIN_VSUBCUW, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SUBC, P8V_BUILTIN_VSUBCUQ, > - RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, > - RS6000_BTI_unsigned_V1TI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SUBC, P8V_BUILTIN_VSUBCUQ, > - RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, 0 }, > - > - { ALTIVEC_BUILTIN_VEC_SUBS, ALTIVEC_BUILTIN_VSUBUBS, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SUBS, ALTIVEC_BUILTIN_VSUBUBS, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SUBS, ALTIVEC_BUILTIN_VSUBUBS, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SUBS, ALTIVEC_BUILTIN_VSUBSBS, > - RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SUBS, ALTIVEC_BUILTIN_VSUBSBS, > - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SUBS, ALTIVEC_BUILTIN_VSUBSBS, > - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SUBS, ALTIVEC_BUILTIN_VSUBUHS, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SUBS, ALTIVEC_BUILTIN_VSUBUHS, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SUBS, ALTIVEC_BUILTIN_VSUBUHS, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SUBS, ALTIVEC_BUILTIN_VSUBSHS, > - RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SUBS, ALTIVEC_BUILTIN_VSUBSHS, > - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SUBS, ALTIVEC_BUILTIN_VSUBSHS, > - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SUBS, ALTIVEC_BUILTIN_VSUBUWS, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SUBS, ALTIVEC_BUILTIN_VSUBUWS, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SUBS, ALTIVEC_BUILTIN_VSUBUWS, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SUBS, ALTIVEC_BUILTIN_VSUBSWS, > - RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SUBS, ALTIVEC_BUILTIN_VSUBSWS, > - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SUBS, ALTIVEC_BUILTIN_VSUBSWS, > - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VSUBSWS, ALTIVEC_BUILTIN_VSUBSWS, > - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VSUBSWS, ALTIVEC_BUILTIN_VSUBSWS, > - RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VSUBSWS, ALTIVEC_BUILTIN_VSUBSWS, > - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VSUBUWS, ALTIVEC_BUILTIN_VSUBUWS, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VSUBUWS, ALTIVEC_BUILTIN_VSUBUWS, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VSUBUWS, ALTIVEC_BUILTIN_VSUBUWS, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VSUBUWS, ALTIVEC_BUILTIN_VSUBUWS, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VSUBUWS, ALTIVEC_BUILTIN_VSUBUWS, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VSUBSHS, ALTIVEC_BUILTIN_VSUBSHS, > - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VSUBSHS, ALTIVEC_BUILTIN_VSUBSHS, > - RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VSUBSHS, ALTIVEC_BUILTIN_VSUBSHS, > - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VSUBUHS, ALTIVEC_BUILTIN_VSUBUHS, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VSUBUHS, ALTIVEC_BUILTIN_VSUBUHS, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VSUBUHS, ALTIVEC_BUILTIN_VSUBUHS, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VSUBUHS, ALTIVEC_BUILTIN_VSUBUHS, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VSUBUHS, ALTIVEC_BUILTIN_VSUBUHS, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VSUBSBS, ALTIVEC_BUILTIN_VSUBSBS, > - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VSUBSBS, ALTIVEC_BUILTIN_VSUBSBS, > - RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VSUBSBS, ALTIVEC_BUILTIN_VSUBSBS, > - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VSUBUBS, ALTIVEC_BUILTIN_VSUBUBS, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VSUBUBS, ALTIVEC_BUILTIN_VSUBUBS, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VSUBUBS, ALTIVEC_BUILTIN_VSUBUBS, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VSUBUBS, ALTIVEC_BUILTIN_VSUBUBS, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VSUBUBS, ALTIVEC_BUILTIN_VSUBUBS, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SUM4S, ALTIVEC_BUILTIN_VSUM4UBS, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SUM4S, ALTIVEC_BUILTIN_VSUM4SBS, > - RS6000_BTI_V4SI, RS6000_BTI_V16QI, RS6000_BTI_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SUM4S, ALTIVEC_BUILTIN_VSUM4SHS, > - RS6000_BTI_V4SI, RS6000_BTI_V8HI, RS6000_BTI_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VSUM4SHS, ALTIVEC_BUILTIN_VSUM4SHS, > - RS6000_BTI_V4SI, RS6000_BTI_V8HI, RS6000_BTI_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VSUM4SBS, ALTIVEC_BUILTIN_VSUM4SBS, > - RS6000_BTI_V4SI, RS6000_BTI_V16QI, RS6000_BTI_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_VSUM4UBS, ALTIVEC_BUILTIN_VSUM4UBS, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SUM2S, ALTIVEC_BUILTIN_VSUM2SWS, > - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_SUMS, ALTIVEC_BUILTIN_VSUMSWS, > - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, > - > - { VSX_BUILTIN_VEC_XL, VSX_BUILTIN_LXVD2X_V2DF, > - RS6000_BTI_V2DF, RS6000_BTI_INTSI, ~RS6000_BTI_V2DF, 0 }, > - { VSX_BUILTIN_VEC_XL, VSX_BUILTIN_LXVD2X_V2DF, > - RS6000_BTI_V2DF, RS6000_BTI_INTSI, ~RS6000_BTI_double, 0 }, > - { VSX_BUILTIN_VEC_XL, VSX_BUILTIN_LXVD2X_V1TI, > - RS6000_BTI_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_INTTI, 0 }, > - { VSX_BUILTIN_VEC_XL, VSX_BUILTIN_LXVD2X_V1TI, > - RS6000_BTI_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_V1TI, 0 }, > - { VSX_BUILTIN_VEC_XL, VSX_BUILTIN_LXVD2X_V1TI, > - RS6000_BTI_unsigned_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTTI, 0 }, > - { VSX_BUILTIN_VEC_XL, VSX_BUILTIN_LXVD2X_V2DI, > - RS6000_BTI_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_V2DI, 0 }, > - { VSX_BUILTIN_VEC_XL, VSX_BUILTIN_LXVD2X_V2DI, > - RS6000_BTI_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_long_long, 0 }, > - { VSX_BUILTIN_VEC_XL, VSX_BUILTIN_LXVD2X_V2DI, > - RS6000_BTI_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_INTDI, 0 }, > - { VSX_BUILTIN_VEC_XL, VSX_BUILTIN_LXVD2X_V2DI, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_INTSI, > - ~RS6000_BTI_unsigned_V2DI, 0 }, > - { VSX_BUILTIN_VEC_XL, VSX_BUILTIN_LXVD2X_V2DI, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_INTSI, > - ~RS6000_BTI_unsigned_long_long, 0 }, > - { VSX_BUILTIN_VEC_XL, VSX_BUILTIN_LXVD2X_V2DI, > - RS6000_BTI_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTDI, 0 }, > - > - { VSX_BUILTIN_VEC_XL, VSX_BUILTIN_LXVW4X_V4SF, > - RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_V4SF, 0 }, > - { VSX_BUILTIN_VEC_XL, VSX_BUILTIN_LXVW4X_V4SF, > - RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float, 0 }, > - { VSX_BUILTIN_VEC_XL, VSX_BUILTIN_LXVW4X_V4SI, > - RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_V4SI, 0 }, > - { VSX_BUILTIN_VEC_XL, VSX_BUILTIN_LXVW4X_V4SI, > - RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI, 0 }, > - { VSX_BUILTIN_VEC_XL, VSX_BUILTIN_LXVW4X_V4SI, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V4SI, 0 }, > - { VSX_BUILTIN_VEC_XL, VSX_BUILTIN_LXVW4X_V4SI, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI, 0 }, > - { VSX_BUILTIN_VEC_XL, VSX_BUILTIN_LXVW4X_V8HI, > - RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_V8HI, 0 }, > - { VSX_BUILTIN_VEC_XL, VSX_BUILTIN_LXVW4X_V8HI, > - RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI, 0 }, > - { VSX_BUILTIN_VEC_XL, VSX_BUILTIN_LXVW4X_V8HI, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V8HI, 0 }, > - { VSX_BUILTIN_VEC_XL, VSX_BUILTIN_LXVW4X_V8HI, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI, 0 }, > - { VSX_BUILTIN_VEC_XL, VSX_BUILTIN_LXVW4X_V16QI, > - RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_V16QI, 0 }, > - { VSX_BUILTIN_VEC_XL, VSX_BUILTIN_LXVW4X_V16QI, > - RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI, 0 }, > - { VSX_BUILTIN_VEC_XL, VSX_BUILTIN_LXVW4X_V16QI, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, > - ~RS6000_BTI_unsigned_V16QI, 0 }, > - { VSX_BUILTIN_VEC_XL, VSX_BUILTIN_LXVW4X_V16QI, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI, 0 }, > - > - { VSX_BUILTIN_VEC_XL_BE, VSX_BUILTIN_LD_ELEMREV_V2DF, > - RS6000_BTI_V2DF, RS6000_BTI_INTSI, ~RS6000_BTI_V2DF, 0 }, > - { VSX_BUILTIN_VEC_XL_BE, VSX_BUILTIN_LD_ELEMREV_V2DF, > - RS6000_BTI_V2DF, RS6000_BTI_INTSI, ~RS6000_BTI_double, 0 }, > - { VSX_BUILTIN_VEC_XL_BE, VSX_BUILTIN_LD_ELEMREV_V1TI, > - RS6000_BTI_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_INTTI, 0 }, > - { VSX_BUILTIN_VEC_XL_BE, VSX_BUILTIN_LD_ELEMREV_V1TI, > - RS6000_BTI_unsigned_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTTI, 0 }, > - { VSX_BUILTIN_VEC_XL_BE, VSX_BUILTIN_LD_ELEMREV_V2DI, > - RS6000_BTI_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_V2DI, 0 }, > - { VSX_BUILTIN_VEC_XL_BE, VSX_BUILTIN_LD_ELEMREV_V2DI, > - RS6000_BTI_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_long_long, 0 }, > - { VSX_BUILTIN_VEC_XL_BE, VSX_BUILTIN_LD_ELEMREV_V2DI, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_INTSI, > - ~RS6000_BTI_unsigned_V2DI, 0 }, > - { VSX_BUILTIN_VEC_XL_BE, VSX_BUILTIN_LD_ELEMREV_V2DI, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_INTSI, > - ~RS6000_BTI_unsigned_long_long, 0 }, > - { VSX_BUILTIN_VEC_XL_BE, VSX_BUILTIN_LD_ELEMREV_V4SF, > - RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_V4SF, 0 }, > - { VSX_BUILTIN_VEC_XL_BE, VSX_BUILTIN_LD_ELEMREV_V4SF, > - RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float, 0 }, > - { VSX_BUILTIN_VEC_XL_BE, VSX_BUILTIN_LD_ELEMREV_V4SI, > - RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_V4SI, 0 }, > - { VSX_BUILTIN_VEC_XL_BE, VSX_BUILTIN_LD_ELEMREV_V4SI, > - RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI, 0 }, > - { VSX_BUILTIN_VEC_XL_BE, VSX_BUILTIN_LD_ELEMREV_V4SI, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V4SI, 0 }, > - { VSX_BUILTIN_VEC_XL_BE, VSX_BUILTIN_LD_ELEMREV_V4SI, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI, 0 }, > - { VSX_BUILTIN_VEC_XL_BE, VSX_BUILTIN_LD_ELEMREV_V8HI, > - RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_V8HI, 0 }, > - { VSX_BUILTIN_VEC_XL_BE, VSX_BUILTIN_LD_ELEMREV_V8HI, > - RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI, 0 }, > - { VSX_BUILTIN_VEC_XL_BE, VSX_BUILTIN_LD_ELEMREV_V8HI, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V8HI, 0 }, > - { VSX_BUILTIN_VEC_XL_BE, VSX_BUILTIN_LD_ELEMREV_V8HI, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI, 0 }, > - { VSX_BUILTIN_VEC_XL_BE, VSX_BUILTIN_LD_ELEMREV_V16QI, > - RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_V16QI, 0 }, > - { VSX_BUILTIN_VEC_XL_BE, VSX_BUILTIN_LD_ELEMREV_V16QI, > - RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI, 0 }, > - { VSX_BUILTIN_VEC_XL_BE, VSX_BUILTIN_LD_ELEMREV_V16QI, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, > - ~RS6000_BTI_unsigned_V16QI, 0 }, > - { VSX_BUILTIN_VEC_XL_BE, VSX_BUILTIN_LD_ELEMREV_V16QI, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI, 0 }, > - > - { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V4SF, > - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, > - { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V4SI, > - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_bool_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V4SF, > - RS6000_BTI_V4SF, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SF, 0 }, > - { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V2DF, > - RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 }, > - { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V2DI, > - RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_bool_V2DI, 0 }, > - { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V2DF, > - RS6000_BTI_V2DF, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DF, 0 }, > - { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V2DI, > - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, > - { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V2DI, > - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, 0 }, > - { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V2DI, > - RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, 0 }, > - { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V2DI_UNS, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, > - { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V2DI_UNS, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, 0 }, > - { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V2DI_UNS, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, > - { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V2DI_UNS, > - RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, 0 }, > - { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V4SI_UNS, > - RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V4SI, > - RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V4SI, > - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V4SI, > - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V4SI_UNS, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V4SI_UNS, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V4SI_UNS, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V8HI_UNS, > - RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V8HI, > - RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V8HI, > - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V8HI, > - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V8HI_UNS, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V8HI_UNS, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V8HI_UNS, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, > - > - { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V16QI, > - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V16QI, > - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V16QI, > - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V16QI_UNS, > - RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V16QI_UNS, > - RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V16QI_UNS, > - RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V16QI_UNS, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V16QI_UNS, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V16QI_UNS, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, > - > - /* Ternary AltiVec/VSX builtins. */ > - { ALTIVEC_BUILTIN_VEC_DST, ALTIVEC_BUILTIN_DST, > - RS6000_BTI_void, ~RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, > - { ALTIVEC_BUILTIN_VEC_DST, ALTIVEC_BUILTIN_DST, > - RS6000_BTI_void, ~RS6000_BTI_V16QI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, > - { ALTIVEC_BUILTIN_VEC_DST, ALTIVEC_BUILTIN_DST, > - RS6000_BTI_void, ~RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, > - { ALTIVEC_BUILTIN_VEC_DST, ALTIVEC_BUILTIN_DST, > - RS6000_BTI_void, ~RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, > - { ALTIVEC_BUILTIN_VEC_DST, ALTIVEC_BUILTIN_DST, > - RS6000_BTI_void, ~RS6000_BTI_V8HI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, > - { ALTIVEC_BUILTIN_VEC_DST, ALTIVEC_BUILTIN_DST, > - RS6000_BTI_void, ~RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, > - { ALTIVEC_BUILTIN_VEC_DST, ALTIVEC_BUILTIN_DST, > - RS6000_BTI_void, ~RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, > - { ALTIVEC_BUILTIN_VEC_DST, ALTIVEC_BUILTIN_DST, > - RS6000_BTI_void, ~RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, > - { ALTIVEC_BUILTIN_VEC_DST, ALTIVEC_BUILTIN_DST, > - RS6000_BTI_void, ~RS6000_BTI_V4SI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, > - { ALTIVEC_BUILTIN_VEC_DST, ALTIVEC_BUILTIN_DST, > - RS6000_BTI_void, ~RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, > - { ALTIVEC_BUILTIN_VEC_DST, ALTIVEC_BUILTIN_DST, > - RS6000_BTI_void, ~RS6000_BTI_V4SF, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, > - { ALTIVEC_BUILTIN_VEC_DST, ALTIVEC_BUILTIN_DST, > - RS6000_BTI_void, ~RS6000_BTI_UINTQI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, > - { ALTIVEC_BUILTIN_VEC_DST, ALTIVEC_BUILTIN_DST, > - RS6000_BTI_void, ~RS6000_BTI_INTQI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, > - { ALTIVEC_BUILTIN_VEC_DST, ALTIVEC_BUILTIN_DST, > - RS6000_BTI_void, ~RS6000_BTI_UINTHI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, > - { ALTIVEC_BUILTIN_VEC_DST, ALTIVEC_BUILTIN_DST, > - RS6000_BTI_void, ~RS6000_BTI_INTHI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, > - { ALTIVEC_BUILTIN_VEC_DST, ALTIVEC_BUILTIN_DST, > - RS6000_BTI_void, ~RS6000_BTI_UINTSI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, > - { ALTIVEC_BUILTIN_VEC_DST, ALTIVEC_BUILTIN_DST, > - RS6000_BTI_void, ~RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, > - { ALTIVEC_BUILTIN_VEC_DST, ALTIVEC_BUILTIN_DST, > - RS6000_BTI_void, ~RS6000_BTI_unsigned_long, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, > - { ALTIVEC_BUILTIN_VEC_DST, ALTIVEC_BUILTIN_DST, > - RS6000_BTI_void, ~RS6000_BTI_long, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, > - { ALTIVEC_BUILTIN_VEC_DST, ALTIVEC_BUILTIN_DST, > - RS6000_BTI_void, ~RS6000_BTI_float, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, > - { ALTIVEC_BUILTIN_VEC_DSTST, ALTIVEC_BUILTIN_DSTST, > - RS6000_BTI_void, ~RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, > - { ALTIVEC_BUILTIN_VEC_DSTST, ALTIVEC_BUILTIN_DSTST, > - RS6000_BTI_void, ~RS6000_BTI_V16QI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, > - { ALTIVEC_BUILTIN_VEC_DSTST, ALTIVEC_BUILTIN_DSTST, > - RS6000_BTI_void, ~RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, > - { ALTIVEC_BUILTIN_VEC_DSTST, ALTIVEC_BUILTIN_DSTST, > - RS6000_BTI_void, ~RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, > - { ALTIVEC_BUILTIN_VEC_DSTST, ALTIVEC_BUILTIN_DSTST, > - RS6000_BTI_void, ~RS6000_BTI_V8HI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, > - { ALTIVEC_BUILTIN_VEC_DSTST, ALTIVEC_BUILTIN_DSTST, > - RS6000_BTI_void, ~RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, > - { ALTIVEC_BUILTIN_VEC_DSTST, ALTIVEC_BUILTIN_DSTST, > - RS6000_BTI_void, ~RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, > - { ALTIVEC_BUILTIN_VEC_DSTST, ALTIVEC_BUILTIN_DSTST, > - RS6000_BTI_void, ~RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, > - { ALTIVEC_BUILTIN_VEC_DSTST, ALTIVEC_BUILTIN_DSTST, > - RS6000_BTI_void, ~RS6000_BTI_V4SI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, > - { ALTIVEC_BUILTIN_VEC_DSTST, ALTIVEC_BUILTIN_DSTST, > - RS6000_BTI_void, ~RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, > - { ALTIVEC_BUILTIN_VEC_DSTST, ALTIVEC_BUILTIN_DSTST, > - RS6000_BTI_void, ~RS6000_BTI_V4SF, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, > - { ALTIVEC_BUILTIN_VEC_DSTST, ALTIVEC_BUILTIN_DSTST, > - RS6000_BTI_void, ~RS6000_BTI_UINTQI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, > - { ALTIVEC_BUILTIN_VEC_DSTST, ALTIVEC_BUILTIN_DSTST, > - RS6000_BTI_void, ~RS6000_BTI_INTQI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, > - { ALTIVEC_BUILTIN_VEC_DSTST, ALTIVEC_BUILTIN_DSTST, > - RS6000_BTI_void, ~RS6000_BTI_UINTHI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, > - { ALTIVEC_BUILTIN_VEC_DSTST, ALTIVEC_BUILTIN_DSTST, > - RS6000_BTI_void, ~RS6000_BTI_INTHI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, > - { ALTIVEC_BUILTIN_VEC_DSTST, ALTIVEC_BUILTIN_DSTST, > - RS6000_BTI_void, ~RS6000_BTI_UINTSI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, > - { ALTIVEC_BUILTIN_VEC_DSTST, ALTIVEC_BUILTIN_DSTST, > - RS6000_BTI_void, ~RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, > - { ALTIVEC_BUILTIN_VEC_DSTST, ALTIVEC_BUILTIN_DSTST, > - RS6000_BTI_void, ~RS6000_BTI_unsigned_long, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, > - { ALTIVEC_BUILTIN_VEC_DSTST, ALTIVEC_BUILTIN_DSTST, > - RS6000_BTI_void, ~RS6000_BTI_long, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, > - { ALTIVEC_BUILTIN_VEC_DSTST, ALTIVEC_BUILTIN_DSTST, > - RS6000_BTI_void, ~RS6000_BTI_float, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, > - { ALTIVEC_BUILTIN_VEC_DSTSTT, ALTIVEC_BUILTIN_DSTSTT, > - RS6000_BTI_void, ~RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, > - { ALTIVEC_BUILTIN_VEC_DSTSTT, ALTIVEC_BUILTIN_DSTSTT, > - RS6000_BTI_void, ~RS6000_BTI_V16QI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, > - { ALTIVEC_BUILTIN_VEC_DSTSTT, ALTIVEC_BUILTIN_DSTSTT, > - RS6000_BTI_void, ~RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, > - { ALTIVEC_BUILTIN_VEC_DSTSTT, ALTIVEC_BUILTIN_DSTSTT, > - RS6000_BTI_void, ~RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, > - { ALTIVEC_BUILTIN_VEC_DSTSTT, ALTIVEC_BUILTIN_DSTSTT, > - RS6000_BTI_void, ~RS6000_BTI_V8HI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, > - { ALTIVEC_BUILTIN_VEC_DSTSTT, ALTIVEC_BUILTIN_DSTSTT, > - RS6000_BTI_void, ~RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, > - { ALTIVEC_BUILTIN_VEC_DSTSTT, ALTIVEC_BUILTIN_DSTSTT, > - RS6000_BTI_void, ~RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, > - { ALTIVEC_BUILTIN_VEC_DSTSTT, ALTIVEC_BUILTIN_DSTSTT, > - RS6000_BTI_void, ~RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, > - { ALTIVEC_BUILTIN_VEC_DSTSTT, ALTIVEC_BUILTIN_DSTSTT, > - RS6000_BTI_void, ~RS6000_BTI_V4SI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, > - { ALTIVEC_BUILTIN_VEC_DSTSTT, ALTIVEC_BUILTIN_DSTSTT, > - RS6000_BTI_void, ~RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, > - { ALTIVEC_BUILTIN_VEC_DSTSTT, ALTIVEC_BUILTIN_DSTSTT, > - RS6000_BTI_void, ~RS6000_BTI_V4SF, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, > - { ALTIVEC_BUILTIN_VEC_DSTSTT, ALTIVEC_BUILTIN_DSTSTT, > - RS6000_BTI_void, ~RS6000_BTI_UINTQI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, > - { ALTIVEC_BUILTIN_VEC_DSTSTT, ALTIVEC_BUILTIN_DSTSTT, > - RS6000_BTI_void, ~RS6000_BTI_INTQI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, > - { ALTIVEC_BUILTIN_VEC_DSTSTT, ALTIVEC_BUILTIN_DSTSTT, > - RS6000_BTI_void, ~RS6000_BTI_UINTHI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, > - { ALTIVEC_BUILTIN_VEC_DSTSTT, ALTIVEC_BUILTIN_DSTSTT, > - RS6000_BTI_void, ~RS6000_BTI_INTHI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, > - { ALTIVEC_BUILTIN_VEC_DSTSTT, ALTIVEC_BUILTIN_DSTSTT, > - RS6000_BTI_void, ~RS6000_BTI_UINTSI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, > - { ALTIVEC_BUILTIN_VEC_DSTSTT, ALTIVEC_BUILTIN_DSTSTT, > - RS6000_BTI_void, ~RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, > - { ALTIVEC_BUILTIN_VEC_DSTSTT, ALTIVEC_BUILTIN_DSTSTT, > - RS6000_BTI_void, ~RS6000_BTI_unsigned_long, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, > - { ALTIVEC_BUILTIN_VEC_DSTSTT, ALTIVEC_BUILTIN_DSTSTT, > - RS6000_BTI_void, ~RS6000_BTI_long, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, > - { ALTIVEC_BUILTIN_VEC_DSTSTT, ALTIVEC_BUILTIN_DSTSTT, > - RS6000_BTI_void, ~RS6000_BTI_float, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, > - { ALTIVEC_BUILTIN_VEC_DSTT, ALTIVEC_BUILTIN_DSTT, > - RS6000_BTI_void, ~RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, > - { ALTIVEC_BUILTIN_VEC_DSTT, ALTIVEC_BUILTIN_DSTT, > - RS6000_BTI_void, ~RS6000_BTI_V16QI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, > - { ALTIVEC_BUILTIN_VEC_DSTT, ALTIVEC_BUILTIN_DSTT, > - RS6000_BTI_void, ~RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, > - { ALTIVEC_BUILTIN_VEC_DSTT, ALTIVEC_BUILTIN_DSTT, > - RS6000_BTI_void, ~RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, > - { ALTIVEC_BUILTIN_VEC_DSTT, ALTIVEC_BUILTIN_DSTT, > - RS6000_BTI_void, ~RS6000_BTI_V8HI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, > - { ALTIVEC_BUILTIN_VEC_DSTT, ALTIVEC_BUILTIN_DSTT, > - RS6000_BTI_void, ~RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, > - { ALTIVEC_BUILTIN_VEC_DSTT, ALTIVEC_BUILTIN_DSTT, > - RS6000_BTI_void, ~RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, > - { ALTIVEC_BUILTIN_VEC_DSTT, ALTIVEC_BUILTIN_DSTT, > - RS6000_BTI_void, ~RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, > - { ALTIVEC_BUILTIN_VEC_DSTT, ALTIVEC_BUILTIN_DSTT, > - RS6000_BTI_void, ~RS6000_BTI_V4SI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, > - { ALTIVEC_BUILTIN_VEC_DSTT, ALTIVEC_BUILTIN_DSTT, > - RS6000_BTI_void, ~RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, > - { ALTIVEC_BUILTIN_VEC_DSTT, ALTIVEC_BUILTIN_DSTT, > - RS6000_BTI_void, ~RS6000_BTI_V4SF, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, > - { ALTIVEC_BUILTIN_VEC_DSTT, ALTIVEC_BUILTIN_DSTT, > - RS6000_BTI_void, ~RS6000_BTI_UINTQI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, > - { ALTIVEC_BUILTIN_VEC_DSTT, ALTIVEC_BUILTIN_DSTT, > - RS6000_BTI_void, ~RS6000_BTI_INTQI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, > - { ALTIVEC_BUILTIN_VEC_DSTT, ALTIVEC_BUILTIN_DSTT, > - RS6000_BTI_void, ~RS6000_BTI_UINTHI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, > - { ALTIVEC_BUILTIN_VEC_DSTT, ALTIVEC_BUILTIN_DSTT, > - RS6000_BTI_void, ~RS6000_BTI_INTHI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, > - { ALTIVEC_BUILTIN_VEC_DSTT, ALTIVEC_BUILTIN_DSTT, > - RS6000_BTI_void, ~RS6000_BTI_UINTSI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, > - { ALTIVEC_BUILTIN_VEC_DSTT, ALTIVEC_BUILTIN_DSTT, > - RS6000_BTI_void, ~RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, > - { ALTIVEC_BUILTIN_VEC_DSTT, ALTIVEC_BUILTIN_DSTT, > - RS6000_BTI_void, ~RS6000_BTI_unsigned_long, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, > - { ALTIVEC_BUILTIN_VEC_DSTT, ALTIVEC_BUILTIN_DSTT, > - RS6000_BTI_void, ~RS6000_BTI_long, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, > - { ALTIVEC_BUILTIN_VEC_DSTT, ALTIVEC_BUILTIN_DSTT, > - RS6000_BTI_void, ~RS6000_BTI_float, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, > - { ALTIVEC_BUILTIN_VEC_MADD, ALTIVEC_BUILTIN_VMADDFP, > - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF }, > - { ALTIVEC_BUILTIN_VEC_MADD, VSX_BUILTIN_XVMADDDP, > - RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF }, > - { ALTIVEC_BUILTIN_VEC_MADD, ALTIVEC_BUILTIN_VMLADDUHM, > - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI }, > - { ALTIVEC_BUILTIN_VEC_MADD, ALTIVEC_BUILTIN_VMLADDUHM, > - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI }, > - { ALTIVEC_BUILTIN_VEC_MADD, ALTIVEC_BUILTIN_VMLADDUHM, > - RS6000_BTI_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI }, > - { ALTIVEC_BUILTIN_VEC_MADD, ALTIVEC_BUILTIN_VMLADDUHM, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI }, > - { ALTIVEC_BUILTIN_VEC_MADDS, ALTIVEC_BUILTIN_VMHADDSHS, > - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI }, > - { ALTIVEC_BUILTIN_VEC_MLADD, ALTIVEC_BUILTIN_VMLADDUHM, > - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI }, > - { ALTIVEC_BUILTIN_VEC_MLADD, ALTIVEC_BUILTIN_VMLADDUHM, > - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI }, > - { ALTIVEC_BUILTIN_VEC_MLADD, ALTIVEC_BUILTIN_VMLADDUHM, > - RS6000_BTI_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI }, > - { ALTIVEC_BUILTIN_VEC_MLADD, ALTIVEC_BUILTIN_VMLADDUHM, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI }, > - { ALTIVEC_BUILTIN_VEC_MRADDS, ALTIVEC_BUILTIN_VMHRADDSHS, > - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI }, > - { VSX_BUILTIN_VEC_MSUB, VSX_BUILTIN_XVMSUBSP, > - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF }, > - { VSX_BUILTIN_VEC_MSUB, VSX_BUILTIN_XVMSUBDP, > - RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF }, > - { ALTIVEC_BUILTIN_VEC_MSUM, ALTIVEC_BUILTIN_VMSUMUBM, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V4SI }, > - { ALTIVEC_BUILTIN_VEC_MSUM, ALTIVEC_BUILTIN_VMSUMMBM, > - RS6000_BTI_V4SI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_V4SI }, > - { ALTIVEC_BUILTIN_VEC_MSUM, ALTIVEC_BUILTIN_VMSUMUHM, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V4SI }, > - { ALTIVEC_BUILTIN_VEC_MSUM, ALTIVEC_BUILTIN_VMSUMSHM, > - RS6000_BTI_V4SI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V4SI }, > - > - { ALTIVEC_BUILTIN_VEC_MSUM, ALTIVEC_BUILTIN_VMSUMUDM, > - RS6000_BTI_V1TI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V1TI }, > - { ALTIVEC_BUILTIN_VEC_MSUM, ALTIVEC_BUILTIN_VMSUMUDM, > - RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V1TI }, > - > - { ALTIVEC_BUILTIN_VEC_VMSUMSHM, ALTIVEC_BUILTIN_VMSUMSHM, > - RS6000_BTI_V4SI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V4SI }, > - { ALTIVEC_BUILTIN_VEC_VMSUMUHM, ALTIVEC_BUILTIN_VMSUMUHM, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V4SI }, > - { ALTIVEC_BUILTIN_VEC_VMSUMMBM, ALTIVEC_BUILTIN_VMSUMMBM, > - RS6000_BTI_V4SI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_V4SI }, > - { ALTIVEC_BUILTIN_VEC_VMSUMUBM, ALTIVEC_BUILTIN_VMSUMUBM, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V4SI }, > - { ALTIVEC_BUILTIN_VEC_MSUMS, ALTIVEC_BUILTIN_VMSUMUHS, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V4SI }, > - { ALTIVEC_BUILTIN_VEC_MSUMS, ALTIVEC_BUILTIN_VMSUMSHS, > - RS6000_BTI_V4SI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V4SI }, > - { ALTIVEC_BUILTIN_VEC_VMSUMSHS, ALTIVEC_BUILTIN_VMSUMSHS, > - RS6000_BTI_V4SI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V4SI }, > - { ALTIVEC_BUILTIN_VEC_VMSUMUHS, ALTIVEC_BUILTIN_VMSUMUHS, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V4SI }, > - { VSX_BUILTIN_VEC_NMADD, VSX_BUILTIN_XVNMADDSP, > - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF }, > - { VSX_BUILTIN_VEC_NMADD, VSX_BUILTIN_XVNMADDDP, > - RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF }, > - { ALTIVEC_BUILTIN_VEC_NMSUB, ALTIVEC_BUILTIN_VNMSUBFP, > - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF }, > - { ALTIVEC_BUILTIN_VEC_NMSUB, VSX_BUILTIN_XVNMSUBDP, > - RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF }, > - { ALTIVEC_BUILTIN_VEC_PERM, ALTIVEC_BUILTIN_VPERM_2DF, > - RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_unsigned_V16QI }, > - { ALTIVEC_BUILTIN_VEC_PERM, ALTIVEC_BUILTIN_VPERM_2DI, > - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_unsigned_V16QI }, > - { ALTIVEC_BUILTIN_VEC_PERM, ALTIVEC_BUILTIN_VPERM_2DI, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V16QI }, > - { ALTIVEC_BUILTIN_VEC_PERM, ALTIVEC_BUILTIN_VPERM_2DI, > - RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, > - RS6000_BTI_unsigned_V16QI }, > - { ALTIVEC_BUILTIN_VEC_PERM, ALTIVEC_BUILTIN_VPERM_4SF, > - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_unsigned_V16QI }, > - { ALTIVEC_BUILTIN_VEC_PERM, ALTIVEC_BUILTIN_VPERM_4SI, > - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V16QI }, > - { ALTIVEC_BUILTIN_VEC_PERM, ALTIVEC_BUILTIN_VPERM_4SI, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V16QI }, > - { ALTIVEC_BUILTIN_VEC_PERM, ALTIVEC_BUILTIN_VPERM_4SI, > - RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V16QI }, > - { ALTIVEC_BUILTIN_VEC_PERM, ALTIVEC_BUILTIN_VPERM_8HI, > - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V16QI }, > - { ALTIVEC_BUILTIN_VEC_PERM, ALTIVEC_BUILTIN_VPERM_8HI, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V16QI }, > - { ALTIVEC_BUILTIN_VEC_PERM, ALTIVEC_BUILTIN_VPERM_8HI, > - RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V16QI }, > - { ALTIVEC_BUILTIN_VEC_PERM, ALTIVEC_BUILTIN_VPERM_8HI, > - RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, RS6000_BTI_unsigned_V16QI }, > - { ALTIVEC_BUILTIN_VEC_PERM, ALTIVEC_BUILTIN_VPERM_16QI, > - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI }, > - { ALTIVEC_BUILTIN_VEC_PERM, ALTIVEC_BUILTIN_VPERM_16QI, > - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI }, > - { ALTIVEC_BUILTIN_VEC_PERM, ALTIVEC_BUILTIN_VPERM_16QI, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI }, > - { ALTIVEC_BUILTIN_VEC_PERM, ALTIVEC_BUILTIN_VPERM_16QI, > - RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI }, > - { ALTIVEC_BUILTIN_VEC_PERM, ALTIVEC_BUILTIN_VPERM_16QI, > - RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI }, > - > - { P8V_BUILTIN_VEC_VPERMXOR, P8V_BUILTIN_VPERMXOR, > - RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, > - RS6000_BTI_bool_V16QI }, > - { P8V_BUILTIN_VEC_VPERMXOR, P8V_BUILTIN_VPERMXOR, > - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI }, > - { P8V_BUILTIN_VEC_VPERMXOR, P8V_BUILTIN_VPERMXOR, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI }, > - > - { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_2DF, > - RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_bool_V2DI }, > - { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_2DF, > - RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_unsigned_V2DI }, > - { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_2DF, > - RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DI }, > - { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_2DF, > - RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF }, > - { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_2DI, > - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI }, > - { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_2DI, > - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_unsigned_V2DI }, > - { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_2DI, > - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI }, > - { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_2DI, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI }, > - { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_2DI, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI }, > - { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_2DI, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_V2DI }, > - { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_2DI, > - RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, > - RS6000_BTI_bool_V2DI }, > - { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_2DI, > - RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, > - RS6000_BTI_unsigned_V2DI }, > - { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_4SF, > - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_bool_V4SI }, > - { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_4SF, > - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_unsigned_V4SI }, > - { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_4SI, > - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF }, > - { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_4SI, > - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SI }, > - { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_4SI, > - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI }, > - { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_4SI, > - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V4SI }, > - { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_4SI, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI }, > - { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_4SI, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI }, > - { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_4SI, > - RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI }, > - { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_4SI, > - RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI }, > - { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_8HI, > - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI }, > - { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_8HI, > - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V8HI }, > - { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_8HI, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI }, > - { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_8HI, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI }, > - { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_8HI, > - RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI }, > - { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_8HI, > - RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI }, > - { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_16QI, > - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI }, > - { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_16QI, > - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI }, > - { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_16QI, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI }, > - { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_16QI, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI }, > - { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_16QI, > - RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI }, > - { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_16QI, > - RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI }, > - { ALTIVEC_BUILTIN_VEC_SLD, ALTIVEC_BUILTIN_VSLDOI_4SF, > - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_INTSI }, > - { ALTIVEC_BUILTIN_VEC_SLD, ALTIVEC_BUILTIN_VSLDOI_4SI, > - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_INTSI }, > - { ALTIVEC_BUILTIN_VEC_SLD, ALTIVEC_BUILTIN_VSLDOI_4SI, > - RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI }, > - { ALTIVEC_BUILTIN_VEC_SLD, ALTIVEC_BUILTIN_VSLDOI_4SI, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI }, > - { ALTIVEC_BUILTIN_VEC_SLD, ALTIVEC_BUILTIN_VSLDOI_8HI, > - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_INTSI }, > - { ALTIVEC_BUILTIN_VEC_SLD, ALTIVEC_BUILTIN_VSLDOI_8HI, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI }, > - { ALTIVEC_BUILTIN_VEC_SLD, ALTIVEC_BUILTIN_VSLDOI_8HI, > - RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI }, > - { ALTIVEC_BUILTIN_VEC_SLD, ALTIVEC_BUILTIN_VSLDOI_8HI, > - RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI }, > - { ALTIVEC_BUILTIN_VEC_SLD, ALTIVEC_BUILTIN_VSLDOI_16QI, > - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_INTSI }, > - { ALTIVEC_BUILTIN_VEC_SLD, ALTIVEC_BUILTIN_VSLDOI_16QI, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI }, > - { ALTIVEC_BUILTIN_VEC_SLD, ALTIVEC_BUILTIN_VSLDOI_16QI, > - RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI }, > - { ALTIVEC_BUILTIN_VEC_SLD, ALTIVEC_BUILTIN_VSLDOI_2DF, > - RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_INTSI }, > - { ALTIVEC_BUILTIN_VEC_SLD, ALTIVEC_BUILTIN_VSLDOI_2DI, > - RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_INTSI }, > - { ALTIVEC_BUILTIN_VEC_SLD, ALTIVEC_BUILTIN_VSLDOI_2DI, > - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_INTSI }, > - { ALTIVEC_BUILTIN_VEC_SLD, ALTIVEC_BUILTIN_VSLDOI_2DI, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_INTSI }, > - > - { ALTIVEC_BUILTIN_VEC_SLDW, VSX_BUILTIN_XXSLDWI_16QI, > - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, > - RS6000_BTI_INTSI }, > - { ALTIVEC_BUILTIN_VEC_SLDW, VSX_BUILTIN_XXSLDWI_16QI, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI }, > - { ALTIVEC_BUILTIN_VEC_SLDW, VSX_BUILTIN_XXSLDWI_8HI, > - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, > - RS6000_BTI_INTSI }, > - { ALTIVEC_BUILTIN_VEC_SLDW, VSX_BUILTIN_XXSLDWI_8HI, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI }, > - { ALTIVEC_BUILTIN_VEC_SLDW, VSX_BUILTIN_XXSLDWI_4SI, > - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, > - RS6000_BTI_INTSI }, > - { ALTIVEC_BUILTIN_VEC_SLDW, VSX_BUILTIN_XXSLDWI_4SI, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI }, > - { ALTIVEC_BUILTIN_VEC_SLDW, VSX_BUILTIN_XXSLDWI_2DI, > - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, > - RS6000_BTI_INTSI }, > - { ALTIVEC_BUILTIN_VEC_SLDW, VSX_BUILTIN_XXSLDWI_2DI, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_INTSI }, > - > - { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V2DF, > - RS6000_BTI_void, RS6000_BTI_V2DF, RS6000_BTI_INTSI, ~RS6000_BTI_V2DF }, > - { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V2DF, > - RS6000_BTI_void, RS6000_BTI_V2DF, RS6000_BTI_INTSI, ~RS6000_BTI_double }, > - { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V2DI, > - RS6000_BTI_void, RS6000_BTI_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_V2DI }, > - { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V2DI, > - RS6000_BTI_void, RS6000_BTI_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_long_long }, > - { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V2DI, > - RS6000_BTI_void, RS6000_BTI_unsigned_V2DI, RS6000_BTI_INTSI, > - ~RS6000_BTI_unsigned_V2DI }, > - { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V2DI, > - RS6000_BTI_void, RS6000_BTI_unsigned_V2DI, RS6000_BTI_INTSI, > - ~RS6000_BTI_unsigned_long_long }, > - { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V2DI, > - RS6000_BTI_void, RS6000_BTI_bool_V2DI, RS6000_BTI_INTSI, > - ~RS6000_BTI_bool_V2DI }, > - { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V2DI, > - RS6000_BTI_void, RS6000_BTI_bool_V2DI, RS6000_BTI_INTSI, > - ~RS6000_BTI_long_long }, > - { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V2DI, > - RS6000_BTI_void, RS6000_BTI_bool_V2DI, RS6000_BTI_INTSI, > - ~RS6000_BTI_unsigned_long_long }, > - { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V4SF, > - RS6000_BTI_void, RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_V4SF }, > - { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V4SF, > - RS6000_BTI_void, RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float }, > - { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V4SI, > - RS6000_BTI_void, RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_V4SI }, > - { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V4SI, > - RS6000_BTI_void, RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI }, > - { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V4SI, > - RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V4SI }, > - { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V4SI, > - RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI }, > - { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V4SI, > - RS6000_BTI_void, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V4SI }, > - { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V4SI, > - RS6000_BTI_void, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI }, > - { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V4SI, > - RS6000_BTI_void, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI }, > - { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V8HI, > - RS6000_BTI_void, RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_V8HI }, > - { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V8HI, > - RS6000_BTI_void, RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI }, > - { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V8HI, > - RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V8HI }, > - { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V8HI, > - RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI }, > - { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V8HI, > - RS6000_BTI_void, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V8HI }, > - { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V8HI, > - RS6000_BTI_void, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI }, > - { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V8HI, > - RS6000_BTI_void, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI }, > - { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V16QI, > - RS6000_BTI_void, RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_V16QI }, > - { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V16QI, > - RS6000_BTI_void, RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI }, > - { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V16QI, > - RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V16QI }, > - { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V16QI, > - RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI }, > - { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V16QI, > - RS6000_BTI_void, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V16QI }, > - { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V16QI, > - RS6000_BTI_void, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI }, > - { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V16QI, > - RS6000_BTI_void, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI }, > - { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V8HI, > - RS6000_BTI_void, RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_pixel_V8HI }, > - { ALTIVEC_BUILTIN_VEC_STE, ALTIVEC_BUILTIN_STVEBX, > - RS6000_BTI_void, RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI }, > - { ALTIVEC_BUILTIN_VEC_STE, ALTIVEC_BUILTIN_STVEBX, > - RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI }, > - { ALTIVEC_BUILTIN_VEC_STE, ALTIVEC_BUILTIN_STVEBX, > - RS6000_BTI_void, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI }, > - { ALTIVEC_BUILTIN_VEC_STE, ALTIVEC_BUILTIN_STVEBX, > - RS6000_BTI_void, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI }, > - { ALTIVEC_BUILTIN_VEC_STE, ALTIVEC_BUILTIN_STVEHX, > - RS6000_BTI_void, RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI }, > - { ALTIVEC_BUILTIN_VEC_STE, ALTIVEC_BUILTIN_STVEHX, > - RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI }, > - { ALTIVEC_BUILTIN_VEC_STE, ALTIVEC_BUILTIN_STVEHX, > - RS6000_BTI_void, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI }, > - { ALTIVEC_BUILTIN_VEC_STE, ALTIVEC_BUILTIN_STVEHX, > - RS6000_BTI_void, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI }, > - { ALTIVEC_BUILTIN_VEC_STE, ALTIVEC_BUILTIN_STVEHX, > - RS6000_BTI_void, RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI }, > - { ALTIVEC_BUILTIN_VEC_STE, ALTIVEC_BUILTIN_STVEHX, > - RS6000_BTI_void, RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI }, > - { ALTIVEC_BUILTIN_VEC_STE, ALTIVEC_BUILTIN_STVEWX, > - RS6000_BTI_void, RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float }, > - { ALTIVEC_BUILTIN_VEC_STE, ALTIVEC_BUILTIN_STVEWX, > - RS6000_BTI_void, RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI }, > - { ALTIVEC_BUILTIN_VEC_STE, ALTIVEC_BUILTIN_STVEWX, > - RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI }, > - { ALTIVEC_BUILTIN_VEC_STE, ALTIVEC_BUILTIN_STVEWX, > - RS6000_BTI_void, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI }, > - { ALTIVEC_BUILTIN_VEC_STE, ALTIVEC_BUILTIN_STVEWX, > - RS6000_BTI_void, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI }, > - { ALTIVEC_BUILTIN_VEC_STVEWX, ALTIVEC_BUILTIN_STVEWX, > - RS6000_BTI_void, RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float }, > - { ALTIVEC_BUILTIN_VEC_STVEWX, ALTIVEC_BUILTIN_STVEWX, > - RS6000_BTI_void, RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI }, > - { ALTIVEC_BUILTIN_VEC_STVEWX, ALTIVEC_BUILTIN_STVEWX, > - RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI }, > - { ALTIVEC_BUILTIN_VEC_STVEWX, ALTIVEC_BUILTIN_STVEWX, > - RS6000_BTI_void, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI }, > - { ALTIVEC_BUILTIN_VEC_STVEWX, ALTIVEC_BUILTIN_STVEWX, > - RS6000_BTI_void, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI }, > - { ALTIVEC_BUILTIN_VEC_STVEWX, ALTIVEC_BUILTIN_STVEWX, > - RS6000_BTI_void, RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_void }, > - { ALTIVEC_BUILTIN_VEC_STVEWX, ALTIVEC_BUILTIN_STVEWX, > - RS6000_BTI_void, RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_void }, > - { ALTIVEC_BUILTIN_VEC_STVEWX, ALTIVEC_BUILTIN_STVEWX, > - RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_void }, > - { ALTIVEC_BUILTIN_VEC_STVEHX, ALTIVEC_BUILTIN_STVEHX, > - RS6000_BTI_void, RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI }, > - { ALTIVEC_BUILTIN_VEC_STVEHX, ALTIVEC_BUILTIN_STVEHX, > - RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI }, > - { ALTIVEC_BUILTIN_VEC_STVEHX, ALTIVEC_BUILTIN_STVEHX, > - RS6000_BTI_void, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI }, > - { ALTIVEC_BUILTIN_VEC_STVEHX, ALTIVEC_BUILTIN_STVEHX, > - RS6000_BTI_void, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI }, > - { ALTIVEC_BUILTIN_VEC_STVEHX, ALTIVEC_BUILTIN_STVEHX, > - RS6000_BTI_void, RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_void }, > - { ALTIVEC_BUILTIN_VEC_STVEHX, ALTIVEC_BUILTIN_STVEHX, > - RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_void }, > - { ALTIVEC_BUILTIN_VEC_STVEBX, ALTIVEC_BUILTIN_STVEBX, > - RS6000_BTI_void, RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI }, > - { ALTIVEC_BUILTIN_VEC_STVEBX, ALTIVEC_BUILTIN_STVEBX, > - RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI }, > - { ALTIVEC_BUILTIN_VEC_STVEBX, ALTIVEC_BUILTIN_STVEBX, > - RS6000_BTI_void, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI }, > - { ALTIVEC_BUILTIN_VEC_STVEBX, ALTIVEC_BUILTIN_STVEBX, > - RS6000_BTI_void, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI }, > - { ALTIVEC_BUILTIN_VEC_STVEBX, ALTIVEC_BUILTIN_STVEBX, > - RS6000_BTI_void, RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_void }, > - { ALTIVEC_BUILTIN_VEC_STVEBX, ALTIVEC_BUILTIN_STVEBX, > - RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_void }, > - { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V4SF, > - RS6000_BTI_void, RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_V4SF }, > - { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V4SF, > - RS6000_BTI_void, RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float }, > - { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V4SI, > - RS6000_BTI_void, RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_V4SI }, > - { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V4SI, > - RS6000_BTI_void, RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI }, > - { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V4SI, > - RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V4SI }, > - { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V4SI, > - RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI }, > - { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V4SI, > - RS6000_BTI_void, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V4SI }, > - { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V4SI, > - RS6000_BTI_void, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI }, > - { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V4SI, > - RS6000_BTI_void, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI }, > - { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V8HI, > - RS6000_BTI_void, RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_V8HI }, > - { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V8HI, > - RS6000_BTI_void, RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI }, > - { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V8HI, > - RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V8HI }, > - { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V8HI, > - RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI }, > - { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V8HI, > - RS6000_BTI_void, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V8HI }, > - { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V8HI, > - RS6000_BTI_void, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI }, > - { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V8HI, > - RS6000_BTI_void, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI }, > - { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V16QI, > - RS6000_BTI_void, RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_V16QI }, > - { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V16QI, > - RS6000_BTI_void, RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI }, > - { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V16QI, > - RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V16QI }, > - { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V16QI, > - RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI }, > - { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V16QI, > - RS6000_BTI_void, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V16QI }, > - { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V16QI, > - RS6000_BTI_void, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI }, > - { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V16QI, > - RS6000_BTI_void, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI }, > - { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V8HI, > - RS6000_BTI_void, RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_pixel_V8HI }, > - { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V2DF, > - RS6000_BTI_void, RS6000_BTI_V2DF, RS6000_BTI_INTSI, ~RS6000_BTI_V2DF }, > - { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V2DF, > - RS6000_BTI_void, RS6000_BTI_V2DF, RS6000_BTI_INTSI, ~RS6000_BTI_double }, > - { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V2DI, > - RS6000_BTI_void, RS6000_BTI_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_V2DI }, > - { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V2DI, > - RS6000_BTI_void, RS6000_BTI_unsigned_V2DI, RS6000_BTI_INTSI, > - ~RS6000_BTI_unsigned_V2DI }, > - { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V2DI, > - RS6000_BTI_void, RS6000_BTI_bool_V2DI, RS6000_BTI_INTSI, > - ~RS6000_BTI_bool_V2DI }, > - { ALTIVEC_BUILTIN_VEC_STVLX, ALTIVEC_BUILTIN_STVLX, > - RS6000_BTI_void, RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_V4SF }, > - { ALTIVEC_BUILTIN_VEC_STVLX, ALTIVEC_BUILTIN_STVLX, > - RS6000_BTI_void, RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float }, > - { ALTIVEC_BUILTIN_VEC_STVLX, ALTIVEC_BUILTIN_STVLX, > - RS6000_BTI_void, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V4SI }, > - { ALTIVEC_BUILTIN_VEC_STVLX, ALTIVEC_BUILTIN_STVLX, > - RS6000_BTI_void, RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_V4SI }, > - { ALTIVEC_BUILTIN_VEC_STVLX, ALTIVEC_BUILTIN_STVLX, > - RS6000_BTI_void, RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI }, > - { ALTIVEC_BUILTIN_VEC_STVLX, ALTIVEC_BUILTIN_STVLX, > - RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V4SI }, > - { ALTIVEC_BUILTIN_VEC_STVLX, ALTIVEC_BUILTIN_STVLX, > - RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI }, > - { ALTIVEC_BUILTIN_VEC_STVLX, ALTIVEC_BUILTIN_STVLX, > - RS6000_BTI_void, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V8HI }, > - { ALTIVEC_BUILTIN_VEC_STVLX, ALTIVEC_BUILTIN_STVLX, > - RS6000_BTI_void, RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_pixel_V8HI }, > - { ALTIVEC_BUILTIN_VEC_STVLX, ALTIVEC_BUILTIN_STVLX, > - RS6000_BTI_void, RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_V8HI }, > - { ALTIVEC_BUILTIN_VEC_STVLX, ALTIVEC_BUILTIN_STVLX, > - RS6000_BTI_void, RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI }, > - { ALTIVEC_BUILTIN_VEC_STVLX, ALTIVEC_BUILTIN_STVLX, > - RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V8HI }, > - { ALTIVEC_BUILTIN_VEC_STVLX, ALTIVEC_BUILTIN_STVLX, > - RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI }, > - { ALTIVEC_BUILTIN_VEC_STVLX, ALTIVEC_BUILTIN_STVLX, > - RS6000_BTI_void, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V16QI }, > - { ALTIVEC_BUILTIN_VEC_STVLX, ALTIVEC_BUILTIN_STVLX, > - RS6000_BTI_void, RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_V16QI }, > - { ALTIVEC_BUILTIN_VEC_STVLX, ALTIVEC_BUILTIN_STVLX, > - RS6000_BTI_void, RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI }, > - { ALTIVEC_BUILTIN_VEC_STVLX, ALTIVEC_BUILTIN_STVLX, > - RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V16QI }, > - { ALTIVEC_BUILTIN_VEC_STVLX, ALTIVEC_BUILTIN_STVLX, > - RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI }, > - { ALTIVEC_BUILTIN_VEC_STVLXL, ALTIVEC_BUILTIN_STVLXL, > - RS6000_BTI_void, RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_V4SF }, > - { ALTIVEC_BUILTIN_VEC_STVLXL, ALTIVEC_BUILTIN_STVLXL, > - RS6000_BTI_void, RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float }, > - { ALTIVEC_BUILTIN_VEC_STVLXL, ALTIVEC_BUILTIN_STVLXL, > - RS6000_BTI_void, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V4SI }, > - { ALTIVEC_BUILTIN_VEC_STVLXL, ALTIVEC_BUILTIN_STVLXL, > - RS6000_BTI_void, RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_V4SI }, > - { ALTIVEC_BUILTIN_VEC_STVLXL, ALTIVEC_BUILTIN_STVLXL, > - RS6000_BTI_void, RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI }, > - { ALTIVEC_BUILTIN_VEC_STVLXL, ALTIVEC_BUILTIN_STVLXL, > - RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V4SI }, > - { ALTIVEC_BUILTIN_VEC_STVLXL, ALTIVEC_BUILTIN_STVLXL, > - RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI }, > - { ALTIVEC_BUILTIN_VEC_STVLXL, ALTIVEC_BUILTIN_STVLXL, > - RS6000_BTI_void, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V8HI }, > - { ALTIVEC_BUILTIN_VEC_STVLXL, ALTIVEC_BUILTIN_STVLXL, > - RS6000_BTI_void, RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_pixel_V8HI }, > - { ALTIVEC_BUILTIN_VEC_STVLXL, ALTIVEC_BUILTIN_STVLXL, > - RS6000_BTI_void, RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_V8HI }, > - { ALTIVEC_BUILTIN_VEC_STVLXL, ALTIVEC_BUILTIN_STVLXL, > - RS6000_BTI_void, RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI }, > - { ALTIVEC_BUILTIN_VEC_STVLXL, ALTIVEC_BUILTIN_STVLXL, > - RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V8HI }, > - { ALTIVEC_BUILTIN_VEC_STVLXL, ALTIVEC_BUILTIN_STVLXL, > - RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI }, > - { ALTIVEC_BUILTIN_VEC_STVLXL, ALTIVEC_BUILTIN_STVLXL, > - RS6000_BTI_void, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V16QI }, > - { ALTIVEC_BUILTIN_VEC_STVLXL, ALTIVEC_BUILTIN_STVLXL, > - RS6000_BTI_void, RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_V16QI }, > - { ALTIVEC_BUILTIN_VEC_STVLXL, ALTIVEC_BUILTIN_STVLXL, > - RS6000_BTI_void, RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI }, > - { ALTIVEC_BUILTIN_VEC_STVLXL, ALTIVEC_BUILTIN_STVLXL, > - RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V16QI }, > - { ALTIVEC_BUILTIN_VEC_STVLXL, ALTIVEC_BUILTIN_STVLXL, > - RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI }, > - { ALTIVEC_BUILTIN_VEC_STVRX, ALTIVEC_BUILTIN_STVRX, > - RS6000_BTI_void, RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_V4SF }, > - { ALTIVEC_BUILTIN_VEC_STVRX, ALTIVEC_BUILTIN_STVRX, > - RS6000_BTI_void, RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float }, > - { ALTIVEC_BUILTIN_VEC_STVRX, ALTIVEC_BUILTIN_STVRX, > - RS6000_BTI_void, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V4SI }, > - { ALTIVEC_BUILTIN_VEC_STVRX, ALTIVEC_BUILTIN_STVRX, > - RS6000_BTI_void, RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_V4SI }, > - { ALTIVEC_BUILTIN_VEC_STVRX, ALTIVEC_BUILTIN_STVRX, > - RS6000_BTI_void, RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI }, > - { ALTIVEC_BUILTIN_VEC_STVRX, ALTIVEC_BUILTIN_STVRX, > - RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V4SI }, > - { ALTIVEC_BUILTIN_VEC_STVRX, ALTIVEC_BUILTIN_STVRX, > - RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI }, > - { ALTIVEC_BUILTIN_VEC_STVRX, ALTIVEC_BUILTIN_STVRX, > - RS6000_BTI_void, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V8HI }, > - { ALTIVEC_BUILTIN_VEC_STVRX, ALTIVEC_BUILTIN_STVRX, > - RS6000_BTI_void, RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_pixel_V8HI }, > - { ALTIVEC_BUILTIN_VEC_STVRX, ALTIVEC_BUILTIN_STVRX, > - RS6000_BTI_void, RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_V8HI }, > - { ALTIVEC_BUILTIN_VEC_STVRX, ALTIVEC_BUILTIN_STVRX, > - RS6000_BTI_void, RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI }, > - { ALTIVEC_BUILTIN_VEC_STVRX, ALTIVEC_BUILTIN_STVRX, > - RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V8HI }, > - { ALTIVEC_BUILTIN_VEC_STVRX, ALTIVEC_BUILTIN_STVRX, > - RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI }, > - { ALTIVEC_BUILTIN_VEC_STVRX, ALTIVEC_BUILTIN_STVRX, > - RS6000_BTI_void, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V16QI }, > - { ALTIVEC_BUILTIN_VEC_STVRX, ALTIVEC_BUILTIN_STVRX, > - RS6000_BTI_void, RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_V16QI }, > - { ALTIVEC_BUILTIN_VEC_STVRX, ALTIVEC_BUILTIN_STVRX, > - RS6000_BTI_void, RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI }, > - { ALTIVEC_BUILTIN_VEC_STVRX, ALTIVEC_BUILTIN_STVRX, > - RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V16QI }, > - { ALTIVEC_BUILTIN_VEC_STVRX, ALTIVEC_BUILTIN_STVRX, > - RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI }, > - { ALTIVEC_BUILTIN_VEC_STVRXL, ALTIVEC_BUILTIN_STVRXL, > - RS6000_BTI_void, RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_V4SF }, > - { ALTIVEC_BUILTIN_VEC_STVRXL, ALTIVEC_BUILTIN_STVRXL, > - RS6000_BTI_void, RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float }, > - { ALTIVEC_BUILTIN_VEC_STVRXL, ALTIVEC_BUILTIN_STVRXL, > - RS6000_BTI_void, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V4SI }, > - { ALTIVEC_BUILTIN_VEC_STVRXL, ALTIVEC_BUILTIN_STVRXL, > - RS6000_BTI_void, RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_V4SI }, > - { ALTIVEC_BUILTIN_VEC_STVRXL, ALTIVEC_BUILTIN_STVRXL, > - RS6000_BTI_void, RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI }, > - { ALTIVEC_BUILTIN_VEC_STVRXL, ALTIVEC_BUILTIN_STVRXL, > - RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V4SI }, > - { ALTIVEC_BUILTIN_VEC_STVRXL, ALTIVEC_BUILTIN_STVRXL, > - RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI }, > - { ALTIVEC_BUILTIN_VEC_STVRXL, ALTIVEC_BUILTIN_STVRXL, > - RS6000_BTI_void, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V8HI }, > - { ALTIVEC_BUILTIN_VEC_STVRXL, ALTIVEC_BUILTIN_STVRXL, > - RS6000_BTI_void, RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_pixel_V8HI }, > - { ALTIVEC_BUILTIN_VEC_STVRXL, ALTIVEC_BUILTIN_STVRXL, > - RS6000_BTI_void, RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_V8HI }, > - { ALTIVEC_BUILTIN_VEC_STVRXL, ALTIVEC_BUILTIN_STVRXL, > - RS6000_BTI_void, RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI }, > - { ALTIVEC_BUILTIN_VEC_STVRXL, ALTIVEC_BUILTIN_STVRXL, > - RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V8HI }, > - { ALTIVEC_BUILTIN_VEC_STVRXL, ALTIVEC_BUILTIN_STVRXL, > - RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI }, > - { ALTIVEC_BUILTIN_VEC_STVRXL, ALTIVEC_BUILTIN_STVRXL, > - RS6000_BTI_void, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V16QI }, > - { ALTIVEC_BUILTIN_VEC_STVRXL, ALTIVEC_BUILTIN_STVRXL, > - RS6000_BTI_void, RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_V16QI }, > - { ALTIVEC_BUILTIN_VEC_STVRXL, ALTIVEC_BUILTIN_STVRXL, > - RS6000_BTI_void, RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI }, > - { ALTIVEC_BUILTIN_VEC_STVRXL, ALTIVEC_BUILTIN_STVRXL, > - RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V16QI }, > - { ALTIVEC_BUILTIN_VEC_STVRXL, ALTIVEC_BUILTIN_STVRXL, > - RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI }, > - { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_STXVD2X_V2DF, > - RS6000_BTI_void, RS6000_BTI_V2DF, RS6000_BTI_INTSI, ~RS6000_BTI_V2DF }, > - { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_STXVD2X_V2DF, > - RS6000_BTI_void, RS6000_BTI_V2DF, RS6000_BTI_INTSI, ~RS6000_BTI_double }, > - { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_STXVD2X_V2DI, > - RS6000_BTI_void, RS6000_BTI_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_V2DI }, > - { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_STXVD2X_V2DI, > - RS6000_BTI_void, RS6000_BTI_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_long_long }, > - { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_STXVD2X_V2DI, RS6000_BTI_void, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_long_long }, > - { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_STXVD2X_V2DI, > - RS6000_BTI_void, RS6000_BTI_unsigned_V2DI, RS6000_BTI_INTSI, > - ~RS6000_BTI_unsigned_V2DI }, > - { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_STXVD2X_V2DI, > - RS6000_BTI_void, RS6000_BTI_bool_V2DI, RS6000_BTI_INTSI, > - ~RS6000_BTI_bool_V2DI }, > - { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_STXVW4X_V4SF, > - RS6000_BTI_void, RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_V4SF }, > - { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_STXVW4X_V4SF, > - RS6000_BTI_void, RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float }, > - { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_STXVW4X_V4SI, > - RS6000_BTI_void, RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_V4SI }, > - { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_STXVW4X_V4SI, > - RS6000_BTI_void, RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI }, > - { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_STXVW4X_V4SI, > - RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V4SI }, > - { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_STXVW4X_V4SI, > - RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI }, > - { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_STXVW4X_V4SI, > - RS6000_BTI_void, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V4SI }, > - { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_STXVW4X_V4SI, > - RS6000_BTI_void, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI }, > - { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_STXVW4X_V4SI, > - RS6000_BTI_void, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI }, > - { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_STXVW4X_V8HI, > - RS6000_BTI_void, RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_V8HI }, > - { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_STXVW4X_V8HI, > - RS6000_BTI_void, RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI }, > - { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_STXVW4X_V8HI, > - RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V8HI }, > - { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_STXVW4X_V8HI, > - RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI }, > - { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_STXVW4X_V8HI, > - RS6000_BTI_void, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V8HI }, > - { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_STXVW4X_V8HI, > - RS6000_BTI_void, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI }, > - { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_STXVW4X_V8HI, > - RS6000_BTI_void, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI }, > - { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_STXVW4X_V16QI, > - RS6000_BTI_void, RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_V16QI }, > - { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_STXVW4X_V16QI, > - RS6000_BTI_void, RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI }, > - { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_STXVW4X_V16QI, > - RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V16QI }, > - { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_STXVW4X_V16QI, > - RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI }, > - { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_STXVW4X_V16QI, > - RS6000_BTI_void, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V16QI }, > - { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_STXVW4X_V16QI, > - RS6000_BTI_void, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI }, > - { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_STXVW4X_V16QI, > - RS6000_BTI_void, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI }, > - { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_STXVW4X_V8HI, > - RS6000_BTI_void, RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_pixel_V8HI }, > - { VSX_BUILTIN_VEC_XST_BE, VSX_BUILTIN_ST_ELEMREV_V2DF, > - RS6000_BTI_void, RS6000_BTI_V2DF, RS6000_BTI_INTSI, ~RS6000_BTI_V2DF }, > - { VSX_BUILTIN_VEC_XST_BE, VSX_BUILTIN_ST_ELEMREV_V2DF, > - RS6000_BTI_void, RS6000_BTI_V2DF, RS6000_BTI_INTSI, ~RS6000_BTI_double }, > - { VSX_BUILTIN_VEC_XST_BE, VSX_BUILTIN_ST_ELEMREV_V1TI, > - RS6000_BTI_void, RS6000_BTI_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_INTTI }, > - { VSX_BUILTIN_VEC_XST_BE, VSX_BUILTIN_ST_ELEMREV_V1TI, > - RS6000_BTI_void, RS6000_BTI_unsigned_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTTI }, > - { VSX_BUILTIN_VEC_XST_BE, VSX_BUILTIN_ST_ELEMREV_V2DI, > - RS6000_BTI_void, RS6000_BTI_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_V2DI }, > - { VSX_BUILTIN_VEC_XST_BE, VSX_BUILTIN_ST_ELEMREV_V2DI, > - RS6000_BTI_void, RS6000_BTI_V2DI, RS6000_BTI_INTSI, > - ~RS6000_BTI_long_long }, > - { VSX_BUILTIN_VEC_XST_BE, VSX_BUILTIN_ST_ELEMREV_V2DI, > - RS6000_BTI_void, RS6000_BTI_unsigned_V2DI, RS6000_BTI_INTSI, > - ~RS6000_BTI_unsigned_V2DI }, > - { VSX_BUILTIN_VEC_XST_BE, VSX_BUILTIN_ST_ELEMREV_V2DI, > - RS6000_BTI_void, RS6000_BTI_unsigned_V2DI, RS6000_BTI_INTSI, > - ~RS6000_BTI_unsigned_long_long }, > - { VSX_BUILTIN_VEC_XST_BE, VSX_BUILTIN_ST_ELEMREV_V4SF, > - RS6000_BTI_void, RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_V4SF }, > - { VSX_BUILTIN_VEC_XST_BE, VSX_BUILTIN_ST_ELEMREV_V4SF, > - RS6000_BTI_void, RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float }, > - { VSX_BUILTIN_VEC_XST_BE, VSX_BUILTIN_ST_ELEMREV_V4SI, > - RS6000_BTI_void, RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_V4SI }, > - { VSX_BUILTIN_VEC_XST_BE, VSX_BUILTIN_ST_ELEMREV_V4SI, > - RS6000_BTI_void, RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI }, > - { VSX_BUILTIN_VEC_XST_BE, VSX_BUILTIN_ST_ELEMREV_V4SI, > - RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, > - ~RS6000_BTI_unsigned_V4SI }, > - { VSX_BUILTIN_VEC_XST_BE, VSX_BUILTIN_ST_ELEMREV_V4SI, > - RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, > - ~RS6000_BTI_UINTSI }, > - { VSX_BUILTIN_VEC_XST_BE, VSX_BUILTIN_ST_ELEMREV_V8HI, > - RS6000_BTI_void, RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_V8HI }, > - { VSX_BUILTIN_VEC_XST_BE, VSX_BUILTIN_ST_ELEMREV_V8HI, > - RS6000_BTI_void, RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI }, > - { VSX_BUILTIN_VEC_XST_BE, VSX_BUILTIN_ST_ELEMREV_V8HI, > - RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, > - ~RS6000_BTI_unsigned_V8HI }, > - { VSX_BUILTIN_VEC_XST_BE, VSX_BUILTIN_ST_ELEMREV_V8HI, > - RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, > - ~RS6000_BTI_UINTHI }, > - { VSX_BUILTIN_VEC_XST_BE, VSX_BUILTIN_ST_ELEMREV_V16QI, > - RS6000_BTI_void, RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_V16QI }, > - { VSX_BUILTIN_VEC_XST_BE, VSX_BUILTIN_ST_ELEMREV_V16QI, > - RS6000_BTI_void, RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI }, > - { VSX_BUILTIN_VEC_XST_BE, VSX_BUILTIN_ST_ELEMREV_V16QI, > - RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, > - ~RS6000_BTI_unsigned_V16QI }, > - { VSX_BUILTIN_VEC_XST_BE, VSX_BUILTIN_ST_ELEMREV_V16QI, > - RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, > - ~RS6000_BTI_UINTQI }, > - { VSX_BUILTIN_VEC_XXSLDWI, VSX_BUILTIN_XXSLDWI_16QI, > - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_INTSI }, > - { VSX_BUILTIN_VEC_XXSLDWI, VSX_BUILTIN_XXSLDWI_16QI, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, > - RS6000_BTI_INTSI }, > - { VSX_BUILTIN_VEC_XXSLDWI, VSX_BUILTIN_XXSLDWI_8HI, > - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_INTSI }, > - { VSX_BUILTIN_VEC_XXSLDWI, VSX_BUILTIN_XXSLDWI_8HI, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, > - RS6000_BTI_INTSI }, > - { VSX_BUILTIN_VEC_XXSLDWI, VSX_BUILTIN_XXSLDWI_4SI, > - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_INTSI }, > - { VSX_BUILTIN_VEC_XXSLDWI, VSX_BUILTIN_XXSLDWI_4SI, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, > - RS6000_BTI_INTSI }, > - { VSX_BUILTIN_VEC_XXSLDWI, VSX_BUILTIN_XXSLDWI_2DI, > - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_INTSI }, > - { VSX_BUILTIN_VEC_XXSLDWI, VSX_BUILTIN_XXSLDWI_2DI, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, > - RS6000_BTI_INTSI }, > - { VSX_BUILTIN_VEC_XXSLDWI, VSX_BUILTIN_XXSLDWI_4SF, > - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_INTSI }, > - { VSX_BUILTIN_VEC_XXSLDWI, VSX_BUILTIN_XXSLDWI_2DF, > - RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_INTSI }, > - > - { VSX_BUILTIN_VEC_XXPERMDI, VSX_BUILTIN_XXPERMDI_2DF, > - RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_INTSI }, > - { VSX_BUILTIN_VEC_XXPERMDI, VSX_BUILTIN_XXPERMDI_2DI, > - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_INTSI }, > - { VSX_BUILTIN_VEC_XXPERMDI, VSX_BUILTIN_XXPERMDI_2DI, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, > - RS6000_BTI_INTSI }, > - { VSX_BUILTIN_VEC_XXPERMDI, VSX_BUILTIN_XXPERMDI_4SF, > - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_INTSI }, > - { VSX_BUILTIN_VEC_XXPERMDI, VSX_BUILTIN_XXPERMDI_4SI, > - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_INTSI }, > - { VSX_BUILTIN_VEC_XXPERMDI, VSX_BUILTIN_XXPERMDI_4SI, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, > - RS6000_BTI_INTSI }, > - { VSX_BUILTIN_VEC_XXPERMDI, VSX_BUILTIN_XXPERMDI_8HI, > - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_INTSI }, > - { VSX_BUILTIN_VEC_XXPERMDI, VSX_BUILTIN_XXPERMDI_8HI, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, > - RS6000_BTI_INTSI }, > - { VSX_BUILTIN_VEC_XXPERMDI, VSX_BUILTIN_XXPERMDI_16QI, > - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_INTSI }, > - { VSX_BUILTIN_VEC_XXPERMDI, VSX_BUILTIN_XXPERMDI_16QI, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, > - RS6000_BTI_INTSI }, > - > - { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVD2X_V2DF, > - RS6000_BTI_V2DF, RS6000_BTI_INTSI, ~RS6000_BTI_V2DF, 0 }, > - { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVD2X_V2DF, > - RS6000_BTI_V2DF, RS6000_BTI_INTSI, ~RS6000_BTI_double, 0 }, > - { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVD2X_V2DI, > - RS6000_BTI_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_V2DI, 0 }, > - { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVD2X_V2DI, > - RS6000_BTI_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_INTTI, 0 }, > - { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVD2X_V2DI, > - RS6000_BTI_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_long_long, 0 }, > - { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVD2X_V2DI, > - RS6000_BTI_unsigned_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTTI, 0 }, > - { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVD2X_V2DI, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_INTSI, > - ~RS6000_BTI_unsigned_V2DI, 0 }, > - { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVD2X_V2DI, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_long_long, 0 }, > - { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVD2X_V2DI, > - RS6000_BTI_bool_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V2DI, 0 }, > - { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVW4X_V4SF, > - RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_V4SF, 0 }, > - { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVW4X_V4SF, > - RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float, 0 }, > - { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVW4X_V4SI, > - RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V4SI, 0 }, > - { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVW4X_V4SI, > - RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_V4SI, 0 }, > - { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVW4X_V4SI, > - RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI, 0 }, > - { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVW4X_V4SI, > - RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_long, 0 }, > - { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVW4X_V4SI, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, > - ~RS6000_BTI_unsigned_V4SI, 0 }, > - { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVW4X_V4SI, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI, 0 }, > - { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVW4X_V4SI, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, > - ~RS6000_BTI_unsigned_long, 0 }, > - { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVW4X_V8HI, > - RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V8HI, 0 }, > - { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVW4X_V8HI, > - RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_pixel_V8HI, 0 }, > - { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVW4X_V8HI, > - RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_V8HI, 0 }, > - { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVW4X_V8HI, > - RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI, 0 }, > - { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVW4X_V8HI, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, > - ~RS6000_BTI_unsigned_V8HI, 0 }, > - { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVW4X_V8HI, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI, 0 }, > - { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVW4X_V16QI, > - RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V16QI, 0 }, > - { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVW4X_V16QI, > - RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_V16QI, 0 }, > - { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVW4X_V16QI, > - RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI, 0 }, > - { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVW4X_V16QI, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, > - ~RS6000_BTI_unsigned_V16QI, 0 }, > - { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVW4X_V16QI, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI, 0 }, > - > - { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVD2X_V2DF, > - RS6000_BTI_void, RS6000_BTI_V2DF, RS6000_BTI_INTSI, ~RS6000_BTI_V2DF }, > - { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVD2X_V2DF, > - RS6000_BTI_void, RS6000_BTI_V2DF, RS6000_BTI_INTSI, ~RS6000_BTI_double }, > - { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVD2X_V2DI, > - RS6000_BTI_void, RS6000_BTI_V2DI, RS6000_BTI_INTDI, > - ~RS6000_BTI_long_long }, > - { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVD2X_V2DI, > - RS6000_BTI_void, RS6000_BTI_unsigned_V2DI, RS6000_BTI_INTDI, > - ~RS6000_BTI_unsigned_long_long }, > - { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVD2X_V1TI, > - RS6000_BTI_void, RS6000_BTI_V1TI, RS6000_BTI_INTDI, ~RS6000_BTI_INTTI }, > - { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVD2X_V1TI, > - RS6000_BTI_void, RS6000_BTI_unsigned_V1TI, RS6000_BTI_INTDI, ~RS6000_BTI_UINTTI }, > - { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVD2X_V2DI, > - RS6000_BTI_void, RS6000_BTI_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_V2DI }, > - { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVD2X_V2DI, > - RS6000_BTI_void, RS6000_BTI_unsigned_V2DI, RS6000_BTI_INTSI, > - ~RS6000_BTI_unsigned_V2DI }, > - { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVD2X_V2DI, > - RS6000_BTI_void, RS6000_BTI_bool_V2DI, RS6000_BTI_INTSI, > - ~RS6000_BTI_bool_V2DI }, > - { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V4SF, > - RS6000_BTI_void, RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_V4SF }, > - { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V4SF, > - RS6000_BTI_void, RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float }, > - { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V4SI, > - RS6000_BTI_void, RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_V4SI }, > - { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V4SI, > - RS6000_BTI_void, RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI }, > - { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V4SI, > - RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, > - ~RS6000_BTI_unsigned_V4SI }, > - { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V4SI, > - RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, > - ~RS6000_BTI_UINTSI }, > - { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V4SI, > - RS6000_BTI_void, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, > - ~RS6000_BTI_bool_V4SI }, > - { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V4SI, > - RS6000_BTI_void, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, > - ~RS6000_BTI_UINTSI }, > - { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V4SI, > - RS6000_BTI_void, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, > - ~RS6000_BTI_INTSI }, > - { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V8HI, > - RS6000_BTI_void, RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_V8HI }, > - { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V8HI, > - RS6000_BTI_void, RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI }, > - { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V8HI, > - RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, > - ~RS6000_BTI_unsigned_V8HI }, > - { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V8HI, > - RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, > - ~RS6000_BTI_UINTHI }, > - { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V8HI, > - RS6000_BTI_void, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, > - ~RS6000_BTI_bool_V8HI }, > - { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V8HI, > - RS6000_BTI_void, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, > - ~RS6000_BTI_UINTHI }, > - { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V8HI, > - RS6000_BTI_void, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, > - ~RS6000_BTI_INTHI }, > - { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V16QI, > - RS6000_BTI_void, RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_V16QI }, > - { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V16QI, > - RS6000_BTI_void, RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI }, > - { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V16QI, > - RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, > - ~RS6000_BTI_unsigned_V16QI }, > - { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V16QI, > - RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, > - ~RS6000_BTI_UINTQI }, > - { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V16QI, > - RS6000_BTI_void, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, > - ~RS6000_BTI_bool_V16QI }, > - { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V16QI, > - RS6000_BTI_void, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, > - ~RS6000_BTI_UINTQI }, > - { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V16QI, > - RS6000_BTI_void, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, > - ~RS6000_BTI_INTQI }, > - { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V16QI, > - RS6000_BTI_void, RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, > - ~RS6000_BTI_pixel_V8HI }, > - > - /* Predicates. */ > - { ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTUB_P, > - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI }, > - { ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTUB_P, > - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI }, > - { ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTUB_P, > - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI }, > - { ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTSB_P, > - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI }, > - { ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTSB_P, > - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI }, > - { ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTSB_P, > - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V16QI, RS6000_BTI_V16QI }, > - { ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTUH_P, > - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI }, > - { ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTUH_P, > - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI }, > - { ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTUH_P, > - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI }, > - { ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTSH_P, > - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V8HI, RS6000_BTI_V8HI }, > - { ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTSH_P, > - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI }, > - { ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTSH_P, > - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI }, > - { ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTUW_P, > - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI }, > - { ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTUW_P, > - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI }, > - { ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTUW_P, > - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI }, > - { ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTSW_P, > - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI }, > - { ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTSW_P, > - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI }, > - { ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTSW_P, > - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V4SI, RS6000_BTI_V4SI }, > - { ALTIVEC_BUILTIN_VEC_VCMPGT_P, P8V_BUILTIN_VCMPGTUD_P, > - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI }, > - { ALTIVEC_BUILTIN_VEC_VCMPGT_P, P8V_BUILTIN_VCMPGTUD_P, > - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI }, > - { ALTIVEC_BUILTIN_VEC_VCMPGT_P, P8V_BUILTIN_VCMPGTUD_P, > - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI }, > - { ALTIVEC_BUILTIN_VEC_VCMPGT_P, P10V_BUILTIN_VCMPGTUT_P, > - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI }, > - { ALTIVEC_BUILTIN_VEC_VCMPGT_P, P8V_BUILTIN_VCMPGTSD_P, > - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI }, > - { ALTIVEC_BUILTIN_VEC_VCMPGT_P, P8V_BUILTIN_VCMPGTSD_P, > - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI }, > - { ALTIVEC_BUILTIN_VEC_VCMPGT_P, P8V_BUILTIN_VCMPGTSD_P, > - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V2DI, RS6000_BTI_V2DI }, > - { ALTIVEC_BUILTIN_VEC_VCMPGT_P, P10V_BUILTIN_VCMPGTST_P, > - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V1TI, RS6000_BTI_V1TI }, > - { ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTFP_P, > - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V4SF, RS6000_BTI_V4SF }, > - { ALTIVEC_BUILTIN_VEC_VCMPGT_P, VSX_BUILTIN_XVCMPGTDP_P, > - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V2DF, RS6000_BTI_V2DF }, > - > - > - { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUB_P, > - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI }, > - { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUB_P, > - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI }, > - { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUB_P, > - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI }, > - { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUB_P, > - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI }, > - { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUB_P, > - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI }, > - { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUB_P, > - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V16QI, RS6000_BTI_V16QI }, > - { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUB_P, > - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI }, > - { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUH_P, > - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI }, > - { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUH_P, > - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI }, > - { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUH_P, > - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI }, > - { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUH_P, > - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V8HI, RS6000_BTI_V8HI }, > - { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUH_P, > - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI }, > - { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUH_P, > - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI }, > - { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUH_P, > - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI }, > - { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUH_P, > - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI }, > - { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUW_P, > - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI }, > - { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUW_P, > - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI }, > - { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUW_P, > - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI }, > - { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUW_P, > - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI }, > - { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUW_P, > - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI }, > - { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUW_P, > - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V4SI, RS6000_BTI_V4SI }, > - { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUW_P, > - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI }, > - { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, P8V_BUILTIN_VCMPEQUD_P, > - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI }, > - { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, P8V_BUILTIN_VCMPEQUD_P, > - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI }, > - { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, P8V_BUILTIN_VCMPEQUD_P, > - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI }, > - { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, P8V_BUILTIN_VCMPEQUD_P, > - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI }, > - { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, P8V_BUILTIN_VCMPEQUD_P, > - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI }, > - { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, P8V_BUILTIN_VCMPEQUD_P, > - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V2DI, RS6000_BTI_V2DI }, > - { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, P8V_BUILTIN_VCMPEQUD_P, > - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI }, > - { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, P10V_BUILTIN_VCMPEQUT_P, > - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V1TI, RS6000_BTI_V1TI }, > - { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, P10V_BUILTIN_VCMPEQUT_P, > - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI }, > - { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQFP_P, > - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V4SF, RS6000_BTI_V4SF }, > - { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, VSX_BUILTIN_XVCMPEQDP_P, > - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V2DF, RS6000_BTI_V2DF }, > - > - > - /* cmpge is the same as cmpgt for all cases except floating point. > - There is further code to deal with this special case in > - altivec_build_resolved_builtin. */ > - { ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTUB_P, > - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI }, > - { ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTUB_P, > - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI }, > - { ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTUB_P, > - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI }, > - { ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTSB_P, > - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI }, > - { ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTSB_P, > - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI }, > - { ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTSB_P, > - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V16QI, RS6000_BTI_V16QI }, > - { ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTUH_P, > - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI }, > - { ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTUH_P, > - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI }, > - { ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTUH_P, > - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI }, > - { ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTSH_P, > - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V8HI, RS6000_BTI_V8HI }, > - { ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTSH_P, > - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI }, > - { ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTSH_P, > - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI }, > - { ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTUW_P, > - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI }, > - { ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTUW_P, > - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI }, > - { ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTUW_P, > - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI }, > - { ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTSW_P, > - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI }, > - { ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTSW_P, > - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI }, > - { ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTSW_P, > - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V4SI, RS6000_BTI_V4SI }, > - { ALTIVEC_BUILTIN_VEC_VCMPGE_P, P8V_BUILTIN_VCMPGTUD_P, > - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI }, > - { ALTIVEC_BUILTIN_VEC_VCMPGE_P, P8V_BUILTIN_VCMPGTUD_P, > - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI }, > - { ALTIVEC_BUILTIN_VEC_VCMPGE_P, P8V_BUILTIN_VCMPGTUD_P, > - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI }, > - { ALTIVEC_BUILTIN_VEC_VCMPGE_P, P10V_BUILTIN_VCMPGTUT_P, > - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI }, > - { ALTIVEC_BUILTIN_VEC_VCMPGE_P, P8V_BUILTIN_VCMPGTSD_P, > - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI }, > - { ALTIVEC_BUILTIN_VEC_VCMPGE_P, P8V_BUILTIN_VCMPGTSD_P, > - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI }, > - { ALTIVEC_BUILTIN_VEC_VCMPGE_P, P8V_BUILTIN_VCMPGTSD_P, > - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V2DI, RS6000_BTI_V2DI }, > - { ALTIVEC_BUILTIN_VEC_VCMPGE_P, P10V_BUILTIN_VCMPGTST_P, > - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V1TI, RS6000_BTI_V1TI }, > - { ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGEFP_P, > - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V4SF, RS6000_BTI_V4SF }, > - { ALTIVEC_BUILTIN_VEC_VCMPGE_P, VSX_BUILTIN_XVCMPGEDP_P, > - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V2DF, RS6000_BTI_V2DF }, > - > - /* Power8 vector overloaded functions. */ > - { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V16QI, > - RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 }, > - { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V16QI, > - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, 0 }, > - { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V16QI, > - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, > - { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V16QI_UNS, > - RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, 0 }, > - { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V16QI_UNS, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, > - RS6000_BTI_unsigned_V16QI, 0 }, > - { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V16QI_UNS, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, > - RS6000_BTI_bool_V16QI, 0 }, > - { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V16QI_UNS, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, > - RS6000_BTI_unsigned_V16QI, 0 }, > - { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V8HI, > - RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, 0 }, > - { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V8HI, > - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, 0 }, > - { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V8HI, > - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, > - { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V8HI_UNS, > - RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, 0 }, > - { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V8HI_UNS, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, > - RS6000_BTI_unsigned_V8HI, 0 }, > - { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V8HI_UNS, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, > - RS6000_BTI_bool_V8HI, 0 }, > - { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V8HI_UNS, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, > - RS6000_BTI_unsigned_V8HI, 0 }, > - { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V4SI, > - RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, 0 }, > - { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V4SI, > - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, 0 }, > - { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V4SI, > - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, > - { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V4SI_UNS, > - RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, 0 }, > - { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V4SI_UNS, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, > - RS6000_BTI_unsigned_V4SI, 0 }, > - { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V4SI_UNS, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, > - RS6000_BTI_bool_V4SI, 0 }, > - { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V4SI_UNS, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, > - RS6000_BTI_unsigned_V4SI, 0 }, > - { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V2DI, > - RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, 0 }, > - { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V2DI, > - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, 0 }, > - { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V2DI, > - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, > - { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V2DI_UNS, > - RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, 0 }, > - { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V2DI_UNS, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, > - RS6000_BTI_unsigned_V2DI, 0 }, > - { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V2DI_UNS, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, > - RS6000_BTI_bool_V2DI, 0 }, > - { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V2DI_UNS, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, > - RS6000_BTI_unsigned_V2DI, 0 }, > - { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V4SF, > - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, > - { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V2DF, > - RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 }, > - > - { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V16QI, > - RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 }, > - { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V16QI, > - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, 0 }, > - { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V16QI, > - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, > - { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V16QI_UNS, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, > - RS6000_BTI_unsigned_V16QI, 0 }, > - { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V16QI_UNS, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, > - RS6000_BTI_bool_V16QI, 0 }, > - { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V16QI_UNS, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, > - RS6000_BTI_unsigned_V16QI, 0 }, > - { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V16QI_UNS, > - RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, 0 }, > - { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V8HI, > - RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, 0 }, > - { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V8HI, > - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, 0 }, > - { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V8HI, > - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, > - { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V8HI_UNS, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, > - RS6000_BTI_unsigned_V8HI, 0 }, > - { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V8HI_UNS, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, > - RS6000_BTI_bool_V8HI, 0 }, > - { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V8HI_UNS, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, > - RS6000_BTI_unsigned_V8HI, 0 }, > - { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V8HI_UNS, > - RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, 0 }, > - { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V4SI, > - RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, 0 }, > - { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V4SI, > - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, 0 }, > - { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V4SI, > - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, > - { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V4SI_UNS, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, > - RS6000_BTI_unsigned_V4SI, 0 }, > - { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V4SI_UNS, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, > - RS6000_BTI_bool_V4SI, 0 }, > - { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V4SI_UNS, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, > - RS6000_BTI_unsigned_V4SI, 0 }, > - { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V4SI_UNS, > - RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, 0 }, > - { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V2DI, > - RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, 0 }, > - { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V2DI, > - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, 0 }, > - { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V2DI, > - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, > - { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V2DI_UNS, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, > - RS6000_BTI_unsigned_V2DI, 0 }, > - { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V2DI_UNS, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, > - RS6000_BTI_bool_V2DI, 0 }, > - { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V2DI_UNS, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, > - RS6000_BTI_unsigned_V2DI, 0 }, > - { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V2DI_UNS, > - RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, 0 }, > - { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V4SF, > - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, > - { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V2DF, > - RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 }, > - > - { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V16QI, > - RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 }, > - { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V16QI, > - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, 0 }, > - { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V16QI, > - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, > - { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V16QI_UNS, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, > - RS6000_BTI_unsigned_V16QI, 0 }, > - { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V16QI_UNS, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, > - RS6000_BTI_bool_V16QI, 0 }, > - { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V16QI_UNS, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, > - RS6000_BTI_unsigned_V16QI, 0 }, > - { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V16QI_UNS, > - RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, 0 }, > - { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V8HI, > - RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, 0 }, > - { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V8HI, > - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, 0 }, > - { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V8HI, > - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, > - { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V8HI_UNS, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, > - RS6000_BTI_unsigned_V8HI, 0 }, > - { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V8HI_UNS, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, > - RS6000_BTI_bool_V8HI, 0 }, > - { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V8HI_UNS, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, > - RS6000_BTI_unsigned_V8HI, 0 }, > - { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V8HI_UNS, > - RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, 0 }, > - { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V4SI, > - RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, 0 }, > - { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V4SI, > - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, 0 }, > - { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V4SI, > - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, > - { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V4SI_UNS, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, > - RS6000_BTI_unsigned_V4SI, 0 }, > - { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V4SI_UNS, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, > - RS6000_BTI_bool_V4SI, 0 }, > - { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V4SI_UNS, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, > - RS6000_BTI_unsigned_V4SI, 0 }, > - { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V4SI_UNS, > - RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, 0 }, > - { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V2DI, > - RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, 0 }, > - { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V2DI, > - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, 0 }, > - { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V2DI, > - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, > - { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V2DI_UNS, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, > - RS6000_BTI_unsigned_V2DI, 0 }, > - { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V2DI_UNS, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, > - RS6000_BTI_bool_V2DI, 0 }, > - { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V2DI_UNS, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, > - RS6000_BTI_unsigned_V2DI, 0 }, > - { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V2DI_UNS, > - RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, 0 }, > - { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V4SF, > - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, > - { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V2DF, > - RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 }, > - > - { P8V_BUILTIN_VEC_VADDCUQ, P8V_BUILTIN_VADDCUQ, > - RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, 0 }, > - { P8V_BUILTIN_VEC_VADDCUQ, P8V_BUILTIN_VADDCUQ, > - RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, > - RS6000_BTI_unsigned_V1TI, 0 }, > - > - { P8V_BUILTIN_VEC_VADDUDM, P8V_BUILTIN_VADDUDM, > - RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, 0 }, > - { P8V_BUILTIN_VEC_VADDUDM, P8V_BUILTIN_VADDUDM, > - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, 0 }, > - { P8V_BUILTIN_VEC_VADDUDM, P8V_BUILTIN_VADDUDM, > - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, > - { P8V_BUILTIN_VEC_VADDUDM, P8V_BUILTIN_VADDUDM, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, > - { P8V_BUILTIN_VEC_VADDUDM, P8V_BUILTIN_VADDUDM, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, 0 }, > - { P8V_BUILTIN_VEC_VADDUDM, P8V_BUILTIN_VADDUDM, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, > - > - { P8V_BUILTIN_VEC_VADDUQM, P8V_BUILTIN_VADDUQM, > - RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, 0 }, > - { P8V_BUILTIN_VEC_VADDUQM, P8V_BUILTIN_VADDUQM, > - RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, > - RS6000_BTI_unsigned_V1TI, 0 }, > - > - { P9V_BUILTIN_VEC_VBPERM, P9V_BUILTIN_VBPERMD, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, > - RS6000_BTI_unsigned_V16QI, 0 }, > - { P9V_BUILTIN_VEC_VBPERM, P8V_BUILTIN_VBPERMQ, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V1TI, > - RS6000_BTI_unsigned_V16QI, 0 }, > - { P9V_BUILTIN_VEC_VBPERM, P8V_BUILTIN_VBPERMQ2, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, > - RS6000_BTI_unsigned_V16QI, 0 }, > - > - { P8V_BUILTIN_VEC_VBPERMQ, P8V_BUILTIN_VBPERMQ, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, > - RS6000_BTI_unsigned_V16QI, 0 }, > - { P8V_BUILTIN_VEC_VBPERMQ, P8V_BUILTIN_VBPERMQ, > - RS6000_BTI_V2DI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, > - { P8V_BUILTIN_VEC_VBPERMQ, P8V_BUILTIN_VBPERMQ, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V16QI, > - RS6000_BTI_unsigned_V16QI, 0 }, > - { P8V_BUILTIN_VEC_VBPERMQ, P8V_BUILTIN_VBPERMQ, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V1TI, > - RS6000_BTI_unsigned_V16QI, 0 }, > - > - { P8V_BUILTIN_VEC_VCLZ, P8V_BUILTIN_VCLZB, > - RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0, 0 }, > - { P8V_BUILTIN_VEC_VCLZ, P8V_BUILTIN_VCLZB, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0, 0 }, > - { P8V_BUILTIN_VEC_VCLZ, P8V_BUILTIN_VCLZH, > - RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0, 0 }, > - { P8V_BUILTIN_VEC_VCLZ, P8V_BUILTIN_VCLZH, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0, 0 }, > - { P8V_BUILTIN_VEC_VCLZ, P8V_BUILTIN_VCLZW, > - RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0, 0 }, > - { P8V_BUILTIN_VEC_VCLZ, P8V_BUILTIN_VCLZW, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0, 0 }, > - { P8V_BUILTIN_VEC_VCLZ, P8V_BUILTIN_VCLZD, > - RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0, 0 }, > - { P8V_BUILTIN_VEC_VCLZ, P8V_BUILTIN_VCLZD, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0, 0 }, > - > - { P8V_BUILTIN_VEC_VCLZB, P8V_BUILTIN_VCLZB, > - RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0, 0 }, > - { P8V_BUILTIN_VEC_VCLZB, P8V_BUILTIN_VCLZB, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0, 0 }, > - > - { P8V_BUILTIN_VEC_VCLZH, P8V_BUILTIN_VCLZH, > - RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0, 0 }, > - { P8V_BUILTIN_VEC_VCLZH, P8V_BUILTIN_VCLZH, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0, 0 }, > - > - { P8V_BUILTIN_VEC_VCLZW, P8V_BUILTIN_VCLZW, > - RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0, 0 }, > - { P8V_BUILTIN_VEC_VCLZW, P8V_BUILTIN_VCLZW, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0, 0 }, > - > - { P8V_BUILTIN_VEC_VCLZD, P8V_BUILTIN_VCLZD, > - RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0, 0 }, > - { P8V_BUILTIN_VEC_VCLZD, P8V_BUILTIN_VCLZD, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0, 0 }, > - > - { P9_BUILTIN_DFP_TSTSFI_LT, MISC_BUILTIN_TSTSFI_LT_TD, > - RS6000_BTI_INTSI, RS6000_BTI_UINTSI, RS6000_BTI_dfloat128, 0 }, > - { P9_BUILTIN_DFP_TSTSFI_LT, MISC_BUILTIN_TSTSFI_LT_DD, > - RS6000_BTI_INTSI, RS6000_BTI_UINTSI, RS6000_BTI_dfloat64, 0 }, > - > - { P9_BUILTIN_DFP_TSTSFI_LT_TD, MISC_BUILTIN_TSTSFI_LT_TD, > - RS6000_BTI_INTSI, RS6000_BTI_UINTSI, RS6000_BTI_dfloat128, 0 }, > - { P9_BUILTIN_DFP_TSTSFI_LT_DD, MISC_BUILTIN_TSTSFI_LT_DD, > - RS6000_BTI_INTSI, RS6000_BTI_UINTSI, RS6000_BTI_dfloat64, 0 }, > - > - { P9_BUILTIN_DFP_TSTSFI_EQ, MISC_BUILTIN_TSTSFI_EQ_TD, > - RS6000_BTI_INTSI, RS6000_BTI_UINTSI, RS6000_BTI_dfloat128, 0 }, > - { P9_BUILTIN_DFP_TSTSFI_EQ, MISC_BUILTIN_TSTSFI_EQ_DD, > - RS6000_BTI_INTSI, RS6000_BTI_UINTSI, RS6000_BTI_dfloat64, 0 }, > - > - { P9_BUILTIN_DFP_TSTSFI_EQ_TD, MISC_BUILTIN_TSTSFI_EQ_TD, > - RS6000_BTI_INTSI, RS6000_BTI_UINTSI, RS6000_BTI_dfloat128, 0 }, > - { P9_BUILTIN_DFP_TSTSFI_EQ_DD, MISC_BUILTIN_TSTSFI_EQ_DD, > - RS6000_BTI_INTSI, RS6000_BTI_UINTSI, RS6000_BTI_dfloat64, 0 }, > - > - { P9_BUILTIN_DFP_TSTSFI_GT, MISC_BUILTIN_TSTSFI_GT_TD, > - RS6000_BTI_INTSI, RS6000_BTI_UINTSI, RS6000_BTI_dfloat128, 0 }, > - { P9_BUILTIN_DFP_TSTSFI_GT, MISC_BUILTIN_TSTSFI_GT_DD, > - RS6000_BTI_INTSI, RS6000_BTI_UINTSI, RS6000_BTI_dfloat64, 0 }, > - > - { P9_BUILTIN_DFP_TSTSFI_GT_TD, MISC_BUILTIN_TSTSFI_GT_TD, > - RS6000_BTI_INTSI, RS6000_BTI_UINTSI, RS6000_BTI_dfloat128, 0 }, > - { P9_BUILTIN_DFP_TSTSFI_GT_DD, MISC_BUILTIN_TSTSFI_GT_DD, > - RS6000_BTI_INTSI, RS6000_BTI_UINTSI, RS6000_BTI_dfloat64, 0 }, > - > - { P9_BUILTIN_DFP_TSTSFI_OV, MISC_BUILTIN_TSTSFI_OV_TD, > - RS6000_BTI_INTSI, RS6000_BTI_UINTSI, RS6000_BTI_dfloat128, 0 }, > - { P9_BUILTIN_DFP_TSTSFI_OV, MISC_BUILTIN_TSTSFI_OV_DD, > - RS6000_BTI_INTSI, RS6000_BTI_UINTSI, RS6000_BTI_dfloat64, 0 }, > - > - { P9_BUILTIN_DFP_TSTSFI_OV_TD, MISC_BUILTIN_TSTSFI_OV_TD, > - RS6000_BTI_INTSI, RS6000_BTI_UINTSI, RS6000_BTI_dfloat128, 0 }, > - { P9_BUILTIN_DFP_TSTSFI_OV_DD, MISC_BUILTIN_TSTSFI_OV_DD, > - RS6000_BTI_INTSI, RS6000_BTI_UINTSI, RS6000_BTI_dfloat64, 0 }, > - > - { P9V_BUILTIN_VEC_VCTZ, P9V_BUILTIN_VCTZB, > - RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0, 0 }, > - { P9V_BUILTIN_VEC_VCTZ, P9V_BUILTIN_VCTZB, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0, 0 }, > - { P9V_BUILTIN_VEC_VCTZ, P9V_BUILTIN_VCTZH, > - RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0, 0 }, > - { P9V_BUILTIN_VEC_VCTZ, P9V_BUILTIN_VCTZH, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0, 0 }, > - { P9V_BUILTIN_VEC_VCTZ, P9V_BUILTIN_VCTZW, > - RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0, 0 }, > - { P9V_BUILTIN_VEC_VCTZ, P9V_BUILTIN_VCTZW, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0, 0 }, > - { P9V_BUILTIN_VEC_VCTZ, P9V_BUILTIN_VCTZD, > - RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0, 0 }, > - { P9V_BUILTIN_VEC_VCTZ, P9V_BUILTIN_VCTZD, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0, 0 }, > - > - { P9V_BUILTIN_VEC_VCTZB, P9V_BUILTIN_VCTZB, > - RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0, 0 }, > - { P9V_BUILTIN_VEC_VCTZB, P9V_BUILTIN_VCTZB, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0, 0 }, > - > - { P9V_BUILTIN_VEC_VCTZH, P9V_BUILTIN_VCTZH, > - RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0, 0 }, > - { P9V_BUILTIN_VEC_VCTZH, P9V_BUILTIN_VCTZH, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0, 0 }, > - > - { P9V_BUILTIN_VEC_VCTZW, P9V_BUILTIN_VCTZW, > - RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0, 0 }, > - { P9V_BUILTIN_VEC_VCTZW, P9V_BUILTIN_VCTZW, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0, 0 }, > - > - { P9V_BUILTIN_VEC_VCTZD, P9V_BUILTIN_VCTZD, > - RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0, 0 }, > - { P9V_BUILTIN_VEC_VCTZD, P9V_BUILTIN_VCTZD, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0, 0 }, > - > - { P9V_BUILTIN_VEC_VADU, P9V_BUILTIN_VADUB, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, > - RS6000_BTI_unsigned_V16QI, 0 }, > - { P9V_BUILTIN_VEC_VADU, P9V_BUILTIN_VADUH, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, > - RS6000_BTI_unsigned_V8HI, 0 }, > - { P9V_BUILTIN_VEC_VADU, P9V_BUILTIN_VADUW, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, > - RS6000_BTI_unsigned_V4SI, 0 }, > - > - { P9V_BUILTIN_VEC_VADUB, P9V_BUILTIN_VADUB, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, > - RS6000_BTI_unsigned_V16QI, 0 }, > - > - { P9V_BUILTIN_VEC_VADUH, P9V_BUILTIN_VADUH, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, > - RS6000_BTI_unsigned_V8HI, 0 }, > - > - { P9V_BUILTIN_VEC_VADUW, P9V_BUILTIN_VADUW, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, > - RS6000_BTI_unsigned_V4SI, 0 }, > - > - { P9V_BUILTIN_VEC_VES, P9V_BUILTIN_VESSP, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_V4SF, 0, 0 }, > - { P9V_BUILTIN_VEC_VES, P9V_BUILTIN_VESDP, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_V2DF, 0, 0 }, > - > - { P9V_BUILTIN_VEC_VESSP, P9V_BUILTIN_VESSP, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_V4SF, 0, 0 }, > - { P9V_BUILTIN_VEC_VESDP, P9V_BUILTIN_VESDP, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_V2DF, 0, 0 }, > - > - { P9V_BUILTIN_VEC_VEE, P9V_BUILTIN_VEESP, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_V4SF, 0, 0 }, > - { P9V_BUILTIN_VEC_VEE, P9V_BUILTIN_VEEDP, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_V2DF, 0, 0 }, > - > - { P9V_BUILTIN_VEC_VEESP, P9V_BUILTIN_VEESP, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_V4SF, 0, 0 }, > - { P9V_BUILTIN_VEC_VEEDP, P9V_BUILTIN_VEEDP, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_V2DF, 0, 0 }, > - > - { P9V_BUILTIN_VEC_VTDC, P9V_BUILTIN_VTDCSP, > - RS6000_BTI_bool_V4SI, RS6000_BTI_V4SF, RS6000_BTI_INTSI, 0 }, > - { P9V_BUILTIN_VEC_VTDC, P9V_BUILTIN_VTDCDP, > - RS6000_BTI_bool_V2DI, RS6000_BTI_V2DF, RS6000_BTI_INTSI, 0 }, > - > - { P9V_BUILTIN_VEC_VTDCSP, P9V_BUILTIN_VTDCSP, > - RS6000_BTI_bool_V4SI, RS6000_BTI_V4SF, RS6000_BTI_INTSI, 0 }, > - { P9V_BUILTIN_VEC_VTDCDP, P9V_BUILTIN_VTDCDP, > - RS6000_BTI_bool_V2DI, RS6000_BTI_V2DF, RS6000_BTI_INTSI, 0 }, > - > - { P9V_BUILTIN_VEC_VIE, P9V_BUILTIN_VIESP, > - RS6000_BTI_V4SF, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, > - { P9V_BUILTIN_VEC_VIE, P9V_BUILTIN_VIESP, > - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_unsigned_V4SI, 0 }, > - > - { P9V_BUILTIN_VEC_VIE, P9V_BUILTIN_VIEDP, > - RS6000_BTI_V2DF, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, > - { P9V_BUILTIN_VEC_VIE, P9V_BUILTIN_VIEDP, > - RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_unsigned_V2DI, 0 }, > - > - { P9V_BUILTIN_VEC_VIESP, P9V_BUILTIN_VIESP, > - RS6000_BTI_V4SF, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, > - { P9V_BUILTIN_VEC_VIESP, P9V_BUILTIN_VIESP, > - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_unsigned_V4SI, 0 }, > - > - { P9V_BUILTIN_VEC_VIEDP, P9V_BUILTIN_VIEDP, > - RS6000_BTI_V2DF, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, > - { P9V_BUILTIN_VEC_VIEDP, P9V_BUILTIN_VIEDP, > - RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_unsigned_V2DI, 0 }, > - > - { P9V_BUILTIN_VEC_VSTDC, P9V_BUILTIN_VSTDCSP, > - RS6000_BTI_bool_int, RS6000_BTI_float, RS6000_BTI_INTSI, 0 }, > - { P9V_BUILTIN_VEC_VSTDC, P9V_BUILTIN_VSTDCDP, > - RS6000_BTI_bool_int, RS6000_BTI_double, RS6000_BTI_INTSI, 0 }, > - { P9V_BUILTIN_VEC_VSTDC, P9V_BUILTIN_VSTDCQP, > - RS6000_BTI_bool_int, RS6000_BTI_ieee128_float, RS6000_BTI_INTSI, 0 }, > - > - { P9V_BUILTIN_VEC_VSTDCSP, P9V_BUILTIN_VSTDCSP, > - RS6000_BTI_bool_int, RS6000_BTI_float, RS6000_BTI_INTSI, 0 }, > - { P9V_BUILTIN_VEC_VSTDCDP, P9V_BUILTIN_VSTDCDP, > - RS6000_BTI_bool_int, RS6000_BTI_double, RS6000_BTI_INTSI, 0 }, > - { P9V_BUILTIN_VEC_VSTDCQP, P9V_BUILTIN_VSTDCQP, > - RS6000_BTI_bool_int, RS6000_BTI_ieee128_float, RS6000_BTI_INTSI, 0 }, > - > - { P9V_BUILTIN_VEC_VSTDCN, P9V_BUILTIN_VSTDCNSP, > - RS6000_BTI_bool_int, RS6000_BTI_float, 0, 0 }, > - { P9V_BUILTIN_VEC_VSTDCN, P9V_BUILTIN_VSTDCNDP, > - RS6000_BTI_bool_int, RS6000_BTI_double, 0, 0 }, > - { P9V_BUILTIN_VEC_VSTDCN, P9V_BUILTIN_VSTDCNQP, > - RS6000_BTI_bool_int, RS6000_BTI_ieee128_float, 0, 0 }, > - > - { P9V_BUILTIN_VEC_VSTDCNSP, P9V_BUILTIN_VSTDCNSP, > - RS6000_BTI_bool_int, RS6000_BTI_float, 0, 0 }, > - { P9V_BUILTIN_VEC_VSTDCNDP, P9V_BUILTIN_VSTDCNDP, > - RS6000_BTI_bool_int, RS6000_BTI_double, 0, 0 }, > - { P9V_BUILTIN_VEC_VSTDCNQP, P9V_BUILTIN_VSTDCNQP, > - RS6000_BTI_bool_int, RS6000_BTI_ieee128_float, 0, 0 }, > - > - { P9V_BUILTIN_VEC_VSEEDP, P9V_BUILTIN_VSEEDP, > - RS6000_BTI_UINTSI, RS6000_BTI_double, 0, 0 }, > - { P9V_BUILTIN_VEC_VSEEDP, P9V_BUILTIN_VSEEQP, > - RS6000_BTI_UINTDI, RS6000_BTI_ieee128_float, 0, 0 }, > - > - { P9V_BUILTIN_VEC_VSESDP, P9V_BUILTIN_VSESDP, > - RS6000_BTI_UINTDI, RS6000_BTI_double, 0, 0 }, > - { P9V_BUILTIN_VEC_VSESDP, P9V_BUILTIN_VSESQP, > - RS6000_BTI_UINTTI, RS6000_BTI_ieee128_float, 0, 0 }, > - > - { P9V_BUILTIN_VEC_VSIEDP, P9V_BUILTIN_VSIEDP, > - RS6000_BTI_double, RS6000_BTI_UINTDI, RS6000_BTI_UINTDI, 0 }, > - { P9V_BUILTIN_VEC_VSIEDP, P9V_BUILTIN_VSIEDPF, > - RS6000_BTI_double, RS6000_BTI_double, RS6000_BTI_UINTDI, 0 }, > - > - { P9V_BUILTIN_VEC_VSIEDP, P9V_BUILTIN_VSIEQP, > - RS6000_BTI_ieee128_float, RS6000_BTI_UINTTI, RS6000_BTI_UINTDI, 0 }, > - { P9V_BUILTIN_VEC_VSIEDP, P9V_BUILTIN_VSIEQPF, > - RS6000_BTI_ieee128_float, RS6000_BTI_ieee128_float, RS6000_BTI_UINTDI, 0 }, > - > - { P9V_BUILTIN_VEC_VSCEGT, P9V_BUILTIN_VSCEDPGT, > - RS6000_BTI_INTSI, RS6000_BTI_double, RS6000_BTI_double, 0 }, > - { P9V_BUILTIN_VEC_VSCEGT, P9V_BUILTIN_VSCEQPGT, > - RS6000_BTI_INTSI, RS6000_BTI_ieee128_float, RS6000_BTI_ieee128_float, 0 }, > - { P9V_BUILTIN_VEC_VSCELT, P9V_BUILTIN_VSCEDPLT, > - RS6000_BTI_INTSI, RS6000_BTI_double, RS6000_BTI_double, 0 }, > - { P9V_BUILTIN_VEC_VSCELT, P9V_BUILTIN_VSCEQPLT, > - RS6000_BTI_INTSI, RS6000_BTI_ieee128_float, RS6000_BTI_ieee128_float, 0 }, > - { P9V_BUILTIN_VEC_VSCEEQ, P9V_BUILTIN_VSCEDPEQ, > - RS6000_BTI_INTSI, RS6000_BTI_double, RS6000_BTI_double, 0 }, > - { P9V_BUILTIN_VEC_VSCEEQ, P9V_BUILTIN_VSCEQPEQ, > - RS6000_BTI_INTSI, RS6000_BTI_ieee128_float, RS6000_BTI_ieee128_float, 0 }, > - { P9V_BUILTIN_VEC_VSCEUO, P9V_BUILTIN_VSCEDPUO, > - RS6000_BTI_INTSI, RS6000_BTI_double, RS6000_BTI_double, 0 }, > - { P9V_BUILTIN_VEC_VSCEUO, P9V_BUILTIN_VSCEQPUO, > - RS6000_BTI_INTSI, RS6000_BTI_ieee128_float, RS6000_BTI_ieee128_float, 0 }, > - > - { P9V_BUILTIN_VEC_XL_LEN_R, P9V_BUILTIN_XL_LEN_R, > - RS6000_BTI_unsigned_V16QI, ~RS6000_BTI_UINTQI, > - RS6000_BTI_unsigned_long_long, 0 }, > - > - { P9V_BUILTIN_VEC_LXVL, P9V_BUILTIN_LXVL, > - RS6000_BTI_V16QI, ~RS6000_BTI_INTQI, > - RS6000_BTI_unsigned_long_long, 0 }, > - { P9V_BUILTIN_VEC_LXVL, P9V_BUILTIN_LXVL, > - RS6000_BTI_unsigned_V16QI, ~RS6000_BTI_UINTQI, > - RS6000_BTI_unsigned_long_long, 0 }, > - > - { P9V_BUILTIN_VEC_LXVL, P9V_BUILTIN_LXVL, > - RS6000_BTI_V4SI, ~RS6000_BTI_INTSI, > - RS6000_BTI_unsigned_long_long, 0 }, > - { P9V_BUILTIN_VEC_LXVL, P9V_BUILTIN_LXVL, > - RS6000_BTI_unsigned_V4SI, ~RS6000_BTI_UINTSI, > - RS6000_BTI_unsigned_long_long, 0 }, > - > - { P9V_BUILTIN_VEC_LXVL, P9V_BUILTIN_LXVL, > - RS6000_BTI_V1TI, ~RS6000_BTI_INTTI, > - RS6000_BTI_unsigned_long_long, 0 }, > - { P9V_BUILTIN_VEC_LXVL, P9V_BUILTIN_LXVL, > - RS6000_BTI_unsigned_V1TI, ~RS6000_BTI_UINTTI, > - RS6000_BTI_unsigned_long_long, 0 }, > - > - { P9V_BUILTIN_VEC_LXVL, P9V_BUILTIN_LXVL, > - RS6000_BTI_V2DI, ~RS6000_BTI_long_long, > - RS6000_BTI_unsigned_long_long, 0 }, > - { P9V_BUILTIN_VEC_LXVL, P9V_BUILTIN_LXVL, > - RS6000_BTI_unsigned_V2DI, ~RS6000_BTI_unsigned_long_long, > - RS6000_BTI_unsigned_long_long, 0 }, > - > - { P9V_BUILTIN_VEC_LXVL, P9V_BUILTIN_LXVL, > - RS6000_BTI_V8HI, ~RS6000_BTI_INTHI, > - RS6000_BTI_unsigned_long_long, 0 }, > - { P9V_BUILTIN_VEC_LXVL, P9V_BUILTIN_LXVL, > - RS6000_BTI_unsigned_V8HI, ~RS6000_BTI_UINTHI, > - RS6000_BTI_unsigned_long_long, 0 }, > - > - { P9V_BUILTIN_VEC_LXVL, P9V_BUILTIN_LXVL, > - RS6000_BTI_V2DF, ~RS6000_BTI_double, > - RS6000_BTI_unsigned_long_long, 0 }, > - { P9V_BUILTIN_VEC_LXVL, P9V_BUILTIN_LXVL, > - RS6000_BTI_V4SF, ~RS6000_BTI_float, > - RS6000_BTI_unsigned_long_long, 0 }, > - /* At an appropriate future time, add support for the > - RS6000_BTI_Float16 (exact name to be determined) type here. */ > - > - { P9V_BUILTIN_VEC_XST_LEN_R, P9V_BUILTIN_XST_LEN_R, > - RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, > - ~RS6000_BTI_UINTQI, RS6000_BTI_unsigned_long_long}, > - > - { P9V_BUILTIN_VEC_STXVL, P9V_BUILTIN_STXVL, > - RS6000_BTI_void, RS6000_BTI_V16QI, ~RS6000_BTI_INTQI, > - RS6000_BTI_unsigned_long_long }, > - { P9V_BUILTIN_VEC_STXVL, P9V_BUILTIN_STXVL, > - RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, ~RS6000_BTI_UINTQI, > - RS6000_BTI_unsigned_long_long }, > - > - { P9V_BUILTIN_VEC_STXVL, P9V_BUILTIN_STXVL, > - RS6000_BTI_void, RS6000_BTI_V4SI, ~RS6000_BTI_INTSI, > - RS6000_BTI_unsigned_long_long }, > - { P9V_BUILTIN_VEC_STXVL, P9V_BUILTIN_STXVL, > - RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, ~RS6000_BTI_UINTSI, > - RS6000_BTI_unsigned_long_long }, > - > - { P9V_BUILTIN_VEC_STXVL, P9V_BUILTIN_STXVL, > - RS6000_BTI_void, RS6000_BTI_V1TI, ~RS6000_BTI_INTTI, > - RS6000_BTI_unsigned_long_long }, > - { P9V_BUILTIN_VEC_STXVL, P9V_BUILTIN_STXVL, > - RS6000_BTI_void, RS6000_BTI_unsigned_V1TI, ~RS6000_BTI_UINTTI, > - RS6000_BTI_unsigned_long_long }, > - > - { P9V_BUILTIN_VEC_STXVL, P9V_BUILTIN_STXVL, > - RS6000_BTI_void, RS6000_BTI_V2DI, ~RS6000_BTI_long_long, > - RS6000_BTI_unsigned_long_long }, > - { P9V_BUILTIN_VEC_STXVL, P9V_BUILTIN_STXVL, > - RS6000_BTI_void, RS6000_BTI_unsigned_V2DI, ~RS6000_BTI_unsigned_long_long, > - RS6000_BTI_unsigned_long_long }, > - > - { P9V_BUILTIN_VEC_STXVL, P9V_BUILTIN_STXVL, > - RS6000_BTI_void, RS6000_BTI_V8HI, ~RS6000_BTI_INTHI, > - RS6000_BTI_unsigned_long_long }, > - { P9V_BUILTIN_VEC_STXVL, P9V_BUILTIN_STXVL, > - RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, ~RS6000_BTI_UINTHI, > - RS6000_BTI_unsigned_long_long }, > - > - { P9V_BUILTIN_VEC_STXVL, P9V_BUILTIN_STXVL, > - RS6000_BTI_void, RS6000_BTI_V2DF, ~RS6000_BTI_double, > - RS6000_BTI_unsigned_long_long }, > - { P9V_BUILTIN_VEC_STXVL, P9V_BUILTIN_STXVL, > - RS6000_BTI_void, RS6000_BTI_V4SF, ~RS6000_BTI_float, > - RS6000_BTI_unsigned_long_long }, > - /* At an appropriate future time, add support for the > - RS6000_BTI_Float16 (exact name to be determined) type here. */ > - > - { ALTIVEC_BUILTIN_VEC_CMPNE, P9V_BUILTIN_CMPNEB, > - RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, > - RS6000_BTI_bool_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_CMPNE, P9V_BUILTIN_CMPNEB, > - RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, > - RS6000_BTI_V16QI, 0 }, > - { ALTIVEC_BUILTIN_VEC_CMPNE, P9V_BUILTIN_CMPNEB, > - RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, > - RS6000_BTI_unsigned_V16QI, 0 }, > - > - { ALTIVEC_BUILTIN_VEC_CMPNE, P9V_BUILTIN_CMPNEH, > - RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, > - RS6000_BTI_bool_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_CMPNE, P9V_BUILTIN_CMPNEH, > - RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, > - RS6000_BTI_V8HI, 0 }, > - { ALTIVEC_BUILTIN_VEC_CMPNE, P9V_BUILTIN_CMPNEH, > - RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, > - RS6000_BTI_unsigned_V8HI, 0 }, > - > - { ALTIVEC_BUILTIN_VEC_CMPNE, P9V_BUILTIN_CMPNEW, > - RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, > - RS6000_BTI_bool_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_CMPNE, P9V_BUILTIN_CMPNEW, > - RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, > - RS6000_BTI_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_CMPNE, P9V_BUILTIN_CMPNEW, > - RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, > - RS6000_BTI_unsigned_V4SI, 0 }, > - { ALTIVEC_BUILTIN_VEC_CMPNE, P10V_BUILTIN_CMPNET, > - RS6000_BTI_bool_V1TI, RS6000_BTI_V1TI, > - RS6000_BTI_V1TI, 0 }, > - { ALTIVEC_BUILTIN_VEC_CMPNE, P10V_BUILTIN_CMPNET, > - RS6000_BTI_bool_V1TI, RS6000_BTI_unsigned_V1TI, > - RS6000_BTI_unsigned_V1TI, 0 }, > - > - /* The following 2 entries have been deprecated. */ > - { P9V_BUILTIN_VEC_VCMPNE_P, P9V_BUILTIN_VCMPNEB_P, > - RS6000_BTI_INTSI, RS6000_BTI_bool_V16QI, > - RS6000_BTI_unsigned_V16QI, 0 }, > - { P9V_BUILTIN_VEC_VCMPNE_P, P9V_BUILTIN_VCMPNEB_P, > - RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI, > - RS6000_BTI_bool_V16QI, 0 }, > - { P9V_BUILTIN_VEC_VCMPNE_P, P9V_BUILTIN_VCMPNEB_P, > - RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI, > - RS6000_BTI_unsigned_V16QI, 0 }, > - > - /* The following 2 entries have been deprecated. */ > - { P9V_BUILTIN_VEC_VCMPNE_P, P9V_BUILTIN_VCMPNEB_P, > - RS6000_BTI_INTSI, RS6000_BTI_bool_V16QI, > - RS6000_BTI_V16QI, 0 }, > - { P9V_BUILTIN_VEC_VCMPNE_P, P9V_BUILTIN_VCMPNEB_P, > - RS6000_BTI_INTSI, RS6000_BTI_V16QI, > - RS6000_BTI_bool_V16QI, 0 }, > - { P9V_BUILTIN_VEC_VCMPNE_P, P9V_BUILTIN_VCMPNEB_P, > - RS6000_BTI_INTSI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, > - { P9V_BUILTIN_VEC_VCMPNE_P, P9V_BUILTIN_VCMPNEB_P, > - RS6000_BTI_INTSI, RS6000_BTI_bool_V16QI, > - RS6000_BTI_bool_V16QI, 0 }, > - > - /* The following 2 entries have been deprecated. */ > - { P9V_BUILTIN_VEC_VCMPNE_P, P9V_BUILTIN_VCMPNEH_P, > - RS6000_BTI_INTSI, RS6000_BTI_bool_V8HI, > - RS6000_BTI_unsigned_V8HI, 0 }, > - { P9V_BUILTIN_VEC_VCMPNE_P, P9V_BUILTIN_VCMPNEH_P, > - RS6000_BTI_INTSI, RS6000_BTI_unsigned_V8HI, > - RS6000_BTI_bool_V8HI, 0 }, > - { P9V_BUILTIN_VEC_VCMPNE_P, P9V_BUILTIN_VCMPNEH_P, > - RS6000_BTI_INTSI, RS6000_BTI_unsigned_V8HI, > - RS6000_BTI_unsigned_V8HI, 0 }, > - { P9V_BUILTIN_VEC_VCMPNE_P, P9V_BUILTIN_VCMPNEH_P, > - RS6000_BTI_INTSI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, > - > - /* The following 2 entries have been deprecated. */ > - { P9V_BUILTIN_VEC_VCMPNE_P, P9V_BUILTIN_VCMPNEH_P, > - RS6000_BTI_INTSI, RS6000_BTI_bool_V8HI, > - RS6000_BTI_V8HI, 0 }, > - { P9V_BUILTIN_VEC_VCMPNE_P, P9V_BUILTIN_VCMPNEH_P, > - RS6000_BTI_INTSI, RS6000_BTI_V8HI, > - RS6000_BTI_bool_V8HI, 0 }, > - { P9V_BUILTIN_VEC_VCMPNE_P, P9V_BUILTIN_VCMPNEH_P, > - RS6000_BTI_INTSI, RS6000_BTI_bool_V8HI, > - RS6000_BTI_bool_V8HI, 0 }, > - { P9V_BUILTIN_VEC_VCMPNE_P, P9V_BUILTIN_VCMPNEH_P, > - RS6000_BTI_INTSI, RS6000_BTI_pixel_V8HI, > - RS6000_BTI_pixel_V8HI, 0 }, > - > - /* The following 2 entries have been deprecated. */ > - { P9V_BUILTIN_VEC_VCMPNE_P, P9V_BUILTIN_VCMPNEW_P, > - RS6000_BTI_INTSI, RS6000_BTI_bool_V4SI, > - RS6000_BTI_unsigned_V4SI, 0 }, > - { P9V_BUILTIN_VEC_VCMPNE_P, P9V_BUILTIN_VCMPNEW_P, > - RS6000_BTI_INTSI, RS6000_BTI_unsigned_V4SI, > - RS6000_BTI_bool_V4SI, 0 }, > - { P9V_BUILTIN_VEC_VCMPNE_P, P9V_BUILTIN_VCMPNEW_P, > - RS6000_BTI_INTSI, RS6000_BTI_unsigned_V4SI, > - RS6000_BTI_unsigned_V4SI, 0 }, > - > - /* The following 2 entries have been deprecated. */ > - { P9V_BUILTIN_VEC_VCMPNE_P, P9V_BUILTIN_VCMPNEW_P, > - RS6000_BTI_INTSI, RS6000_BTI_bool_V4SI, > - RS6000_BTI_V4SI, 0 }, > - { P9V_BUILTIN_VEC_VCMPNE_P, P9V_BUILTIN_VCMPNEW_P, > - RS6000_BTI_INTSI, RS6000_BTI_V4SI, > - RS6000_BTI_bool_V4SI, 0 }, > - { P9V_BUILTIN_VEC_VCMPNE_P, P9V_BUILTIN_VCMPNEW_P, > - RS6000_BTI_INTSI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, > - { P9V_BUILTIN_VEC_VCMPNE_P, P9V_BUILTIN_VCMPNEW_P, > - RS6000_BTI_INTSI, RS6000_BTI_bool_V4SI, > - RS6000_BTI_bool_V4SI, 0 }, > - > - /* The following 2 entries have been deprecated. */ > - { P9V_BUILTIN_VEC_VCMPNE_P, P9V_BUILTIN_VCMPNED_P, > - RS6000_BTI_INTSI, RS6000_BTI_bool_V2DI, > - RS6000_BTI_unsigned_V2DI, 0 }, > - { P9V_BUILTIN_VEC_VCMPNE_P, P9V_BUILTIN_VCMPNED_P, > - RS6000_BTI_INTSI, RS6000_BTI_unsigned_V2DI, > - RS6000_BTI_bool_V2DI, 0 }, > - { P9V_BUILTIN_VEC_VCMPNE_P, P9V_BUILTIN_VCMPNED_P, > - RS6000_BTI_INTSI, RS6000_BTI_unsigned_V2DI, > - RS6000_BTI_unsigned_V2DI, 0 > - }, > - > - /* The following 2 entries have been deprecated. */ > - { P9V_BUILTIN_VEC_VCMPNE_P, P9V_BUILTIN_VCMPNED_P, > - RS6000_BTI_INTSI, RS6000_BTI_bool_V2DI, > - RS6000_BTI_V2DI, 0 }, > - { P9V_BUILTIN_VEC_VCMPNE_P, P9V_BUILTIN_VCMPNED_P, > - RS6000_BTI_INTSI, RS6000_BTI_V2DI, > - RS6000_BTI_bool_V2DI, 0 }, > - { P9V_BUILTIN_VEC_VCMPNE_P, P9V_BUILTIN_VCMPNED_P, > - RS6000_BTI_INTSI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, > - { P9V_BUILTIN_VEC_VCMPNE_P, P9V_BUILTIN_VCMPNED_P, > - RS6000_BTI_INTSI, RS6000_BTI_bool_V2DI, > - RS6000_BTI_bool_V2DI, 0 }, > - { P9V_BUILTIN_VEC_VCMPNE_P, P10V_BUILTIN_VCMPNET_P, > - RS6000_BTI_INTSI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, 0 }, > - { P9V_BUILTIN_VEC_VCMPNE_P, P10V_BUILTIN_VCMPNET_P, > - RS6000_BTI_INTSI, RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, 0 }, > - > - { P9V_BUILTIN_VEC_VCMPNE_P, P9V_BUILTIN_VCMPNEFP_P, > - RS6000_BTI_INTSI, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, > - { P9V_BUILTIN_VEC_VCMPNE_P, P9V_BUILTIN_VCMPNEDP_P, > - RS6000_BTI_INTSI, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 }, > - > - /* The following 2 entries have been deprecated. */ > - { P9V_BUILTIN_VEC_VCMPAE_P, P9V_BUILTIN_VCMPAEB_P, > - RS6000_BTI_INTSI, RS6000_BTI_bool_V16QI, > - RS6000_BTI_unsigned_V16QI, 0 }, > - { P9V_BUILTIN_VEC_VCMPAE_P, P9V_BUILTIN_VCMPAEB_P, > - RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI, > - RS6000_BTI_bool_V16QI, 0 }, > - { P9V_BUILTIN_VEC_VCMPAE_P, P9V_BUILTIN_VCMPAEB_P, > - RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI, > - RS6000_BTI_unsigned_V16QI, 0 }, > - > - /* The following 2 entries have been deprecated. */ > - { P9V_BUILTIN_VEC_VCMPAE_P, P9V_BUILTIN_VCMPAEB_P, > - RS6000_BTI_INTSI, RS6000_BTI_bool_V16QI, > - RS6000_BTI_V16QI, 0 }, > - { P9V_BUILTIN_VEC_VCMPAE_P, P9V_BUILTIN_VCMPAEB_P, > - RS6000_BTI_INTSI, RS6000_BTI_V16QI, > - RS6000_BTI_bool_V16QI, 0 }, > - { P9V_BUILTIN_VEC_VCMPAE_P, P9V_BUILTIN_VCMPAEB_P, > - RS6000_BTI_INTSI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, > - { P9V_BUILTIN_VEC_VCMPAE_P, P9V_BUILTIN_VCMPAEB_P, > - RS6000_BTI_INTSI, RS6000_BTI_bool_V16QI, > - RS6000_BTI_bool_V16QI, 0 }, > - > - /* The following 2 entries have been deprecated. */ > - { P9V_BUILTIN_VEC_VCMPAE_P, P9V_BUILTIN_VCMPAEH_P, > - RS6000_BTI_INTSI, RS6000_BTI_bool_V8HI, > - RS6000_BTI_unsigned_V8HI, 0 }, > - { P9V_BUILTIN_VEC_VCMPAE_P, P9V_BUILTIN_VCMPAEH_P, > - RS6000_BTI_INTSI, RS6000_BTI_unsigned_V8HI, > - RS6000_BTI_bool_V8HI, 0 }, > - { P9V_BUILTIN_VEC_VCMPAE_P, P9V_BUILTIN_VCMPAEH_P, > - RS6000_BTI_INTSI, RS6000_BTI_unsigned_V8HI, > - RS6000_BTI_unsigned_V8HI, 0 }, > - { P9V_BUILTIN_VEC_VCMPAE_P, P9V_BUILTIN_VCMPAEH_P, > - RS6000_BTI_INTSI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, > - > - /* The following 2 entries have been deprecated. */ > - { P9V_BUILTIN_VEC_VCMPAE_P, P9V_BUILTIN_VCMPAEH_P, > - RS6000_BTI_INTSI, RS6000_BTI_bool_V8HI, > - RS6000_BTI_V8HI, 0 }, > - { P9V_BUILTIN_VEC_VCMPAE_P, P9V_BUILTIN_VCMPAEH_P, > - RS6000_BTI_INTSI, RS6000_BTI_V8HI, > - RS6000_BTI_bool_V8HI, 0 }, > - { P9V_BUILTIN_VEC_VCMPAE_P, P9V_BUILTIN_VCMPAEH_P, > - RS6000_BTI_INTSI, RS6000_BTI_bool_V8HI, > - RS6000_BTI_bool_V8HI, 0 }, > - { P9V_BUILTIN_VEC_VCMPAE_P, P9V_BUILTIN_VCMPAEH_P, > - RS6000_BTI_INTSI, RS6000_BTI_pixel_V8HI, > - RS6000_BTI_pixel_V8HI, 0 }, > - > - /* The following 2 entries have been deprecated. */ > - { P9V_BUILTIN_VEC_VCMPAE_P, P9V_BUILTIN_VCMPAEW_P, > - RS6000_BTI_INTSI, RS6000_BTI_bool_V4SI, > - RS6000_BTI_unsigned_V4SI, 0 }, > - { P9V_BUILTIN_VEC_VCMPAE_P, P9V_BUILTIN_VCMPAEW_P, > - RS6000_BTI_INTSI, RS6000_BTI_unsigned_V4SI, > - RS6000_BTI_bool_V4SI, 0 }, > - { P9V_BUILTIN_VEC_VCMPAE_P, P9V_BUILTIN_VCMPAEW_P, > - RS6000_BTI_INTSI, RS6000_BTI_unsigned_V4SI, > - RS6000_BTI_unsigned_V4SI, 0 }, > - > - /* The following 2 entries have been deprecated. */ > - { P9V_BUILTIN_VEC_VCMPAE_P, P9V_BUILTIN_VCMPAEW_P, > - RS6000_BTI_INTSI, RS6000_BTI_bool_V4SI, > - RS6000_BTI_V4SI, 0 }, > - { P9V_BUILTIN_VEC_VCMPAE_P, P9V_BUILTIN_VCMPAEW_P, > - RS6000_BTI_INTSI, RS6000_BTI_V4SI, > - RS6000_BTI_bool_V4SI, 0 }, > - { P9V_BUILTIN_VEC_VCMPAE_P, P9V_BUILTIN_VCMPAEW_P, > - RS6000_BTI_INTSI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, > - { P9V_BUILTIN_VEC_VCMPAE_P, P9V_BUILTIN_VCMPAEW_P, > - RS6000_BTI_INTSI, RS6000_BTI_bool_V4SI, > - RS6000_BTI_bool_V4SI, 0 }, > - > - /* The following 2 entries have been deprecated. */ > - { P9V_BUILTIN_VEC_VCMPAE_P, P9V_BUILTIN_VCMPAED_P, > - RS6000_BTI_INTSI, RS6000_BTI_bool_V2DI, > - RS6000_BTI_unsigned_V2DI, 0 }, > - { P9V_BUILTIN_VEC_VCMPAE_P, P9V_BUILTIN_VCMPAED_P, > - RS6000_BTI_INTSI, RS6000_BTI_unsigned_V2DI, > - RS6000_BTI_bool_V2DI, 0 }, > - { P9V_BUILTIN_VEC_VCMPAE_P, P9V_BUILTIN_VCMPAED_P, > - RS6000_BTI_INTSI, RS6000_BTI_unsigned_V2DI, > - RS6000_BTI_unsigned_V2DI, 0 > - }, > - > - /* The following 2 entries have been deprecated. */ > - { P9V_BUILTIN_VEC_VCMPAE_P, P9V_BUILTIN_VCMPAED_P, > - RS6000_BTI_INTSI, RS6000_BTI_bool_V2DI, > - RS6000_BTI_V2DI, 0 }, > - { P9V_BUILTIN_VEC_VCMPAE_P, P9V_BUILTIN_VCMPAED_P, > - RS6000_BTI_INTSI, RS6000_BTI_V2DI, > - RS6000_BTI_bool_V2DI, 0 }, > - { P9V_BUILTIN_VEC_VCMPAE_P, P9V_BUILTIN_VCMPAED_P, > - RS6000_BTI_INTSI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, > - { P9V_BUILTIN_VEC_VCMPAE_P, P9V_BUILTIN_VCMPAED_P, > - RS6000_BTI_INTSI, RS6000_BTI_bool_V2DI, > - RS6000_BTI_bool_V2DI, 0 }, > - { P9V_BUILTIN_VEC_VCMPAE_P, P10V_BUILTIN_VCMPAET_P, > - RS6000_BTI_INTSI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, 0 }, > - { P9V_BUILTIN_VEC_VCMPAE_P, P10V_BUILTIN_VCMPAET_P, > - RS6000_BTI_INTSI, RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, 0 }, > - { P9V_BUILTIN_VEC_VCMPAE_P, P9V_BUILTIN_VCMPAEFP_P, > - RS6000_BTI_INTSI, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, > - { P9V_BUILTIN_VEC_VCMPAE_P, P9V_BUILTIN_VCMPAEDP_P, > - RS6000_BTI_INTSI, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 }, > - > - { P9V_BUILTIN_VEC_VCMPNEZ_P, P9V_BUILTIN_VCMPNEZB_P, > - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI, > - RS6000_BTI_unsigned_V16QI }, > - { P9V_BUILTIN_VEC_VCMPNEZ_P, P9V_BUILTIN_VCMPNEZB_P, > - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V16QI, RS6000_BTI_V16QI }, > - > - { P9V_BUILTIN_VEC_VCMPNEZ_P, P9V_BUILTIN_VCMPNEZH_P, > - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V8HI, > - RS6000_BTI_unsigned_V8HI }, > - { P9V_BUILTIN_VEC_VCMPNEZ_P, P9V_BUILTIN_VCMPNEZH_P, > - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V8HI, RS6000_BTI_V8HI }, > - > - { P9V_BUILTIN_VEC_VCMPNEZ_P, P9V_BUILTIN_VCMPNEZW_P, > - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V4SI, > - RS6000_BTI_unsigned_V4SI }, > - { P9V_BUILTIN_VEC_VCMPNEZ_P, P9V_BUILTIN_VCMPNEZW_P, > - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V4SI, RS6000_BTI_V4SI }, > - > - { P9V_BUILTIN_VEC_CMPNEZ, P9V_BUILTIN_CMPNEZB, > - RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, > - RS6000_BTI_V16QI, 0 }, > - { P9V_BUILTIN_VEC_CMPNEZ, P9V_BUILTIN_CMPNEZB, > - RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, > - RS6000_BTI_unsigned_V16QI, 0 }, > - > - { P9V_BUILTIN_VEC_CMPNEZ, P9V_BUILTIN_CMPNEZH, > - RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, > - RS6000_BTI_V8HI, 0 }, > - { P9V_BUILTIN_VEC_CMPNEZ, P9V_BUILTIN_CMPNEZH, > - RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, > - RS6000_BTI_unsigned_V8HI, 0 }, > - > - { P9V_BUILTIN_VEC_CMPNEZ, P9V_BUILTIN_CMPNEZW, > - RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, > - RS6000_BTI_V4SI, 0 }, > - { P9V_BUILTIN_VEC_CMPNEZ, P9V_BUILTIN_CMPNEZW, > - RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, > - RS6000_BTI_unsigned_V4SI, 0 }, > - > - { P9V_BUILTIN_VEC_VCLZLSBB, P9V_BUILTIN_VCLZLSBB_V16QI, > - RS6000_BTI_INTSI, RS6000_BTI_V16QI, 0, 0 }, > - { P9V_BUILTIN_VEC_VCLZLSBB, P9V_BUILTIN_VCLZLSBB_V16QI, > - RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI, 0, 0 }, > - > - { P9V_BUILTIN_VEC_VCTZLSBB, P9V_BUILTIN_VCTZLSBB_V16QI, > - RS6000_BTI_INTSI, RS6000_BTI_V16QI, 0, 0 }, > - { P9V_BUILTIN_VEC_VCTZLSBB, P9V_BUILTIN_VCTZLSBB_V16QI, > - RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI, 0, 0 }, > - { P9V_BUILTIN_VEC_VCTZLSBB, P9V_BUILTIN_VCTZLSBB_V8HI, > - RS6000_BTI_INTSI, RS6000_BTI_V8HI, 0, 0 }, > - { P9V_BUILTIN_VEC_VCTZLSBB, P9V_BUILTIN_VCTZLSBB_V4SI, > - RS6000_BTI_INTSI, RS6000_BTI_V4SI, 0, 0 }, > - > - { P9V_BUILTIN_VEC_EXTRACT4B, P9V_BUILTIN_EXTRACT4B, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, 0 }, > - > - { P9V_BUILTIN_VEC_VEXTRACT_FP_FROM_SHORTH, P9V_BUILTIN_VEXTRACT_FP_FROM_SHORTH, > - RS6000_BTI_V4SF, RS6000_BTI_unsigned_V8HI, 0, 0 }, > - { P9V_BUILTIN_VEC_VEXTRACT_FP_FROM_SHORTL, P9V_BUILTIN_VEXTRACT_FP_FROM_SHORTL, > - RS6000_BTI_V4SF, RS6000_BTI_unsigned_V8HI, 0, 0 }, > - > - { P9V_BUILTIN_VEC_VEXTULX, P9V_BUILTIN_VEXTUBLX, > - RS6000_BTI_INTQI, RS6000_BTI_UINTSI, > - RS6000_BTI_V16QI, 0 }, > - { P9V_BUILTIN_VEC_VEXTULX, P9V_BUILTIN_VEXTUBLX, > - RS6000_BTI_UINTQI, RS6000_BTI_UINTSI, > - RS6000_BTI_unsigned_V16QI, 0 }, > - > - { P9V_BUILTIN_VEC_VEXTULX, P9V_BUILTIN_VEXTUHLX, > - RS6000_BTI_INTHI, RS6000_BTI_UINTSI, > - RS6000_BTI_V8HI, 0 }, > - { P9V_BUILTIN_VEC_VEXTULX, P9V_BUILTIN_VEXTUHLX, > - RS6000_BTI_UINTHI, RS6000_BTI_UINTSI, > - RS6000_BTI_unsigned_V8HI, 0 }, > - > - { P9V_BUILTIN_VEC_VEXTULX, P9V_BUILTIN_VEXTUWLX, > - RS6000_BTI_INTSI, RS6000_BTI_UINTSI, > - RS6000_BTI_V4SI, 0 }, > - { P9V_BUILTIN_VEC_VEXTULX, P9V_BUILTIN_VEXTUWLX, > - RS6000_BTI_UINTSI, RS6000_BTI_UINTSI, > - RS6000_BTI_unsigned_V4SI, 0 }, > - { P9V_BUILTIN_VEC_VEXTULX, P9V_BUILTIN_VEXTUWLX, > - RS6000_BTI_float, RS6000_BTI_UINTSI, > - RS6000_BTI_V4SF, 0 }, > - > - { P9V_BUILTIN_VEC_VEXTURX, P9V_BUILTIN_VEXTUBRX, > - RS6000_BTI_INTQI, RS6000_BTI_UINTSI, > - RS6000_BTI_V16QI, 0 }, > - { P9V_BUILTIN_VEC_VEXTURX, P9V_BUILTIN_VEXTUBRX, > - RS6000_BTI_UINTQI, RS6000_BTI_UINTSI, > - RS6000_BTI_unsigned_V16QI, 0 }, > - > - { P9V_BUILTIN_VEC_VEXTURX, P9V_BUILTIN_VEXTUHRX, > - RS6000_BTI_INTHI, RS6000_BTI_UINTSI, > - RS6000_BTI_V8HI, 0 }, > - { P9V_BUILTIN_VEC_VEXTURX, P9V_BUILTIN_VEXTUHRX, > - RS6000_BTI_UINTHI, RS6000_BTI_UINTSI, > - RS6000_BTI_unsigned_V8HI, 0 }, > - > - { P9V_BUILTIN_VEC_VEXTURX, P9V_BUILTIN_VEXTUWRX, > - RS6000_BTI_INTSI, RS6000_BTI_UINTSI, > - RS6000_BTI_V4SI, 0 }, > - { P9V_BUILTIN_VEC_VEXTURX, P9V_BUILTIN_VEXTUWRX, > - RS6000_BTI_UINTSI, RS6000_BTI_UINTSI, > - RS6000_BTI_unsigned_V4SI, 0 }, > - { P9V_BUILTIN_VEC_VEXTURX, P9V_BUILTIN_VEXTUWRX, > - RS6000_BTI_float, RS6000_BTI_UINTSI, > - RS6000_BTI_V4SF, 0 }, > - > - { P8V_BUILTIN_VEC_VGBBD, P8V_BUILTIN_VGBBD, > - RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0, 0 }, > - { P8V_BUILTIN_VEC_VGBBD, P8V_BUILTIN_VGBBD, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0, 0 }, > - > - { P9V_BUILTIN_VEC_INSERT4B, P9V_BUILTIN_INSERT4B, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_V4SI, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI }, > - { P9V_BUILTIN_VEC_INSERT4B, P9V_BUILTIN_INSERT4B, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V4SI, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI }, > - > - { P8V_BUILTIN_VEC_VADDECUQ, P8V_BUILTIN_VADDECUQ, > - RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI }, > - { P8V_BUILTIN_VEC_VADDECUQ, P8V_BUILTIN_VADDECUQ, > - RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, > - RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI }, > - > - { P8V_BUILTIN_VEC_VADDEUQM, P8V_BUILTIN_VADDEUQM, > - RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI }, > - { P8V_BUILTIN_VEC_VADDEUQM, P8V_BUILTIN_VADDEUQM, > - RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, > - RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI }, > - > - { P8V_BUILTIN_VEC_VSUBECUQ, P8V_BUILTIN_VSUBECUQ, > - RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI }, > - { P8V_BUILTIN_VEC_VSUBECUQ, P8V_BUILTIN_VSUBECUQ, > - RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, > - RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI }, > - > - { P8V_BUILTIN_VEC_VSUBEUQM, P8V_BUILTIN_VSUBEUQM, > - RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI }, > - { P8V_BUILTIN_VEC_VSUBEUQM, P8V_BUILTIN_VSUBEUQM, > - RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, > - RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI }, > - > - { P8V_BUILTIN_VEC_VMINSD, P8V_BUILTIN_VMINSD, > - RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, 0 }, > - { P8V_BUILTIN_VEC_VMINSD, P8V_BUILTIN_VMINSD, > - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, 0 }, > - { P8V_BUILTIN_VEC_VMINSD, P8V_BUILTIN_VMINSD, > - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, > - > - { P8V_BUILTIN_VEC_VMAXSD, P8V_BUILTIN_VMAXSD, > - RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, 0 }, > - { P8V_BUILTIN_VEC_VMAXSD, P8V_BUILTIN_VMAXSD, > - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, 0 }, > - { P8V_BUILTIN_VEC_VMAXSD, P8V_BUILTIN_VMAXSD, > - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, > - > - { P8V_BUILTIN_VEC_VMINUD, P8V_BUILTIN_VMINUD, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, > - RS6000_BTI_unsigned_V2DI, 0 }, > - { P8V_BUILTIN_VEC_VMINUD, P8V_BUILTIN_VMINUD, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, > - RS6000_BTI_bool_V2DI, 0 }, > - { P8V_BUILTIN_VEC_VMINUD, P8V_BUILTIN_VMINUD, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, > - RS6000_BTI_unsigned_V2DI, 0 }, > - > - { P8V_BUILTIN_VEC_VMAXUD, P8V_BUILTIN_VMAXUD, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, > - RS6000_BTI_unsigned_V2DI, 0 }, > - { P8V_BUILTIN_VEC_VMAXUD, P8V_BUILTIN_VMAXUD, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, > - RS6000_BTI_bool_V2DI, 0 }, > - { P8V_BUILTIN_VEC_VMAXUD, P8V_BUILTIN_VMAXUD, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, > - RS6000_BTI_unsigned_V2DI, 0 }, > - > - { P8V_BUILTIN_VEC_VMRGEW, P8V_BUILTIN_VMRGEW_V2DI, > - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, > - { P8V_BUILTIN_VEC_VMRGEW, P8V_BUILTIN_VMRGEW_V2DI, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, > - RS6000_BTI_unsigned_V2DI, 0 }, > - { P8V_BUILTIN_VEC_VMRGEW, P8V_BUILTIN_VMRGEW_V2DI, > - RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, 0 }, > - { P8V_BUILTIN_VEC_VMRGEW, P8V_BUILTIN_VMRGEW_V4SF, > - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, > - { P8V_BUILTIN_VEC_VMRGEW, P8V_BUILTIN_VMRGEW_V2DF, > - RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 }, > - { P8V_BUILTIN_VEC_VMRGEW, P8V_BUILTIN_VMRGEW_V4SI, > - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, > - { P8V_BUILTIN_VEC_VMRGEW, P8V_BUILTIN_VMRGEW_V4SI, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, > - RS6000_BTI_unsigned_V4SI, 0 }, > - { P8V_BUILTIN_VEC_VMRGEW, P8V_BUILTIN_VMRGEW_V4SI, > - RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, 0 }, > - > - { P8V_BUILTIN_VEC_VMRGOW, P8V_BUILTIN_VMRGOW_V4SI, > - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, > - { P8V_BUILTIN_VEC_VMRGOW, P8V_BUILTIN_VMRGOW_V4SI, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, > - RS6000_BTI_unsigned_V4SI, 0 }, > - { P8V_BUILTIN_VEC_VMRGOW, P8V_BUILTIN_VMRGOW_V4SI, > - RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, 0 }, > - { P8V_BUILTIN_VEC_VMRGOW, P8V_BUILTIN_VMRGOW_V2DI, > - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, > - { P8V_BUILTIN_VEC_VMRGOW, P8V_BUILTIN_VMRGOW_V2DI, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, > - RS6000_BTI_unsigned_V2DI, 0 }, > - { P8V_BUILTIN_VEC_VMRGOW, P8V_BUILTIN_VMRGOW_V2DI, > - RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, 0 }, > - { P8V_BUILTIN_VEC_VMRGOW, P8V_BUILTIN_VMRGOW_V2DF, > - RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 }, > - { P8V_BUILTIN_VEC_VMRGOW, P8V_BUILTIN_VMRGOW_V4SF, > - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, > - > - { P8V_BUILTIN_VEC_VPMSUM, P8V_BUILTIN_VPMSUMB, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V16QI, > - RS6000_BTI_unsigned_V16QI, 0 }, > - { P8V_BUILTIN_VEC_VPMSUM, P8V_BUILTIN_VPMSUMH, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V8HI, > - RS6000_BTI_unsigned_V8HI, 0 }, > - { P8V_BUILTIN_VEC_VPMSUM, P8V_BUILTIN_VPMSUMW, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V4SI, > - RS6000_BTI_unsigned_V4SI, 0 }, > - { P8V_BUILTIN_VEC_VPMSUM, P8V_BUILTIN_VPMSUMD, > - RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V2DI, > - RS6000_BTI_unsigned_V2DI, 0 }, > - > - { P8V_BUILTIN_VEC_VPOPCNT, P8V_BUILTIN_VPOPCNTB, > - RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0, 0 }, > - { P8V_BUILTIN_VEC_VPOPCNT, P8V_BUILTIN_VPOPCNTB, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0, 0 }, > - { P8V_BUILTIN_VEC_VPOPCNT, P8V_BUILTIN_VPOPCNTH, > - RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0, 0 }, > - { P8V_BUILTIN_VEC_VPOPCNT, P8V_BUILTIN_VPOPCNTH, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0, 0 }, > - { P8V_BUILTIN_VEC_VPOPCNT, P8V_BUILTIN_VPOPCNTW, > - RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0, 0 }, > - { P8V_BUILTIN_VEC_VPOPCNT, P8V_BUILTIN_VPOPCNTW, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0, 0 }, > - { P8V_BUILTIN_VEC_VPOPCNT, P8V_BUILTIN_VPOPCNTD, > - RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0, 0 }, > - { P8V_BUILTIN_VEC_VPOPCNT, P8V_BUILTIN_VPOPCNTD, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0, 0 }, > - > - { P8V_BUILTIN_VEC_VPOPCNTB, P8V_BUILTIN_VPOPCNTB, > - RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0, 0 }, > - { P8V_BUILTIN_VEC_VPOPCNTB, P8V_BUILTIN_VPOPCNTB, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0, 0 }, > - > - { P8V_BUILTIN_VEC_VPOPCNTU, P8V_BUILTIN_VPOPCNTUB, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_V16QI, 0, 0 }, > - { P8V_BUILTIN_VEC_VPOPCNTU, P8V_BUILTIN_VPOPCNTUB, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0, 0 }, > - > - { P8V_BUILTIN_VEC_VPOPCNTU, P8V_BUILTIN_VPOPCNTUH, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_V8HI, 0, 0 }, > - { P8V_BUILTIN_VEC_VPOPCNTU, P8V_BUILTIN_VPOPCNTUH, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0, 0 }, > - > - { P8V_BUILTIN_VEC_VPOPCNTU, P8V_BUILTIN_VPOPCNTUW, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_V4SI, 0, 0 }, > - { P8V_BUILTIN_VEC_VPOPCNTU, P8V_BUILTIN_VPOPCNTUW, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0, 0 }, > - > - { P8V_BUILTIN_VEC_VPOPCNTU, P8V_BUILTIN_VPOPCNTUD, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_V2DI, 0, 0 }, > - { P8V_BUILTIN_VEC_VPOPCNTU, P8V_BUILTIN_VPOPCNTUD, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0, 0 }, > - > - { P8V_BUILTIN_VEC_VPOPCNTH, P8V_BUILTIN_VPOPCNTH, > - RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0, 0 }, > - { P8V_BUILTIN_VEC_VPOPCNTH, P8V_BUILTIN_VPOPCNTH, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0, 0 }, > - > - { P8V_BUILTIN_VEC_VPOPCNTW, P8V_BUILTIN_VPOPCNTW, > - RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0, 0 }, > - { P8V_BUILTIN_VEC_VPOPCNTW, P8V_BUILTIN_VPOPCNTW, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0, 0 }, > - > - { P8V_BUILTIN_VEC_VPOPCNTD, P8V_BUILTIN_VPOPCNTD, > - RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0, 0 }, > - { P8V_BUILTIN_VEC_VPOPCNTD, P8V_BUILTIN_VPOPCNTD, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0, 0 }, > - > - { P9V_BUILTIN_VEC_VPRTYB, P9V_BUILTIN_VPRTYBW, > - RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0, 0 }, > - { P9V_BUILTIN_VEC_VPRTYB, P9V_BUILTIN_VPRTYBW, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0, 0 }, > - { P9V_BUILTIN_VEC_VPRTYB, P9V_BUILTIN_VPRTYBD, > - RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0, 0 }, > - { P9V_BUILTIN_VEC_VPRTYB, P9V_BUILTIN_VPRTYBD, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0, 0 }, > - { P9V_BUILTIN_VEC_VPRTYB, P9V_BUILTIN_VPRTYBQ, > - RS6000_BTI_V1TI, RS6000_BTI_V1TI, 0, 0 }, > - { P9V_BUILTIN_VEC_VPRTYB, P9V_BUILTIN_VPRTYBQ, > - RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, 0, 0 }, > - { P9V_BUILTIN_VEC_VPRTYB, P9V_BUILTIN_VPRTYBQ, > - RS6000_BTI_INTTI, RS6000_BTI_INTTI, 0, 0 }, > - { P9V_BUILTIN_VEC_VPRTYB, P9V_BUILTIN_VPRTYBQ, > - RS6000_BTI_UINTTI, RS6000_BTI_UINTTI, 0, 0 }, > - > - { P9V_BUILTIN_VEC_VPRTYBW, P9V_BUILTIN_VPRTYBW, > - RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0, 0 }, > - { P9V_BUILTIN_VEC_VPRTYBW, P9V_BUILTIN_VPRTYBW, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0, 0 }, > - > - { P9V_BUILTIN_VEC_VPRTYBD, P9V_BUILTIN_VPRTYBD, > - RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0, 0 }, > - { P9V_BUILTIN_VEC_VPRTYBD, P9V_BUILTIN_VPRTYBD, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0, 0 }, > - > - { P9V_BUILTIN_VEC_VPRTYBQ, P9V_BUILTIN_VPRTYBQ, > - RS6000_BTI_V1TI, RS6000_BTI_V1TI, 0, 0 }, > - { P9V_BUILTIN_VEC_VPRTYBQ, P9V_BUILTIN_VPRTYBQ, > - RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, 0, 0 }, > - { P9V_BUILTIN_VEC_VPRTYBQ, P9V_BUILTIN_VPRTYBQ, > - RS6000_BTI_INTTI, RS6000_BTI_INTTI, 0, 0 }, > - { P9V_BUILTIN_VEC_VPRTYBQ, P9V_BUILTIN_VPRTYBQ, > - RS6000_BTI_UINTTI, RS6000_BTI_UINTTI, 0, 0 }, > - > - { P9V_BUILTIN_VEC_VPARITY_LSBB, P9V_BUILTIN_VPRTYBW, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_V4SI, 0, 0 }, > - { P9V_BUILTIN_VEC_VPARITY_LSBB, P9V_BUILTIN_VPRTYBW, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0, 0 }, > - { P9V_BUILTIN_VEC_VPARITY_LSBB, P9V_BUILTIN_VPRTYBD, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_V2DI, 0, 0 }, > - { P9V_BUILTIN_VEC_VPARITY_LSBB, P9V_BUILTIN_VPRTYBD, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0, 0 }, > - { P9V_BUILTIN_VEC_VPARITY_LSBB, P9V_BUILTIN_VPRTYBQ, > - RS6000_BTI_unsigned_V1TI, RS6000_BTI_V1TI, 0, 0 }, > - { P9V_BUILTIN_VEC_VPARITY_LSBB, P9V_BUILTIN_VPRTYBQ, > - RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, 0, 0 }, > - > - { P9_BUILTIN_CMPRB, P9_BUILTIN_SCALAR_CMPRB, > - RS6000_BTI_INTSI, RS6000_BTI_UINTQI, RS6000_BTI_UINTSI, 0 }, > - { P9_BUILTIN_CMPRB2, P9_BUILTIN_SCALAR_CMPRB2, > - RS6000_BTI_INTSI, RS6000_BTI_UINTQI, RS6000_BTI_UINTSI, 0 }, > - { P9_BUILTIN_CMPEQB, P9_BUILTIN_SCALAR_CMPEQB, > - RS6000_BTI_INTSI, RS6000_BTI_UINTQI, RS6000_BTI_UINTDI, 0 }, > - > - { P8V_BUILTIN_VEC_VPKUDUM, P8V_BUILTIN_VPKUDUM, > - RS6000_BTI_V4SI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, > - { P8V_BUILTIN_VEC_VPKUDUM, P8V_BUILTIN_VPKUDUM, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, > - { P8V_BUILTIN_VEC_VPKUDUM, P8V_BUILTIN_VPKUDUM, > - RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, 0 }, > - > - { P8V_BUILTIN_VEC_VPKSDSS, P8V_BUILTIN_VPKSDSS, > - RS6000_BTI_V4SI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, > - > - { P8V_BUILTIN_VEC_VPKUDUS, P8V_BUILTIN_VPKUDUS, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, > - > - { P8V_BUILTIN_VEC_VPKSDUS, P8V_BUILTIN_VPKSDUS, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, > - > - { P8V_BUILTIN_VEC_VRLD, P8V_BUILTIN_VRLD, > - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, > - { P8V_BUILTIN_VEC_VRLD, P8V_BUILTIN_VRLD, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, > - > - { P8V_BUILTIN_VEC_VSLD, P8V_BUILTIN_VSLD, > - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, > - { P8V_BUILTIN_VEC_VSLD, P8V_BUILTIN_VSLD, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, > - > - { P8V_BUILTIN_VEC_VSRD, P8V_BUILTIN_VSRD, > - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, > - { P8V_BUILTIN_VEC_VSRD, P8V_BUILTIN_VSRD, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, > - > - { P8V_BUILTIN_VEC_VSRAD, P8V_BUILTIN_VSRAD, > - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, > - { P8V_BUILTIN_VEC_VSRAD, P8V_BUILTIN_VSRAD, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, > - > - { P8V_BUILTIN_VEC_VSUBCUQ, P8V_BUILTIN_VSUBCUQ, > - RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, 0 }, > - { P8V_BUILTIN_VEC_VSUBCUQ, P8V_BUILTIN_VSUBCUQ, > - RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, > - RS6000_BTI_unsigned_V1TI, 0 }, > - > - { P8V_BUILTIN_VEC_VSUBUDM, P8V_BUILTIN_VSUBUDM, > - RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, 0 }, > - { P8V_BUILTIN_VEC_VSUBUDM, P8V_BUILTIN_VSUBUDM, > - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, 0 }, > - { P8V_BUILTIN_VEC_VSUBUDM, P8V_BUILTIN_VSUBUDM, > - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, > - { P8V_BUILTIN_VEC_VSUBUDM, P8V_BUILTIN_VSUBUDM, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, > - { P8V_BUILTIN_VEC_VSUBUDM, P8V_BUILTIN_VSUBUDM, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, 0 }, > - { P8V_BUILTIN_VEC_VSUBUDM, P8V_BUILTIN_VSUBUDM, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, > - > - { P8V_BUILTIN_VEC_VSUBUQM, P8V_BUILTIN_VSUBUQM, > - RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, 0 }, > - { P8V_BUILTIN_VEC_VSUBUQM, P8V_BUILTIN_VSUBUQM, > - RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, > - RS6000_BTI_unsigned_V1TI, 0 }, > - > - { P6_OV_BUILTIN_CMPB, P6_BUILTIN_CMPB_32, > - RS6000_BTI_UINTSI, RS6000_BTI_UINTSI, RS6000_BTI_UINTSI, 0 }, > - { P6_OV_BUILTIN_CMPB, P6_BUILTIN_CMPB, > - RS6000_BTI_UINTDI, RS6000_BTI_UINTDI, RS6000_BTI_UINTDI, 0 }, > - > - { P8V_BUILTIN_VEC_VUPKHSW, P8V_BUILTIN_VUPKHSW, > - RS6000_BTI_V2DI, RS6000_BTI_V4SI, 0, 0 }, > - { P8V_BUILTIN_VEC_VUPKHSW, P8V_BUILTIN_VUPKHSW, > - RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V4SI, 0, 0 }, > - > - { P8V_BUILTIN_VEC_VUPKLSW, P8V_BUILTIN_VUPKLSW, > - RS6000_BTI_V2DI, RS6000_BTI_V4SI, 0, 0 }, > - { P8V_BUILTIN_VEC_VUPKLSW, P8V_BUILTIN_VUPKLSW, > - RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V4SI, 0, 0 }, > - > - { P9V_BUILTIN_VEC_VSLV, P9V_BUILTIN_VSLV, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, > - RS6000_BTI_unsigned_V16QI, 0 }, > - { P9V_BUILTIN_VEC_VSRV, P9V_BUILTIN_VSRV, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, > - RS6000_BTI_unsigned_V16QI, 0 }, > - > - { P8V_BUILTIN_VEC_REVB, P8V_BUILTIN_REVB_V1TI, > - RS6000_BTI_V1TI, RS6000_BTI_V1TI, 0, 0 }, > - { P8V_BUILTIN_VEC_REVB, P8V_BUILTIN_REVB_V1TI, > - RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, 0, 0 }, > - { P8V_BUILTIN_VEC_REVB, P8V_BUILTIN_REVB_V2DI, > - RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, 0, 0 }, > - { P8V_BUILTIN_VEC_REVB, P8V_BUILTIN_REVB_V2DI, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0, 0 }, > - { P8V_BUILTIN_VEC_REVB, P8V_BUILTIN_REVB_V2DI, > - RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0, 0 }, > - { P8V_BUILTIN_VEC_REVB, P8V_BUILTIN_REVB_V4SI, > - RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, 0, 0 }, > - { P8V_BUILTIN_VEC_REVB, P8V_BUILTIN_REVB_V4SI, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0, 0 }, > - { P8V_BUILTIN_VEC_REVB, P8V_BUILTIN_REVB_V4SI, > - RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0, 0 }, > - { P8V_BUILTIN_VEC_REVB, P8V_BUILTIN_REVB_V8HI, > - RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, 0, 0 }, > - { P8V_BUILTIN_VEC_REVB, P8V_BUILTIN_REVB_V8HI, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0, 0 }, > - { P8V_BUILTIN_VEC_REVB, P8V_BUILTIN_REVB_V8HI, > - RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0, 0 }, > - { P8V_BUILTIN_VEC_REVB, P8V_BUILTIN_REVB_V16QI, > - RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, 0, 0 }, > - { P8V_BUILTIN_VEC_REVB, P8V_BUILTIN_REVB_V16QI, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0, 0 }, > - { P8V_BUILTIN_VEC_REVB, P8V_BUILTIN_REVB_V16QI, > - RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0, 0 }, > - { P8V_BUILTIN_VEC_REVB, P8V_BUILTIN_REVB_V2DF, > - RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0, 0 }, > - { P8V_BUILTIN_VEC_REVB, P8V_BUILTIN_REVB_V4SF, > - RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0, 0 }, > - > - { ALTIVEC_BUILTIN_VEC_VREVE, ALTIVEC_BUILTIN_VREVE_V2DI, > - RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0, 0 }, > - { ALTIVEC_BUILTIN_VEC_VREVE, ALTIVEC_BUILTIN_VREVE_V4SI, > - RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0, 0 }, > - { ALTIVEC_BUILTIN_VEC_VREVE, ALTIVEC_BUILTIN_VREVE_V8HI, > - RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0, 0 }, > - { ALTIVEC_BUILTIN_VEC_VREVE, ALTIVEC_BUILTIN_VREVE_V16QI, > - RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0, 0 }, > - { ALTIVEC_BUILTIN_VEC_VREVE, ALTIVEC_BUILTIN_VREVE_V2DI, > - RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, 0, 0 }, > - { ALTIVEC_BUILTIN_VEC_VREVE, ALTIVEC_BUILTIN_VREVE_V4SI, > - RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, 0, 0 }, > - { ALTIVEC_BUILTIN_VEC_VREVE, ALTIVEC_BUILTIN_VREVE_V8HI, > - RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, 0, 0 }, > - { ALTIVEC_BUILTIN_VEC_VREVE, ALTIVEC_BUILTIN_VREVE_V16QI, > - RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, 0, 0 }, > - { ALTIVEC_BUILTIN_VEC_VREVE, ALTIVEC_BUILTIN_VREVE_V2DF, > - RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0, 0 }, > - { ALTIVEC_BUILTIN_VEC_VREVE, ALTIVEC_BUILTIN_VREVE_V4SF, > - RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0, 0 }, > - { ALTIVEC_BUILTIN_VEC_VREVE, ALTIVEC_BUILTIN_VREVE_V2DI, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0, 0 }, > - { ALTIVEC_BUILTIN_VEC_VREVE, ALTIVEC_BUILTIN_VREVE_V4SI, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0, 0 }, > - { ALTIVEC_BUILTIN_VEC_VREVE, ALTIVEC_BUILTIN_VREVE_V8HI, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0, 0 }, > - { ALTIVEC_BUILTIN_VEC_VREVE, ALTIVEC_BUILTIN_VREVE_V16QI, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0, 0 }, > - > - { VSX_BUILTIN_VEC_VSIGNED, VSX_BUILTIN_VEC_VSIGNED_V4SF, > - RS6000_BTI_V4SI, RS6000_BTI_V4SF, 0, 0 }, > - { VSX_BUILTIN_VEC_VSIGNED, VSX_BUILTIN_VEC_VSIGNED_V2DF, > - RS6000_BTI_V2DI, RS6000_BTI_V2DF, 0, 0 }, > - { VSX_BUILTIN_VEC_VSIGNEDE, VSX_BUILTIN_VEC_VSIGNEDE_V2DF, > - RS6000_BTI_V4SI, RS6000_BTI_V2DF, 0, 0 }, > - { VSX_BUILTIN_VEC_VSIGNEDO, VSX_BUILTIN_VEC_VSIGNEDO_V2DF, > - RS6000_BTI_V4SI, RS6000_BTI_V2DF, 0, 0 }, > - { P8V_BUILTIN_VEC_VSIGNED2, P8V_BUILTIN_VEC_VSIGNED2_V2DF, > - RS6000_BTI_V4SI, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 }, > - > - { VSX_BUILTIN_VEC_VUNSIGNED, VSX_BUILTIN_VEC_VUNSIGNED_V4SF, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_V4SF, 0, 0 }, > - { VSX_BUILTIN_VEC_VUNSIGNED, VSX_BUILTIN_VEC_VUNSIGNED_V2DF, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_V2DF, 0, 0 }, > - { VSX_BUILTIN_VEC_VUNSIGNEDE, VSX_BUILTIN_VEC_VUNSIGNEDE_V2DF, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_V2DF, 0, 0 }, > - { VSX_BUILTIN_VEC_VUNSIGNEDO, VSX_BUILTIN_VEC_VUNSIGNEDO_V2DF, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_V2DF, 0, 0 }, > - { P8V_BUILTIN_VEC_VUNSIGNED2, P8V_BUILTIN_VEC_VUNSIGNED2_V2DF, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_V2DF, > - RS6000_BTI_V2DF, 0 }, > - > - /* Crypto builtins. */ > - { CRYPTO_BUILTIN_VPERMXOR, CRYPTO_BUILTIN_VPERMXOR_V16QI, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI }, > - { CRYPTO_BUILTIN_VPERMXOR, CRYPTO_BUILTIN_VPERMXOR_V8HI, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI }, > - { CRYPTO_BUILTIN_VPERMXOR, CRYPTO_BUILTIN_VPERMXOR_V4SI, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI }, > - { CRYPTO_BUILTIN_VPERMXOR, CRYPTO_BUILTIN_VPERMXOR_V2DI, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI }, > - > - { CRYPTO_BUILTIN_VPMSUM, CRYPTO_BUILTIN_VPMSUMB, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, > - RS6000_BTI_unsigned_V16QI, 0 }, > - { CRYPTO_BUILTIN_VPMSUM, CRYPTO_BUILTIN_VPMSUMH, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, > - RS6000_BTI_unsigned_V8HI, 0 }, > - { CRYPTO_BUILTIN_VPMSUM, CRYPTO_BUILTIN_VPMSUMW, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, > - RS6000_BTI_unsigned_V4SI, 0 }, > - { CRYPTO_BUILTIN_VPMSUM, CRYPTO_BUILTIN_VPMSUMD, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, > - RS6000_BTI_unsigned_V2DI, 0 }, > - > - { CRYPTO_BUILTIN_VSHASIGMA, CRYPTO_BUILTIN_VSHASIGMAW, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, > - RS6000_BTI_INTSI, RS6000_BTI_INTSI }, > - { CRYPTO_BUILTIN_VSHASIGMA, CRYPTO_BUILTIN_VSHASIGMAD, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, > - RS6000_BTI_INTSI, RS6000_BTI_INTSI }, > - > - /* Sign extend builtins that work work on ISA 3.0, not added until ISA 3.1 */ > - { P9V_BUILTIN_VEC_VSIGNEXTI, P9V_BUILTIN_VSIGNEXTSB2W, > - RS6000_BTI_V4SI, RS6000_BTI_V16QI, 0, 0 }, > - { P9V_BUILTIN_VEC_VSIGNEXTI, P9V_BUILTIN_VSIGNEXTSH2W, > - RS6000_BTI_V4SI, RS6000_BTI_V8HI, 0, 0 }, > - > - { P9V_BUILTIN_VEC_VSIGNEXTLL, P9V_BUILTIN_VSIGNEXTSB2D, > - RS6000_BTI_V2DI, RS6000_BTI_V16QI, 0, 0 }, > - { P9V_BUILTIN_VEC_VSIGNEXTLL, P9V_BUILTIN_VSIGNEXTSH2D, > - RS6000_BTI_V2DI, RS6000_BTI_V8HI, 0, 0 }, > - { P9V_BUILTIN_VEC_VSIGNEXTLL, P9V_BUILTIN_VSIGNEXTSW2D, > - RS6000_BTI_V2DI, RS6000_BTI_V4SI, 0, 0 }, > - > - /* Overloaded built-in functions for ISA3.1 (power10). */ > - { P10_BUILTIN_VEC_CLRL, P10V_BUILTIN_VCLRLB, > - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_UINTSI, 0 }, > - { P10_BUILTIN_VEC_CLRL, P10V_BUILTIN_VCLRLB, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, > - RS6000_BTI_UINTSI, 0 }, > - { P10_BUILTIN_VEC_CLRR, P10V_BUILTIN_VCLRRB, > - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_UINTSI, 0 }, > - { P10_BUILTIN_VEC_CLRR, P10V_BUILTIN_VCLRRB, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, > - RS6000_BTI_UINTSI, 0 }, > - > - { P10_BUILTIN_VEC_GNB, P10V_BUILTIN_VGNB, RS6000_BTI_unsigned_long_long, > - RS6000_BTI_unsigned_V1TI, RS6000_BTI_UINTQI, 0 }, > - { P10_BUILTIN_VEC_XXGENPCVM, P10V_BUILTIN_XXGENPCVM_V2DI, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_INTSI, 0 }, > - { P10_BUILTIN_VEC_XXGENPCVM, P10V_BUILTIN_XXGENPCVM_V4SI, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, 0 }, > - { P10_BUILTIN_VEC_XXGENPCVM, P10V_BUILTIN_XXGENPCVM_V8HI, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, 0 }, > - { P10_BUILTIN_VEC_XXGENPCVM, P10V_BUILTIN_XXGENPCVM_V16QI, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, > - RS6000_BTI_INTSI, 0 }, > - > - /* The overloaded XXEVAL definitions are handled specially because the > - fourth unsigned char operand is not encoded in this table. */ > - { P10_BUILTIN_VEC_XXEVAL, P10V_BUILTIN_XXEVAL, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI }, > - { P10_BUILTIN_VEC_XXEVAL, P10V_BUILTIN_XXEVAL, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI }, > - { P10_BUILTIN_VEC_XXEVAL, P10V_BUILTIN_XXEVAL, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI }, > - { P10_BUILTIN_VEC_XXEVAL, P10V_BUILTIN_XXEVAL, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI }, > - { P10_BUILTIN_VEC_XXEVAL, P10V_BUILTIN_XXEVAL, > - RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, > - RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI }, > - > - /* The overloaded XXPERMX definitions are handled specially because the > - fourth unsigned char operand is not encoded in this table. */ > - { P10_BUILTIN_VEC_XXPERMX, P10V_BUILTIN_VXXPERMX, > - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, > - RS6000_BTI_unsigned_V16QI }, > - { P10_BUILTIN_VEC_XXPERMX, P10V_BUILTIN_VXXPERMX, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI }, > - { P10_BUILTIN_VEC_XXPERMX, P10V_BUILTIN_VXXPERMX, > - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, > - RS6000_BTI_unsigned_V16QI }, > - { P10_BUILTIN_VEC_XXPERMX, P10V_BUILTIN_VXXPERMX, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V16QI }, > - { P10_BUILTIN_VEC_XXPERMX, P10V_BUILTIN_VXXPERMX, > - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, > - RS6000_BTI_unsigned_V16QI }, > - { P10_BUILTIN_VEC_XXPERMX, P10V_BUILTIN_VXXPERMX, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V16QI }, > - { P10_BUILTIN_VEC_XXPERMX, P10V_BUILTIN_VXXPERMX, > - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, > - RS6000_BTI_unsigned_V16QI }, > - { P10_BUILTIN_VEC_XXPERMX, P10V_BUILTIN_VXXPERMX, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V16QI }, > - { P10_BUILTIN_VEC_XXPERMX, P10V_BUILTIN_VXXPERMX, > - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, > - RS6000_BTI_unsigned_V16QI }, > - { P10_BUILTIN_VEC_XXPERMX, P10V_BUILTIN_VXXPERMX, > - RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, > - RS6000_BTI_unsigned_V16QI }, > - > - { P10_BUILTIN_VEC_EXTRACTL, P10V_BUILTIN_VEXTRACTBL, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V16QI, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_UINTQI }, > - { P10_BUILTIN_VEC_EXTRACTL, P10V_BUILTIN_VEXTRACTHL, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V8HI, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_UINTQI }, > - { P10_BUILTIN_VEC_EXTRACTL, P10V_BUILTIN_VEXTRACTWL, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V4SI, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_UINTQI }, > - { P10_BUILTIN_VEC_EXTRACTL, P10V_BUILTIN_VEXTRACTDL, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_UINTQI }, > - > - { P10_BUILTIN_VEC_INSERTL, P10V_BUILTIN_VINSERTGPRBL, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_UINTQI, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_UINTSI }, > - { P10_BUILTIN_VEC_INSERTL, P10V_BUILTIN_VINSERTGPRHL, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_UINTHI, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_UINTSI }, > - { P10_BUILTIN_VEC_INSERTL, P10V_BUILTIN_VINSERTGPRWL, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_UINTSI, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_UINTSI }, > - { P10_BUILTIN_VEC_INSERTL, P10V_BUILTIN_VINSERTGPRDL, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_UINTDI, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_UINTSI }, > - { P10_BUILTIN_VEC_INSERTL, P10V_BUILTIN_VINSERTVPRBL, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_UINTQI }, > - { P10_BUILTIN_VEC_INSERTL, P10V_BUILTIN_VINSERTVPRHL, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_UINTQI }, > - { P10_BUILTIN_VEC_INSERTL, P10V_BUILTIN_VINSERTVPRWL, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_UINTQI }, > - > - { P10_BUILTIN_VEC_EXTRACTH, P10V_BUILTIN_VEXTRACTBR, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V16QI, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_UINTQI }, > - { P10_BUILTIN_VEC_EXTRACTH, P10V_BUILTIN_VEXTRACTHR, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V8HI, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_UINTQI }, > - { P10_BUILTIN_VEC_EXTRACTH, P10V_BUILTIN_VEXTRACTWR, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V4SI, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_UINTQI }, > - { P10_BUILTIN_VEC_EXTRACTH, P10V_BUILTIN_VEXTRACTDR, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_UINTQI }, > - > - { P10_BUILTIN_VEC_INSERTH, P10V_BUILTIN_VINSERTGPRBR, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_UINTQI, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_UINTSI }, > - { P10_BUILTIN_VEC_INSERTH, P10V_BUILTIN_VINSERTGPRHR, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_UINTHI, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_UINTSI }, > - { P10_BUILTIN_VEC_INSERTH, P10V_BUILTIN_VINSERTGPRWR, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_UINTSI, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_UINTSI }, > - { P10_BUILTIN_VEC_INSERTH, P10V_BUILTIN_VINSERTGPRDR, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_UINTDI, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_UINTSI }, > - { P10_BUILTIN_VEC_INSERTH, P10V_BUILTIN_VINSERTVPRBR, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_UINTQI }, > - { P10_BUILTIN_VEC_INSERTH, P10V_BUILTIN_VINSERTVPRHR, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_UINTQI }, > - { P10_BUILTIN_VEC_INSERTH, P10V_BUILTIN_VINSERTVPRWR, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_UINTQI }, > - > - { P10_BUILTIN_VEC_REPLACE_ELT, P10V_BUILTIN_VREPLACE_ELT_UV4SI, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, > - RS6000_BTI_UINTSI, RS6000_BTI_UINTQI }, > - { P10_BUILTIN_VEC_REPLACE_ELT, P10V_BUILTIN_VREPLACE_ELT_V4SI, > - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_INTSI, RS6000_BTI_INTQI }, > - { P10_BUILTIN_VEC_REPLACE_ELT, P10V_BUILTIN_VREPLACE_ELT_V4SF, > - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_float, RS6000_BTI_INTQI }, > - { P10_BUILTIN_VEC_REPLACE_ELT, P10V_BUILTIN_VREPLACE_ELT_UV2DI, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, > - RS6000_BTI_UINTDI, RS6000_BTI_UINTQI }, > - { P10_BUILTIN_VEC_REPLACE_ELT, P10V_BUILTIN_VREPLACE_ELT_V2DI, > - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_INTDI, RS6000_BTI_INTQI }, > - { P10_BUILTIN_VEC_REPLACE_ELT, P10V_BUILTIN_VREPLACE_ELT_V2DF, > - RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_double, RS6000_BTI_INTQI }, > - > - { P10_BUILTIN_VEC_REPLACE_UN, P10V_BUILTIN_VREPLACE_UN_UV4SI, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, > - RS6000_BTI_UINTSI, RS6000_BTI_UINTQI }, > - { P10_BUILTIN_VEC_REPLACE_UN, P10V_BUILTIN_VREPLACE_UN_V4SI, > - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_INTSI, RS6000_BTI_INTQI }, > - { P10_BUILTIN_VEC_REPLACE_UN, P10V_BUILTIN_VREPLACE_UN_V4SF, > - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_float, RS6000_BTI_INTQI }, > - { P10_BUILTIN_VEC_REPLACE_UN, P10V_BUILTIN_VREPLACE_UN_UV2DI, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, > - RS6000_BTI_UINTDI, RS6000_BTI_UINTQI }, > - { P10_BUILTIN_VEC_REPLACE_UN, P10V_BUILTIN_VREPLACE_UN_V2DI, > - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_INTDI, RS6000_BTI_INTQI }, > - { P10_BUILTIN_VEC_REPLACE_UN, P10V_BUILTIN_VREPLACE_UN_V2DF, > - RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_double, RS6000_BTI_INTQI }, > - > - { P10_BUILTIN_VEC_SLDB, P10V_BUILTIN_VSLDB_V16QI, > - RS6000_BTI_V16QI, RS6000_BTI_V16QI, > - RS6000_BTI_V16QI, RS6000_BTI_UINTQI }, > - { P10_BUILTIN_VEC_SLDB, P10V_BUILTIN_VSLDB_V16QI, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_UINTQI }, > - { P10_BUILTIN_VEC_SLDB, P10V_BUILTIN_VSLDB_V8HI, > - RS6000_BTI_V8HI, RS6000_BTI_V8HI, > - RS6000_BTI_V8HI, RS6000_BTI_UINTQI }, > - { P10_BUILTIN_VEC_SLDB, P10V_BUILTIN_VSLDB_V8HI, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_UINTQI }, > - { P10_BUILTIN_VEC_SLDB, P10V_BUILTIN_VSLDB_V4SI, > - RS6000_BTI_V4SI, RS6000_BTI_V4SI, > - RS6000_BTI_V4SI, RS6000_BTI_UINTQI }, > - { P10_BUILTIN_VEC_SLDB, P10V_BUILTIN_VSLDB_V4SI, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_UINTQI }, > - { P10_BUILTIN_VEC_SLDB, P10V_BUILTIN_VSLDB_V2DI, > - RS6000_BTI_V2DI, RS6000_BTI_V2DI, > - RS6000_BTI_V2DI, RS6000_BTI_UINTQI }, > - { P10_BUILTIN_VEC_SLDB, P10V_BUILTIN_VSLDB_V2DI, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_UINTQI }, > - > - { P10_BUILTIN_VEC_XXSPLTIW, P10V_BUILTIN_VXXSPLTIW_V4SI, > - RS6000_BTI_V4SI, RS6000_BTI_INTSI, 0, 0 }, > - { P10_BUILTIN_VEC_XXSPLTIW, P10V_BUILTIN_VXXSPLTIW_V4SF, > - RS6000_BTI_V4SF, RS6000_BTI_float, 0, 0 }, > - > - { P10_BUILTIN_VEC_XXSPLTID, P10V_BUILTIN_VXXSPLTID, > - RS6000_BTI_V2DF, RS6000_BTI_float, 0, 0 }, > - > - { P10_BUILTIN_VEC_XXSPLTI32DX, P10V_BUILTIN_VXXSPLTI32DX_V4SI, > - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_UINTQI, RS6000_BTI_INTSI }, > - { P10_BUILTIN_VEC_XXSPLTI32DX, P10V_BUILTIN_VXXSPLTI32DX_V4SI, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_UINTQI, > - RS6000_BTI_UINTSI }, > - { P10_BUILTIN_VEC_XXSPLTI32DX, P10V_BUILTIN_VXXSPLTI32DX_V4SF, > - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_UINTQI, RS6000_BTI_float }, > - > - { P10_BUILTIN_VEC_XXBLEND, P10V_BUILTIN_VXXBLEND_V16QI, > - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, > - RS6000_BTI_unsigned_V16QI }, > - { P10_BUILTIN_VEC_XXBLEND, P10V_BUILTIN_VXXBLEND_V16QI, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI }, > - { P10_BUILTIN_VEC_XXBLEND, P10V_BUILTIN_VXXBLEND_V8HI, > - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, > - RS6000_BTI_unsigned_V8HI }, > - { P10_BUILTIN_VEC_XXBLEND, P10V_BUILTIN_VXXBLEND_V8HI, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI }, > - { P10_BUILTIN_VEC_XXBLEND, P10V_BUILTIN_VXXBLEND_V4SI, > - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, > - RS6000_BTI_unsigned_V4SI }, > - { P10_BUILTIN_VEC_XXBLEND, P10V_BUILTIN_VXXBLEND_V4SI, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI }, > - { P10_BUILTIN_VEC_XXBLEND, P10V_BUILTIN_VXXBLEND_V2DI, > - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, > - RS6000_BTI_unsigned_V2DI }, > - { P10_BUILTIN_VEC_XXBLEND, P10V_BUILTIN_VXXBLEND_V2DI, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI }, > - { P10_BUILTIN_VEC_XXBLEND, P10V_BUILTIN_VXXBLEND_V4SF, > - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, > - RS6000_BTI_unsigned_V4SI }, > - { P10_BUILTIN_VEC_XXBLEND, P10V_BUILTIN_VXXBLEND_V2DF, > - RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, > - RS6000_BTI_unsigned_V2DI }, > - > - { P10_BUILTIN_VEC_SRDB, P10V_BUILTIN_VSRDB_V16QI, > - RS6000_BTI_V16QI, RS6000_BTI_V16QI, > - RS6000_BTI_V16QI, RS6000_BTI_UINTQI }, > - { P10_BUILTIN_VEC_SRDB, P10V_BUILTIN_VSRDB_V16QI, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_UINTQI }, > - { P10_BUILTIN_VEC_SRDB, P10V_BUILTIN_VSRDB_V8HI, > - RS6000_BTI_V8HI, RS6000_BTI_V8HI, > - RS6000_BTI_V8HI, RS6000_BTI_UINTQI }, > - { P10_BUILTIN_VEC_SRDB, P10V_BUILTIN_VSRDB_V8HI, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_UINTQI }, > - { P10_BUILTIN_VEC_SRDB, P10V_BUILTIN_VSRDB_V4SI, > - RS6000_BTI_V4SI, RS6000_BTI_V4SI, > - RS6000_BTI_V4SI, RS6000_BTI_UINTQI }, > - { P10_BUILTIN_VEC_SRDB, P10V_BUILTIN_VSRDB_V4SI, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_UINTQI }, > - { P10_BUILTIN_VEC_SRDB, P10V_BUILTIN_VSRDB_V2DI, > - RS6000_BTI_V2DI, RS6000_BTI_V2DI, > - RS6000_BTI_V2DI, RS6000_BTI_UINTQI }, > - { P10_BUILTIN_VEC_SRDB, P10V_BUILTIN_VSRDB_V2DI, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_UINTQI }, > - > - { P10_BUILTIN_VEC_VSTRIL, P10V_BUILTIN_VSTRIBL, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0, 0 }, > - { P10_BUILTIN_VEC_VSTRIL, P10V_BUILTIN_VSTRIBL, > - RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0, 0 }, > - > - { P10_BUILTIN_VEC_VSTRIL, P10V_BUILTIN_VSTRIHL, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0, 0 }, > - { P10_BUILTIN_VEC_VSTRIL, P10V_BUILTIN_VSTRIHL, > - RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0, 0 }, > - > - { P10_BUILTIN_VEC_VSTRIL_P, P10V_BUILTIN_VSTRIBL_P, > - RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI, 0, 0 }, > - { P10_BUILTIN_VEC_VSTRIL_P, P10V_BUILTIN_VSTRIBL_P, > - RS6000_BTI_INTSI, RS6000_BTI_V16QI, 0, 0 }, > - > - { P10_BUILTIN_VEC_VSTRIL_P, P10V_BUILTIN_VSTRIHL_P, > - RS6000_BTI_INTSI, RS6000_BTI_unsigned_V8HI, 0, 0 }, > - { P10_BUILTIN_VEC_VSTRIL_P, P10V_BUILTIN_VSTRIHL_P, > - RS6000_BTI_INTSI, RS6000_BTI_V8HI, 0, 0 }, > - > - { P10_BUILTIN_VEC_VSTRIR, P10V_BUILTIN_VSTRIBR, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0, 0 }, > - { P10_BUILTIN_VEC_VSTRIR, P10V_BUILTIN_VSTRIBR, > - RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0, 0 }, > - > - { P10_BUILTIN_VEC_VSTRIR, P10V_BUILTIN_VSTRIHR, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0, 0 }, > - { P10_BUILTIN_VEC_VSTRIR, P10V_BUILTIN_VSTRIHR, > - RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0, 0 }, > - > - { P10_BUILTIN_VEC_VSTRIR_P, P10V_BUILTIN_VSTRIBR_P, > - RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI, 0, 0 }, > - { P10_BUILTIN_VEC_VSTRIR_P, P10V_BUILTIN_VSTRIBR_P, > - RS6000_BTI_INTSI, RS6000_BTI_V16QI, 0, 0 }, > - > - { P10_BUILTIN_VEC_VSTRIR_P, P10V_BUILTIN_VSTRIHR_P, > - RS6000_BTI_INTSI, RS6000_BTI_unsigned_V8HI, 0, 0 }, > - { P10_BUILTIN_VEC_VSTRIR_P, P10V_BUILTIN_VSTRIHR_P, > - RS6000_BTI_INTSI, RS6000_BTI_V8HI, 0, 0 }, > - > - { P10_BUILTIN_VEC_MTVSRBM, P10V_BUILTIN_MTVSRBM, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_UINTDI, 0, 0 }, > - { P10_BUILTIN_VEC_MTVSRHM, P10V_BUILTIN_MTVSRHM, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_UINTDI, 0, 0 }, > - { P10_BUILTIN_VEC_MTVSRWM, P10V_BUILTIN_MTVSRWM, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_UINTDI, 0, 0 }, > - { P10_BUILTIN_VEC_MTVSRDM, P10V_BUILTIN_MTVSRDM, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_UINTDI, 0, 0 }, > - { P10_BUILTIN_VEC_MTVSRQM, P10V_BUILTIN_MTVSRQM, > - RS6000_BTI_unsigned_V1TI, RS6000_BTI_UINTDI, 0, 0 }, > - > - { P10_BUILTIN_VEC_VCNTM, P10V_BUILTIN_VCNTMBB, > - RS6000_BTI_unsigned_long_long, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_UINTQI, 0 }, > - { P10_BUILTIN_VEC_VCNTM, P10V_BUILTIN_VCNTMBH, > - RS6000_BTI_unsigned_long_long, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_UINTQI, 0 }, > - { P10_BUILTIN_VEC_VCNTM, P10V_BUILTIN_VCNTMBW, > - RS6000_BTI_unsigned_long_long, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_UINTQI, 0 }, > - { P10_BUILTIN_VEC_VCNTM, P10V_BUILTIN_VCNTMBD, > - RS6000_BTI_unsigned_long_long, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_UINTQI, 0 }, > - > - { P10_BUILTIN_VEC_VEXPANDM, P10V_BUILTIN_VEXPANDMB, > - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0, 0 }, > - { P10_BUILTIN_VEC_VEXPANDM, P10V_BUILTIN_VEXPANDMH, > - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0, 0 }, > - { P10_BUILTIN_VEC_VEXPANDM, P10V_BUILTIN_VEXPANDMW, > - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0, 0 }, > - { P10_BUILTIN_VEC_VEXPANDM, P10V_BUILTIN_VEXPANDMD, > - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0, 0 }, > - { P10_BUILTIN_VEC_VEXPANDM, P10V_BUILTIN_VEXPANDMQ, > - RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, 0, 0 }, > - > - { P10_BUILTIN_VEC_VEXTRACTM, P10V_BUILTIN_VEXTRACTMB, > - RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI, 0, 0 }, > - { P10_BUILTIN_VEC_VEXTRACTM, P10V_BUILTIN_VEXTRACTMH, > - RS6000_BTI_INTSI, RS6000_BTI_unsigned_V8HI, 0, 0 }, > - { P10_BUILTIN_VEC_VEXTRACTM, P10V_BUILTIN_VEXTRACTMW, > - RS6000_BTI_INTSI, RS6000_BTI_unsigned_V4SI, 0, 0 }, > - { P10_BUILTIN_VEC_VEXTRACTM, P10V_BUILTIN_VEXTRACTMD, > - RS6000_BTI_INTSI, RS6000_BTI_unsigned_V2DI, 0, 0 }, > - { P10_BUILTIN_VEC_VEXTRACTM, P10V_BUILTIN_VEXTRACTMQ, > - RS6000_BTI_INTSI, RS6000_BTI_unsigned_V1TI, 0, 0 }, > - > - { P10_BUILTIN_VEC_XVTLSBB_ZEROS, P10V_BUILTIN_XVTLSBB_ZEROS, > - RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI, 0, 0 }, > - { P10_BUILTIN_VEC_XVTLSBB_ONES, P10V_BUILTIN_XVTLSBB_ONES, > - RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI, 0, 0 }, > - > - { P10_BUILTIN_VEC_SIGNEXT, P10V_BUILTIN_VSIGNEXTSD2Q, > - RS6000_BTI_V1TI, RS6000_BTI_V2DI, 0, 0 }, > - > - { RS6000_BUILTIN_NONE, RS6000_BUILTIN_NONE, 0, 0, 0, 0 } > -}; > \f > /* Nonzero if we can use a floating-point register to pass this arg. */ > #define USE_FP_FOR_ARG_P(CUM,MODE) \ > diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h > index 3eba1c072cf..b12ee8bfe5b 100644 > --- a/gcc/config/rs6000/rs6000.h > +++ b/gcc/config/rs6000/rs6000.h > @@ -2399,7 +2399,6 @@ struct altivec_builtin_types > signed char op2; > signed char op3; > }; > -extern const struct altivec_builtin_types altivec_overloaded_builtins[]; > > enum rs6000_builtin_type_index > { ^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [PATCH 2/6] rs6000: Remove altivec_overloaded_builtins array and initialization 2021-12-06 20:49 ` [PATCH 2/6] rs6000: Remove altivec_overloaded_builtins array and initialization Bill Schmidt 2021-12-14 17:57 ` [PATCH v2 " Bill Schmidt @ 2021-12-14 18:04 ` David Edelsohn 1 sibling, 0 replies; 20+ messages in thread From: David Edelsohn @ 2021-12-14 18:04 UTC (permalink / raw) To: Bill Schmidt; +Cc: GCC Patches, Segher Boessenkool On Mon, Dec 6, 2021 at 3:49 PM Bill Schmidt <wschmidt@linux.ibm.com> wrote: > > Hi! > > This patch just removes the huge altivec_overloaded_builtins array. > > Bootstrapped and tested on powerpc64le-linux-gnu with no regressions. Is this > okay for trunk? > > Thanks! > Bill > > 2021-12-02 Bill Schmidt <wschmidt@linux.ibm.com> > > gcc/ > * config/rs6000/rs6000-call.c (altivec_overloaded_builtins): Remove. > * config/rs6000/rs6000.h (altivec_overloaded_builtins): Remove. Okay. Thanks, David ^ permalink raw reply [flat|nested] 20+ messages in thread
* [PATCH 3/6] rs6000: Rename rs6000-builtin-new.def to rs6000-builtins.def 2021-12-06 20:49 [PATCH v2 0/6] Remove "old" built-in function infrastructure Bill Schmidt 2021-12-06 20:49 ` [PATCH 1/6] rs6000: Remove new_builtins_are_live and dead code it was guarding Bill Schmidt 2021-12-06 20:49 ` [PATCH 2/6] rs6000: Remove altivec_overloaded_builtins array and initialization Bill Schmidt @ 2021-12-06 20:49 ` Bill Schmidt 2021-12-14 18:00 ` [PATCH v2 " Bill Schmidt 2021-12-14 18:05 ` [PATCH " David Edelsohn 2021-12-06 20:49 ` [PATCH 4/6] rs6000: Remove rs6000-builtin.def and associated data and functions Bill Schmidt ` (3 subsequent siblings) 6 siblings, 2 replies; 20+ messages in thread From: Bill Schmidt @ 2021-12-06 20:49 UTC (permalink / raw) To: gcc-patches; +Cc: segher, dje.gcc Hi! This patch just renames a file and updates the build machinery accordingly. Bootstrapped and tested on powerpc64le-linux-gnu with no regressions. Is this okay for trunk? Thanks! Bill 2021-12-02 Bill Schmidt <wschmidt@linux.ibm.com> gcc/ * config/rs6000/rs6000-builtin-new.def: Rename to... * config/rs6000/rs6000-builtins.def: ...this. * config/rs6000/rs6000-gen-builtins.c: Adjust header commentary. * config/rs6000/t-rs6000 (EXTRA_GTYPE_DEPS): Rename rs6000-builtin-new.def to rs6000-builtins.def. (rs6000-builtins.c): Likewise. --- .../rs6000/{rs6000-builtin-new.def => rs6000-builtins.def} | 0 gcc/config/rs6000/rs6000-gen-builtins.c | 4 ++-- gcc/config/rs6000/t-rs6000 | 6 +++--- 3 files changed, 5 insertions(+), 5 deletions(-) rename gcc/config/rs6000/{rs6000-builtin-new.def => rs6000-builtins.def} (100%) diff --git a/gcc/config/rs6000/rs6000-builtin-new.def b/gcc/config/rs6000/rs6000-builtins.def similarity index 100% rename from gcc/config/rs6000/rs6000-builtin-new.def rename to gcc/config/rs6000/rs6000-builtins.def diff --git a/gcc/config/rs6000/rs6000-gen-builtins.c b/gcc/config/rs6000/rs6000-gen-builtins.c index 78b2486aafc..9c61b7d9fe6 100644 --- a/gcc/config/rs6000/rs6000-gen-builtins.c +++ b/gcc/config/rs6000/rs6000-gen-builtins.c @@ -22,7 +22,7 @@ along with GCC; see the file COPYING3. If not see recognition code for Power targets, based on text files that describe the built-in functions and vector overloads: - rs6000-builtin-new.def Table of built-in functions + rs6000-builtins.def Table of built-in functions rs6000-overload.def Table of overload functions Both files group similar functions together in "stanzas," as @@ -125,7 +125,7 @@ along with GCC; see the file COPYING3. If not see The second line contains the <bif-id> that this particular instance of the overloaded function maps to. It must match a token that appears in - rs6000-builtin-new.def. Optionally, a second token may appear. If only + rs6000-builtins.def. Optionally, a second token may appear. If only one token is on the line, it is also used to build the unique identifier for the overloaded function. If a second token is present, the second token is used instead for this purpose. This is necessary in cases diff --git a/gcc/config/rs6000/t-rs6000 b/gcc/config/rs6000/t-rs6000 index d48a4b1be6c..3d3143a171d 100644 --- a/gcc/config/rs6000/t-rs6000 +++ b/gcc/config/rs6000/t-rs6000 @@ -22,7 +22,7 @@ TM_H += $(srcdir)/config/rs6000/rs6000-builtin.def TM_H += $(srcdir)/config/rs6000/rs6000-cpus.def TM_H += $(srcdir)/config/rs6000/rs6000-modes.h PASSES_EXTRA += $(srcdir)/config/rs6000/rs6000-passes.def -EXTRA_GTYPE_DEPS += $(srcdir)/config/rs6000/rs6000-builtin-new.def +EXTRA_GTYPE_DEPS += $(srcdir)/config/rs6000/rs6000-builtins.def rs6000-pcrel-opt.o: $(srcdir)/config/rs6000/rs6000-pcrel-opt.c $(COMPILE) $< @@ -59,10 +59,10 @@ build/rs6000-gen-builtins$(build_exeext): build/rs6000-gen-builtins.o \ # For now, the header files depend on rs6000-builtins.c, which avoids # races because the .c file is closed last in rs6000-gen-builtins.c. rs6000-builtins.c: build/rs6000-gen-builtins$(build_exeext) \ - $(srcdir)/config/rs6000/rs6000-builtin-new.def \ + $(srcdir)/config/rs6000/rs6000-builtins.def \ $(srcdir)/config/rs6000/rs6000-overload.def $(RUN_GEN) ./build/rs6000-gen-builtins$(build_exeext) \ - $(srcdir)/config/rs6000/rs6000-builtin-new.def \ + $(srcdir)/config/rs6000/rs6000-builtins.def \ $(srcdir)/config/rs6000/rs6000-overload.def rs6000-builtins.h \ rs6000-builtins.c rs6000-vecdefines.h -- 2.27.0 ^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [PATCH v2 3/6] rs6000: Rename rs6000-builtin-new.def to rs6000-builtins.def 2021-12-06 20:49 ` [PATCH 3/6] rs6000: Rename rs6000-builtin-new.def to rs6000-builtins.def Bill Schmidt @ 2021-12-14 18:00 ` Bill Schmidt 2021-12-14 18:05 ` [PATCH " David Edelsohn 1 sibling, 0 replies; 20+ messages in thread From: Bill Schmidt @ 2021-12-14 18:00 UTC (permalink / raw) To: gcc-patches; +Cc: dje.gcc, segher Ping. Thanks! Bill On 12/6/21 2:49 PM, Bill Schmidt via Gcc-patches wrote: > Hi! > > This patch just renames a file and updates the build machinery accordingly. > > Bootstrapped and tested on powerpc64le-linux-gnu with no regressions. Is this > okay for trunk? > > Thanks! > Bill > > 2021-12-02 Bill Schmidt <wschmidt@linux.ibm.com> > > gcc/ > * config/rs6000/rs6000-builtin-new.def: Rename to... > * config/rs6000/rs6000-builtins.def: ...this. > * config/rs6000/rs6000-gen-builtins.c: Adjust header commentary. > * config/rs6000/t-rs6000 (EXTRA_GTYPE_DEPS): Rename > rs6000-builtin-new.def to rs6000-builtins.def. > (rs6000-builtins.c): Likewise. > --- > .../rs6000/{rs6000-builtin-new.def => rs6000-builtins.def} | 0 > gcc/config/rs6000/rs6000-gen-builtins.c | 4 ++-- > gcc/config/rs6000/t-rs6000 | 6 +++--- > 3 files changed, 5 insertions(+), 5 deletions(-) > rename gcc/config/rs6000/{rs6000-builtin-new.def => rs6000-builtins.def} (100%) > > diff --git a/gcc/config/rs6000/rs6000-builtin-new.def b/gcc/config/rs6000/rs6000-builtins.def > similarity index 100% > rename from gcc/config/rs6000/rs6000-builtin-new.def > rename to gcc/config/rs6000/rs6000-builtins.def > diff --git a/gcc/config/rs6000/rs6000-gen-builtins.c b/gcc/config/rs6000/rs6000-gen-builtins.c > index 78b2486aafc..9c61b7d9fe6 100644 > --- a/gcc/config/rs6000/rs6000-gen-builtins.c > +++ b/gcc/config/rs6000/rs6000-gen-builtins.c > @@ -22,7 +22,7 @@ along with GCC; see the file COPYING3. If not see > recognition code for Power targets, based on text files that > describe the built-in functions and vector overloads: > > - rs6000-builtin-new.def Table of built-in functions > + rs6000-builtins.def Table of built-in functions > rs6000-overload.def Table of overload functions > > Both files group similar functions together in "stanzas," as > @@ -125,7 +125,7 @@ along with GCC; see the file COPYING3. If not see > > The second line contains the <bif-id> that this particular instance of > the overloaded function maps to. It must match a token that appears in > - rs6000-builtin-new.def. Optionally, a second token may appear. If only > + rs6000-builtins.def. Optionally, a second token may appear. If only > one token is on the line, it is also used to build the unique identifier > for the overloaded function. If a second token is present, the second > token is used instead for this purpose. This is necessary in cases > diff --git a/gcc/config/rs6000/t-rs6000 b/gcc/config/rs6000/t-rs6000 > index d48a4b1be6c..3d3143a171d 100644 > --- a/gcc/config/rs6000/t-rs6000 > +++ b/gcc/config/rs6000/t-rs6000 > @@ -22,7 +22,7 @@ TM_H += $(srcdir)/config/rs6000/rs6000-builtin.def > TM_H += $(srcdir)/config/rs6000/rs6000-cpus.def > TM_H += $(srcdir)/config/rs6000/rs6000-modes.h > PASSES_EXTRA += $(srcdir)/config/rs6000/rs6000-passes.def > -EXTRA_GTYPE_DEPS += $(srcdir)/config/rs6000/rs6000-builtin-new.def > +EXTRA_GTYPE_DEPS += $(srcdir)/config/rs6000/rs6000-builtins.def > > rs6000-pcrel-opt.o: $(srcdir)/config/rs6000/rs6000-pcrel-opt.c > $(COMPILE) $< > @@ -59,10 +59,10 @@ build/rs6000-gen-builtins$(build_exeext): build/rs6000-gen-builtins.o \ > # For now, the header files depend on rs6000-builtins.c, which avoids > # races because the .c file is closed last in rs6000-gen-builtins.c. > rs6000-builtins.c: build/rs6000-gen-builtins$(build_exeext) \ > - $(srcdir)/config/rs6000/rs6000-builtin-new.def \ > + $(srcdir)/config/rs6000/rs6000-builtins.def \ > $(srcdir)/config/rs6000/rs6000-overload.def > $(RUN_GEN) ./build/rs6000-gen-builtins$(build_exeext) \ > - $(srcdir)/config/rs6000/rs6000-builtin-new.def \ > + $(srcdir)/config/rs6000/rs6000-builtins.def \ > $(srcdir)/config/rs6000/rs6000-overload.def rs6000-builtins.h \ > rs6000-builtins.c rs6000-vecdefines.h > ^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [PATCH 3/6] rs6000: Rename rs6000-builtin-new.def to rs6000-builtins.def 2021-12-06 20:49 ` [PATCH 3/6] rs6000: Rename rs6000-builtin-new.def to rs6000-builtins.def Bill Schmidt 2021-12-14 18:00 ` [PATCH v2 " Bill Schmidt @ 2021-12-14 18:05 ` David Edelsohn 1 sibling, 0 replies; 20+ messages in thread From: David Edelsohn @ 2021-12-14 18:05 UTC (permalink / raw) To: Bill Schmidt; +Cc: GCC Patches, Segher Boessenkool On Mon, Dec 6, 2021 at 3:49 PM Bill Schmidt <wschmidt@linux.ibm.com> wrote: > > Hi! > > This patch just renames a file and updates the build machinery accordingly. > > Bootstrapped and tested on powerpc64le-linux-gnu with no regressions. Is this > okay for trunk? > > Thanks! > Bill > > 2021-12-02 Bill Schmidt <wschmidt@linux.ibm.com> > > gcc/ > * config/rs6000/rs6000-builtin-new.def: Rename to... > * config/rs6000/rs6000-builtins.def: ...this. > * config/rs6000/rs6000-gen-builtins.c: Adjust header commentary. > * config/rs6000/t-rs6000 (EXTRA_GTYPE_DEPS): Rename > rs6000-builtin-new.def to rs6000-builtins.def. > (rs6000-builtins.c): Likewise. Okay. Thanks, David ^ permalink raw reply [flat|nested] 20+ messages in thread
* [PATCH 4/6] rs6000: Remove rs6000-builtin.def and associated data and functions 2021-12-06 20:49 [PATCH v2 0/6] Remove "old" built-in function infrastructure Bill Schmidt ` (2 preceding siblings ...) 2021-12-06 20:49 ` [PATCH 3/6] rs6000: Rename rs6000-builtin-new.def to rs6000-builtins.def Bill Schmidt @ 2021-12-06 20:49 ` Bill Schmidt 2021-12-14 18:00 ` [PATCH v2 " Bill Schmidt 2021-12-14 18:08 ` [PATCH " David Edelsohn 2021-12-06 20:49 ` [PATCH 5/6] rs6000: Rename functions with "new" in their names Bill Schmidt ` (2 subsequent siblings) 6 siblings, 2 replies; 20+ messages in thread From: Bill Schmidt @ 2021-12-06 20:49 UTC (permalink / raw) To: gcc-patches; +Cc: segher, dje.gcc Hi! The old rs6000-builtin.def file is no longer needed. Remove it and the code that depends on it. Bootstrapped and tested on powerpc64le-linux-gnu with no regressions. Is this okay for trunk? Thanks! Bill 2021-12-02 Bill Schmidt <wschmidt@linux.ibm.com> gcc/ * config/rs6000/rs6000-builtin.def: Delete. * config/rs6000/rs6000-call.c (builtin_compatibility): Delete. (builtin_description): Delete. (builtin_hash_struct): Delete. (builtin_hasher): Delete. (builtin_hash_table): Delete. (builtin_hasher::hash): Delete. (builtin_hasher::equal): Delete. (rs6000_builtin_info_type): Delete. (rs6000_builtin_info): Delete. (bdesc_compat): Delete. (bdesc_3arg): Delete. (bdesc_4arg): Delete. (bdesc_dst): Delete. (bdesc_2arg): Delete. (bdesc_altivec_preds): Delete. (bdesc_abs): Delete. (bdesc_1arg): Delete. (bdesc_0arg): Delete. (bdesc_htm): Delete. (bdesc_mma): Delete. (rs6000_overloaded_builtin_p): Delete. (rs6000_overloaded_builtin_name): Delete. (htm_spr_num): Delete. (rs6000_builtin_is_supported_p): Delete. (rs6000_gimple_fold_mma_builtin): Delete. (gt-rs6000-call.h): Remove include directive. * config/rs6000/rs6000-protos.h (rs6000_overloaded_builtin_p): Delete. (rs6000_builtin_is_supported_p): Delete. (rs6000_overloaded_builtin_name): Delete. * config/rs6000/rs6000.c (rs6000_builtin_decls): Delete. (rs6000_debug_reg_global): Remove reference to RS6000_BUILTIN_COUNT. * config/rs6000/rs6000.h (rs6000_builtins): Delete. (altivec_builtin_types): Delete. (rs6000_builtin_decls): Delete. * config/rs6000/t-rs6000 (TM_H): Don't add rs6000-builtin.def. --- gcc/config/rs6000/rs6000-builtin.def | 3350 -------------------------- gcc/config/rs6000/rs6000-call.c | 712 ------ gcc/config/rs6000/rs6000-protos.h | 3 - gcc/config/rs6000/rs6000.c | 3 - gcc/config/rs6000/rs6000.h | 57 - gcc/config/rs6000/t-rs6000 | 1 - 6 files changed, 4126 deletions(-) delete mode 100644 gcc/config/rs6000/rs6000-builtin.def diff --git a/gcc/config/rs6000/rs6000-builtin.def b/gcc/config/rs6000/rs6000-builtin.def deleted file mode 100644 index 9dbf16f48c4..00000000000 diff --git a/gcc/config/rs6000/rs6000-call.c b/gcc/config/rs6000/rs6000-call.c index 86054f75756..a5ee06c991f 100644 --- a/gcc/config/rs6000/rs6000-call.c +++ b/gcc/config/rs6000/rs6000-call.c @@ -89,20 +89,6 @@ #define TARGET_NO_PROTOTYPE 0 #endif -struct builtin_compatibility -{ - const enum rs6000_builtins code; - const char *const name; -}; - -struct builtin_description -{ - const HOST_WIDE_INT mask; - const enum insn_code icode; - const char *const name; - const enum rs6000_builtins code; -}; - /* Used by __builtin_cpu_is(), mapping from PLATFORM names to values. */ static const struct { @@ -184,127 +170,6 @@ static const struct static rtx rs6000_expand_new_builtin (tree, rtx, rtx, machine_mode, int); static bool rs6000_gimple_fold_new_builtin (gimple_stmt_iterator *gsi); - - -/* Hash table to keep track of the argument types for builtin functions. */ - -struct GTY((for_user)) builtin_hash_struct -{ - tree type; - machine_mode mode[4]; /* return value + 3 arguments. */ - unsigned char uns_p[4]; /* and whether the types are unsigned. */ -}; - -struct builtin_hasher : ggc_ptr_hash<builtin_hash_struct> -{ - static hashval_t hash (builtin_hash_struct *); - static bool equal (builtin_hash_struct *, builtin_hash_struct *); -}; - -static GTY (()) hash_table<builtin_hasher> *builtin_hash_table; - -/* Hash function for builtin functions with up to 3 arguments and a return - type. */ -hashval_t -builtin_hasher::hash (builtin_hash_struct *bh) -{ - unsigned ret = 0; - int i; - - for (i = 0; i < 4; i++) - { - ret = (ret * (unsigned)MAX_MACHINE_MODE) + ((unsigned)bh->mode[i]); - ret = (ret * 2) + bh->uns_p[i]; - } - - return ret; -} - -/* Compare builtin hash entries H1 and H2 for equivalence. */ -bool -builtin_hasher::equal (builtin_hash_struct *p1, builtin_hash_struct *p2) -{ - return ((p1->mode[0] == p2->mode[0]) - && (p1->mode[1] == p2->mode[1]) - && (p1->mode[2] == p2->mode[2]) - && (p1->mode[3] == p2->mode[3]) - && (p1->uns_p[0] == p2->uns_p[0]) - && (p1->uns_p[1] == p2->uns_p[1]) - && (p1->uns_p[2] == p2->uns_p[2]) - && (p1->uns_p[3] == p2->uns_p[3])); -} - -\f -/* Table that classifies rs6000 builtin functions (pure, const, etc.). */ -#undef RS6000_BUILTIN_0 -#undef RS6000_BUILTIN_1 -#undef RS6000_BUILTIN_2 -#undef RS6000_BUILTIN_3 -#undef RS6000_BUILTIN_4 -#undef RS6000_BUILTIN_A -#undef RS6000_BUILTIN_D -#undef RS6000_BUILTIN_H -#undef RS6000_BUILTIN_M -#undef RS6000_BUILTIN_P -#undef RS6000_BUILTIN_X - -#define RS6000_BUILTIN_0(ENUM, NAME, MASK, ATTR, ICODE) \ - { NAME, ICODE, MASK, ATTR }, - -#define RS6000_BUILTIN_1(ENUM, NAME, MASK, ATTR, ICODE) \ - { NAME, ICODE, MASK, ATTR }, - -#define RS6000_BUILTIN_2(ENUM, NAME, MASK, ATTR, ICODE) \ - { NAME, ICODE, MASK, ATTR }, - -#define RS6000_BUILTIN_3(ENUM, NAME, MASK, ATTR, ICODE) \ - { NAME, ICODE, MASK, ATTR }, - -#define RS6000_BUILTIN_4(ENUM, NAME, MASK, ATTR, ICODE) \ - { NAME, ICODE, MASK, ATTR }, - -#define RS6000_BUILTIN_A(ENUM, NAME, MASK, ATTR, ICODE) \ - { NAME, ICODE, MASK, ATTR }, - -#define RS6000_BUILTIN_D(ENUM, NAME, MASK, ATTR, ICODE) \ - { NAME, ICODE, MASK, ATTR }, - -#define RS6000_BUILTIN_H(ENUM, NAME, MASK, ATTR, ICODE) \ - { NAME, ICODE, MASK, ATTR }, - -#define RS6000_BUILTIN_M(ENUM, NAME, MASK, ATTR, ICODE) \ - { NAME, ICODE, MASK, ATTR }, - -#define RS6000_BUILTIN_P(ENUM, NAME, MASK, ATTR, ICODE) \ - { NAME, ICODE, MASK, ATTR }, - -#define RS6000_BUILTIN_X(ENUM, NAME, MASK, ATTR, ICODE) \ - { NAME, ICODE, MASK, ATTR }, - -struct rs6000_builtin_info_type { - const char *name; - const enum insn_code icode; - const HOST_WIDE_INT mask; - const unsigned attr; -}; - -static const struct rs6000_builtin_info_type rs6000_builtin_info[] = -{ -#include "rs6000-builtin.def" -}; - -#undef RS6000_BUILTIN_0 -#undef RS6000_BUILTIN_1 -#undef RS6000_BUILTIN_2 -#undef RS6000_BUILTIN_3 -#undef RS6000_BUILTIN_4 -#undef RS6000_BUILTIN_A -#undef RS6000_BUILTIN_D -#undef RS6000_BUILTIN_H -#undef RS6000_BUILTIN_M -#undef RS6000_BUILTIN_P -#undef RS6000_BUILTIN_X - \f /* Nonzero if we can use a floating-point register to pass this arg. */ #define USE_FP_FOR_ARG_P(CUM,MODE) \ @@ -3130,367 +2995,6 @@ const char *rs6000_type_string (tree type_node) return "unknown"; } -static const struct builtin_compatibility bdesc_compat[] = -{ -#define RS6000_BUILTIN_COMPAT -#include "rs6000-builtin.def" -}; -#undef RS6000_BUILTIN_COMPAT - -/* Simple ternary operations: VECd = foo (VECa, VECb, VECc). */ - -#undef RS6000_BUILTIN_0 -#undef RS6000_BUILTIN_1 -#undef RS6000_BUILTIN_2 -#undef RS6000_BUILTIN_3 -#undef RS6000_BUILTIN_4 -#undef RS6000_BUILTIN_A -#undef RS6000_BUILTIN_D -#undef RS6000_BUILTIN_H -#undef RS6000_BUILTIN_M -#undef RS6000_BUILTIN_P -#undef RS6000_BUILTIN_X - -#define RS6000_BUILTIN_0(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_1(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_2(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_3(ENUM, NAME, MASK, ATTR, ICODE) \ - { MASK, ICODE, NAME, ENUM }, - -#define RS6000_BUILTIN_4(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_A(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_D(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_H(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_M(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_P(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_X(ENUM, NAME, MASK, ATTR, ICODE) - -static const struct builtin_description bdesc_3arg[] = -{ -#include "rs6000-builtin.def" -}; - -/* Simple quaternary operations: VECd = foo (VECa, VECb, VECc, VECd). */ - -#undef RS6000_BUILTIN_0 -#undef RS6000_BUILTIN_1 -#undef RS6000_BUILTIN_2 -#undef RS6000_BUILTIN_3 -#undef RS6000_BUILTIN_4 -#undef RS6000_BUILTIN_A -#undef RS6000_BUILTIN_D -#undef RS6000_BUILTIN_H -#undef RS6000_BUILTIN_M -#undef RS6000_BUILTIN_P -#undef RS6000_BUILTIN_X - -#define RS6000_BUILTIN_0(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_1(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_2(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_3(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_4(ENUM, NAME, MASK, ATTR, ICODE) \ - { MASK, ICODE, NAME, ENUM }, - -#define RS6000_BUILTIN_A(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_D(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_H(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_M(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_P(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_X(ENUM, NAME, MASK, ATTR, ICODE) - -static const struct builtin_description bdesc_4arg[] = -{ -#include "rs6000-builtin.def" -}; - -/* DST operations: void foo (void *, const int, const char). */ - -#undef RS6000_BUILTIN_0 -#undef RS6000_BUILTIN_1 -#undef RS6000_BUILTIN_2 -#undef RS6000_BUILTIN_3 -#undef RS6000_BUILTIN_4 -#undef RS6000_BUILTIN_A -#undef RS6000_BUILTIN_D -#undef RS6000_BUILTIN_H -#undef RS6000_BUILTIN_M -#undef RS6000_BUILTIN_P -#undef RS6000_BUILTIN_X - -#define RS6000_BUILTIN_0(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_1(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_2(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_3(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_4(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_A(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_D(ENUM, NAME, MASK, ATTR, ICODE) \ - { MASK, ICODE, NAME, ENUM }, - -#define RS6000_BUILTIN_H(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_M(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_P(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_X(ENUM, NAME, MASK, ATTR, ICODE) - -static const struct builtin_description bdesc_dst[] = -{ -#include "rs6000-builtin.def" -}; - -/* Simple binary operations: VECc = foo (VECa, VECb). */ - -#undef RS6000_BUILTIN_0 -#undef RS6000_BUILTIN_1 -#undef RS6000_BUILTIN_2 -#undef RS6000_BUILTIN_3 -#undef RS6000_BUILTIN_4 -#undef RS6000_BUILTIN_A -#undef RS6000_BUILTIN_D -#undef RS6000_BUILTIN_H -#undef RS6000_BUILTIN_M -#undef RS6000_BUILTIN_P -#undef RS6000_BUILTIN_X - -#define RS6000_BUILTIN_0(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_1(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_2(ENUM, NAME, MASK, ATTR, ICODE) \ - { MASK, ICODE, NAME, ENUM }, - -#define RS6000_BUILTIN_3(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_4(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_A(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_D(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_H(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_M(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_P(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_X(ENUM, NAME, MASK, ATTR, ICODE) - -static const struct builtin_description bdesc_2arg[] = -{ -#include "rs6000-builtin.def" -}; - -#undef RS6000_BUILTIN_0 -#undef RS6000_BUILTIN_1 -#undef RS6000_BUILTIN_2 -#undef RS6000_BUILTIN_3 -#undef RS6000_BUILTIN_4 -#undef RS6000_BUILTIN_A -#undef RS6000_BUILTIN_D -#undef RS6000_BUILTIN_H -#undef RS6000_BUILTIN_M -#undef RS6000_BUILTIN_P -#undef RS6000_BUILTIN_X - -#define RS6000_BUILTIN_0(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_1(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_2(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_3(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_4(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_A(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_D(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_H(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_M(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_P(ENUM, NAME, MASK, ATTR, ICODE) \ - { MASK, ICODE, NAME, ENUM }, - -#define RS6000_BUILTIN_X(ENUM, NAME, MASK, ATTR, ICODE) - -/* AltiVec predicates. */ - -static const struct builtin_description bdesc_altivec_preds[] = -{ -#include "rs6000-builtin.def" -}; - -/* ABS* operations. */ - -#undef RS6000_BUILTIN_0 -#undef RS6000_BUILTIN_1 -#undef RS6000_BUILTIN_2 -#undef RS6000_BUILTIN_3 -#undef RS6000_BUILTIN_4 -#undef RS6000_BUILTIN_A -#undef RS6000_BUILTIN_D -#undef RS6000_BUILTIN_H -#undef RS6000_BUILTIN_M -#undef RS6000_BUILTIN_P -#undef RS6000_BUILTIN_X - -#define RS6000_BUILTIN_0(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_1(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_2(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_3(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_4(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_A(ENUM, NAME, MASK, ATTR, ICODE) \ - { MASK, ICODE, NAME, ENUM }, - -#define RS6000_BUILTIN_D(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_H(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_M(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_P(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_X(ENUM, NAME, MASK, ATTR, ICODE) - -static const struct builtin_description bdesc_abs[] = -{ -#include "rs6000-builtin.def" -}; - -/* Simple unary operations: VECb = foo (unsigned literal) or VECb = - foo (VECa). */ - -#undef RS6000_BUILTIN_0 -#undef RS6000_BUILTIN_1 -#undef RS6000_BUILTIN_2 -#undef RS6000_BUILTIN_3 -#undef RS6000_BUILTIN_4 -#undef RS6000_BUILTIN_A -#undef RS6000_BUILTIN_D -#undef RS6000_BUILTIN_H -#undef RS6000_BUILTIN_M -#undef RS6000_BUILTIN_P -#undef RS6000_BUILTIN_X - -#define RS6000_BUILTIN_0(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_1(ENUM, NAME, MASK, ATTR, ICODE) \ - { MASK, ICODE, NAME, ENUM }, - -#define RS6000_BUILTIN_2(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_3(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_4(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_A(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_D(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_H(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_M(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_P(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_X(ENUM, NAME, MASK, ATTR, ICODE) - -static const struct builtin_description bdesc_1arg[] = -{ -#include "rs6000-builtin.def" -}; - -/* Simple no-argument operations: result = __builtin_darn_32 () */ - -#undef RS6000_BUILTIN_0 -#undef RS6000_BUILTIN_1 -#undef RS6000_BUILTIN_2 -#undef RS6000_BUILTIN_3 -#undef RS6000_BUILTIN_4 -#undef RS6000_BUILTIN_A -#undef RS6000_BUILTIN_D -#undef RS6000_BUILTIN_H -#undef RS6000_BUILTIN_M -#undef RS6000_BUILTIN_P -#undef RS6000_BUILTIN_X - -#define RS6000_BUILTIN_0(ENUM, NAME, MASK, ATTR, ICODE) \ - { MASK, ICODE, NAME, ENUM }, - -#define RS6000_BUILTIN_1(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_2(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_3(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_4(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_A(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_D(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_H(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_M(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_P(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_X(ENUM, NAME, MASK, ATTR, ICODE) - -static const struct builtin_description bdesc_0arg[] = -{ -#include "rs6000-builtin.def" -}; - -/* HTM builtins. */ -#undef RS6000_BUILTIN_0 -#undef RS6000_BUILTIN_1 -#undef RS6000_BUILTIN_2 -#undef RS6000_BUILTIN_3 -#undef RS6000_BUILTIN_4 -#undef RS6000_BUILTIN_A -#undef RS6000_BUILTIN_D -#undef RS6000_BUILTIN_H -#undef RS6000_BUILTIN_M -#undef RS6000_BUILTIN_P -#undef RS6000_BUILTIN_X - -#define RS6000_BUILTIN_0(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_1(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_2(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_3(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_4(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_A(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_D(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_H(ENUM, NAME, MASK, ATTR, ICODE) \ - { MASK, ICODE, NAME, ENUM }, - -#define RS6000_BUILTIN_M(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_P(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_X(ENUM, NAME, MASK, ATTR, ICODE) - -static const struct builtin_description bdesc_htm[] = -{ -#include "rs6000-builtin.def" -}; - -/* MMA builtins. */ -#undef RS6000_BUILTIN_0 -#undef RS6000_BUILTIN_1 -#undef RS6000_BUILTIN_2 -#undef RS6000_BUILTIN_3 -#undef RS6000_BUILTIN_4 -#undef RS6000_BUILTIN_A -#undef RS6000_BUILTIN_D -#undef RS6000_BUILTIN_H -#undef RS6000_BUILTIN_M -#undef RS6000_BUILTIN_P -#undef RS6000_BUILTIN_X - -#define RS6000_BUILTIN_0(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_1(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_2(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_3(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_4(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_A(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_D(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_H(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_M(ENUM, NAME, MASK, ATTR, ICODE) \ - { MASK, ICODE, NAME, ENUM }, - -#define RS6000_BUILTIN_P(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_X(ENUM, NAME, MASK, ATTR, ICODE) - -static const struct builtin_description bdesc_mma[] = -{ -#include "rs6000-builtin.def" -}; - -#undef RS6000_BUILTIN_0 -#undef RS6000_BUILTIN_1 -#undef RS6000_BUILTIN_2 -#undef RS6000_BUILTIN_3 -#undef RS6000_BUILTIN_4 -#undef RS6000_BUILTIN_A -#undef RS6000_BUILTIN_D -#undef RS6000_BUILTIN_H -#undef RS6000_BUILTIN_M -#undef RS6000_BUILTIN_P -#undef RS6000_BUILTIN_X - -/* Return true if a builtin function is overloaded. */ -bool -rs6000_overloaded_builtin_p (enum rs6000_builtins fncode) -{ - return (rs6000_builtin_info[(int)fncode].attr & RS6000_BTC_OVERLOADED) != 0; -} - -const char * -rs6000_overloaded_builtin_name (enum rs6000_builtins fncode) -{ - return rs6000_builtin_info[(int)fncode].name; -} - static rtx altivec_expand_predicate_builtin (enum insn_code icode, tree exp, rtx target) { @@ -3611,24 +3115,6 @@ swap_endian_selector_for_mode (machine_mode mode) gen_rtvec_v (16, perm))); } -/* Return the appropriate SPR number associated with the given builtin. */ -static inline HOST_WIDE_INT -htm_spr_num (enum rs6000_builtins code) -{ - if (code == HTM_BUILTIN_GET_TFHAR - || code == HTM_BUILTIN_SET_TFHAR) - return TFHAR_SPR; - else if (code == HTM_BUILTIN_GET_TFIAR - || code == HTM_BUILTIN_SET_TFIAR) - return TFIAR_SPR; - else if (code == HTM_BUILTIN_GET_TEXASR - || code == HTM_BUILTIN_SET_TEXASR) - return TEXASR_SPR; - gcc_assert (code == HTM_BUILTIN_GET_TEXASRU - || code == HTM_BUILTIN_SET_TEXASRU); - return TEXASRU_SPR; -} - /* Return the correct ICODE value depending on whether we are setting or reading the HTM SPRs. */ static inline enum insn_code @@ -3768,18 +3254,6 @@ altivec_expand_vec_ext_builtin (tree exp, rtx target) return target; } -/* Check whether a builtin function is supported in this target - configuration. */ -bool -rs6000_builtin_is_supported_p (enum rs6000_builtins fncode) -{ - HOST_WIDE_INT fnmask = rs6000_builtin_info[fncode].mask; - if ((fnmask & rs6000_builtin_mask) != fnmask) - return false; - else - return true; -} - /* Raise an error message for a builtin function that is called without the appropriate target options being set. */ @@ -4005,190 +3479,6 @@ fold_mergeeo_helper (gimple_stmt_iterator *gsi, gimple *stmt, int use_odd) gsi_replace (gsi, g, true); } -/* Expand the MMA built-ins early, so that we can convert the pass-by-reference - __vector_quad arguments into pass-by-value arguments, leading to more - efficient code generation. */ - -bool -rs6000_gimple_fold_mma_builtin (gimple_stmt_iterator *gsi) -{ - gimple *stmt = gsi_stmt (*gsi); - tree fndecl = gimple_call_fndecl (stmt); - enum rs6000_builtins fncode - = (enum rs6000_builtins) DECL_MD_FUNCTION_CODE (fndecl); - unsigned attr = rs6000_builtin_info[fncode].attr; - - if ((attr & RS6000_BTC_GIMPLE) == 0) - return false; - - unsigned nopnds = (attr & RS6000_BTC_OPND_MASK); - gimple_seq new_seq = NULL; - gimple *new_call; - tree new_decl; - - if (fncode == MMA_BUILTIN_DISASSEMBLE_ACC - || fncode == VSX_BUILTIN_DISASSEMBLE_PAIR) - { - /* This is an MMA disassemble built-in function. */ - push_gimplify_context (true); - unsigned nvec = (fncode == MMA_BUILTIN_DISASSEMBLE_ACC) ? 4 : 2; - tree dst_ptr = gimple_call_arg (stmt, 0); - tree src_ptr = gimple_call_arg (stmt, 1); - tree src_type = TREE_TYPE (src_ptr); - tree src = create_tmp_reg_or_ssa_name (TREE_TYPE (src_type)); - gimplify_assign (src, build_simple_mem_ref (src_ptr), &new_seq); - - /* If we are not disassembling an accumulator/pair or our destination is - another accumulator/pair, then just copy the entire thing as is. */ - if ((fncode == MMA_BUILTIN_DISASSEMBLE_ACC - && TREE_TYPE (TREE_TYPE (dst_ptr)) == vector_quad_type_node) - || (fncode == VSX_BUILTIN_DISASSEMBLE_PAIR - && TREE_TYPE (TREE_TYPE (dst_ptr)) == vector_pair_type_node)) - { - tree dst = build_simple_mem_ref (build1 (VIEW_CONVERT_EXPR, - src_type, dst_ptr)); - gimplify_assign (dst, src, &new_seq); - pop_gimplify_context (NULL); - gsi_replace_with_seq (gsi, new_seq, true); - return true; - } - - /* If we're disassembling an accumulator into a different type, we need - to emit a xxmfacc instruction now, since we cannot do it later. */ - if (fncode == MMA_BUILTIN_DISASSEMBLE_ACC) - { - new_decl = rs6000_builtin_decls[MMA_BUILTIN_XXMFACC_INTERNAL]; - new_call = gimple_build_call (new_decl, 1, src); - src = create_tmp_reg_or_ssa_name (vector_quad_type_node); - gimple_call_set_lhs (new_call, src); - gimple_seq_add_stmt (&new_seq, new_call); - } - - /* Copy the accumulator/pair vector by vector. */ - new_decl = rs6000_builtin_decls[fncode + 1]; - tree dst_type = build_pointer_type_for_mode (unsigned_V16QI_type_node, - ptr_mode, true); - tree dst_base = build1 (VIEW_CONVERT_EXPR, dst_type, dst_ptr); - for (unsigned i = 0; i < nvec; i++) - { - unsigned index = WORDS_BIG_ENDIAN ? i : nvec - 1 - i; - tree dst = build2 (MEM_REF, unsigned_V16QI_type_node, dst_base, - build_int_cst (dst_type, index * 16)); - tree dstssa = create_tmp_reg_or_ssa_name (unsigned_V16QI_type_node); - new_call = gimple_build_call (new_decl, 2, src, - build_int_cstu (uint16_type_node, i)); - gimple_call_set_lhs (new_call, dstssa); - gimple_seq_add_stmt (&new_seq, new_call); - gimplify_assign (dst, dstssa, &new_seq); - } - pop_gimplify_context (NULL); - gsi_replace_with_seq (gsi, new_seq, true); - return true; - } - else if (fncode == VSX_BUILTIN_LXVP) - { - push_gimplify_context (true); - tree offset = gimple_call_arg (stmt, 0); - tree ptr = gimple_call_arg (stmt, 1); - tree lhs = gimple_call_lhs (stmt); - if (TREE_TYPE (TREE_TYPE (ptr)) != vector_pair_type_node) - ptr = build1 (VIEW_CONVERT_EXPR, - build_pointer_type (vector_pair_type_node), ptr); - tree mem = build_simple_mem_ref (build2 (POINTER_PLUS_EXPR, - TREE_TYPE (ptr), ptr, offset)); - gimplify_assign (lhs, mem, &new_seq); - pop_gimplify_context (NULL); - gsi_replace_with_seq (gsi, new_seq, true); - return true; - } - else if (fncode == VSX_BUILTIN_STXVP) - { - push_gimplify_context (true); - tree src = gimple_call_arg (stmt, 0); - tree offset = gimple_call_arg (stmt, 1); - tree ptr = gimple_call_arg (stmt, 2); - if (TREE_TYPE (TREE_TYPE (ptr)) != vector_pair_type_node) - ptr = build1 (VIEW_CONVERT_EXPR, - build_pointer_type (vector_pair_type_node), ptr); - tree mem = build_simple_mem_ref (build2 (POINTER_PLUS_EXPR, - TREE_TYPE (ptr), ptr, offset)); - gimplify_assign (mem, src, &new_seq); - pop_gimplify_context (NULL); - gsi_replace_with_seq (gsi, new_seq, true); - return true; - } - - /* Convert this built-in into an internal version that uses pass-by-value - arguments. The internal built-in follows immediately after this one. */ - new_decl = rs6000_builtin_decls[fncode + 1]; - tree lhs, op[MAX_MMA_OPERANDS]; - tree acc = gimple_call_arg (stmt, 0); - push_gimplify_context (true); - - if ((attr & RS6000_BTC_QUAD) != 0) - { - /* This built-in has a pass-by-reference accumulator input, so load it - into a temporary accumulator for use as a pass-by-value input. */ - op[0] = create_tmp_reg_or_ssa_name (vector_quad_type_node); - for (unsigned i = 1; i < nopnds; i++) - op[i] = gimple_call_arg (stmt, i); - gimplify_assign (op[0], build_simple_mem_ref (acc), &new_seq); - } - else - { - /* This built-in does not use its pass-by-reference accumulator argument - as an input argument, so remove it from the input list. */ - nopnds--; - for (unsigned i = 0; i < nopnds; i++) - op[i] = gimple_call_arg (stmt, i + 1); - } - - switch (nopnds) - { - case 0: - new_call = gimple_build_call (new_decl, 0); - break; - case 1: - new_call = gimple_build_call (new_decl, 1, op[0]); - break; - case 2: - new_call = gimple_build_call (new_decl, 2, op[0], op[1]); - break; - case 3: - new_call = gimple_build_call (new_decl, 3, op[0], op[1], op[2]); - break; - case 4: - new_call = gimple_build_call (new_decl, 4, op[0], op[1], op[2], op[3]); - break; - case 5: - new_call = gimple_build_call (new_decl, 5, op[0], op[1], op[2], op[3], - op[4]); - break; - case 6: - new_call = gimple_build_call (new_decl, 6, op[0], op[1], op[2], op[3], - op[4], op[5]); - break; - case 7: - new_call = gimple_build_call (new_decl, 7, op[0], op[1], op[2], op[3], - op[4], op[5], op[6]); - break; - default: - gcc_unreachable (); - } - - if (fncode == VSX_BUILTIN_BUILD_PAIR || fncode == VSX_BUILTIN_ASSEMBLE_PAIR) - lhs = create_tmp_reg_or_ssa_name (vector_pair_type_node); - else - lhs = create_tmp_reg_or_ssa_name (vector_quad_type_node); - gimple_call_set_lhs (new_call, lhs); - gimple_seq_add_stmt (&new_seq, new_call); - gimplify_assign (build_simple_mem_ref (acc), lhs, &new_seq); - pop_gimplify_context (NULL); - gsi_replace_with_seq (gsi, new_seq, true); - - return true; -} - /* Fold a machine-dependent built-in in GIMPLE. (For folding into a constant, use rs6000_fold_builtin.) */ @@ -7255,5 +6545,3 @@ rs6000_output_mi_thunk (FILE *file, tree thunk_fndecl ATTRIBUTE_UNUSED, reload_completed = 0; epilogue_completed = 0; } - -#include "gt-rs6000-call.h" diff --git a/gcc/config/rs6000/rs6000-protos.h b/gcc/config/rs6000/rs6000-protos.h index 14f6b313105..c01ae005d0b 100644 --- a/gcc/config/rs6000/rs6000-protos.h +++ b/gcc/config/rs6000/rs6000-protos.h @@ -272,9 +272,6 @@ extern void rs6000_call_darwin (rtx, rtx, rtx, rtx); extern void rs6000_sibcall_darwin (rtx, rtx, rtx, rtx); extern void rs6000_aix_asm_output_dwarf_table_ref (char *); extern void get_ppc476_thunk_name (char name[32]); -extern bool rs6000_overloaded_builtin_p (enum rs6000_builtins); -extern bool rs6000_builtin_is_supported_p (enum rs6000_builtins); -extern const char *rs6000_overloaded_builtin_name (enum rs6000_builtins); extern int rs6000_store_data_bypass_p (rtx_insn *, rtx_insn *); extern HOST_WIDE_INT rs6000_builtin_mask_calculate (void); extern void rs6000_asm_output_dwarf_pcrel (FILE *file, int size, diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c index 70df511ff98..4479c569476 100644 --- a/gcc/config/rs6000/rs6000.c +++ b/gcc/config/rs6000/rs6000.c @@ -171,7 +171,6 @@ static int dbg_cost_ctrl; /* Built in types. */ tree rs6000_builtin_types[RS6000_BTI_MAX]; -tree rs6000_builtin_decls[RS6000_BUILTIN_COUNT]; /* Flag to say the TOC is initialized */ int toc_initialized, need_toc_init; @@ -2585,8 +2584,6 @@ rs6000_debug_reg_global (void) (int)rs6000_sched_restricted_insns_priority); fprintf (stderr, DEBUG_FMT_D, "Number of standard builtins", (int)END_BUILTINS); - fprintf (stderr, DEBUG_FMT_D, "Number of rs6000 builtins", - (int)RS6000_BUILTIN_COUNT); fprintf (stderr, DEBUG_FMT_D, "Enable float128 on VSX", (int)TARGET_FLOAT128_ENABLE_TYPE); diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h index b12ee8bfe5b..4d2f88d4218 100644 --- a/gcc/config/rs6000/rs6000.h +++ b/gcc/config/rs6000/rs6000.h @@ -2344,62 +2344,6 @@ extern int frame_pointer_needed; | RS6000_BTM_MMA \ | RS6000_BTM_P10) -/* Define builtin enum index. */ - -#undef RS6000_BUILTIN_0 -#undef RS6000_BUILTIN_1 -#undef RS6000_BUILTIN_2 -#undef RS6000_BUILTIN_3 -#undef RS6000_BUILTIN_4 -#undef RS6000_BUILTIN_A -#undef RS6000_BUILTIN_D -#undef RS6000_BUILTIN_H -#undef RS6000_BUILTIN_M -#undef RS6000_BUILTIN_P -#undef RS6000_BUILTIN_X - -#define RS6000_BUILTIN_0(ENUM, NAME, MASK, ATTR, ICODE) ENUM, -#define RS6000_BUILTIN_1(ENUM, NAME, MASK, ATTR, ICODE) ENUM, -#define RS6000_BUILTIN_2(ENUM, NAME, MASK, ATTR, ICODE) ENUM, -#define RS6000_BUILTIN_3(ENUM, NAME, MASK, ATTR, ICODE) ENUM, -#define RS6000_BUILTIN_4(ENUM, NAME, MASK, ATTR, ICODE) ENUM, -#define RS6000_BUILTIN_A(ENUM, NAME, MASK, ATTR, ICODE) ENUM, -#define RS6000_BUILTIN_D(ENUM, NAME, MASK, ATTR, ICODE) ENUM, -#define RS6000_BUILTIN_H(ENUM, NAME, MASK, ATTR, ICODE) ENUM, -#define RS6000_BUILTIN_M(ENUM, NAME, MASK, ATTR, ICODE) ENUM, -#define RS6000_BUILTIN_P(ENUM, NAME, MASK, ATTR, ICODE) ENUM, -#define RS6000_BUILTIN_X(ENUM, NAME, MASK, ATTR, ICODE) ENUM, - -enum rs6000_builtins -{ -#include "rs6000-builtin.def" - - RS6000_BUILTIN_COUNT -}; - -#undef RS6000_BUILTIN_0 -#undef RS6000_BUILTIN_1 -#undef RS6000_BUILTIN_2 -#undef RS6000_BUILTIN_3 -#undef RS6000_BUILTIN_4 -#undef RS6000_BUILTIN_A -#undef RS6000_BUILTIN_D -#undef RS6000_BUILTIN_H -#undef RS6000_BUILTIN_M -#undef RS6000_BUILTIN_P -#undef RS6000_BUILTIN_X - -/* Mappings for overloaded builtins. */ -struct altivec_builtin_types -{ - enum rs6000_builtins code; - enum rs6000_builtins overloaded_code; - signed char ret_type; - signed char op1; - signed char op2; - signed char op3; -}; - enum rs6000_builtin_type_index { RS6000_BTI_NOT_OPAQUE, @@ -2600,7 +2544,6 @@ enum rs6000_builtin_type_index #define ptr_long_long_unsigned_type_node (rs6000_builtin_types[RS6000_BTI_ptr_long_long_unsigned]) extern GTY(()) tree rs6000_builtin_types[RS6000_BTI_MAX]; -extern GTY(()) tree rs6000_builtin_decls[RS6000_BUILTIN_COUNT]; #ifndef USED_FOR_TARGET extern GTY(()) tree builtin_mode_to_type[MAX_MACHINE_MODE][2]; diff --git a/gcc/config/rs6000/t-rs6000 b/gcc/config/rs6000/t-rs6000 index 3d3143a171d..98ddd977f96 100644 --- a/gcc/config/rs6000/t-rs6000 +++ b/gcc/config/rs6000/t-rs6000 @@ -18,7 +18,6 @@ # along with GCC; see the file COPYING3. If not see # <http://www.gnu.org/licenses/>. -TM_H += $(srcdir)/config/rs6000/rs6000-builtin.def TM_H += $(srcdir)/config/rs6000/rs6000-cpus.def TM_H += $(srcdir)/config/rs6000/rs6000-modes.h PASSES_EXTRA += $(srcdir)/config/rs6000/rs6000-passes.def -- 2.27.0 ^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [PATCH v2 4/6] rs6000: Remove rs6000-builtin.def and associated data and functions 2021-12-06 20:49 ` [PATCH 4/6] rs6000: Remove rs6000-builtin.def and associated data and functions Bill Schmidt @ 2021-12-14 18:00 ` Bill Schmidt 2021-12-14 18:08 ` [PATCH " David Edelsohn 1 sibling, 0 replies; 20+ messages in thread From: Bill Schmidt @ 2021-12-14 18:00 UTC (permalink / raw) To: gcc-patches; +Cc: dje.gcc, segher Ping. Thanks! Bill On 12/6/21 2:49 PM, Bill Schmidt via Gcc-patches wrote: > Hi! > > The old rs6000-builtin.def file is no longer needed. Remove it and the code > that depends on it. > > Bootstrapped and tested on powerpc64le-linux-gnu with no regressions. Is this > okay for trunk? > > Thanks! > Bill > > 2021-12-02 Bill Schmidt <wschmidt@linux.ibm.com> > > gcc/ > * config/rs6000/rs6000-builtin.def: Delete. > * config/rs6000/rs6000-call.c (builtin_compatibility): Delete. > (builtin_description): Delete. > (builtin_hash_struct): Delete. > (builtin_hasher): Delete. > (builtin_hash_table): Delete. > (builtin_hasher::hash): Delete. > (builtin_hasher::equal): Delete. > (rs6000_builtin_info_type): Delete. > (rs6000_builtin_info): Delete. > (bdesc_compat): Delete. > (bdesc_3arg): Delete. > (bdesc_4arg): Delete. > (bdesc_dst): Delete. > (bdesc_2arg): Delete. > (bdesc_altivec_preds): Delete. > (bdesc_abs): Delete. > (bdesc_1arg): Delete. > (bdesc_0arg): Delete. > (bdesc_htm): Delete. > (bdesc_mma): Delete. > (rs6000_overloaded_builtin_p): Delete. > (rs6000_overloaded_builtin_name): Delete. > (htm_spr_num): Delete. > (rs6000_builtin_is_supported_p): Delete. > (rs6000_gimple_fold_mma_builtin): Delete. > (gt-rs6000-call.h): Remove include directive. > * config/rs6000/rs6000-protos.h (rs6000_overloaded_builtin_p): Delete. > (rs6000_builtin_is_supported_p): Delete. > (rs6000_overloaded_builtin_name): Delete. > * config/rs6000/rs6000.c (rs6000_builtin_decls): Delete. > (rs6000_debug_reg_global): Remove reference to RS6000_BUILTIN_COUNT. > * config/rs6000/rs6000.h (rs6000_builtins): Delete. > (altivec_builtin_types): Delete. > (rs6000_builtin_decls): Delete. > * config/rs6000/t-rs6000 (TM_H): Don't add rs6000-builtin.def. > --- > gcc/config/rs6000/rs6000-builtin.def | 3350 -------------------------- > gcc/config/rs6000/rs6000-call.c | 712 ------ > gcc/config/rs6000/rs6000-protos.h | 3 - > gcc/config/rs6000/rs6000.c | 3 - > gcc/config/rs6000/rs6000.h | 57 - > gcc/config/rs6000/t-rs6000 | 1 - > 6 files changed, 4126 deletions(-) > delete mode 100644 gcc/config/rs6000/rs6000-builtin.def > > diff --git a/gcc/config/rs6000/rs6000-builtin.def b/gcc/config/rs6000/rs6000-builtin.def > deleted file mode 100644 > index 9dbf16f48c4..00000000000 > diff --git a/gcc/config/rs6000/rs6000-call.c b/gcc/config/rs6000/rs6000-call.c > index 86054f75756..a5ee06c991f 100644 > --- a/gcc/config/rs6000/rs6000-call.c > +++ b/gcc/config/rs6000/rs6000-call.c > @@ -89,20 +89,6 @@ > #define TARGET_NO_PROTOTYPE 0 > #endif > > -struct builtin_compatibility > -{ > - const enum rs6000_builtins code; > - const char *const name; > -}; > - > -struct builtin_description > -{ > - const HOST_WIDE_INT mask; > - const enum insn_code icode; > - const char *const name; > - const enum rs6000_builtins code; > -}; > - > /* Used by __builtin_cpu_is(), mapping from PLATFORM names to values. */ > static const struct > { > @@ -184,127 +170,6 @@ static const struct > > static rtx rs6000_expand_new_builtin (tree, rtx, rtx, machine_mode, int); > static bool rs6000_gimple_fold_new_builtin (gimple_stmt_iterator *gsi); > - > - > -/* Hash table to keep track of the argument types for builtin functions. */ > - > -struct GTY((for_user)) builtin_hash_struct > -{ > - tree type; > - machine_mode mode[4]; /* return value + 3 arguments. */ > - unsigned char uns_p[4]; /* and whether the types are unsigned. */ > -}; > - > -struct builtin_hasher : ggc_ptr_hash<builtin_hash_struct> > -{ > - static hashval_t hash (builtin_hash_struct *); > - static bool equal (builtin_hash_struct *, builtin_hash_struct *); > -}; > - > -static GTY (()) hash_table<builtin_hasher> *builtin_hash_table; > - > -/* Hash function for builtin functions with up to 3 arguments and a return > - type. */ > -hashval_t > -builtin_hasher::hash (builtin_hash_struct *bh) > -{ > - unsigned ret = 0; > - int i; > - > - for (i = 0; i < 4; i++) > - { > - ret = (ret * (unsigned)MAX_MACHINE_MODE) + ((unsigned)bh->mode[i]); > - ret = (ret * 2) + bh->uns_p[i]; > - } > - > - return ret; > -} > - > -/* Compare builtin hash entries H1 and H2 for equivalence. */ > -bool > -builtin_hasher::equal (builtin_hash_struct *p1, builtin_hash_struct *p2) > -{ > - return ((p1->mode[0] == p2->mode[0]) > - && (p1->mode[1] == p2->mode[1]) > - && (p1->mode[2] == p2->mode[2]) > - && (p1->mode[3] == p2->mode[3]) > - && (p1->uns_p[0] == p2->uns_p[0]) > - && (p1->uns_p[1] == p2->uns_p[1]) > - && (p1->uns_p[2] == p2->uns_p[2]) > - && (p1->uns_p[3] == p2->uns_p[3])); > -} > - > -\f > -/* Table that classifies rs6000 builtin functions (pure, const, etc.). */ > -#undef RS6000_BUILTIN_0 > -#undef RS6000_BUILTIN_1 > -#undef RS6000_BUILTIN_2 > -#undef RS6000_BUILTIN_3 > -#undef RS6000_BUILTIN_4 > -#undef RS6000_BUILTIN_A > -#undef RS6000_BUILTIN_D > -#undef RS6000_BUILTIN_H > -#undef RS6000_BUILTIN_M > -#undef RS6000_BUILTIN_P > -#undef RS6000_BUILTIN_X > - > -#define RS6000_BUILTIN_0(ENUM, NAME, MASK, ATTR, ICODE) \ > - { NAME, ICODE, MASK, ATTR }, > - > -#define RS6000_BUILTIN_1(ENUM, NAME, MASK, ATTR, ICODE) \ > - { NAME, ICODE, MASK, ATTR }, > - > -#define RS6000_BUILTIN_2(ENUM, NAME, MASK, ATTR, ICODE) \ > - { NAME, ICODE, MASK, ATTR }, > - > -#define RS6000_BUILTIN_3(ENUM, NAME, MASK, ATTR, ICODE) \ > - { NAME, ICODE, MASK, ATTR }, > - > -#define RS6000_BUILTIN_4(ENUM, NAME, MASK, ATTR, ICODE) \ > - { NAME, ICODE, MASK, ATTR }, > - > -#define RS6000_BUILTIN_A(ENUM, NAME, MASK, ATTR, ICODE) \ > - { NAME, ICODE, MASK, ATTR }, > - > -#define RS6000_BUILTIN_D(ENUM, NAME, MASK, ATTR, ICODE) \ > - { NAME, ICODE, MASK, ATTR }, > - > -#define RS6000_BUILTIN_H(ENUM, NAME, MASK, ATTR, ICODE) \ > - { NAME, ICODE, MASK, ATTR }, > - > -#define RS6000_BUILTIN_M(ENUM, NAME, MASK, ATTR, ICODE) \ > - { NAME, ICODE, MASK, ATTR }, > - > -#define RS6000_BUILTIN_P(ENUM, NAME, MASK, ATTR, ICODE) \ > - { NAME, ICODE, MASK, ATTR }, > - > -#define RS6000_BUILTIN_X(ENUM, NAME, MASK, ATTR, ICODE) \ > - { NAME, ICODE, MASK, ATTR }, > - > -struct rs6000_builtin_info_type { > - const char *name; > - const enum insn_code icode; > - const HOST_WIDE_INT mask; > - const unsigned attr; > -}; > - > -static const struct rs6000_builtin_info_type rs6000_builtin_info[] = > -{ > -#include "rs6000-builtin.def" > -}; > - > -#undef RS6000_BUILTIN_0 > -#undef RS6000_BUILTIN_1 > -#undef RS6000_BUILTIN_2 > -#undef RS6000_BUILTIN_3 > -#undef RS6000_BUILTIN_4 > -#undef RS6000_BUILTIN_A > -#undef RS6000_BUILTIN_D > -#undef RS6000_BUILTIN_H > -#undef RS6000_BUILTIN_M > -#undef RS6000_BUILTIN_P > -#undef RS6000_BUILTIN_X > - > \f > /* Nonzero if we can use a floating-point register to pass this arg. */ > #define USE_FP_FOR_ARG_P(CUM,MODE) \ > @@ -3130,367 +2995,6 @@ const char *rs6000_type_string (tree type_node) > return "unknown"; > } > > -static const struct builtin_compatibility bdesc_compat[] = > -{ > -#define RS6000_BUILTIN_COMPAT > -#include "rs6000-builtin.def" > -}; > -#undef RS6000_BUILTIN_COMPAT > - > -/* Simple ternary operations: VECd = foo (VECa, VECb, VECc). */ > - > -#undef RS6000_BUILTIN_0 > -#undef RS6000_BUILTIN_1 > -#undef RS6000_BUILTIN_2 > -#undef RS6000_BUILTIN_3 > -#undef RS6000_BUILTIN_4 > -#undef RS6000_BUILTIN_A > -#undef RS6000_BUILTIN_D > -#undef RS6000_BUILTIN_H > -#undef RS6000_BUILTIN_M > -#undef RS6000_BUILTIN_P > -#undef RS6000_BUILTIN_X > - > -#define RS6000_BUILTIN_0(ENUM, NAME, MASK, ATTR, ICODE) > -#define RS6000_BUILTIN_1(ENUM, NAME, MASK, ATTR, ICODE) > -#define RS6000_BUILTIN_2(ENUM, NAME, MASK, ATTR, ICODE) > -#define RS6000_BUILTIN_3(ENUM, NAME, MASK, ATTR, ICODE) \ > - { MASK, ICODE, NAME, ENUM }, > - > -#define RS6000_BUILTIN_4(ENUM, NAME, MASK, ATTR, ICODE) > -#define RS6000_BUILTIN_A(ENUM, NAME, MASK, ATTR, ICODE) > -#define RS6000_BUILTIN_D(ENUM, NAME, MASK, ATTR, ICODE) > -#define RS6000_BUILTIN_H(ENUM, NAME, MASK, ATTR, ICODE) > -#define RS6000_BUILTIN_M(ENUM, NAME, MASK, ATTR, ICODE) > -#define RS6000_BUILTIN_P(ENUM, NAME, MASK, ATTR, ICODE) > -#define RS6000_BUILTIN_X(ENUM, NAME, MASK, ATTR, ICODE) > - > -static const struct builtin_description bdesc_3arg[] = > -{ > -#include "rs6000-builtin.def" > -}; > - > -/* Simple quaternary operations: VECd = foo (VECa, VECb, VECc, VECd). */ > - > -#undef RS6000_BUILTIN_0 > -#undef RS6000_BUILTIN_1 > -#undef RS6000_BUILTIN_2 > -#undef RS6000_BUILTIN_3 > -#undef RS6000_BUILTIN_4 > -#undef RS6000_BUILTIN_A > -#undef RS6000_BUILTIN_D > -#undef RS6000_BUILTIN_H > -#undef RS6000_BUILTIN_M > -#undef RS6000_BUILTIN_P > -#undef RS6000_BUILTIN_X > - > -#define RS6000_BUILTIN_0(ENUM, NAME, MASK, ATTR, ICODE) > -#define RS6000_BUILTIN_1(ENUM, NAME, MASK, ATTR, ICODE) > -#define RS6000_BUILTIN_2(ENUM, NAME, MASK, ATTR, ICODE) > -#define RS6000_BUILTIN_3(ENUM, NAME, MASK, ATTR, ICODE) > -#define RS6000_BUILTIN_4(ENUM, NAME, MASK, ATTR, ICODE) \ > - { MASK, ICODE, NAME, ENUM }, > - > -#define RS6000_BUILTIN_A(ENUM, NAME, MASK, ATTR, ICODE) > -#define RS6000_BUILTIN_D(ENUM, NAME, MASK, ATTR, ICODE) > -#define RS6000_BUILTIN_H(ENUM, NAME, MASK, ATTR, ICODE) > -#define RS6000_BUILTIN_M(ENUM, NAME, MASK, ATTR, ICODE) > -#define RS6000_BUILTIN_P(ENUM, NAME, MASK, ATTR, ICODE) > -#define RS6000_BUILTIN_X(ENUM, NAME, MASK, ATTR, ICODE) > - > -static const struct builtin_description bdesc_4arg[] = > -{ > -#include "rs6000-builtin.def" > -}; > - > -/* DST operations: void foo (void *, const int, const char). */ > - > -#undef RS6000_BUILTIN_0 > -#undef RS6000_BUILTIN_1 > -#undef RS6000_BUILTIN_2 > -#undef RS6000_BUILTIN_3 > -#undef RS6000_BUILTIN_4 > -#undef RS6000_BUILTIN_A > -#undef RS6000_BUILTIN_D > -#undef RS6000_BUILTIN_H > -#undef RS6000_BUILTIN_M > -#undef RS6000_BUILTIN_P > -#undef RS6000_BUILTIN_X > - > -#define RS6000_BUILTIN_0(ENUM, NAME, MASK, ATTR, ICODE) > -#define RS6000_BUILTIN_1(ENUM, NAME, MASK, ATTR, ICODE) > -#define RS6000_BUILTIN_2(ENUM, NAME, MASK, ATTR, ICODE) > -#define RS6000_BUILTIN_3(ENUM, NAME, MASK, ATTR, ICODE) > -#define RS6000_BUILTIN_4(ENUM, NAME, MASK, ATTR, ICODE) > -#define RS6000_BUILTIN_A(ENUM, NAME, MASK, ATTR, ICODE) > -#define RS6000_BUILTIN_D(ENUM, NAME, MASK, ATTR, ICODE) \ > - { MASK, ICODE, NAME, ENUM }, > - > -#define RS6000_BUILTIN_H(ENUM, NAME, MASK, ATTR, ICODE) > -#define RS6000_BUILTIN_M(ENUM, NAME, MASK, ATTR, ICODE) > -#define RS6000_BUILTIN_P(ENUM, NAME, MASK, ATTR, ICODE) > -#define RS6000_BUILTIN_X(ENUM, NAME, MASK, ATTR, ICODE) > - > -static const struct builtin_description bdesc_dst[] = > -{ > -#include "rs6000-builtin.def" > -}; > - > -/* Simple binary operations: VECc = foo (VECa, VECb). */ > - > -#undef RS6000_BUILTIN_0 > -#undef RS6000_BUILTIN_1 > -#undef RS6000_BUILTIN_2 > -#undef RS6000_BUILTIN_3 > -#undef RS6000_BUILTIN_4 > -#undef RS6000_BUILTIN_A > -#undef RS6000_BUILTIN_D > -#undef RS6000_BUILTIN_H > -#undef RS6000_BUILTIN_M > -#undef RS6000_BUILTIN_P > -#undef RS6000_BUILTIN_X > - > -#define RS6000_BUILTIN_0(ENUM, NAME, MASK, ATTR, ICODE) > -#define RS6000_BUILTIN_1(ENUM, NAME, MASK, ATTR, ICODE) > -#define RS6000_BUILTIN_2(ENUM, NAME, MASK, ATTR, ICODE) \ > - { MASK, ICODE, NAME, ENUM }, > - > -#define RS6000_BUILTIN_3(ENUM, NAME, MASK, ATTR, ICODE) > -#define RS6000_BUILTIN_4(ENUM, NAME, MASK, ATTR, ICODE) > -#define RS6000_BUILTIN_A(ENUM, NAME, MASK, ATTR, ICODE) > -#define RS6000_BUILTIN_D(ENUM, NAME, MASK, ATTR, ICODE) > -#define RS6000_BUILTIN_H(ENUM, NAME, MASK, ATTR, ICODE) > -#define RS6000_BUILTIN_M(ENUM, NAME, MASK, ATTR, ICODE) > -#define RS6000_BUILTIN_P(ENUM, NAME, MASK, ATTR, ICODE) > -#define RS6000_BUILTIN_X(ENUM, NAME, MASK, ATTR, ICODE) > - > -static const struct builtin_description bdesc_2arg[] = > -{ > -#include "rs6000-builtin.def" > -}; > - > -#undef RS6000_BUILTIN_0 > -#undef RS6000_BUILTIN_1 > -#undef RS6000_BUILTIN_2 > -#undef RS6000_BUILTIN_3 > -#undef RS6000_BUILTIN_4 > -#undef RS6000_BUILTIN_A > -#undef RS6000_BUILTIN_D > -#undef RS6000_BUILTIN_H > -#undef RS6000_BUILTIN_M > -#undef RS6000_BUILTIN_P > -#undef RS6000_BUILTIN_X > - > -#define RS6000_BUILTIN_0(ENUM, NAME, MASK, ATTR, ICODE) > -#define RS6000_BUILTIN_1(ENUM, NAME, MASK, ATTR, ICODE) > -#define RS6000_BUILTIN_2(ENUM, NAME, MASK, ATTR, ICODE) > -#define RS6000_BUILTIN_3(ENUM, NAME, MASK, ATTR, ICODE) > -#define RS6000_BUILTIN_4(ENUM, NAME, MASK, ATTR, ICODE) > -#define RS6000_BUILTIN_A(ENUM, NAME, MASK, ATTR, ICODE) > -#define RS6000_BUILTIN_D(ENUM, NAME, MASK, ATTR, ICODE) > -#define RS6000_BUILTIN_H(ENUM, NAME, MASK, ATTR, ICODE) > -#define RS6000_BUILTIN_M(ENUM, NAME, MASK, ATTR, ICODE) > -#define RS6000_BUILTIN_P(ENUM, NAME, MASK, ATTR, ICODE) \ > - { MASK, ICODE, NAME, ENUM }, > - > -#define RS6000_BUILTIN_X(ENUM, NAME, MASK, ATTR, ICODE) > - > -/* AltiVec predicates. */ > - > -static const struct builtin_description bdesc_altivec_preds[] = > -{ > -#include "rs6000-builtin.def" > -}; > - > -/* ABS* operations. */ > - > -#undef RS6000_BUILTIN_0 > -#undef RS6000_BUILTIN_1 > -#undef RS6000_BUILTIN_2 > -#undef RS6000_BUILTIN_3 > -#undef RS6000_BUILTIN_4 > -#undef RS6000_BUILTIN_A > -#undef RS6000_BUILTIN_D > -#undef RS6000_BUILTIN_H > -#undef RS6000_BUILTIN_M > -#undef RS6000_BUILTIN_P > -#undef RS6000_BUILTIN_X > - > -#define RS6000_BUILTIN_0(ENUM, NAME, MASK, ATTR, ICODE) > -#define RS6000_BUILTIN_1(ENUM, NAME, MASK, ATTR, ICODE) > -#define RS6000_BUILTIN_2(ENUM, NAME, MASK, ATTR, ICODE) > -#define RS6000_BUILTIN_3(ENUM, NAME, MASK, ATTR, ICODE) > -#define RS6000_BUILTIN_4(ENUM, NAME, MASK, ATTR, ICODE) > -#define RS6000_BUILTIN_A(ENUM, NAME, MASK, ATTR, ICODE) \ > - { MASK, ICODE, NAME, ENUM }, > - > -#define RS6000_BUILTIN_D(ENUM, NAME, MASK, ATTR, ICODE) > -#define RS6000_BUILTIN_H(ENUM, NAME, MASK, ATTR, ICODE) > -#define RS6000_BUILTIN_M(ENUM, NAME, MASK, ATTR, ICODE) > -#define RS6000_BUILTIN_P(ENUM, NAME, MASK, ATTR, ICODE) > -#define RS6000_BUILTIN_X(ENUM, NAME, MASK, ATTR, ICODE) > - > -static const struct builtin_description bdesc_abs[] = > -{ > -#include "rs6000-builtin.def" > -}; > - > -/* Simple unary operations: VECb = foo (unsigned literal) or VECb = > - foo (VECa). */ > - > -#undef RS6000_BUILTIN_0 > -#undef RS6000_BUILTIN_1 > -#undef RS6000_BUILTIN_2 > -#undef RS6000_BUILTIN_3 > -#undef RS6000_BUILTIN_4 > -#undef RS6000_BUILTIN_A > -#undef RS6000_BUILTIN_D > -#undef RS6000_BUILTIN_H > -#undef RS6000_BUILTIN_M > -#undef RS6000_BUILTIN_P > -#undef RS6000_BUILTIN_X > - > -#define RS6000_BUILTIN_0(ENUM, NAME, MASK, ATTR, ICODE) > -#define RS6000_BUILTIN_1(ENUM, NAME, MASK, ATTR, ICODE) \ > - { MASK, ICODE, NAME, ENUM }, > - > -#define RS6000_BUILTIN_2(ENUM, NAME, MASK, ATTR, ICODE) > -#define RS6000_BUILTIN_3(ENUM, NAME, MASK, ATTR, ICODE) > -#define RS6000_BUILTIN_4(ENUM, NAME, MASK, ATTR, ICODE) > -#define RS6000_BUILTIN_A(ENUM, NAME, MASK, ATTR, ICODE) > -#define RS6000_BUILTIN_D(ENUM, NAME, MASK, ATTR, ICODE) > -#define RS6000_BUILTIN_H(ENUM, NAME, MASK, ATTR, ICODE) > -#define RS6000_BUILTIN_M(ENUM, NAME, MASK, ATTR, ICODE) > -#define RS6000_BUILTIN_P(ENUM, NAME, MASK, ATTR, ICODE) > -#define RS6000_BUILTIN_X(ENUM, NAME, MASK, ATTR, ICODE) > - > -static const struct builtin_description bdesc_1arg[] = > -{ > -#include "rs6000-builtin.def" > -}; > - > -/* Simple no-argument operations: result = __builtin_darn_32 () */ > - > -#undef RS6000_BUILTIN_0 > -#undef RS6000_BUILTIN_1 > -#undef RS6000_BUILTIN_2 > -#undef RS6000_BUILTIN_3 > -#undef RS6000_BUILTIN_4 > -#undef RS6000_BUILTIN_A > -#undef RS6000_BUILTIN_D > -#undef RS6000_BUILTIN_H > -#undef RS6000_BUILTIN_M > -#undef RS6000_BUILTIN_P > -#undef RS6000_BUILTIN_X > - > -#define RS6000_BUILTIN_0(ENUM, NAME, MASK, ATTR, ICODE) \ > - { MASK, ICODE, NAME, ENUM }, > - > -#define RS6000_BUILTIN_1(ENUM, NAME, MASK, ATTR, ICODE) > -#define RS6000_BUILTIN_2(ENUM, NAME, MASK, ATTR, ICODE) > -#define RS6000_BUILTIN_3(ENUM, NAME, MASK, ATTR, ICODE) > -#define RS6000_BUILTIN_4(ENUM, NAME, MASK, ATTR, ICODE) > -#define RS6000_BUILTIN_A(ENUM, NAME, MASK, ATTR, ICODE) > -#define RS6000_BUILTIN_D(ENUM, NAME, MASK, ATTR, ICODE) > -#define RS6000_BUILTIN_H(ENUM, NAME, MASK, ATTR, ICODE) > -#define RS6000_BUILTIN_M(ENUM, NAME, MASK, ATTR, ICODE) > -#define RS6000_BUILTIN_P(ENUM, NAME, MASK, ATTR, ICODE) > -#define RS6000_BUILTIN_X(ENUM, NAME, MASK, ATTR, ICODE) > - > -static const struct builtin_description bdesc_0arg[] = > -{ > -#include "rs6000-builtin.def" > -}; > - > -/* HTM builtins. */ > -#undef RS6000_BUILTIN_0 > -#undef RS6000_BUILTIN_1 > -#undef RS6000_BUILTIN_2 > -#undef RS6000_BUILTIN_3 > -#undef RS6000_BUILTIN_4 > -#undef RS6000_BUILTIN_A > -#undef RS6000_BUILTIN_D > -#undef RS6000_BUILTIN_H > -#undef RS6000_BUILTIN_M > -#undef RS6000_BUILTIN_P > -#undef RS6000_BUILTIN_X > - > -#define RS6000_BUILTIN_0(ENUM, NAME, MASK, ATTR, ICODE) > -#define RS6000_BUILTIN_1(ENUM, NAME, MASK, ATTR, ICODE) > -#define RS6000_BUILTIN_2(ENUM, NAME, MASK, ATTR, ICODE) > -#define RS6000_BUILTIN_3(ENUM, NAME, MASK, ATTR, ICODE) > -#define RS6000_BUILTIN_4(ENUM, NAME, MASK, ATTR, ICODE) > -#define RS6000_BUILTIN_A(ENUM, NAME, MASK, ATTR, ICODE) > -#define RS6000_BUILTIN_D(ENUM, NAME, MASK, ATTR, ICODE) > -#define RS6000_BUILTIN_H(ENUM, NAME, MASK, ATTR, ICODE) \ > - { MASK, ICODE, NAME, ENUM }, > - > -#define RS6000_BUILTIN_M(ENUM, NAME, MASK, ATTR, ICODE) > -#define RS6000_BUILTIN_P(ENUM, NAME, MASK, ATTR, ICODE) > -#define RS6000_BUILTIN_X(ENUM, NAME, MASK, ATTR, ICODE) > - > -static const struct builtin_description bdesc_htm[] = > -{ > -#include "rs6000-builtin.def" > -}; > - > -/* MMA builtins. */ > -#undef RS6000_BUILTIN_0 > -#undef RS6000_BUILTIN_1 > -#undef RS6000_BUILTIN_2 > -#undef RS6000_BUILTIN_3 > -#undef RS6000_BUILTIN_4 > -#undef RS6000_BUILTIN_A > -#undef RS6000_BUILTIN_D > -#undef RS6000_BUILTIN_H > -#undef RS6000_BUILTIN_M > -#undef RS6000_BUILTIN_P > -#undef RS6000_BUILTIN_X > - > -#define RS6000_BUILTIN_0(ENUM, NAME, MASK, ATTR, ICODE) > -#define RS6000_BUILTIN_1(ENUM, NAME, MASK, ATTR, ICODE) > -#define RS6000_BUILTIN_2(ENUM, NAME, MASK, ATTR, ICODE) > -#define RS6000_BUILTIN_3(ENUM, NAME, MASK, ATTR, ICODE) > -#define RS6000_BUILTIN_4(ENUM, NAME, MASK, ATTR, ICODE) > -#define RS6000_BUILTIN_A(ENUM, NAME, MASK, ATTR, ICODE) > -#define RS6000_BUILTIN_D(ENUM, NAME, MASK, ATTR, ICODE) > -#define RS6000_BUILTIN_H(ENUM, NAME, MASK, ATTR, ICODE) > -#define RS6000_BUILTIN_M(ENUM, NAME, MASK, ATTR, ICODE) \ > - { MASK, ICODE, NAME, ENUM }, > - > -#define RS6000_BUILTIN_P(ENUM, NAME, MASK, ATTR, ICODE) > -#define RS6000_BUILTIN_X(ENUM, NAME, MASK, ATTR, ICODE) > - > -static const struct builtin_description bdesc_mma[] = > -{ > -#include "rs6000-builtin.def" > -}; > - > -#undef RS6000_BUILTIN_0 > -#undef RS6000_BUILTIN_1 > -#undef RS6000_BUILTIN_2 > -#undef RS6000_BUILTIN_3 > -#undef RS6000_BUILTIN_4 > -#undef RS6000_BUILTIN_A > -#undef RS6000_BUILTIN_D > -#undef RS6000_BUILTIN_H > -#undef RS6000_BUILTIN_M > -#undef RS6000_BUILTIN_P > -#undef RS6000_BUILTIN_X > - > -/* Return true if a builtin function is overloaded. */ > -bool > -rs6000_overloaded_builtin_p (enum rs6000_builtins fncode) > -{ > - return (rs6000_builtin_info[(int)fncode].attr & RS6000_BTC_OVERLOADED) != 0; > -} > - > -const char * > -rs6000_overloaded_builtin_name (enum rs6000_builtins fncode) > -{ > - return rs6000_builtin_info[(int)fncode].name; > -} > - > static rtx > altivec_expand_predicate_builtin (enum insn_code icode, tree exp, rtx target) > { > @@ -3611,24 +3115,6 @@ swap_endian_selector_for_mode (machine_mode mode) > gen_rtvec_v (16, perm))); > } > > -/* Return the appropriate SPR number associated with the given builtin. */ > -static inline HOST_WIDE_INT > -htm_spr_num (enum rs6000_builtins code) > -{ > - if (code == HTM_BUILTIN_GET_TFHAR > - || code == HTM_BUILTIN_SET_TFHAR) > - return TFHAR_SPR; > - else if (code == HTM_BUILTIN_GET_TFIAR > - || code == HTM_BUILTIN_SET_TFIAR) > - return TFIAR_SPR; > - else if (code == HTM_BUILTIN_GET_TEXASR > - || code == HTM_BUILTIN_SET_TEXASR) > - return TEXASR_SPR; > - gcc_assert (code == HTM_BUILTIN_GET_TEXASRU > - || code == HTM_BUILTIN_SET_TEXASRU); > - return TEXASRU_SPR; > -} > - > /* Return the correct ICODE value depending on whether we are > setting or reading the HTM SPRs. */ > static inline enum insn_code > @@ -3768,18 +3254,6 @@ altivec_expand_vec_ext_builtin (tree exp, rtx target) > return target; > } > > -/* Check whether a builtin function is supported in this target > - configuration. */ > -bool > -rs6000_builtin_is_supported_p (enum rs6000_builtins fncode) > -{ > - HOST_WIDE_INT fnmask = rs6000_builtin_info[fncode].mask; > - if ((fnmask & rs6000_builtin_mask) != fnmask) > - return false; > - else > - return true; > -} > - > /* Raise an error message for a builtin function that is called without the > appropriate target options being set. */ > > @@ -4005,190 +3479,6 @@ fold_mergeeo_helper (gimple_stmt_iterator *gsi, gimple *stmt, int use_odd) > gsi_replace (gsi, g, true); > } > > -/* Expand the MMA built-ins early, so that we can convert the pass-by-reference > - __vector_quad arguments into pass-by-value arguments, leading to more > - efficient code generation. */ > - > -bool > -rs6000_gimple_fold_mma_builtin (gimple_stmt_iterator *gsi) > -{ > - gimple *stmt = gsi_stmt (*gsi); > - tree fndecl = gimple_call_fndecl (stmt); > - enum rs6000_builtins fncode > - = (enum rs6000_builtins) DECL_MD_FUNCTION_CODE (fndecl); > - unsigned attr = rs6000_builtin_info[fncode].attr; > - > - if ((attr & RS6000_BTC_GIMPLE) == 0) > - return false; > - > - unsigned nopnds = (attr & RS6000_BTC_OPND_MASK); > - gimple_seq new_seq = NULL; > - gimple *new_call; > - tree new_decl; > - > - if (fncode == MMA_BUILTIN_DISASSEMBLE_ACC > - || fncode == VSX_BUILTIN_DISASSEMBLE_PAIR) > - { > - /* This is an MMA disassemble built-in function. */ > - push_gimplify_context (true); > - unsigned nvec = (fncode == MMA_BUILTIN_DISASSEMBLE_ACC) ? 4 : 2; > - tree dst_ptr = gimple_call_arg (stmt, 0); > - tree src_ptr = gimple_call_arg (stmt, 1); > - tree src_type = TREE_TYPE (src_ptr); > - tree src = create_tmp_reg_or_ssa_name (TREE_TYPE (src_type)); > - gimplify_assign (src, build_simple_mem_ref (src_ptr), &new_seq); > - > - /* If we are not disassembling an accumulator/pair or our destination is > - another accumulator/pair, then just copy the entire thing as is. */ > - if ((fncode == MMA_BUILTIN_DISASSEMBLE_ACC > - && TREE_TYPE (TREE_TYPE (dst_ptr)) == vector_quad_type_node) > - || (fncode == VSX_BUILTIN_DISASSEMBLE_PAIR > - && TREE_TYPE (TREE_TYPE (dst_ptr)) == vector_pair_type_node)) > - { > - tree dst = build_simple_mem_ref (build1 (VIEW_CONVERT_EXPR, > - src_type, dst_ptr)); > - gimplify_assign (dst, src, &new_seq); > - pop_gimplify_context (NULL); > - gsi_replace_with_seq (gsi, new_seq, true); > - return true; > - } > - > - /* If we're disassembling an accumulator into a different type, we need > - to emit a xxmfacc instruction now, since we cannot do it later. */ > - if (fncode == MMA_BUILTIN_DISASSEMBLE_ACC) > - { > - new_decl = rs6000_builtin_decls[MMA_BUILTIN_XXMFACC_INTERNAL]; > - new_call = gimple_build_call (new_decl, 1, src); > - src = create_tmp_reg_or_ssa_name (vector_quad_type_node); > - gimple_call_set_lhs (new_call, src); > - gimple_seq_add_stmt (&new_seq, new_call); > - } > - > - /* Copy the accumulator/pair vector by vector. */ > - new_decl = rs6000_builtin_decls[fncode + 1]; > - tree dst_type = build_pointer_type_for_mode (unsigned_V16QI_type_node, > - ptr_mode, true); > - tree dst_base = build1 (VIEW_CONVERT_EXPR, dst_type, dst_ptr); > - for (unsigned i = 0; i < nvec; i++) > - { > - unsigned index = WORDS_BIG_ENDIAN ? i : nvec - 1 - i; > - tree dst = build2 (MEM_REF, unsigned_V16QI_type_node, dst_base, > - build_int_cst (dst_type, index * 16)); > - tree dstssa = create_tmp_reg_or_ssa_name (unsigned_V16QI_type_node); > - new_call = gimple_build_call (new_decl, 2, src, > - build_int_cstu (uint16_type_node, i)); > - gimple_call_set_lhs (new_call, dstssa); > - gimple_seq_add_stmt (&new_seq, new_call); > - gimplify_assign (dst, dstssa, &new_seq); > - } > - pop_gimplify_context (NULL); > - gsi_replace_with_seq (gsi, new_seq, true); > - return true; > - } > - else if (fncode == VSX_BUILTIN_LXVP) > - { > - push_gimplify_context (true); > - tree offset = gimple_call_arg (stmt, 0); > - tree ptr = gimple_call_arg (stmt, 1); > - tree lhs = gimple_call_lhs (stmt); > - if (TREE_TYPE (TREE_TYPE (ptr)) != vector_pair_type_node) > - ptr = build1 (VIEW_CONVERT_EXPR, > - build_pointer_type (vector_pair_type_node), ptr); > - tree mem = build_simple_mem_ref (build2 (POINTER_PLUS_EXPR, > - TREE_TYPE (ptr), ptr, offset)); > - gimplify_assign (lhs, mem, &new_seq); > - pop_gimplify_context (NULL); > - gsi_replace_with_seq (gsi, new_seq, true); > - return true; > - } > - else if (fncode == VSX_BUILTIN_STXVP) > - { > - push_gimplify_context (true); > - tree src = gimple_call_arg (stmt, 0); > - tree offset = gimple_call_arg (stmt, 1); > - tree ptr = gimple_call_arg (stmt, 2); > - if (TREE_TYPE (TREE_TYPE (ptr)) != vector_pair_type_node) > - ptr = build1 (VIEW_CONVERT_EXPR, > - build_pointer_type (vector_pair_type_node), ptr); > - tree mem = build_simple_mem_ref (build2 (POINTER_PLUS_EXPR, > - TREE_TYPE (ptr), ptr, offset)); > - gimplify_assign (mem, src, &new_seq); > - pop_gimplify_context (NULL); > - gsi_replace_with_seq (gsi, new_seq, true); > - return true; > - } > - > - /* Convert this built-in into an internal version that uses pass-by-value > - arguments. The internal built-in follows immediately after this one. */ > - new_decl = rs6000_builtin_decls[fncode + 1]; > - tree lhs, op[MAX_MMA_OPERANDS]; > - tree acc = gimple_call_arg (stmt, 0); > - push_gimplify_context (true); > - > - if ((attr & RS6000_BTC_QUAD) != 0) > - { > - /* This built-in has a pass-by-reference accumulator input, so load it > - into a temporary accumulator for use as a pass-by-value input. */ > - op[0] = create_tmp_reg_or_ssa_name (vector_quad_type_node); > - for (unsigned i = 1; i < nopnds; i++) > - op[i] = gimple_call_arg (stmt, i); > - gimplify_assign (op[0], build_simple_mem_ref (acc), &new_seq); > - } > - else > - { > - /* This built-in does not use its pass-by-reference accumulator argument > - as an input argument, so remove it from the input list. */ > - nopnds--; > - for (unsigned i = 0; i < nopnds; i++) > - op[i] = gimple_call_arg (stmt, i + 1); > - } > - > - switch (nopnds) > - { > - case 0: > - new_call = gimple_build_call (new_decl, 0); > - break; > - case 1: > - new_call = gimple_build_call (new_decl, 1, op[0]); > - break; > - case 2: > - new_call = gimple_build_call (new_decl, 2, op[0], op[1]); > - break; > - case 3: > - new_call = gimple_build_call (new_decl, 3, op[0], op[1], op[2]); > - break; > - case 4: > - new_call = gimple_build_call (new_decl, 4, op[0], op[1], op[2], op[3]); > - break; > - case 5: > - new_call = gimple_build_call (new_decl, 5, op[0], op[1], op[2], op[3], > - op[4]); > - break; > - case 6: > - new_call = gimple_build_call (new_decl, 6, op[0], op[1], op[2], op[3], > - op[4], op[5]); > - break; > - case 7: > - new_call = gimple_build_call (new_decl, 7, op[0], op[1], op[2], op[3], > - op[4], op[5], op[6]); > - break; > - default: > - gcc_unreachable (); > - } > - > - if (fncode == VSX_BUILTIN_BUILD_PAIR || fncode == VSX_BUILTIN_ASSEMBLE_PAIR) > - lhs = create_tmp_reg_or_ssa_name (vector_pair_type_node); > - else > - lhs = create_tmp_reg_or_ssa_name (vector_quad_type_node); > - gimple_call_set_lhs (new_call, lhs); > - gimple_seq_add_stmt (&new_seq, new_call); > - gimplify_assign (build_simple_mem_ref (acc), lhs, &new_seq); > - pop_gimplify_context (NULL); > - gsi_replace_with_seq (gsi, new_seq, true); > - > - return true; > -} > - > /* Fold a machine-dependent built-in in GIMPLE. (For folding into > a constant, use rs6000_fold_builtin.) */ > > @@ -7255,5 +6545,3 @@ rs6000_output_mi_thunk (FILE *file, tree thunk_fndecl ATTRIBUTE_UNUSED, > reload_completed = 0; > epilogue_completed = 0; > } > - > -#include "gt-rs6000-call.h" > diff --git a/gcc/config/rs6000/rs6000-protos.h b/gcc/config/rs6000/rs6000-protos.h > index 14f6b313105..c01ae005d0b 100644 > --- a/gcc/config/rs6000/rs6000-protos.h > +++ b/gcc/config/rs6000/rs6000-protos.h > @@ -272,9 +272,6 @@ extern void rs6000_call_darwin (rtx, rtx, rtx, rtx); > extern void rs6000_sibcall_darwin (rtx, rtx, rtx, rtx); > extern void rs6000_aix_asm_output_dwarf_table_ref (char *); > extern void get_ppc476_thunk_name (char name[32]); > -extern bool rs6000_overloaded_builtin_p (enum rs6000_builtins); > -extern bool rs6000_builtin_is_supported_p (enum rs6000_builtins); > -extern const char *rs6000_overloaded_builtin_name (enum rs6000_builtins); > extern int rs6000_store_data_bypass_p (rtx_insn *, rtx_insn *); > extern HOST_WIDE_INT rs6000_builtin_mask_calculate (void); > extern void rs6000_asm_output_dwarf_pcrel (FILE *file, int size, > diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c > index 70df511ff98..4479c569476 100644 > --- a/gcc/config/rs6000/rs6000.c > +++ b/gcc/config/rs6000/rs6000.c > @@ -171,7 +171,6 @@ static int dbg_cost_ctrl; > > /* Built in types. */ > tree rs6000_builtin_types[RS6000_BTI_MAX]; > -tree rs6000_builtin_decls[RS6000_BUILTIN_COUNT]; > > /* Flag to say the TOC is initialized */ > int toc_initialized, need_toc_init; > @@ -2585,8 +2584,6 @@ rs6000_debug_reg_global (void) > (int)rs6000_sched_restricted_insns_priority); > fprintf (stderr, DEBUG_FMT_D, "Number of standard builtins", > (int)END_BUILTINS); > - fprintf (stderr, DEBUG_FMT_D, "Number of rs6000 builtins", > - (int)RS6000_BUILTIN_COUNT); > > fprintf (stderr, DEBUG_FMT_D, "Enable float128 on VSX", > (int)TARGET_FLOAT128_ENABLE_TYPE); > diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h > index b12ee8bfe5b..4d2f88d4218 100644 > --- a/gcc/config/rs6000/rs6000.h > +++ b/gcc/config/rs6000/rs6000.h > @@ -2344,62 +2344,6 @@ extern int frame_pointer_needed; > | RS6000_BTM_MMA \ > | RS6000_BTM_P10) > > -/* Define builtin enum index. */ > - > -#undef RS6000_BUILTIN_0 > -#undef RS6000_BUILTIN_1 > -#undef RS6000_BUILTIN_2 > -#undef RS6000_BUILTIN_3 > -#undef RS6000_BUILTIN_4 > -#undef RS6000_BUILTIN_A > -#undef RS6000_BUILTIN_D > -#undef RS6000_BUILTIN_H > -#undef RS6000_BUILTIN_M > -#undef RS6000_BUILTIN_P > -#undef RS6000_BUILTIN_X > - > -#define RS6000_BUILTIN_0(ENUM, NAME, MASK, ATTR, ICODE) ENUM, > -#define RS6000_BUILTIN_1(ENUM, NAME, MASK, ATTR, ICODE) ENUM, > -#define RS6000_BUILTIN_2(ENUM, NAME, MASK, ATTR, ICODE) ENUM, > -#define RS6000_BUILTIN_3(ENUM, NAME, MASK, ATTR, ICODE) ENUM, > -#define RS6000_BUILTIN_4(ENUM, NAME, MASK, ATTR, ICODE) ENUM, > -#define RS6000_BUILTIN_A(ENUM, NAME, MASK, ATTR, ICODE) ENUM, > -#define RS6000_BUILTIN_D(ENUM, NAME, MASK, ATTR, ICODE) ENUM, > -#define RS6000_BUILTIN_H(ENUM, NAME, MASK, ATTR, ICODE) ENUM, > -#define RS6000_BUILTIN_M(ENUM, NAME, MASK, ATTR, ICODE) ENUM, > -#define RS6000_BUILTIN_P(ENUM, NAME, MASK, ATTR, ICODE) ENUM, > -#define RS6000_BUILTIN_X(ENUM, NAME, MASK, ATTR, ICODE) ENUM, > - > -enum rs6000_builtins > -{ > -#include "rs6000-builtin.def" > - > - RS6000_BUILTIN_COUNT > -}; > - > -#undef RS6000_BUILTIN_0 > -#undef RS6000_BUILTIN_1 > -#undef RS6000_BUILTIN_2 > -#undef RS6000_BUILTIN_3 > -#undef RS6000_BUILTIN_4 > -#undef RS6000_BUILTIN_A > -#undef RS6000_BUILTIN_D > -#undef RS6000_BUILTIN_H > -#undef RS6000_BUILTIN_M > -#undef RS6000_BUILTIN_P > -#undef RS6000_BUILTIN_X > - > -/* Mappings for overloaded builtins. */ > -struct altivec_builtin_types > -{ > - enum rs6000_builtins code; > - enum rs6000_builtins overloaded_code; > - signed char ret_type; > - signed char op1; > - signed char op2; > - signed char op3; > -}; > - > enum rs6000_builtin_type_index > { > RS6000_BTI_NOT_OPAQUE, > @@ -2600,7 +2544,6 @@ enum rs6000_builtin_type_index > #define ptr_long_long_unsigned_type_node (rs6000_builtin_types[RS6000_BTI_ptr_long_long_unsigned]) > > extern GTY(()) tree rs6000_builtin_types[RS6000_BTI_MAX]; > -extern GTY(()) tree rs6000_builtin_decls[RS6000_BUILTIN_COUNT]; > > #ifndef USED_FOR_TARGET > extern GTY(()) tree builtin_mode_to_type[MAX_MACHINE_MODE][2]; > diff --git a/gcc/config/rs6000/t-rs6000 b/gcc/config/rs6000/t-rs6000 > index 3d3143a171d..98ddd977f96 100644 > --- a/gcc/config/rs6000/t-rs6000 > +++ b/gcc/config/rs6000/t-rs6000 > @@ -18,7 +18,6 @@ > # along with GCC; see the file COPYING3. If not see > # <http://www.gnu.org/licenses/>. > > -TM_H += $(srcdir)/config/rs6000/rs6000-builtin.def > TM_H += $(srcdir)/config/rs6000/rs6000-cpus.def > TM_H += $(srcdir)/config/rs6000/rs6000-modes.h > PASSES_EXTRA += $(srcdir)/config/rs6000/rs6000-passes.def ^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [PATCH 4/6] rs6000: Remove rs6000-builtin.def and associated data and functions 2021-12-06 20:49 ` [PATCH 4/6] rs6000: Remove rs6000-builtin.def and associated data and functions Bill Schmidt 2021-12-14 18:00 ` [PATCH v2 " Bill Schmidt @ 2021-12-14 18:08 ` David Edelsohn 1 sibling, 0 replies; 20+ messages in thread From: David Edelsohn @ 2021-12-14 18:08 UTC (permalink / raw) To: Bill Schmidt; +Cc: GCC Patches, Segher Boessenkool On Mon, Dec 6, 2021 at 3:49 PM Bill Schmidt <wschmidt@linux.ibm.com> wrote: > > Hi! > > The old rs6000-builtin.def file is no longer needed. Remove it and the code > that depends on it. > > Bootstrapped and tested on powerpc64le-linux-gnu with no regressions. Is this > okay for trunk? > > Thanks! > Bill > > 2021-12-02 Bill Schmidt <wschmidt@linux.ibm.com> > > gcc/ > * config/rs6000/rs6000-builtin.def: Delete. > * config/rs6000/rs6000-call.c (builtin_compatibility): Delete. > (builtin_description): Delete. > (builtin_hash_struct): Delete. > (builtin_hasher): Delete. > (builtin_hash_table): Delete. > (builtin_hasher::hash): Delete. > (builtin_hasher::equal): Delete. > (rs6000_builtin_info_type): Delete. > (rs6000_builtin_info): Delete. > (bdesc_compat): Delete. > (bdesc_3arg): Delete. > (bdesc_4arg): Delete. > (bdesc_dst): Delete. > (bdesc_2arg): Delete. > (bdesc_altivec_preds): Delete. > (bdesc_abs): Delete. > (bdesc_1arg): Delete. > (bdesc_0arg): Delete. > (bdesc_htm): Delete. > (bdesc_mma): Delete. > (rs6000_overloaded_builtin_p): Delete. > (rs6000_overloaded_builtin_name): Delete. > (htm_spr_num): Delete. > (rs6000_builtin_is_supported_p): Delete. > (rs6000_gimple_fold_mma_builtin): Delete. > (gt-rs6000-call.h): Remove include directive. > * config/rs6000/rs6000-protos.h (rs6000_overloaded_builtin_p): Delete. > (rs6000_builtin_is_supported_p): Delete. > (rs6000_overloaded_builtin_name): Delete. > * config/rs6000/rs6000.c (rs6000_builtin_decls): Delete. > (rs6000_debug_reg_global): Remove reference to RS6000_BUILTIN_COUNT. > * config/rs6000/rs6000.h (rs6000_builtins): Delete. > (altivec_builtin_types): Delete. > (rs6000_builtin_decls): Delete. > * config/rs6000/t-rs6000 (TM_H): Don't add rs6000-builtin.def. Okay. Thanks, David ^ permalink raw reply [flat|nested] 20+ messages in thread
* [PATCH 5/6] rs6000: Rename functions with "new" in their names 2021-12-06 20:49 [PATCH v2 0/6] Remove "old" built-in function infrastructure Bill Schmidt ` (3 preceding siblings ...) 2021-12-06 20:49 ` [PATCH 4/6] rs6000: Remove rs6000-builtin.def and associated data and functions Bill Schmidt @ 2021-12-06 20:49 ` Bill Schmidt 2021-12-14 18:01 ` [PATCH v2 /6] " Bill Schmidt 2021-12-14 18:08 ` [PATCH 5/6] " David Edelsohn 2021-12-06 20:49 ` [PATCH 6/6] rs6000: Rename arrays to remove temporary _x suffix Bill Schmidt 2021-12-14 17:32 ` [PATCH v2 0/6] Remove "old" built-in function infrastructure Bill Schmidt 6 siblings, 2 replies; 20+ messages in thread From: Bill Schmidt @ 2021-12-06 20:49 UTC (permalink / raw) To: gcc-patches; +Cc: segher, dje.gcc Hi! While we had two sets of built-in functionality at the same time, I put "new" in the names of quite a few functions. Time to undo that. Bootstrapped and tested on powerpc64le-linux-gnu with no regressions. Is this okay for trunk? Thanks! Bill 2021-12-02 Bill Schmidt <wschmidt@linux.ibm.com> gcc/ * config/rs6000/rs6000-c.c (altivec_resolve_new_overloaded_builtin): Remove forward declaration. (rs6000_new_builtin_type_compatible): Rename to rs6000_builtin_type_compatible. (rs6000_builtin_type_compatible): Remove. (altivec_resolve_overloaded_builtin): Remove. (altivec_build_new_resolved_builtin): Rename to altivec_build_resolved_builtin. (altivec_resolve_new_overloaded_builtin): Rename to altivec_resolve_overloaded_builtin. Remove static keyword. Adjust called function names. * config/rs6000/rs6000-call.c (rs6000_expand_new_builtin): Remove forward declaration. (rs6000_gimple_fold_new_builtin): Likewise. (rs6000_invalid_new_builtin): Rename to rs6000_invalid_builtin. (rs6000_gimple_fold_builtin): Remove. (rs6000_new_builtin_valid_without_lhs): Rename to rs6000_builtin_valid_without_lhs. (rs6000_new_builtin_is_supported): Rename to rs6000_builtin_is_supported. (rs6000_gimple_fold_new_mma_builtin): Rename to rs6000_gimple_fold_mma_builtin. (rs6000_gimple_fold_new_builtin): Rename to rs6000_gimple_fold_builtin. Remove static keyword. Adjust called function names. (rs6000_expand_builtin): Remove. (new_cpu_expand_builtin): Rename to cpu_expand_builtin. (new_mma_expand_builtin): Rename to mma_expand_builtin. (new_htm_spr_num): Rename to htm_spr_num. (new_htm_expand_builtin): Rename to htm_expand_builtin. Change name of called function. (rs6000_expand_new_builtin): Rename to rs6000_expand_builtin. Remove static keyword. Adjust called function names. (rs6000_new_builtin_decl): Rename to rs6000_builtin_decl. Remove static keyword. (rs6000_builtin_decl): Remove. * config/rs6000/rs6000-gen-builtins.c (write_decls): In gnerated code, rename rs6000_new_builtin_is_supported to rs6000_builtin_is_supported. * config/rs6000/rs6000-internal.h (rs6000_invalid_new_builtin): Rename to rs6000_invalid_builtin. * config/rs6000/rs6000.c (rs6000_new_builtin_vectorized_function): Rename to rs6000_builtin_vectorized_function. (rs6000_new_builtin_md_vectorized_function): Rename to rs6000_builtin_md_vectorized_function. (rs6000_builtin_vectorized_function): Remove. (rs6000_builtin_md_vectorized_function): Remove. --- gcc/config/rs6000/rs6000-c.c | 120 +++++++++--------------- gcc/config/rs6000/rs6000-call.c | 99 ++++++------------- gcc/config/rs6000/rs6000-gen-builtins.c | 3 +- gcc/config/rs6000/rs6000-internal.h | 2 +- gcc/config/rs6000/rs6000.c | 31 ++---- 5 files changed, 80 insertions(+), 175 deletions(-) diff --git a/gcc/config/rs6000/rs6000-c.c b/gcc/config/rs6000/rs6000-c.c index d44edf585aa..f790c72d621 100644 --- a/gcc/config/rs6000/rs6000-c.c +++ b/gcc/config/rs6000/rs6000-c.c @@ -37,9 +37,6 @@ #include "rs6000-internal.h" -static tree altivec_resolve_new_overloaded_builtin (location_t, tree, void *); - - /* Handle the machine specific pragma longcall. Its syntax is # pragma longcall ( TOGGLE ) @@ -817,7 +814,7 @@ is_float128_p (tree t) /* Return true iff ARGTYPE can be compatibly passed as PARMTYPE. */ static bool -rs6000_new_builtin_type_compatible (tree parmtype, tree argtype) +rs6000_builtin_type_compatible (tree parmtype, tree argtype) { if (parmtype == error_mark_node) return false; @@ -840,23 +837,6 @@ rs6000_new_builtin_type_compatible (tree parmtype, tree argtype) return lang_hooks.types_compatible_p (parmtype, argtype); } -static inline bool -rs6000_builtin_type_compatible (tree t, int id) -{ - tree builtin_type; - builtin_type = rs6000_builtin_type (id); - if (t == error_mark_node) - return false; - if (INTEGRAL_TYPE_P (t) && INTEGRAL_TYPE_P (builtin_type)) - return true; - else if (TARGET_IEEEQUAD && TARGET_LONG_DOUBLE_128 - && is_float128_p (t) && is_float128_p (builtin_type)) - return true; - else - return lang_hooks.types_compatible_p (t, builtin_type); -} - - /* In addition to calling fold_convert for EXPR of type TYPE, also call c_fully_fold to remove any C_MAYBE_CONST_EXPRs that could be hiding there (PR47197). */ @@ -873,16 +853,6 @@ fully_fold_convert (tree type, tree expr) return result; } -/* Implementation of the resolve_overloaded_builtin target hook, to - support Altivec's overloaded builtins. */ - -tree -altivec_resolve_overloaded_builtin (location_t loc, tree fndecl, - void *passed_arglist) -{ - return altivec_resolve_new_overloaded_builtin (loc, fndecl, passed_arglist); -} - /* Build a tree for a function call to an Altivec non-overloaded builtin. The overloaded builtin that matched the types and args is described by DESC. The N arguments are given in ARGS, respectively. @@ -891,10 +861,9 @@ altivec_resolve_overloaded_builtin (location_t loc, tree fndecl, a small exception for vec_{all,any}_{ge,le} predicates. */ static tree -altivec_build_new_resolved_builtin (tree *args, int n, tree fntype, - tree ret_type, - rs6000_gen_builtins bif_id, - rs6000_gen_builtins ovld_id) +altivec_build_resolved_builtin (tree *args, int n, tree fntype, tree ret_type, + rs6000_gen_builtins bif_id, + rs6000_gen_builtins ovld_id) { tree argtypes = TYPE_ARG_TYPES (fntype); tree arg_type[MAX_OVLD_ARGS]; @@ -963,9 +932,9 @@ altivec_build_new_resolved_builtin (tree *args, int n, tree fntype, support Altivec's overloaded builtins. FIXME: This code needs to be brutally factored. */ -static tree -altivec_resolve_new_overloaded_builtin (location_t loc, tree fndecl, - void *passed_arglist) +tree +altivec_resolve_overloaded_builtin (location_t loc, tree fndecl, + void *passed_arglist) { vec<tree, va_gc> *arglist = static_cast<vec<tree, va_gc> *> (passed_arglist); unsigned int nargs = vec_safe_length (arglist); @@ -1096,7 +1065,7 @@ altivec_resolve_new_overloaded_builtin (location_t loc, tree fndecl, vec<tree, va_gc> *params = make_tree_vector (); vec_safe_push (params, arg0); vec_safe_push (params, arg1); - tree call = altivec_resolve_new_overloaded_builtin + tree call = altivec_resolve_overloaded_builtin (loc, rs6000_builtin_decls_x[RS6000_OVLD_VEC_CMPEQ], params); /* Use save_expr to ensure that operands used more than once @@ -1106,7 +1075,7 @@ altivec_resolve_new_overloaded_builtin (location_t loc, tree fndecl, params = make_tree_vector (); vec_safe_push (params, call); vec_safe_push (params, call); - return altivec_resolve_new_overloaded_builtin + return altivec_resolve_overloaded_builtin (loc, rs6000_builtin_decls_x[RS6000_OVLD_VEC_NOR], params); } /* Other types are errors. */ @@ -1165,9 +1134,8 @@ altivec_resolve_new_overloaded_builtin (location_t loc, tree fndecl, add_sub_builtin = rs6000_builtin_decls_x[RS6000_OVLD_VEC_SUB]; tree call - = altivec_resolve_new_overloaded_builtin (loc, - add_sub_builtin, - params); + = altivec_resolve_overloaded_builtin (loc, add_sub_builtin, + params); tree const1 = build_int_cstu (TREE_TYPE (arg0_type), 1); tree ones_vector = build_vector_from_val (arg0_type, const1); tree and_expr = fold_build2_loc (loc, BIT_AND_EXPR, arg0_type, @@ -1175,9 +1143,8 @@ altivec_resolve_new_overloaded_builtin (location_t loc, tree fndecl, params = make_tree_vector (); vec_safe_push (params, call); vec_safe_push (params, and_expr); - return altivec_resolve_new_overloaded_builtin (loc, - add_sub_builtin, - params); + return altivec_resolve_overloaded_builtin (loc, add_sub_builtin, + params); } /* For {un}signed __int128s use the vaddeuqm/vsubeuqm instruction directly. */ @@ -1244,9 +1211,8 @@ altivec_resolve_new_overloaded_builtin (location_t loc, tree fndecl, else as_c_builtin = rs6000_builtin_decls_x[RS6000_OVLD_VEC_SUBC]; - tree call1 = altivec_resolve_new_overloaded_builtin (loc, - as_c_builtin, - params); + tree call1 = altivec_resolve_overloaded_builtin (loc, as_c_builtin, + params); params = make_tree_vector (); vec_safe_push (params, arg0); vec_safe_push (params, arg1); @@ -1256,9 +1222,8 @@ altivec_resolve_new_overloaded_builtin (location_t loc, tree fndecl, else as_builtin = rs6000_builtin_decls_x[RS6000_OVLD_VEC_SUB]; - tree call2 = altivec_resolve_new_overloaded_builtin (loc, - as_builtin, - params); + tree call2 = altivec_resolve_overloaded_builtin (loc, as_builtin, + params); tree const1 = build_int_cstu (TREE_TYPE (arg0_type), 1); tree ones_vector = build_vector_from_val (arg0_type, const1); tree and_expr = fold_build2_loc (loc, BIT_AND_EXPR, arg0_type, @@ -1266,14 +1231,14 @@ altivec_resolve_new_overloaded_builtin (location_t loc, tree fndecl, params = make_tree_vector (); vec_safe_push (params, call2); vec_safe_push (params, and_expr); - call2 = altivec_resolve_new_overloaded_builtin (loc, as_c_builtin, - params); + call2 = altivec_resolve_overloaded_builtin (loc, as_c_builtin, + params); params = make_tree_vector (); vec_safe_push (params, call1); vec_safe_push (params, call2); tree or_builtin = rs6000_builtin_decls_x[RS6000_OVLD_VEC_OR]; - return altivec_resolve_new_overloaded_builtin (loc, or_builtin, - params); + return altivec_resolve_overloaded_builtin (loc, or_builtin, + params); } /* For {un}signed __int128s use the vaddecuq/vsubbecuq instructions. This occurs through normal processing. */ @@ -1779,17 +1744,17 @@ altivec_resolve_new_overloaded_builtin (location_t loc, tree fndecl, tree parmtype0 = TREE_VALUE (TYPE_ARG_TYPES (fntype)); tree parmtype1 = TREE_VALUE (TREE_CHAIN (TYPE_ARG_TYPES (fntype))); - if (rs6000_new_builtin_type_compatible (types[0], parmtype0) - && rs6000_new_builtin_type_compatible (types[1], parmtype1)) + if (rs6000_builtin_type_compatible (types[0], parmtype0) + && rs6000_builtin_type_compatible (types[1], parmtype1)) { if (rs6000_builtin_decl (instance->bifid, false) != error_mark_node - && rs6000_new_builtin_is_supported (instance->bifid)) + && rs6000_builtin_is_supported (instance->bifid)) { tree ret_type = TREE_TYPE (instance->fntype); - return altivec_build_new_resolved_builtin (args, n, fntype, - ret_type, - instance->bifid, - fcode); + return altivec_build_resolved_builtin (args, n, fntype, + ret_type, + instance->bifid, + fcode); } else unsupported_builtin = true; @@ -1837,17 +1802,17 @@ altivec_resolve_new_overloaded_builtin (location_t loc, tree fndecl, tree parmtype0 = TREE_VALUE (TYPE_ARG_TYPES (fntype)); tree parmtype1 = TREE_VALUE (TREE_CHAIN (TYPE_ARG_TYPES (fntype))); - if (rs6000_new_builtin_type_compatible (types[0], parmtype0) - && rs6000_new_builtin_type_compatible (types[1], parmtype1)) + if (rs6000_builtin_type_compatible (types[0], parmtype0) + && rs6000_builtin_type_compatible (types[1], parmtype1)) { if (rs6000_builtin_decl (instance->bifid, false) != error_mark_node - && rs6000_new_builtin_is_supported (instance->bifid)) + && rs6000_builtin_is_supported (instance->bifid)) { tree ret_type = TREE_TYPE (instance->fntype); - return altivec_build_new_resolved_builtin (args, n, fntype, - ret_type, - instance->bifid, - fcode); + return altivec_build_resolved_builtin (args, n, fntype, + ret_type, + instance->bifid, + fcode); } else unsupported_builtin = true; @@ -1869,8 +1834,7 @@ altivec_resolve_new_overloaded_builtin (location_t loc, tree fndecl, arg_i++) { tree parmtype = TREE_VALUE (nextparm); - if (!rs6000_new_builtin_type_compatible (types[arg_i], - parmtype)) + if (!rs6000_builtin_type_compatible (types[arg_i], parmtype)) { mismatch = true; break; @@ -1881,16 +1845,16 @@ altivec_resolve_new_overloaded_builtin (location_t loc, tree fndecl, if (mismatch) continue; - supported = rs6000_new_builtin_is_supported (instance->bifid); + supported = rs6000_builtin_is_supported (instance->bifid); if (rs6000_builtin_decl (instance->bifid, false) != error_mark_node && supported) { tree fntype = rs6000_builtin_info_x[instance->bifid].fntype; tree ret_type = TREE_TYPE (instance->fntype); - return altivec_build_new_resolved_builtin (args, n, fntype, - ret_type, - instance->bifid, - fcode); + return altivec_build_resolved_builtin (args, n, fntype, + ret_type, + instance->bifid, + fcode); } else { @@ -1908,7 +1872,7 @@ altivec_resolve_new_overloaded_builtin (location_t loc, tree fndecl, /* Indicate that the instantiation of the overloaded builtin name is not available with the target flags in effect. */ rs6000_gen_builtins fcode = (rs6000_gen_builtins) instance->bifid; - rs6000_invalid_new_builtin (fcode); + rs6000_invalid_builtin (fcode); /* Provide clarity of the relationship between the overload and the instantiation. */ const char *internal_name diff --git a/gcc/config/rs6000/rs6000-call.c b/gcc/config/rs6000/rs6000-call.c index a5ee06c991f..5ce0d2cef88 100644 --- a/gcc/config/rs6000/rs6000-call.c +++ b/gcc/config/rs6000/rs6000-call.c @@ -167,9 +167,6 @@ static const struct { "arch_3_1", PPC_FEATURE2_ARCH_3_1, 1 }, { "mma", PPC_FEATURE2_MMA, 1 }, }; - -static rtx rs6000_expand_new_builtin (tree, rtx, rtx, machine_mode, int); -static bool rs6000_gimple_fold_new_builtin (gimple_stmt_iterator *gsi); \f /* Nonzero if we can use a floating-point register to pass this arg. */ #define USE_FP_FOR_ARG_P(CUM,MODE) \ @@ -3258,7 +3255,7 @@ altivec_expand_vec_ext_builtin (tree exp, rtx target) appropriate target options being set. */ void -rs6000_invalid_new_builtin (enum rs6000_gen_builtins fncode) +rs6000_invalid_builtin (enum rs6000_gen_builtins fncode) { size_t j = (size_t) fncode; const char *name = rs6000_builtin_info_x[j].bifname; @@ -3479,20 +3476,11 @@ fold_mergeeo_helper (gimple_stmt_iterator *gsi, gimple *stmt, int use_odd) gsi_replace (gsi, g, true); } -/* Fold a machine-dependent built-in in GIMPLE. (For folding into - a constant, use rs6000_fold_builtin.) */ - -bool -rs6000_gimple_fold_builtin (gimple_stmt_iterator *gsi) -{ - return rs6000_gimple_fold_new_builtin (gsi); -} - /* Helper function to sort out which built-ins may be valid without having a LHS. */ static bool -rs6000_new_builtin_valid_without_lhs (enum rs6000_gen_builtins fn_code, - tree fndecl) +rs6000_builtin_valid_without_lhs (enum rs6000_gen_builtins fn_code, + tree fndecl) { if (TREE_TYPE (TREE_TYPE (fndecl)) == void_type_node) return true; @@ -3520,7 +3508,7 @@ rs6000_new_builtin_valid_without_lhs (enum rs6000_gen_builtins fn_code, /* Check whether a builtin function is supported in this target configuration. */ bool -rs6000_new_builtin_is_supported (enum rs6000_gen_builtins fncode) +rs6000_builtin_is_supported (enum rs6000_gen_builtins fncode) { switch (rs6000_builtin_info_x[(size_t) fncode].enable) { @@ -3576,8 +3564,8 @@ rs6000_new_builtin_is_supported (enum rs6000_gen_builtins fncode) __vector_quad arguments into pass-by-value arguments, leading to more efficient code generation. */ static bool -rs6000_gimple_fold_new_mma_builtin (gimple_stmt_iterator *gsi, - rs6000_gen_builtins fn_code) +rs6000_gimple_fold_mma_builtin (gimple_stmt_iterator *gsi, + rs6000_gen_builtins fn_code) { gimple *stmt = gsi_stmt (*gsi); size_t fncode = (size_t) fn_code; @@ -3776,8 +3764,8 @@ rs6000_gimple_fold_new_mma_builtin (gimple_stmt_iterator *gsi, /* Fold a machine-dependent built-in in GIMPLE. (For folding into a constant, use rs6000_fold_builtin.) */ -static bool -rs6000_gimple_fold_new_builtin (gimple_stmt_iterator *gsi) +bool +rs6000_gimple_fold_builtin (gimple_stmt_iterator *gsi) { gimple *stmt = gsi_stmt (*gsi); tree fndecl = gimple_call_fndecl (stmt); @@ -3796,23 +3784,23 @@ rs6000_gimple_fold_new_builtin (gimple_stmt_iterator *gsi) : "nothing"; if (TARGET_DEBUG_BUILTIN) - fprintf (stderr, "rs6000_gimple_fold_new_builtin %d %s %s\n", + fprintf (stderr, "rs6000_gimple_fold_builtin %d %s %s\n", fn_code, fn_name1, fn_name2); if (!rs6000_fold_gimple) return false; /* Prevent gimple folding for code that does not have a LHS, unless it is - allowed per the rs6000_new_builtin_valid_without_lhs helper function. */ + allowed per the rs6000_builtin_valid_without_lhs helper function. */ if (!gimple_call_lhs (stmt) - && !rs6000_new_builtin_valid_without_lhs (fn_code, fndecl)) + && !rs6000_builtin_valid_without_lhs (fn_code, fndecl)) return false; /* Don't fold invalid builtins, let rs6000_expand_builtin diagnose it. */ - if (!rs6000_new_builtin_is_supported (fn_code)) + if (!rs6000_builtin_is_supported (fn_code)) return false; - if (rs6000_gimple_fold_new_mma_builtin (gsi, fn_code)) + if (rs6000_gimple_fold_mma_builtin (gsi, fn_code)) return true; switch (fn_code) @@ -4755,20 +4743,6 @@ rs6000_gimple_fold_new_builtin (gimple_stmt_iterator *gsi) return false; } -/* Expand an expression EXP that calls a built-in function, - with result going to TARGET if that's convenient - (and in mode MODE if that's convenient). - SUBTARGET may be used as the target for computing one of EXP's operands. - IGNORE is nonzero if the value is to be ignored. */ - -rtx -rs6000_expand_builtin (tree exp, rtx target, rtx subtarget ATTRIBUTE_UNUSED, - machine_mode mode ATTRIBUTE_UNUSED, - int ignore ATTRIBUTE_UNUSED) -{ - return rs6000_expand_new_builtin (exp, target, subtarget, mode, ignore); -} - /* Expand ALTIVEC_BUILTIN_MASK_FOR_LOAD. */ rtx rs6000_expand_ldst_mask (rtx target, tree arg0) @@ -4803,8 +4777,8 @@ rs6000_expand_ldst_mask (rtx target, tree arg0) /* Expand the CPU builtin in FCODE and store the result in TARGET. */ static rtx -new_cpu_expand_builtin (enum rs6000_gen_builtins fcode, - tree exp ATTRIBUTE_UNUSED, rtx target) +cpu_expand_builtin (enum rs6000_gen_builtins fcode, + tree exp ATTRIBUTE_UNUSED, rtx target) { /* __builtin_cpu_init () is a nop, so expand to nothing. */ if (fcode == RS6000_BIF_CPU_INIT) @@ -5206,8 +5180,8 @@ stv_expand_builtin (insn_code icode, rtx *op, /* Expand the MMA built-in in EXP, and return it. */ static rtx -new_mma_expand_builtin (tree exp, rtx target, insn_code icode, - rs6000_gen_builtins fcode) +mma_expand_builtin (tree exp, rtx target, insn_code icode, + rs6000_gen_builtins fcode) { tree fndecl = TREE_OPERAND (CALL_EXPR_FN (exp), 0); bool void_func = TREE_TYPE (TREE_TYPE (fndecl)) == void_type_node; @@ -5319,7 +5293,7 @@ new_mma_expand_builtin (tree exp, rtx target, insn_code icode, /* Return the appropriate SPR number associated with the given builtin. */ static inline HOST_WIDE_INT -new_htm_spr_num (enum rs6000_gen_builtins code) +htm_spr_num (enum rs6000_gen_builtins code) { if (code == RS6000_BIF_GET_TFHAR || code == RS6000_BIF_SET_TFHAR) @@ -5338,8 +5312,8 @@ new_htm_spr_num (enum rs6000_gen_builtins code) /* Expand the HTM builtin in EXP and store the result in TARGET. Return the expanded rtx. */ static rtx -new_htm_expand_builtin (bifdata *bifaddr, rs6000_gen_builtins fcode, - tree exp, rtx target) +htm_expand_builtin (bifdata *bifaddr, rs6000_gen_builtins fcode, + tree exp, rtx target) { if (!TARGET_POWERPC64 && (fcode == RS6000_BIF_TABORTDC @@ -5425,7 +5399,7 @@ new_htm_expand_builtin (bifdata *bifaddr, rs6000_gen_builtins fcode, if (uses_spr) { machine_mode mode = TARGET_POWERPC64 ? DImode : SImode; - op[nopnds++] = gen_rtx_CONST_INT (mode, new_htm_spr_num (fcode)); + op[nopnds++] = gen_rtx_CONST_INT (mode, htm_spr_num (fcode)); } /* If this builtin accesses a CR field, then pass in a scratch CR field as the last operand. */ @@ -5497,11 +5471,9 @@ new_htm_expand_builtin (bifdata *bifaddr, rs6000_gen_builtins fcode, SUBTARGET may be used as the target for computing one of EXP's operands. IGNORE is nonzero if the value is to be ignored. Use the new builtin infrastructure. */ -static rtx -rs6000_expand_new_builtin (tree exp, rtx target, - rtx /* subtarget */, - machine_mode /* mode */, - int ignore) +rtx +rs6000_expand_builtin (tree exp, rtx target, rtx /* subtarget */, + machine_mode /* mode */, int ignore) { tree fndecl = TREE_OPERAND (CALL_EXPR_FN (exp), 0); enum rs6000_gen_builtins fcode @@ -5610,7 +5582,7 @@ rs6000_expand_new_builtin (tree exp, rtx target, || (e == ENB_P10_64 && TARGET_POWER10 && TARGET_POWERPC64) || (e == ENB_MMA && TARGET_MMA))) { - rs6000_invalid_new_builtin (fcode); + rs6000_invalid_builtin (fcode); return expand_call (exp, target, ignore); } @@ -5629,7 +5601,7 @@ rs6000_expand_new_builtin (tree exp, rtx target, } if (bif_is_cpu (*bifaddr)) - return new_cpu_expand_builtin (fcode, exp, target); + return cpu_expand_builtin (fcode, exp, target); if (bif_is_init (*bifaddr)) return altivec_expand_vec_init_builtin (TREE_TYPE (exp), exp, target); @@ -5644,7 +5616,7 @@ rs6000_expand_new_builtin (tree exp, rtx target, return altivec_expand_predicate_builtin (icode, exp, target); if (bif_is_htm (*bifaddr)) - return new_htm_expand_builtin (bifaddr, fcode, exp, target); + return htm_expand_builtin (bifaddr, fcode, exp, target); if (bif_is_32bit (*bifaddr) && TARGET_32BIT) { @@ -5830,7 +5802,7 @@ rs6000_expand_new_builtin (tree exp, rtx target, return lxvrze_expand_builtin (target, icode, op, mode[0], mode[1]); if (bif_is_mma (*bifaddr)) - return new_mma_expand_builtin (exp, target, icode, fcode); + return mma_expand_builtin (exp, target, icode, fcode); if (fcode == RS6000_BIF_PACK_IF && TARGET_LONG_DOUBLE_128 @@ -6379,8 +6351,8 @@ rs6000_init_builtins (void) return; } -static tree -rs6000_new_builtin_decl (unsigned code, bool /* initialize_p */) +tree +rs6000_builtin_decl (unsigned code, bool /* initialize_p */) { rs6000_gen_builtins fcode = (rs6000_gen_builtins) code; @@ -6390,17 +6362,6 @@ rs6000_new_builtin_decl (unsigned code, bool /* initialize_p */) return rs6000_builtin_decls_x[code]; } -/* Returns the rs6000 builtin decl for CODE. Note that we don't check - the builtin mask here since there could be some #pragma/attribute - target functions and the rs6000_builtin_mask could be wrong when - this checking happens, though it will be updated properly later. */ - -tree -rs6000_builtin_decl (unsigned code, bool initialize_p ATTRIBUTE_UNUSED) -{ - return rs6000_new_builtin_decl (code, initialize_p); -} - /* Return the internal arg pointer used for function incoming arguments. When -fsplit-stack, the arg pointer is r12 so we need to copy it to a pseudo in order for it to be preserved over calls diff --git a/gcc/config/rs6000/rs6000-gen-builtins.c b/gcc/config/rs6000/rs6000-gen-builtins.c index 9c61b7d9fe6..114289a0034 100644 --- a/gcc/config/rs6000/rs6000-gen-builtins.c +++ b/gcc/config/rs6000/rs6000-gen-builtins.c @@ -2375,8 +2375,7 @@ write_decls (void) fprintf (header_file, "extern void rs6000_init_generated_builtins ();\n\n"); fprintf (header_file, - "extern bool rs6000_new_builtin_is_supported " - "(rs6000_gen_builtins);\n"); + "extern bool rs6000_builtin_is_supported (rs6000_gen_builtins);\n"); fprintf (header_file, "extern tree rs6000_builtin_decl (unsigned, " "bool ATTRIBUTE_UNUSED);\n\n"); diff --git a/gcc/config/rs6000/rs6000-internal.h b/gcc/config/rs6000/rs6000-internal.h index a880fd37618..49904b3f33d 100644 --- a/gcc/config/rs6000/rs6000-internal.h +++ b/gcc/config/rs6000/rs6000-internal.h @@ -142,7 +142,7 @@ extern void rs6000_output_mi_thunk (FILE *file, extern bool rs6000_output_addr_const_extra (FILE *file, rtx x); extern bool rs6000_gimple_fold_builtin (gimple_stmt_iterator *gsi); extern tree rs6000_build_builtin_va_list (void); -extern void rs6000_invalid_new_builtin (rs6000_gen_builtins fncode); +extern void rs6000_invalid_builtin (rs6000_gen_builtins fncode); extern void rs6000_va_start (tree valist, rtx nextarg); extern tree rs6000_gimplify_va_arg (tree valist, tree type, gimple_seq *pre_p, gimple_seq *post_p); diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c index 4479c569476..38e22f927c5 100644 --- a/gcc/config/rs6000/rs6000.c +++ b/gcc/config/rs6000/rs6000.c @@ -5568,14 +5568,14 @@ rs6000_loop_unroll_adjust (unsigned nunroll, struct loop *loop) Implement targetm.vectorize.builtin_vectorized_function. */ static tree -rs6000_new_builtin_vectorized_function (unsigned int fn, tree type_out, - tree type_in) +rs6000_builtin_vectorized_function (unsigned int fn, tree type_out, + tree type_in) { machine_mode in_mode, out_mode; int in_n, out_n; if (TARGET_DEBUG_BUILTIN) - fprintf (stderr, "rs6000_new_builtin_vectorized_function (%s, %s, %s)\n", + fprintf (stderr, "rs6000_builtin_vectorized_function (%s, %s, %s)\n", combined_fn_name (combined_fn (fn)), GET_MODE_NAME (TYPE_MODE (type_out)), GET_MODE_NAME (TYPE_MODE (type_in))); @@ -5700,15 +5700,15 @@ rs6000_new_builtin_vectorized_function (unsigned int fn, tree type_out, /* Implement targetm.vectorize.builtin_md_vectorized_function. */ static tree -rs6000_new_builtin_md_vectorized_function (tree fndecl, tree type_out, - tree type_in) +rs6000_builtin_md_vectorized_function (tree fndecl, tree type_out, + tree type_in) { machine_mode in_mode, out_mode; int in_n, out_n; if (TARGET_DEBUG_BUILTIN) fprintf (stderr, - "rs6000_new_builtin_md_vectorized_function (%s, %s, %s)\n", + "rs6000_builtin_md_vectorized_function (%s, %s, %s)\n", IDENTIFIER_POINTER (DECL_NAME (fndecl)), GET_MODE_NAME (TYPE_MODE (type_out)), GET_MODE_NAME (TYPE_MODE (type_in))); @@ -5918,25 +5918,6 @@ rs6000_builtin_vectorized_libmass (combined_fn fn, tree type_out, return new_fndecl; } -/* Returns a function decl for a vectorized version of the builtin function - with builtin function code FN and the result vector type TYPE, or NULL_TREE - if it is not available. */ - -static tree -rs6000_builtin_vectorized_function (unsigned int fn, tree type_out, - tree type_in) -{ - return rs6000_new_builtin_vectorized_function (fn, type_out, type_in); -} - -/* Implement TARGET_VECTORIZE_BUILTIN_MD_VECTORIZED_FUNCTION. */ - -static tree -rs6000_builtin_md_vectorized_function (tree fndecl, tree type_out, - tree type_in) -{ - return rs6000_new_builtin_md_vectorized_function (fndecl, type_out, type_in); -} \f /* Default CPU string for rs6000*_file_start functions. */ static const char *rs6000_default_cpu; -- 2.27.0 ^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [PATCH v2 /6] rs6000: Rename functions with "new" in their names 2021-12-06 20:49 ` [PATCH 5/6] rs6000: Rename functions with "new" in their names Bill Schmidt @ 2021-12-14 18:01 ` Bill Schmidt 2021-12-14 18:08 ` [PATCH 5/6] " David Edelsohn 1 sibling, 0 replies; 20+ messages in thread From: Bill Schmidt @ 2021-12-14 18:01 UTC (permalink / raw) To: gcc-patches; +Cc: dje.gcc, segher Ping. Thanks! Bill On 12/6/21 2:49 PM, Bill Schmidt via Gcc-patches wrote: > Hi! > > While we had two sets of built-in functionality at the same time, I put "new" > in the names of quite a few functions. Time to undo that. > > Bootstrapped and tested on powerpc64le-linux-gnu with no regressions. Is this > okay for trunk? > > Thanks! > Bill > > 2021-12-02 Bill Schmidt <wschmidt@linux.ibm.com> > > gcc/ > * config/rs6000/rs6000-c.c (altivec_resolve_new_overloaded_builtin): > Remove forward declaration. > (rs6000_new_builtin_type_compatible): Rename to > rs6000_builtin_type_compatible. > (rs6000_builtin_type_compatible): Remove. > (altivec_resolve_overloaded_builtin): Remove. > (altivec_build_new_resolved_builtin): Rename to > altivec_build_resolved_builtin. > (altivec_resolve_new_overloaded_builtin): Rename to > altivec_resolve_overloaded_builtin. Remove static keyword. Adjust > called function names. > * config/rs6000/rs6000-call.c (rs6000_expand_new_builtin): Remove > forward declaration. > (rs6000_gimple_fold_new_builtin): Likewise. > (rs6000_invalid_new_builtin): Rename to rs6000_invalid_builtin. > (rs6000_gimple_fold_builtin): Remove. > (rs6000_new_builtin_valid_without_lhs): Rename to > rs6000_builtin_valid_without_lhs. > (rs6000_new_builtin_is_supported): Rename to > rs6000_builtin_is_supported. > (rs6000_gimple_fold_new_mma_builtin): Rename to > rs6000_gimple_fold_mma_builtin. > (rs6000_gimple_fold_new_builtin): Rename to > rs6000_gimple_fold_builtin. Remove static keyword. Adjust called > function names. > (rs6000_expand_builtin): Remove. > (new_cpu_expand_builtin): Rename to cpu_expand_builtin. > (new_mma_expand_builtin): Rename to mma_expand_builtin. > (new_htm_spr_num): Rename to htm_spr_num. > (new_htm_expand_builtin): Rename to htm_expand_builtin. Change name > of called function. > (rs6000_expand_new_builtin): Rename to rs6000_expand_builtin. Remove > static keyword. Adjust called function names. > (rs6000_new_builtin_decl): Rename to rs6000_builtin_decl. Remove > static keyword. > (rs6000_builtin_decl): Remove. > * config/rs6000/rs6000-gen-builtins.c (write_decls): In gnerated code, > rename rs6000_new_builtin_is_supported to rs6000_builtin_is_supported. > * config/rs6000/rs6000-internal.h (rs6000_invalid_new_builtin): Rename > to rs6000_invalid_builtin. > * config/rs6000/rs6000.c (rs6000_new_builtin_vectorized_function): > Rename to rs6000_builtin_vectorized_function. > (rs6000_new_builtin_md_vectorized_function): Rename to > rs6000_builtin_md_vectorized_function. > (rs6000_builtin_vectorized_function): Remove. > (rs6000_builtin_md_vectorized_function): Remove. > --- > gcc/config/rs6000/rs6000-c.c | 120 +++++++++--------------- > gcc/config/rs6000/rs6000-call.c | 99 ++++++------------- > gcc/config/rs6000/rs6000-gen-builtins.c | 3 +- > gcc/config/rs6000/rs6000-internal.h | 2 +- > gcc/config/rs6000/rs6000.c | 31 ++---- > 5 files changed, 80 insertions(+), 175 deletions(-) > > diff --git a/gcc/config/rs6000/rs6000-c.c b/gcc/config/rs6000/rs6000-c.c > index d44edf585aa..f790c72d621 100644 > --- a/gcc/config/rs6000/rs6000-c.c > +++ b/gcc/config/rs6000/rs6000-c.c > @@ -37,9 +37,6 @@ > > #include "rs6000-internal.h" > > -static tree altivec_resolve_new_overloaded_builtin (location_t, tree, void *); > - > - > /* Handle the machine specific pragma longcall. Its syntax is > > # pragma longcall ( TOGGLE ) > @@ -817,7 +814,7 @@ is_float128_p (tree t) > > /* Return true iff ARGTYPE can be compatibly passed as PARMTYPE. */ > static bool > -rs6000_new_builtin_type_compatible (tree parmtype, tree argtype) > +rs6000_builtin_type_compatible (tree parmtype, tree argtype) > { > if (parmtype == error_mark_node) > return false; > @@ -840,23 +837,6 @@ rs6000_new_builtin_type_compatible (tree parmtype, tree argtype) > return lang_hooks.types_compatible_p (parmtype, argtype); > } > > -static inline bool > -rs6000_builtin_type_compatible (tree t, int id) > -{ > - tree builtin_type; > - builtin_type = rs6000_builtin_type (id); > - if (t == error_mark_node) > - return false; > - if (INTEGRAL_TYPE_P (t) && INTEGRAL_TYPE_P (builtin_type)) > - return true; > - else if (TARGET_IEEEQUAD && TARGET_LONG_DOUBLE_128 > - && is_float128_p (t) && is_float128_p (builtin_type)) > - return true; > - else > - return lang_hooks.types_compatible_p (t, builtin_type); > -} > - > - > /* In addition to calling fold_convert for EXPR of type TYPE, also > call c_fully_fold to remove any C_MAYBE_CONST_EXPRs that could be > hiding there (PR47197). */ > @@ -873,16 +853,6 @@ fully_fold_convert (tree type, tree expr) > return result; > } > > -/* Implementation of the resolve_overloaded_builtin target hook, to > - support Altivec's overloaded builtins. */ > - > -tree > -altivec_resolve_overloaded_builtin (location_t loc, tree fndecl, > - void *passed_arglist) > -{ > - return altivec_resolve_new_overloaded_builtin (loc, fndecl, passed_arglist); > -} > - > /* Build a tree for a function call to an Altivec non-overloaded builtin. > The overloaded builtin that matched the types and args is described > by DESC. The N arguments are given in ARGS, respectively. > @@ -891,10 +861,9 @@ altivec_resolve_overloaded_builtin (location_t loc, tree fndecl, > a small exception for vec_{all,any}_{ge,le} predicates. */ > > static tree > -altivec_build_new_resolved_builtin (tree *args, int n, tree fntype, > - tree ret_type, > - rs6000_gen_builtins bif_id, > - rs6000_gen_builtins ovld_id) > +altivec_build_resolved_builtin (tree *args, int n, tree fntype, tree ret_type, > + rs6000_gen_builtins bif_id, > + rs6000_gen_builtins ovld_id) > { > tree argtypes = TYPE_ARG_TYPES (fntype); > tree arg_type[MAX_OVLD_ARGS]; > @@ -963,9 +932,9 @@ altivec_build_new_resolved_builtin (tree *args, int n, tree fntype, > support Altivec's overloaded builtins. FIXME: This code needs > to be brutally factored. */ > > -static tree > -altivec_resolve_new_overloaded_builtin (location_t loc, tree fndecl, > - void *passed_arglist) > +tree > +altivec_resolve_overloaded_builtin (location_t loc, tree fndecl, > + void *passed_arglist) > { > vec<tree, va_gc> *arglist = static_cast<vec<tree, va_gc> *> (passed_arglist); > unsigned int nargs = vec_safe_length (arglist); > @@ -1096,7 +1065,7 @@ altivec_resolve_new_overloaded_builtin (location_t loc, tree fndecl, > vec<tree, va_gc> *params = make_tree_vector (); > vec_safe_push (params, arg0); > vec_safe_push (params, arg1); > - tree call = altivec_resolve_new_overloaded_builtin > + tree call = altivec_resolve_overloaded_builtin > (loc, rs6000_builtin_decls_x[RS6000_OVLD_VEC_CMPEQ], > params); > /* Use save_expr to ensure that operands used more than once > @@ -1106,7 +1075,7 @@ altivec_resolve_new_overloaded_builtin (location_t loc, tree fndecl, > params = make_tree_vector (); > vec_safe_push (params, call); > vec_safe_push (params, call); > - return altivec_resolve_new_overloaded_builtin > + return altivec_resolve_overloaded_builtin > (loc, rs6000_builtin_decls_x[RS6000_OVLD_VEC_NOR], params); > } > /* Other types are errors. */ > @@ -1165,9 +1134,8 @@ altivec_resolve_new_overloaded_builtin (location_t loc, tree fndecl, > add_sub_builtin = rs6000_builtin_decls_x[RS6000_OVLD_VEC_SUB]; > > tree call > - = altivec_resolve_new_overloaded_builtin (loc, > - add_sub_builtin, > - params); > + = altivec_resolve_overloaded_builtin (loc, add_sub_builtin, > + params); > tree const1 = build_int_cstu (TREE_TYPE (arg0_type), 1); > tree ones_vector = build_vector_from_val (arg0_type, const1); > tree and_expr = fold_build2_loc (loc, BIT_AND_EXPR, arg0_type, > @@ -1175,9 +1143,8 @@ altivec_resolve_new_overloaded_builtin (location_t loc, tree fndecl, > params = make_tree_vector (); > vec_safe_push (params, call); > vec_safe_push (params, and_expr); > - return altivec_resolve_new_overloaded_builtin (loc, > - add_sub_builtin, > - params); > + return altivec_resolve_overloaded_builtin (loc, add_sub_builtin, > + params); > } > /* For {un}signed __int128s use the vaddeuqm/vsubeuqm instruction > directly. */ > @@ -1244,9 +1211,8 @@ altivec_resolve_new_overloaded_builtin (location_t loc, tree fndecl, > else > as_c_builtin = rs6000_builtin_decls_x[RS6000_OVLD_VEC_SUBC]; > > - tree call1 = altivec_resolve_new_overloaded_builtin (loc, > - as_c_builtin, > - params); > + tree call1 = altivec_resolve_overloaded_builtin (loc, as_c_builtin, > + params); > params = make_tree_vector (); > vec_safe_push (params, arg0); > vec_safe_push (params, arg1); > @@ -1256,9 +1222,8 @@ altivec_resolve_new_overloaded_builtin (location_t loc, tree fndecl, > else > as_builtin = rs6000_builtin_decls_x[RS6000_OVLD_VEC_SUB]; > > - tree call2 = altivec_resolve_new_overloaded_builtin (loc, > - as_builtin, > - params); > + tree call2 = altivec_resolve_overloaded_builtin (loc, as_builtin, > + params); > tree const1 = build_int_cstu (TREE_TYPE (arg0_type), 1); > tree ones_vector = build_vector_from_val (arg0_type, const1); > tree and_expr = fold_build2_loc (loc, BIT_AND_EXPR, arg0_type, > @@ -1266,14 +1231,14 @@ altivec_resolve_new_overloaded_builtin (location_t loc, tree fndecl, > params = make_tree_vector (); > vec_safe_push (params, call2); > vec_safe_push (params, and_expr); > - call2 = altivec_resolve_new_overloaded_builtin (loc, as_c_builtin, > - params); > + call2 = altivec_resolve_overloaded_builtin (loc, as_c_builtin, > + params); > params = make_tree_vector (); > vec_safe_push (params, call1); > vec_safe_push (params, call2); > tree or_builtin = rs6000_builtin_decls_x[RS6000_OVLD_VEC_OR]; > - return altivec_resolve_new_overloaded_builtin (loc, or_builtin, > - params); > + return altivec_resolve_overloaded_builtin (loc, or_builtin, > + params); > } > /* For {un}signed __int128s use the vaddecuq/vsubbecuq > instructions. This occurs through normal processing. */ > @@ -1779,17 +1744,17 @@ altivec_resolve_new_overloaded_builtin (location_t loc, tree fndecl, > tree parmtype0 = TREE_VALUE (TYPE_ARG_TYPES (fntype)); > tree parmtype1 = TREE_VALUE (TREE_CHAIN (TYPE_ARG_TYPES (fntype))); > > - if (rs6000_new_builtin_type_compatible (types[0], parmtype0) > - && rs6000_new_builtin_type_compatible (types[1], parmtype1)) > + if (rs6000_builtin_type_compatible (types[0], parmtype0) > + && rs6000_builtin_type_compatible (types[1], parmtype1)) > { > if (rs6000_builtin_decl (instance->bifid, false) != error_mark_node > - && rs6000_new_builtin_is_supported (instance->bifid)) > + && rs6000_builtin_is_supported (instance->bifid)) > { > tree ret_type = TREE_TYPE (instance->fntype); > - return altivec_build_new_resolved_builtin (args, n, fntype, > - ret_type, > - instance->bifid, > - fcode); > + return altivec_build_resolved_builtin (args, n, fntype, > + ret_type, > + instance->bifid, > + fcode); > } > else > unsupported_builtin = true; > @@ -1837,17 +1802,17 @@ altivec_resolve_new_overloaded_builtin (location_t loc, tree fndecl, > tree parmtype0 = TREE_VALUE (TYPE_ARG_TYPES (fntype)); > tree parmtype1 = TREE_VALUE (TREE_CHAIN (TYPE_ARG_TYPES (fntype))); > > - if (rs6000_new_builtin_type_compatible (types[0], parmtype0) > - && rs6000_new_builtin_type_compatible (types[1], parmtype1)) > + if (rs6000_builtin_type_compatible (types[0], parmtype0) > + && rs6000_builtin_type_compatible (types[1], parmtype1)) > { > if (rs6000_builtin_decl (instance->bifid, false) != error_mark_node > - && rs6000_new_builtin_is_supported (instance->bifid)) > + && rs6000_builtin_is_supported (instance->bifid)) > { > tree ret_type = TREE_TYPE (instance->fntype); > - return altivec_build_new_resolved_builtin (args, n, fntype, > - ret_type, > - instance->bifid, > - fcode); > + return altivec_build_resolved_builtin (args, n, fntype, > + ret_type, > + instance->bifid, > + fcode); > } > else > unsupported_builtin = true; > @@ -1869,8 +1834,7 @@ altivec_resolve_new_overloaded_builtin (location_t loc, tree fndecl, > arg_i++) > { > tree parmtype = TREE_VALUE (nextparm); > - if (!rs6000_new_builtin_type_compatible (types[arg_i], > - parmtype)) > + if (!rs6000_builtin_type_compatible (types[arg_i], parmtype)) > { > mismatch = true; > break; > @@ -1881,16 +1845,16 @@ altivec_resolve_new_overloaded_builtin (location_t loc, tree fndecl, > if (mismatch) > continue; > > - supported = rs6000_new_builtin_is_supported (instance->bifid); > + supported = rs6000_builtin_is_supported (instance->bifid); > if (rs6000_builtin_decl (instance->bifid, false) != error_mark_node > && supported) > { > tree fntype = rs6000_builtin_info_x[instance->bifid].fntype; > tree ret_type = TREE_TYPE (instance->fntype); > - return altivec_build_new_resolved_builtin (args, n, fntype, > - ret_type, > - instance->bifid, > - fcode); > + return altivec_build_resolved_builtin (args, n, fntype, > + ret_type, > + instance->bifid, > + fcode); > } > else > { > @@ -1908,7 +1872,7 @@ altivec_resolve_new_overloaded_builtin (location_t loc, tree fndecl, > /* Indicate that the instantiation of the overloaded builtin > name is not available with the target flags in effect. */ > rs6000_gen_builtins fcode = (rs6000_gen_builtins) instance->bifid; > - rs6000_invalid_new_builtin (fcode); > + rs6000_invalid_builtin (fcode); > /* Provide clarity of the relationship between the overload > and the instantiation. */ > const char *internal_name > diff --git a/gcc/config/rs6000/rs6000-call.c b/gcc/config/rs6000/rs6000-call.c > index a5ee06c991f..5ce0d2cef88 100644 > --- a/gcc/config/rs6000/rs6000-call.c > +++ b/gcc/config/rs6000/rs6000-call.c > @@ -167,9 +167,6 @@ static const struct > { "arch_3_1", PPC_FEATURE2_ARCH_3_1, 1 }, > { "mma", PPC_FEATURE2_MMA, 1 }, > }; > - > -static rtx rs6000_expand_new_builtin (tree, rtx, rtx, machine_mode, int); > -static bool rs6000_gimple_fold_new_builtin (gimple_stmt_iterator *gsi); > \f > /* Nonzero if we can use a floating-point register to pass this arg. */ > #define USE_FP_FOR_ARG_P(CUM,MODE) \ > @@ -3258,7 +3255,7 @@ altivec_expand_vec_ext_builtin (tree exp, rtx target) > appropriate target options being set. */ > > void > -rs6000_invalid_new_builtin (enum rs6000_gen_builtins fncode) > +rs6000_invalid_builtin (enum rs6000_gen_builtins fncode) > { > size_t j = (size_t) fncode; > const char *name = rs6000_builtin_info_x[j].bifname; > @@ -3479,20 +3476,11 @@ fold_mergeeo_helper (gimple_stmt_iterator *gsi, gimple *stmt, int use_odd) > gsi_replace (gsi, g, true); > } > > -/* Fold a machine-dependent built-in in GIMPLE. (For folding into > - a constant, use rs6000_fold_builtin.) */ > - > -bool > -rs6000_gimple_fold_builtin (gimple_stmt_iterator *gsi) > -{ > - return rs6000_gimple_fold_new_builtin (gsi); > -} > - > /* Helper function to sort out which built-ins may be valid without having > a LHS. */ > static bool > -rs6000_new_builtin_valid_without_lhs (enum rs6000_gen_builtins fn_code, > - tree fndecl) > +rs6000_builtin_valid_without_lhs (enum rs6000_gen_builtins fn_code, > + tree fndecl) > { > if (TREE_TYPE (TREE_TYPE (fndecl)) == void_type_node) > return true; > @@ -3520,7 +3508,7 @@ rs6000_new_builtin_valid_without_lhs (enum rs6000_gen_builtins fn_code, > /* Check whether a builtin function is supported in this target > configuration. */ > bool > -rs6000_new_builtin_is_supported (enum rs6000_gen_builtins fncode) > +rs6000_builtin_is_supported (enum rs6000_gen_builtins fncode) > { > switch (rs6000_builtin_info_x[(size_t) fncode].enable) > { > @@ -3576,8 +3564,8 @@ rs6000_new_builtin_is_supported (enum rs6000_gen_builtins fncode) > __vector_quad arguments into pass-by-value arguments, leading to more > efficient code generation. */ > static bool > -rs6000_gimple_fold_new_mma_builtin (gimple_stmt_iterator *gsi, > - rs6000_gen_builtins fn_code) > +rs6000_gimple_fold_mma_builtin (gimple_stmt_iterator *gsi, > + rs6000_gen_builtins fn_code) > { > gimple *stmt = gsi_stmt (*gsi); > size_t fncode = (size_t) fn_code; > @@ -3776,8 +3764,8 @@ rs6000_gimple_fold_new_mma_builtin (gimple_stmt_iterator *gsi, > > /* Fold a machine-dependent built-in in GIMPLE. (For folding into > a constant, use rs6000_fold_builtin.) */ > -static bool > -rs6000_gimple_fold_new_builtin (gimple_stmt_iterator *gsi) > +bool > +rs6000_gimple_fold_builtin (gimple_stmt_iterator *gsi) > { > gimple *stmt = gsi_stmt (*gsi); > tree fndecl = gimple_call_fndecl (stmt); > @@ -3796,23 +3784,23 @@ rs6000_gimple_fold_new_builtin (gimple_stmt_iterator *gsi) > : "nothing"; > > if (TARGET_DEBUG_BUILTIN) > - fprintf (stderr, "rs6000_gimple_fold_new_builtin %d %s %s\n", > + fprintf (stderr, "rs6000_gimple_fold_builtin %d %s %s\n", > fn_code, fn_name1, fn_name2); > > if (!rs6000_fold_gimple) > return false; > > /* Prevent gimple folding for code that does not have a LHS, unless it is > - allowed per the rs6000_new_builtin_valid_without_lhs helper function. */ > + allowed per the rs6000_builtin_valid_without_lhs helper function. */ > if (!gimple_call_lhs (stmt) > - && !rs6000_new_builtin_valid_without_lhs (fn_code, fndecl)) > + && !rs6000_builtin_valid_without_lhs (fn_code, fndecl)) > return false; > > /* Don't fold invalid builtins, let rs6000_expand_builtin diagnose it. */ > - if (!rs6000_new_builtin_is_supported (fn_code)) > + if (!rs6000_builtin_is_supported (fn_code)) > return false; > > - if (rs6000_gimple_fold_new_mma_builtin (gsi, fn_code)) > + if (rs6000_gimple_fold_mma_builtin (gsi, fn_code)) > return true; > > switch (fn_code) > @@ -4755,20 +4743,6 @@ rs6000_gimple_fold_new_builtin (gimple_stmt_iterator *gsi) > return false; > } > > -/* Expand an expression EXP that calls a built-in function, > - with result going to TARGET if that's convenient > - (and in mode MODE if that's convenient). > - SUBTARGET may be used as the target for computing one of EXP's operands. > - IGNORE is nonzero if the value is to be ignored. */ > - > -rtx > -rs6000_expand_builtin (tree exp, rtx target, rtx subtarget ATTRIBUTE_UNUSED, > - machine_mode mode ATTRIBUTE_UNUSED, > - int ignore ATTRIBUTE_UNUSED) > -{ > - return rs6000_expand_new_builtin (exp, target, subtarget, mode, ignore); > -} > - > /* Expand ALTIVEC_BUILTIN_MASK_FOR_LOAD. */ > rtx > rs6000_expand_ldst_mask (rtx target, tree arg0) > @@ -4803,8 +4777,8 @@ rs6000_expand_ldst_mask (rtx target, tree arg0) > > /* Expand the CPU builtin in FCODE and store the result in TARGET. */ > static rtx > -new_cpu_expand_builtin (enum rs6000_gen_builtins fcode, > - tree exp ATTRIBUTE_UNUSED, rtx target) > +cpu_expand_builtin (enum rs6000_gen_builtins fcode, > + tree exp ATTRIBUTE_UNUSED, rtx target) > { > /* __builtin_cpu_init () is a nop, so expand to nothing. */ > if (fcode == RS6000_BIF_CPU_INIT) > @@ -5206,8 +5180,8 @@ stv_expand_builtin (insn_code icode, rtx *op, > > /* Expand the MMA built-in in EXP, and return it. */ > static rtx > -new_mma_expand_builtin (tree exp, rtx target, insn_code icode, > - rs6000_gen_builtins fcode) > +mma_expand_builtin (tree exp, rtx target, insn_code icode, > + rs6000_gen_builtins fcode) > { > tree fndecl = TREE_OPERAND (CALL_EXPR_FN (exp), 0); > bool void_func = TREE_TYPE (TREE_TYPE (fndecl)) == void_type_node; > @@ -5319,7 +5293,7 @@ new_mma_expand_builtin (tree exp, rtx target, insn_code icode, > > /* Return the appropriate SPR number associated with the given builtin. */ > static inline HOST_WIDE_INT > -new_htm_spr_num (enum rs6000_gen_builtins code) > +htm_spr_num (enum rs6000_gen_builtins code) > { > if (code == RS6000_BIF_GET_TFHAR > || code == RS6000_BIF_SET_TFHAR) > @@ -5338,8 +5312,8 @@ new_htm_spr_num (enum rs6000_gen_builtins code) > /* Expand the HTM builtin in EXP and store the result in TARGET. > Return the expanded rtx. */ > static rtx > -new_htm_expand_builtin (bifdata *bifaddr, rs6000_gen_builtins fcode, > - tree exp, rtx target) > +htm_expand_builtin (bifdata *bifaddr, rs6000_gen_builtins fcode, > + tree exp, rtx target) > { > if (!TARGET_POWERPC64 > && (fcode == RS6000_BIF_TABORTDC > @@ -5425,7 +5399,7 @@ new_htm_expand_builtin (bifdata *bifaddr, rs6000_gen_builtins fcode, > if (uses_spr) > { > machine_mode mode = TARGET_POWERPC64 ? DImode : SImode; > - op[nopnds++] = gen_rtx_CONST_INT (mode, new_htm_spr_num (fcode)); > + op[nopnds++] = gen_rtx_CONST_INT (mode, htm_spr_num (fcode)); > } > /* If this builtin accesses a CR field, then pass in a scratch > CR field as the last operand. */ > @@ -5497,11 +5471,9 @@ new_htm_expand_builtin (bifdata *bifaddr, rs6000_gen_builtins fcode, > SUBTARGET may be used as the target for computing one of EXP's operands. > IGNORE is nonzero if the value is to be ignored. > Use the new builtin infrastructure. */ > -static rtx > -rs6000_expand_new_builtin (tree exp, rtx target, > - rtx /* subtarget */, > - machine_mode /* mode */, > - int ignore) > +rtx > +rs6000_expand_builtin (tree exp, rtx target, rtx /* subtarget */, > + machine_mode /* mode */, int ignore) > { > tree fndecl = TREE_OPERAND (CALL_EXPR_FN (exp), 0); > enum rs6000_gen_builtins fcode > @@ -5610,7 +5582,7 @@ rs6000_expand_new_builtin (tree exp, rtx target, > || (e == ENB_P10_64 && TARGET_POWER10 && TARGET_POWERPC64) > || (e == ENB_MMA && TARGET_MMA))) > { > - rs6000_invalid_new_builtin (fcode); > + rs6000_invalid_builtin (fcode); > return expand_call (exp, target, ignore); > } > > @@ -5629,7 +5601,7 @@ rs6000_expand_new_builtin (tree exp, rtx target, > } > > if (bif_is_cpu (*bifaddr)) > - return new_cpu_expand_builtin (fcode, exp, target); > + return cpu_expand_builtin (fcode, exp, target); > > if (bif_is_init (*bifaddr)) > return altivec_expand_vec_init_builtin (TREE_TYPE (exp), exp, target); > @@ -5644,7 +5616,7 @@ rs6000_expand_new_builtin (tree exp, rtx target, > return altivec_expand_predicate_builtin (icode, exp, target); > > if (bif_is_htm (*bifaddr)) > - return new_htm_expand_builtin (bifaddr, fcode, exp, target); > + return htm_expand_builtin (bifaddr, fcode, exp, target); > > if (bif_is_32bit (*bifaddr) && TARGET_32BIT) > { > @@ -5830,7 +5802,7 @@ rs6000_expand_new_builtin (tree exp, rtx target, > return lxvrze_expand_builtin (target, icode, op, mode[0], mode[1]); > > if (bif_is_mma (*bifaddr)) > - return new_mma_expand_builtin (exp, target, icode, fcode); > + return mma_expand_builtin (exp, target, icode, fcode); > > if (fcode == RS6000_BIF_PACK_IF > && TARGET_LONG_DOUBLE_128 > @@ -6379,8 +6351,8 @@ rs6000_init_builtins (void) > return; > } > > -static tree > -rs6000_new_builtin_decl (unsigned code, bool /* initialize_p */) > +tree > +rs6000_builtin_decl (unsigned code, bool /* initialize_p */) > { > rs6000_gen_builtins fcode = (rs6000_gen_builtins) code; > > @@ -6390,17 +6362,6 @@ rs6000_new_builtin_decl (unsigned code, bool /* initialize_p */) > return rs6000_builtin_decls_x[code]; > } > > -/* Returns the rs6000 builtin decl for CODE. Note that we don't check > - the builtin mask here since there could be some #pragma/attribute > - target functions and the rs6000_builtin_mask could be wrong when > - this checking happens, though it will be updated properly later. */ > - > -tree > -rs6000_builtin_decl (unsigned code, bool initialize_p ATTRIBUTE_UNUSED) > -{ > - return rs6000_new_builtin_decl (code, initialize_p); > -} > - > /* Return the internal arg pointer used for function incoming > arguments. When -fsplit-stack, the arg pointer is r12 so we need > to copy it to a pseudo in order for it to be preserved over calls > diff --git a/gcc/config/rs6000/rs6000-gen-builtins.c b/gcc/config/rs6000/rs6000-gen-builtins.c > index 9c61b7d9fe6..114289a0034 100644 > --- a/gcc/config/rs6000/rs6000-gen-builtins.c > +++ b/gcc/config/rs6000/rs6000-gen-builtins.c > @@ -2375,8 +2375,7 @@ write_decls (void) > > fprintf (header_file, "extern void rs6000_init_generated_builtins ();\n\n"); > fprintf (header_file, > - "extern bool rs6000_new_builtin_is_supported " > - "(rs6000_gen_builtins);\n"); > + "extern bool rs6000_builtin_is_supported (rs6000_gen_builtins);\n"); > fprintf (header_file, > "extern tree rs6000_builtin_decl (unsigned, " > "bool ATTRIBUTE_UNUSED);\n\n"); > diff --git a/gcc/config/rs6000/rs6000-internal.h b/gcc/config/rs6000/rs6000-internal.h > index a880fd37618..49904b3f33d 100644 > --- a/gcc/config/rs6000/rs6000-internal.h > +++ b/gcc/config/rs6000/rs6000-internal.h > @@ -142,7 +142,7 @@ extern void rs6000_output_mi_thunk (FILE *file, > extern bool rs6000_output_addr_const_extra (FILE *file, rtx x); > extern bool rs6000_gimple_fold_builtin (gimple_stmt_iterator *gsi); > extern tree rs6000_build_builtin_va_list (void); > -extern void rs6000_invalid_new_builtin (rs6000_gen_builtins fncode); > +extern void rs6000_invalid_builtin (rs6000_gen_builtins fncode); > extern void rs6000_va_start (tree valist, rtx nextarg); > extern tree rs6000_gimplify_va_arg (tree valist, tree type, gimple_seq *pre_p, > gimple_seq *post_p); > diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c > index 4479c569476..38e22f927c5 100644 > --- a/gcc/config/rs6000/rs6000.c > +++ b/gcc/config/rs6000/rs6000.c > @@ -5568,14 +5568,14 @@ rs6000_loop_unroll_adjust (unsigned nunroll, struct loop *loop) > Implement targetm.vectorize.builtin_vectorized_function. */ > > static tree > -rs6000_new_builtin_vectorized_function (unsigned int fn, tree type_out, > - tree type_in) > +rs6000_builtin_vectorized_function (unsigned int fn, tree type_out, > + tree type_in) > { > machine_mode in_mode, out_mode; > int in_n, out_n; > > if (TARGET_DEBUG_BUILTIN) > - fprintf (stderr, "rs6000_new_builtin_vectorized_function (%s, %s, %s)\n", > + fprintf (stderr, "rs6000_builtin_vectorized_function (%s, %s, %s)\n", > combined_fn_name (combined_fn (fn)), > GET_MODE_NAME (TYPE_MODE (type_out)), > GET_MODE_NAME (TYPE_MODE (type_in))); > @@ -5700,15 +5700,15 @@ rs6000_new_builtin_vectorized_function (unsigned int fn, tree type_out, > /* Implement targetm.vectorize.builtin_md_vectorized_function. */ > > static tree > -rs6000_new_builtin_md_vectorized_function (tree fndecl, tree type_out, > - tree type_in) > +rs6000_builtin_md_vectorized_function (tree fndecl, tree type_out, > + tree type_in) > { > machine_mode in_mode, out_mode; > int in_n, out_n; > > if (TARGET_DEBUG_BUILTIN) > fprintf (stderr, > - "rs6000_new_builtin_md_vectorized_function (%s, %s, %s)\n", > + "rs6000_builtin_md_vectorized_function (%s, %s, %s)\n", > IDENTIFIER_POINTER (DECL_NAME (fndecl)), > GET_MODE_NAME (TYPE_MODE (type_out)), > GET_MODE_NAME (TYPE_MODE (type_in))); > @@ -5918,25 +5918,6 @@ rs6000_builtin_vectorized_libmass (combined_fn fn, tree type_out, > return new_fndecl; > } > > -/* Returns a function decl for a vectorized version of the builtin function > - with builtin function code FN and the result vector type TYPE, or NULL_TREE > - if it is not available. */ > - > -static tree > -rs6000_builtin_vectorized_function (unsigned int fn, tree type_out, > - tree type_in) > -{ > - return rs6000_new_builtin_vectorized_function (fn, type_out, type_in); > -} > - > -/* Implement TARGET_VECTORIZE_BUILTIN_MD_VECTORIZED_FUNCTION. */ > - > -static tree > -rs6000_builtin_md_vectorized_function (tree fndecl, tree type_out, > - tree type_in) > -{ > - return rs6000_new_builtin_md_vectorized_function (fndecl, type_out, type_in); > -} > \f > /* Default CPU string for rs6000*_file_start functions. */ > static const char *rs6000_default_cpu; ^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [PATCH 5/6] rs6000: Rename functions with "new" in their names 2021-12-06 20:49 ` [PATCH 5/6] rs6000: Rename functions with "new" in their names Bill Schmidt 2021-12-14 18:01 ` [PATCH v2 /6] " Bill Schmidt @ 2021-12-14 18:08 ` David Edelsohn 1 sibling, 0 replies; 20+ messages in thread From: David Edelsohn @ 2021-12-14 18:08 UTC (permalink / raw) To: Bill Schmidt; +Cc: GCC Patches, Segher Boessenkool On Mon, Dec 6, 2021 at 3:49 PM Bill Schmidt <wschmidt@linux.ibm.com> wrote: > > Hi! > > While we had two sets of built-in functionality at the same time, I put "new" > in the names of quite a few functions. Time to undo that. > > Bootstrapped and tested on powerpc64le-linux-gnu with no regressions. Is this > okay for trunk? > > Thanks! > Bill > > 2021-12-02 Bill Schmidt <wschmidt@linux.ibm.com> > > gcc/ > * config/rs6000/rs6000-c.c (altivec_resolve_new_overloaded_builtin): > Remove forward declaration. > (rs6000_new_builtin_type_compatible): Rename to > rs6000_builtin_type_compatible. > (rs6000_builtin_type_compatible): Remove. > (altivec_resolve_overloaded_builtin): Remove. > (altivec_build_new_resolved_builtin): Rename to > altivec_build_resolved_builtin. > (altivec_resolve_new_overloaded_builtin): Rename to > altivec_resolve_overloaded_builtin. Remove static keyword. Adjust > called function names. > * config/rs6000/rs6000-call.c (rs6000_expand_new_builtin): Remove > forward declaration. > (rs6000_gimple_fold_new_builtin): Likewise. > (rs6000_invalid_new_builtin): Rename to rs6000_invalid_builtin. > (rs6000_gimple_fold_builtin): Remove. > (rs6000_new_builtin_valid_without_lhs): Rename to > rs6000_builtin_valid_without_lhs. > (rs6000_new_builtin_is_supported): Rename to > rs6000_builtin_is_supported. > (rs6000_gimple_fold_new_mma_builtin): Rename to > rs6000_gimple_fold_mma_builtin. > (rs6000_gimple_fold_new_builtin): Rename to > rs6000_gimple_fold_builtin. Remove static keyword. Adjust called > function names. > (rs6000_expand_builtin): Remove. > (new_cpu_expand_builtin): Rename to cpu_expand_builtin. > (new_mma_expand_builtin): Rename to mma_expand_builtin. > (new_htm_spr_num): Rename to htm_spr_num. > (new_htm_expand_builtin): Rename to htm_expand_builtin. Change name > of called function. > (rs6000_expand_new_builtin): Rename to rs6000_expand_builtin. Remove > static keyword. Adjust called function names. > (rs6000_new_builtin_decl): Rename to rs6000_builtin_decl. Remove > static keyword. > (rs6000_builtin_decl): Remove. > * config/rs6000/rs6000-gen-builtins.c (write_decls): In gnerated code, > rename rs6000_new_builtin_is_supported to rs6000_builtin_is_supported. > * config/rs6000/rs6000-internal.h (rs6000_invalid_new_builtin): Rename > to rs6000_invalid_builtin. > * config/rs6000/rs6000.c (rs6000_new_builtin_vectorized_function): > Rename to rs6000_builtin_vectorized_function. > (rs6000_new_builtin_md_vectorized_function): Rename to > rs6000_builtin_md_vectorized_function. > (rs6000_builtin_vectorized_function): Remove. > (rs6000_builtin_md_vectorized_function): Remove. Okay. Thanks, David ^ permalink raw reply [flat|nested] 20+ messages in thread
* [PATCH 6/6] rs6000: Rename arrays to remove temporary _x suffix 2021-12-06 20:49 [PATCH v2 0/6] Remove "old" built-in function infrastructure Bill Schmidt ` (4 preceding siblings ...) 2021-12-06 20:49 ` [PATCH 5/6] rs6000: Rename functions with "new" in their names Bill Schmidt @ 2021-12-06 20:49 ` Bill Schmidt 2021-12-14 18:01 ` [PATCH v2 " Bill Schmidt 2021-12-14 18:10 ` [PATCH " David Edelsohn 2021-12-14 17:32 ` [PATCH v2 0/6] Remove "old" built-in function infrastructure Bill Schmidt 6 siblings, 2 replies; 20+ messages in thread From: Bill Schmidt @ 2021-12-06 20:49 UTC (permalink / raw) To: gcc-patches; +Cc: segher, dje.gcc Hi! While we had two sets of built-in infrastructure at once, I added _x as a suffix to two arrays to disambiguate the old and new versions. Time to fix that also. Bootstrapped and tested on powerpc64le-linux-gnu with no regressions. Is this okay for trunk? Thanks! Bill 2021-12-06 Bill Schmidt <wschmidt@linux.ibm.com> gcc/ * config/rs6000/rs6000-c.c (altivec_build_resolved_builtin): Rename rs6000_builtin_decls_x to rs6000_builtin_decls. (altivec_resolve_overloaded_builtin): Likewise. Also rename rs6000_builtin_info_x to rs6000_builtin_info. * config/rs6000/rs6000-call.c (rs6000_invalid_builtin): Rename rs6000_builtin_info_x to rs6000_builtin_info. (rs6000_builtin_is_supported): Likewise. (rs6000_gimple_fold_mma_builtin): Likewise. Also rename rs6000_builtin_decls_x to rs6000_builtin_decls. (rs6000_gimple_fold_builtin): Rename rs6000_builtin_info_x to rs6000_builtin_info. (cpu_expand_builtin): Likewise. (rs6000_expand_builtin): Likewise. (rs6000_init_builtins): Likewise. Also rename rs6000_builtin_decls_x to rs6000_builtin_decls. (rs6000_builtin_decl): Rename rs6000_builtin_decls_x to rs6000_builtin_decls. * config/rs6000/rs6000-gen-builtins.c (write_decls): In generated code, rename rs6000_builtin_decls_x to rs6000_builtin_decls, and rename rs6000_builtin_info_x to rs6000_builtin_info. (write_bif_static_init): In generated code, rename rs6000_builtin_info_x to rs6000_builtin_info. (write_init_bif_table): In generated code, rename rs6000_builtin_decls_x to rs6000_builtin_decls, and rename rs6000_builtin_info_x to rs6000_builtin_info. (write_init_ovld_table): In generated code, rename rs6000_builtin_decls_x to rs6000_builtin_decls. (write_init_file): Likewise. * config/rs6000/rs6000.c (rs6000_builtin_vectorized_function): Likewise. (rs6000_builtin_md_vectorized_function): Likewise. (rs6000_builtin_reciprocal): Likewise. (add_condition_to_bb): Likewise. (rs6000_atomic_assign_expand_fenv): Likewise. --- gcc/config/rs6000/rs6000-c.c | 64 ++++++++++++------------- gcc/config/rs6000/rs6000-call.c | 46 +++++++++--------- gcc/config/rs6000/rs6000-gen-builtins.c | 27 +++++------ gcc/config/rs6000/rs6000.c | 58 +++++++++++----------- 4 files changed, 96 insertions(+), 99 deletions(-) diff --git a/gcc/config/rs6000/rs6000-c.c b/gcc/config/rs6000/rs6000-c.c index f790c72d621..e0ebdeed548 100644 --- a/gcc/config/rs6000/rs6000-c.c +++ b/gcc/config/rs6000/rs6000-c.c @@ -867,7 +867,7 @@ altivec_build_resolved_builtin (tree *args, int n, tree fntype, tree ret_type, { tree argtypes = TYPE_ARG_TYPES (fntype); tree arg_type[MAX_OVLD_ARGS]; - tree fndecl = rs6000_builtin_decls_x[bif_id]; + tree fndecl = rs6000_builtin_decls[bif_id]; for (int i = 0; i < n; i++) { @@ -1001,13 +1001,13 @@ altivec_resolve_overloaded_builtin (location_t loc, tree fndecl, case E_SFmode: { /* For floats use the xvmulsp instruction directly. */ - tree call = rs6000_builtin_decls_x[RS6000_BIF_XVMULSP]; + tree call = rs6000_builtin_decls[RS6000_BIF_XVMULSP]; return build_call_expr (call, 2, arg0, arg1); } case E_DFmode: { /* For doubles use the xvmuldp instruction directly. */ - tree call = rs6000_builtin_decls_x[RS6000_BIF_XVMULDP]; + tree call = rs6000_builtin_decls[RS6000_BIF_XVMULDP]; return build_call_expr (call, 2, arg0, arg1); } /* Other types are errors. */ @@ -1066,7 +1066,7 @@ altivec_resolve_overloaded_builtin (location_t loc, tree fndecl, vec_safe_push (params, arg0); vec_safe_push (params, arg1); tree call = altivec_resolve_overloaded_builtin - (loc, rs6000_builtin_decls_x[RS6000_OVLD_VEC_CMPEQ], + (loc, rs6000_builtin_decls[RS6000_OVLD_VEC_CMPEQ], params); /* Use save_expr to ensure that operands used more than once that may have side effects (like calls) are only evaluated @@ -1076,7 +1076,7 @@ altivec_resolve_overloaded_builtin (location_t loc, tree fndecl, vec_safe_push (params, call); vec_safe_push (params, call); return altivec_resolve_overloaded_builtin - (loc, rs6000_builtin_decls_x[RS6000_OVLD_VEC_NOR], params); + (loc, rs6000_builtin_decls[RS6000_OVLD_VEC_NOR], params); } /* Other types are errors. */ default: @@ -1129,9 +1129,9 @@ altivec_resolve_overloaded_builtin (location_t loc, tree fndecl, vec_safe_push (params, arg1); if (fcode == RS6000_OVLD_VEC_ADDE) - add_sub_builtin = rs6000_builtin_decls_x[RS6000_OVLD_VEC_ADD]; + add_sub_builtin = rs6000_builtin_decls[RS6000_OVLD_VEC_ADD]; else - add_sub_builtin = rs6000_builtin_decls_x[RS6000_OVLD_VEC_SUB]; + add_sub_builtin = rs6000_builtin_decls[RS6000_OVLD_VEC_SUB]; tree call = altivec_resolve_overloaded_builtin (loc, add_sub_builtin, @@ -1207,9 +1207,9 @@ altivec_resolve_overloaded_builtin (location_t loc, tree fndecl, vec_safe_push (params, arg1); if (fcode == RS6000_OVLD_VEC_ADDEC) - as_c_builtin = rs6000_builtin_decls_x[RS6000_OVLD_VEC_ADDC]; + as_c_builtin = rs6000_builtin_decls[RS6000_OVLD_VEC_ADDC]; else - as_c_builtin = rs6000_builtin_decls_x[RS6000_OVLD_VEC_SUBC]; + as_c_builtin = rs6000_builtin_decls[RS6000_OVLD_VEC_SUBC]; tree call1 = altivec_resolve_overloaded_builtin (loc, as_c_builtin, params); @@ -1218,9 +1218,9 @@ altivec_resolve_overloaded_builtin (location_t loc, tree fndecl, vec_safe_push (params, arg1); if (fcode == RS6000_OVLD_VEC_ADDEC) - as_builtin = rs6000_builtin_decls_x[RS6000_OVLD_VEC_ADD]; + as_builtin = rs6000_builtin_decls[RS6000_OVLD_VEC_ADD]; else - as_builtin = rs6000_builtin_decls_x[RS6000_OVLD_VEC_SUB]; + as_builtin = rs6000_builtin_decls[RS6000_OVLD_VEC_SUB]; tree call2 = altivec_resolve_overloaded_builtin (loc, as_builtin, params); @@ -1236,7 +1236,7 @@ altivec_resolve_overloaded_builtin (location_t loc, tree fndecl, params = make_tree_vector (); vec_safe_push (params, call1); vec_safe_push (params, call2); - tree or_builtin = rs6000_builtin_decls_x[RS6000_OVLD_VEC_OR]; + tree or_builtin = rs6000_builtin_decls[RS6000_OVLD_VEC_OR]; return altivec_resolve_overloaded_builtin (loc, or_builtin, params); } @@ -1380,34 +1380,34 @@ altivec_resolve_overloaded_builtin (location_t loc, tree fndecl, break; case E_V1TImode: - call = rs6000_builtin_decls_x[RS6000_BIF_VEC_EXT_V1TI]; + call = rs6000_builtin_decls[RS6000_BIF_VEC_EXT_V1TI]; break; case E_V2DFmode: - call = rs6000_builtin_decls_x[RS6000_BIF_VEC_EXT_V2DF]; + call = rs6000_builtin_decls[RS6000_BIF_VEC_EXT_V2DF]; break; case E_V2DImode: - call = rs6000_builtin_decls_x[RS6000_BIF_VEC_EXT_V2DI]; + call = rs6000_builtin_decls[RS6000_BIF_VEC_EXT_V2DI]; break; case E_V4SFmode: - call = rs6000_builtin_decls_x[RS6000_BIF_VEC_EXT_V4SF]; + call = rs6000_builtin_decls[RS6000_BIF_VEC_EXT_V4SF]; break; case E_V4SImode: if (TARGET_DIRECT_MOVE_64BIT) - call = rs6000_builtin_decls_x[RS6000_BIF_VEC_EXT_V4SI]; + call = rs6000_builtin_decls[RS6000_BIF_VEC_EXT_V4SI]; break; case E_V8HImode: if (TARGET_DIRECT_MOVE_64BIT) - call = rs6000_builtin_decls_x[RS6000_BIF_VEC_EXT_V8HI]; + call = rs6000_builtin_decls[RS6000_BIF_VEC_EXT_V8HI]; break; case E_V16QImode: if (TARGET_DIRECT_MOVE_64BIT) - call = rs6000_builtin_decls_x[RS6000_BIF_VEC_EXT_V16QI]; + call = rs6000_builtin_decls[RS6000_BIF_VEC_EXT_V16QI]; break; } } @@ -1422,27 +1422,27 @@ altivec_resolve_overloaded_builtin (location_t loc, tree fndecl, break; case E_V2DFmode: - call = rs6000_builtin_decls_x[RS6000_BIF_VEC_EXT_V2DF]; + call = rs6000_builtin_decls[RS6000_BIF_VEC_EXT_V2DF]; break; case E_V2DImode: - call = rs6000_builtin_decls_x[RS6000_BIF_VEC_EXT_V2DI]; + call = rs6000_builtin_decls[RS6000_BIF_VEC_EXT_V2DI]; break; case E_V4SFmode: - call = rs6000_builtin_decls_x[RS6000_BIF_VEC_EXT_V4SF]; + call = rs6000_builtin_decls[RS6000_BIF_VEC_EXT_V4SF]; break; case E_V4SImode: - call = rs6000_builtin_decls_x[RS6000_BIF_VEC_EXT_V4SI]; + call = rs6000_builtin_decls[RS6000_BIF_VEC_EXT_V4SI]; break; case E_V8HImode: - call = rs6000_builtin_decls_x[RS6000_BIF_VEC_EXT_V8HI]; + call = rs6000_builtin_decls[RS6000_BIF_VEC_EXT_V8HI]; break; case E_V16QImode: - call = rs6000_builtin_decls_x[RS6000_BIF_VEC_EXT_V16QI]; + call = rs6000_builtin_decls[RS6000_BIF_VEC_EXT_V16QI]; break; } } @@ -1542,9 +1542,9 @@ altivec_resolve_overloaded_builtin (location_t loc, tree fndecl, arg2 = wide_int_to_tree (TREE_TYPE (arg2), selector); if (mode == V2DFmode) - call = rs6000_builtin_decls_x[RS6000_BIF_VEC_SET_V2DF]; + call = rs6000_builtin_decls[RS6000_BIF_VEC_SET_V2DF]; else if (mode == V2DImode) - call = rs6000_builtin_decls_x[RS6000_BIF_VEC_SET_V2DI]; + call = rs6000_builtin_decls[RS6000_BIF_VEC_SET_V2DI]; /* Note, __builtin_vec_insert_<xxx> has vector and scalar types reversed. */ @@ -1554,7 +1554,7 @@ altivec_resolve_overloaded_builtin (location_t loc, tree fndecl, else if (mode == V1TImode && VECTOR_UNIT_VSX_P (mode) && TREE_CODE (arg2) == INTEGER_CST) { - tree call = rs6000_builtin_decls_x[RS6000_BIF_VEC_SET_V1TI]; + tree call = rs6000_builtin_decls[RS6000_BIF_VEC_SET_V1TI]; wide_int selector = wi::zero(32); arg2 = wide_int_to_tree (TREE_TYPE (arg2), selector); @@ -1740,7 +1740,7 @@ altivec_resolve_overloaded_builtin (location_t loc, tree fndecl, instance = instance->next; gcc_assert (instance != NULL); - tree fntype = rs6000_builtin_info_x[instance->bifid].fntype; + tree fntype = rs6000_builtin_info[instance->bifid].fntype; tree parmtype0 = TREE_VALUE (TYPE_ARG_TYPES (fntype)); tree parmtype1 = TREE_VALUE (TREE_CHAIN (TYPE_ARG_TYPES (fntype))); @@ -1798,7 +1798,7 @@ altivec_resolve_overloaded_builtin (location_t loc, tree fndecl, instance = instance->next; gcc_assert (instance != NULL); - tree fntype = rs6000_builtin_info_x[instance->bifid].fntype; + tree fntype = rs6000_builtin_info[instance->bifid].fntype; tree parmtype0 = TREE_VALUE (TYPE_ARG_TYPES (fntype)); tree parmtype1 = TREE_VALUE (TREE_CHAIN (TYPE_ARG_TYPES (fntype))); @@ -1849,7 +1849,7 @@ altivec_resolve_overloaded_builtin (location_t loc, tree fndecl, if (rs6000_builtin_decl (instance->bifid, false) != error_mark_node && supported) { - tree fntype = rs6000_builtin_info_x[instance->bifid].fntype; + tree fntype = rs6000_builtin_info[instance->bifid].fntype; tree ret_type = TREE_TYPE (instance->fntype); return altivec_build_resolved_builtin (args, n, fntype, ret_type, @@ -1876,7 +1876,7 @@ altivec_resolve_overloaded_builtin (location_t loc, tree fndecl, /* Provide clarity of the relationship between the overload and the instantiation. */ const char *internal_name - = rs6000_builtin_info_x[instance->bifid].bifname; + = rs6000_builtin_info[instance->bifid].bifname; rich_location richloc (line_table, input_location); inform (&richloc, "overloaded builtin %qs is implemented by builtin %qs", diff --git a/gcc/config/rs6000/rs6000-call.c b/gcc/config/rs6000/rs6000-call.c index 5ce0d2cef88..38f0ccc97db 100644 --- a/gcc/config/rs6000/rs6000-call.c +++ b/gcc/config/rs6000/rs6000-call.c @@ -3258,9 +3258,9 @@ void rs6000_invalid_builtin (enum rs6000_gen_builtins fncode) { size_t j = (size_t) fncode; - const char *name = rs6000_builtin_info_x[j].bifname; + const char *name = rs6000_builtin_info[j].bifname; - switch (rs6000_builtin_info_x[j].enable) + switch (rs6000_builtin_info[j].enable) { case ENB_P5: error ("%qs requires the %qs option", name, "-mcpu=power5"); @@ -3510,7 +3510,7 @@ rs6000_builtin_valid_without_lhs (enum rs6000_gen_builtins fn_code, bool rs6000_builtin_is_supported (enum rs6000_gen_builtins fncode) { - switch (rs6000_builtin_info_x[(size_t) fncode].enable) + switch (rs6000_builtin_info[(size_t) fncode].enable) { case ENB_ALWAYS: return true; @@ -3570,18 +3570,18 @@ rs6000_gimple_fold_mma_builtin (gimple_stmt_iterator *gsi, gimple *stmt = gsi_stmt (*gsi); size_t fncode = (size_t) fn_code; - if (!bif_is_mma (rs6000_builtin_info_x[fncode])) + if (!bif_is_mma (rs6000_builtin_info[fncode])) return false; /* Each call that can be gimple-expanded has an associated built-in function that it will expand into. If this one doesn't, we have already expanded it! Exceptions: lxvp and stxvp. */ - if (rs6000_builtin_info_x[fncode].assoc_bif == RS6000_BIF_NONE + if (rs6000_builtin_info[fncode].assoc_bif == RS6000_BIF_NONE && fncode != RS6000_BIF_LXVP && fncode != RS6000_BIF_STXVP) return false; - bifdata *bd = &rs6000_builtin_info_x[fncode]; + bifdata *bd = &rs6000_builtin_info[fncode]; unsigned nopnds = bd->nargs; gimple_seq new_seq = NULL; gimple *new_call; @@ -3626,7 +3626,7 @@ rs6000_gimple_fold_mma_builtin (gimple_stmt_iterator *gsi, to emit a xxmfacc instruction now, since we cannot do it later. */ if (fncode == RS6000_BIF_DISASSEMBLE_ACC) { - new_decl = rs6000_builtin_decls_x[RS6000_BIF_XXMFACC_INTERNAL]; + new_decl = rs6000_builtin_decls[RS6000_BIF_XXMFACC_INTERNAL]; new_call = gimple_build_call (new_decl, 1, src); src = create_tmp_reg_or_ssa_name (vector_quad_type_node); gimple_call_set_lhs (new_call, src); @@ -3635,7 +3635,7 @@ rs6000_gimple_fold_mma_builtin (gimple_stmt_iterator *gsi, /* Copy the accumulator/pair vector by vector. */ new_decl - = rs6000_builtin_decls_x[rs6000_builtin_info_x[fncode].assoc_bif]; + = rs6000_builtin_decls[rs6000_builtin_info[fncode].assoc_bif]; tree dst_type = build_pointer_type_for_mode (unsigned_V16QI_type_node, ptr_mode, true); tree dst_base = build1 (VIEW_CONVERT_EXPR, dst_type, dst_ptr); @@ -3693,7 +3693,7 @@ rs6000_gimple_fold_mma_builtin (gimple_stmt_iterator *gsi, /* Convert this built-in into an internal version that uses pass-by-value arguments. The internal built-in is found in the assoc_bif field. */ - new_decl = rs6000_builtin_decls_x[rs6000_builtin_info_x[fncode].assoc_bif]; + new_decl = rs6000_builtin_decls[rs6000_builtin_info[fncode].assoc_bif]; tree lhs, op[MAX_MMA_OPERANDS]; tree acc = gimple_call_arg (stmt, 0); push_gimplify_context (true); @@ -3777,8 +3777,8 @@ rs6000_gimple_fold_builtin (gimple_stmt_iterator *gsi) gimple *g; size_t uns_fncode = (size_t) fn_code; - enum insn_code icode = rs6000_builtin_info_x[uns_fncode].icode; - const char *fn_name1 = rs6000_builtin_info_x[uns_fncode].bifname; + enum insn_code icode = rs6000_builtin_info[uns_fncode].icode; + const char *fn_name1 = rs6000_builtin_info[uns_fncode].bifname; const char *fn_name2 = (icode != CODE_FOR_nothing) ? get_insn_name ((int) icode) : "nothing"; @@ -4801,7 +4801,7 @@ cpu_expand_builtin (enum rs6000_gen_builtins fcode, if (TREE_CODE (arg) != STRING_CST) { error ("builtin %qs only accepts a string argument", - rs6000_builtin_info_x[(size_t) fcode].bifname); + rs6000_builtin_info[(size_t) fcode].bifname); return const0_rtx; } @@ -4820,7 +4820,7 @@ cpu_expand_builtin (enum rs6000_gen_builtins fcode, { /* Invalid CPU argument. */ error ("cpu %qs is an invalid argument to builtin %qs", - cpu, rs6000_builtin_info_x[(size_t) fcode].bifname); + cpu, rs6000_builtin_info[(size_t) fcode].bifname); return const0_rtx; } @@ -4849,7 +4849,7 @@ cpu_expand_builtin (enum rs6000_gen_builtins fcode, /* Invalid HWCAP argument. */ error ("%s %qs is an invalid argument to builtin %qs", "hwcap", hwcap, - rs6000_builtin_info_x[(size_t) fcode].bifname); + rs6000_builtin_info[(size_t) fcode].bifname); return const0_rtx; } @@ -4877,7 +4877,7 @@ cpu_expand_builtin (enum rs6000_gen_builtins fcode, #else warning (0, "builtin %qs needs GLIBC (2.23 and newer) that exports hardware " - "capability bits", rs6000_builtin_info_x[(size_t) fcode].bifname); + "capability bits", rs6000_builtin_info[(size_t) fcode].bifname); /* For old LIBCs, always return FALSE. */ emit_move_insn (target, GEN_INT (0)); @@ -5479,7 +5479,7 @@ rs6000_expand_builtin (tree exp, rtx target, rtx /* subtarget */, enum rs6000_gen_builtins fcode = (enum rs6000_gen_builtins) DECL_MD_FUNCTION_CODE (fndecl); size_t uns_fcode = (size_t)fcode; - enum insn_code icode = rs6000_builtin_info_x[uns_fcode].icode; + enum insn_code icode = rs6000_builtin_info[uns_fcode].icode; /* TODO: The following commentary and code is inherited from the original builtin processing code. The commentary is a bit confusing, with the @@ -5557,7 +5557,7 @@ rs6000_expand_builtin (tree exp, rtx target, rtx /* subtarget */, /* In case of "#pragma target" changes, we initialize all builtins but check for actual availability now, during expand time. For invalid builtins, generate a normal call. */ - bifdata *bifaddr = &rs6000_builtin_info_x[uns_fcode]; + bifdata *bifaddr = &rs6000_builtin_info[uns_fcode]; bif_enable e = bifaddr->enable; if (!(e == ENB_ALWAYS @@ -6260,7 +6260,7 @@ rs6000_init_builtins (void) fprintf (stderr, "\nAutogenerated built-in functions:\n\n"); for (int i = 1; i < (int) RS6000_BIF_MAX; i++) { - bif_enable e = rs6000_builtin_info_x[i].enable; + bif_enable e = rs6000_builtin_info[i].enable; if (e == ENB_P5 && !TARGET_POPCNTB) continue; if (e == ENB_P6 && !TARGET_CMPB) @@ -6299,10 +6299,10 @@ rs6000_init_builtins (void) continue; if (e == ENB_MMA && !TARGET_MMA) continue; - tree fntype = rs6000_builtin_info_x[i].fntype; + tree fntype = rs6000_builtin_info[i].fntype; tree t = TREE_TYPE (fntype); fprintf (stderr, "%s %s (", rs6000_type_string (t), - rs6000_builtin_info_x[i].bifname); + rs6000_builtin_info[i].bifname); t = TYPE_ARG_TYPES (fntype); while (t && TREE_VALUE (t) != void_type_node) { @@ -6313,7 +6313,7 @@ rs6000_init_builtins (void) fprintf (stderr, ", "); } fprintf (stderr, "); %s [%4d]\n", - rs6000_builtin_info_x[i].attr_string, (int) i); + rs6000_builtin_info[i].attr_string, (int) i); } fprintf (stderr, "\nEnd autogenerated built-in functions.\n\n\n"); } @@ -6342,7 +6342,7 @@ rs6000_init_builtins (void) } altivec_builtin_mask_for_load - = rs6000_builtin_decls_x[RS6000_BIF_MASK_FOR_LOAD]; + = rs6000_builtin_decls[RS6000_BIF_MASK_FOR_LOAD]; #ifdef SUBTARGET_INIT_BUILTINS SUBTARGET_INIT_BUILTINS; @@ -6359,7 +6359,7 @@ rs6000_builtin_decl (unsigned code, bool /* initialize_p */) if (fcode >= RS6000_OVLD_MAX) return error_mark_node; - return rs6000_builtin_decls_x[code]; + return rs6000_builtin_decls[code]; } /* Return the internal arg pointer used for function incoming diff --git a/gcc/config/rs6000/rs6000-gen-builtins.c b/gcc/config/rs6000/rs6000-gen-builtins.c index 114289a0034..f1a9d1f0e63 100644 --- a/gcc/config/rs6000/rs6000-gen-builtins.c +++ b/gcc/config/rs6000/rs6000-gen-builtins.c @@ -2208,7 +2208,7 @@ write_decls (void) fprintf (header_file, " RS6000_OVLD_MAX\n};\n\n"); fprintf (header_file, - "extern GTY(()) tree rs6000_builtin_decls_x[RS6000_OVLD_MAX];\n\n"); + "extern GTY(()) tree rs6000_builtin_decls[RS6000_OVLD_MAX];\n\n"); fprintf (header_file, "enum rs6000_ovld_instances\n{\n RS6000_INST_NONE,\n"); @@ -2336,9 +2336,6 @@ write_decls (void) "#define bif_is_endian(x)\t((x).bifattrs & bif_endian_bit)\n"); fprintf (header_file, "\n"); - /* #### Note that the _x is added for now to avoid conflict with - the existing rs6000_builtin_info[] file while testing. It will - be removed as we progress. */ /* #### Cannot mark this as a GC root because only pointer types can be marked as GTY((user)) and be GC roots. All trees in here are kept alive by other globals, so not a big deal. Alternatively, @@ -2346,7 +2343,7 @@ write_decls (void) to avoid requiring a GTY((user)) designation, but that seems unnecessarily gross. */ fprintf (header_file, - "extern bifdata rs6000_builtin_info_x[RS6000_BIF_MAX];\n\n"); + "extern bifdata rs6000_builtin_info[RS6000_BIF_MAX];\n\n"); fprintf (header_file, "struct GTY((user)) ovlddata\n"); fprintf (header_file, "{\n"); @@ -2495,12 +2492,12 @@ write_header_file (void) return 1; } -/* Write the decl and initializer for rs6000_builtin_info_x[]. */ +/* Write the decl and initializer for rs6000_builtin_info[]. */ static void write_bif_static_init (void) { const char *res[3]; - fprintf (init_file, "bifdata rs6000_builtin_info_x[RS6000_BIF_MAX] =\n"); + fprintf (init_file, "bifdata rs6000_builtin_info[RS6000_BIF_MAX] =\n"); fprintf (init_file, " {\n"); fprintf (init_file, " { /* RS6000_BIF_NONE: */\n"); fprintf (init_file, " \"\", ENB_ALWAYS, 0, CODE_FOR_nothing, 0,\n"); @@ -2665,7 +2662,7 @@ write_init_bif_table (void) for (int i = 0; i <= curr_bif; i++) { fprintf (init_file, - " rs6000_builtin_info_x[RS6000_BIF_%s].fntype" + " rs6000_builtin_info[RS6000_BIF_%s].fntype" "\n = %s;\n", bifs[i].idname, bifs[i].fndecl); @@ -2692,7 +2689,7 @@ write_init_bif_table (void) } fprintf (init_file, - " rs6000_builtin_decls_x[(int)RS6000_BIF_%s] = t\n", + " rs6000_builtin_decls[(int)RS6000_BIF_%s] = t\n", bifs[i].idname); fprintf (init_file, " = add_builtin_function (\"%s\",\n", @@ -2733,7 +2730,7 @@ write_init_bif_table (void) fprintf (init_file, " }\n"); fprintf (init_file, " else\n"); fprintf (init_file, " {\n"); - fprintf (init_file, " rs6000_builtin_decls_x" + fprintf (init_file, " rs6000_builtin_decls" "[(int)RS6000_BIF_%s] = NULL_TREE;\n", bifs[i].idname); fprintf (init_file, " }\n"); } @@ -2786,7 +2783,7 @@ write_init_ovld_table (void) } fprintf (init_file, - " rs6000_builtin_decls_x[(int)RS6000_OVLD_%s] = t\n", + " rs6000_builtin_decls[(int)RS6000_OVLD_%s] = t\n", stanza->stanza_id); fprintf (init_file, " = add_builtin_function (\"%s\",\n", @@ -2835,7 +2832,7 @@ write_init_file (void) fprintf (init_file, "#include \"rs6000-builtins.h\"\n"); fprintf (init_file, "\n"); - fprintf (init_file, "tree rs6000_builtin_decls_x[RS6000_OVLD_MAX];\n\n"); + fprintf (init_file, "tree rs6000_builtin_decls[RS6000_OVLD_MAX];\n\n"); write_bif_static_init (); write_ovld_static_init (); @@ -2851,11 +2848,11 @@ write_init_file (void) fprintf (init_file, "\n"); fprintf (init_file, - " rs6000_builtin_decls_x[RS6000_BIF_NONE] = NULL_TREE;\n"); + " rs6000_builtin_decls[RS6000_BIF_NONE] = NULL_TREE;\n"); fprintf (init_file, - " rs6000_builtin_decls_x[RS6000_BIF_MAX] = NULL_TREE;\n"); + " rs6000_builtin_decls[RS6000_BIF_MAX] = NULL_TREE;\n"); fprintf (init_file, - " rs6000_builtin_decls_x[RS6000_OVLD_NONE] = NULL_TREE;\n\n"); + " rs6000_builtin_decls[RS6000_OVLD_NONE] = NULL_TREE;\n\n"); write_init_bif_table (); write_init_ovld_table (); diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c index 38e22f927c5..60fbb1ea443 100644 --- a/gcc/config/rs6000/rs6000.c +++ b/gcc/config/rs6000/rs6000.c @@ -5596,95 +5596,95 @@ rs6000_builtin_vectorized_function (unsigned int fn, tree type_out, if (VECTOR_UNIT_VSX_P (V2DFmode) && out_mode == DFmode && out_n == 2 && in_mode == DFmode && in_n == 2) - return rs6000_builtin_decls_x[RS6000_BIF_CPSGNDP]; + return rs6000_builtin_decls[RS6000_BIF_CPSGNDP]; if (VECTOR_UNIT_VSX_P (V4SFmode) && out_mode == SFmode && out_n == 4 && in_mode == SFmode && in_n == 4) - return rs6000_builtin_decls_x[RS6000_BIF_CPSGNSP]; + return rs6000_builtin_decls[RS6000_BIF_CPSGNSP]; if (VECTOR_UNIT_ALTIVEC_P (V4SFmode) && out_mode == SFmode && out_n == 4 && in_mode == SFmode && in_n == 4) - return rs6000_builtin_decls_x[RS6000_BIF_COPYSIGN_V4SF]; + return rs6000_builtin_decls[RS6000_BIF_COPYSIGN_V4SF]; break; CASE_CFN_CEIL: if (VECTOR_UNIT_VSX_P (V2DFmode) && out_mode == DFmode && out_n == 2 && in_mode == DFmode && in_n == 2) - return rs6000_builtin_decls_x[RS6000_BIF_XVRDPIP]; + return rs6000_builtin_decls[RS6000_BIF_XVRDPIP]; if (VECTOR_UNIT_VSX_P (V4SFmode) && out_mode == SFmode && out_n == 4 && in_mode == SFmode && in_n == 4) - return rs6000_builtin_decls_x[RS6000_BIF_XVRSPIP]; + return rs6000_builtin_decls[RS6000_BIF_XVRSPIP]; if (VECTOR_UNIT_ALTIVEC_P (V4SFmode) && out_mode == SFmode && out_n == 4 && in_mode == SFmode && in_n == 4) - return rs6000_builtin_decls_x[RS6000_BIF_VRFIP]; + return rs6000_builtin_decls[RS6000_BIF_VRFIP]; break; CASE_CFN_FLOOR: if (VECTOR_UNIT_VSX_P (V2DFmode) && out_mode == DFmode && out_n == 2 && in_mode == DFmode && in_n == 2) - return rs6000_builtin_decls_x[RS6000_BIF_XVRDPIM]; + return rs6000_builtin_decls[RS6000_BIF_XVRDPIM]; if (VECTOR_UNIT_VSX_P (V4SFmode) && out_mode == SFmode && out_n == 4 && in_mode == SFmode && in_n == 4) - return rs6000_builtin_decls_x[RS6000_BIF_XVRSPIM]; + return rs6000_builtin_decls[RS6000_BIF_XVRSPIM]; if (VECTOR_UNIT_ALTIVEC_P (V4SFmode) && out_mode == SFmode && out_n == 4 && in_mode == SFmode && in_n == 4) - return rs6000_builtin_decls_x[RS6000_BIF_VRFIM]; + return rs6000_builtin_decls[RS6000_BIF_VRFIM]; break; CASE_CFN_FMA: if (VECTOR_UNIT_VSX_P (V2DFmode) && out_mode == DFmode && out_n == 2 && in_mode == DFmode && in_n == 2) - return rs6000_builtin_decls_x[RS6000_BIF_XVMADDDP]; + return rs6000_builtin_decls[RS6000_BIF_XVMADDDP]; if (VECTOR_UNIT_VSX_P (V4SFmode) && out_mode == SFmode && out_n == 4 && in_mode == SFmode && in_n == 4) - return rs6000_builtin_decls_x[RS6000_BIF_XVMADDSP]; + return rs6000_builtin_decls[RS6000_BIF_XVMADDSP]; if (VECTOR_UNIT_ALTIVEC_P (V4SFmode) && out_mode == SFmode && out_n == 4 && in_mode == SFmode && in_n == 4) - return rs6000_builtin_decls_x[RS6000_BIF_VMADDFP]; + return rs6000_builtin_decls[RS6000_BIF_VMADDFP]; break; CASE_CFN_TRUNC: if (VECTOR_UNIT_VSX_P (V2DFmode) && out_mode == DFmode && out_n == 2 && in_mode == DFmode && in_n == 2) - return rs6000_builtin_decls_x[RS6000_BIF_XVRDPIZ]; + return rs6000_builtin_decls[RS6000_BIF_XVRDPIZ]; if (VECTOR_UNIT_VSX_P (V4SFmode) && out_mode == SFmode && out_n == 4 && in_mode == SFmode && in_n == 4) - return rs6000_builtin_decls_x[RS6000_BIF_XVRSPIZ]; + return rs6000_builtin_decls[RS6000_BIF_XVRSPIZ]; if (VECTOR_UNIT_ALTIVEC_P (V4SFmode) && out_mode == SFmode && out_n == 4 && in_mode == SFmode && in_n == 4) - return rs6000_builtin_decls_x[RS6000_BIF_VRFIZ]; + return rs6000_builtin_decls[RS6000_BIF_VRFIZ]; break; CASE_CFN_NEARBYINT: if (VECTOR_UNIT_VSX_P (V2DFmode) && flag_unsafe_math_optimizations && out_mode == DFmode && out_n == 2 && in_mode == DFmode && in_n == 2) - return rs6000_builtin_decls_x[RS6000_BIF_XVRDPI]; + return rs6000_builtin_decls[RS6000_BIF_XVRDPI]; if (VECTOR_UNIT_VSX_P (V4SFmode) && flag_unsafe_math_optimizations && out_mode == SFmode && out_n == 4 && in_mode == SFmode && in_n == 4) - return rs6000_builtin_decls_x[RS6000_BIF_XVRSPI]; + return rs6000_builtin_decls[RS6000_BIF_XVRSPI]; break; CASE_CFN_RINT: if (VECTOR_UNIT_VSX_P (V2DFmode) && !flag_trapping_math && out_mode == DFmode && out_n == 2 && in_mode == DFmode && in_n == 2) - return rs6000_builtin_decls_x[RS6000_BIF_XVRDPIC]; + return rs6000_builtin_decls[RS6000_BIF_XVRDPIC]; if (VECTOR_UNIT_VSX_P (V4SFmode) && !flag_trapping_math && out_mode == SFmode && out_n == 4 && in_mode == SFmode && in_n == 4) - return rs6000_builtin_decls_x[RS6000_BIF_XVRSPIC]; + return rs6000_builtin_decls[RS6000_BIF_XVRSPIC]; break; default: break; @@ -5731,25 +5731,25 @@ rs6000_builtin_md_vectorized_function (tree fndecl, tree type_out, if (VECTOR_UNIT_ALTIVEC_OR_VSX_P (V4SFmode) && out_mode == SFmode && out_n == 4 && in_mode == SFmode && in_n == 4) - return rs6000_builtin_decls_x[RS6000_BIF_VRSQRTFP]; + return rs6000_builtin_decls[RS6000_BIF_VRSQRTFP]; break; case RS6000_BIF_RSQRT: if (VECTOR_UNIT_VSX_P (V2DFmode) && out_mode == DFmode && out_n == 2 && in_mode == DFmode && in_n == 2) - return rs6000_builtin_decls_x[RS6000_BIF_RSQRT_2DF]; + return rs6000_builtin_decls[RS6000_BIF_RSQRT_2DF]; break; case RS6000_BIF_RECIPF: if (VECTOR_UNIT_ALTIVEC_OR_VSX_P (V4SFmode) && out_mode == SFmode && out_n == 4 && in_mode == SFmode && in_n == 4) - return rs6000_builtin_decls_x[RS6000_BIF_VRECIPFP]; + return rs6000_builtin_decls[RS6000_BIF_VRECIPFP]; break; case RS6000_BIF_RECIP: if (VECTOR_UNIT_VSX_P (V2DFmode) && out_mode == DFmode && out_n == 2 && in_mode == DFmode && in_n == 2) - return rs6000_builtin_decls_x[RS6000_BIF_RECIP_V2DF]; + return rs6000_builtin_decls[RS6000_BIF_RECIP_V2DF]; break; default: break; @@ -5804,7 +5804,7 @@ rs6000_builtin_md_vectorized_function (tree fndecl, tree type_out, } if (in_mode == exp_mode && in_vmode == exp_vmode) - return rs6000_builtin_decls_x[bif]; + return rs6000_builtin_decls[bif]; } return NULL_TREE; @@ -22496,13 +22496,13 @@ rs6000_builtin_reciprocal (tree fndecl) if (!RS6000_RECIP_AUTO_RSQRTE_P (V2DFmode)) return NULL_TREE; - return rs6000_builtin_decls_x[RS6000_BIF_RSQRT_2DF]; + return rs6000_builtin_decls[RS6000_BIF_RSQRT_2DF]; case RS6000_BIF_XVSQRTSP: if (!RS6000_RECIP_AUTO_RSQRTE_P (V4SFmode)) return NULL_TREE; - return rs6000_builtin_decls_x[RS6000_BIF_RSQRT_4SF]; + return rs6000_builtin_decls[RS6000_BIF_RSQRT_4SF]; default: return NULL_TREE; @@ -25124,7 +25124,7 @@ add_condition_to_bb (tree function_decl, tree version_decl, tree bool_zero = build_int_cst (bool_int_type_node, 0); tree cond_var = create_tmp_var (bool_int_type_node); - tree predicate_decl = rs6000_builtin_decls_x[(int) RS6000_BIF_CPU_SUPPORTS]; + tree predicate_decl = rs6000_builtin_decls[(int) RS6000_BIF_CPU_SUPPORTS]; const char *arg_str = rs6000_clone_map[clone_isa].name; tree predicate_arg = build_string_literal (strlen (arg_str) + 1, arg_str); gimple *call_cond_stmt = gimple_build_call (predicate_decl, 1, predicate_arg); @@ -27764,8 +27764,8 @@ rs6000_atomic_assign_expand_fenv (tree *hold, tree *clear, tree *update) return; } - tree mffs = rs6000_builtin_decls_x[RS6000_BIF_MFFS]; - tree mtfsf = rs6000_builtin_decls_x[RS6000_BIF_MTFSF]; + tree mffs = rs6000_builtin_decls[RS6000_BIF_MFFS]; + tree mtfsf = rs6000_builtin_decls[RS6000_BIF_MTFSF]; tree call_mffs = build_call_expr (mffs, 0); /* Generates the equivalent of feholdexcept (&fenv_var) -- 2.27.0 ^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [PATCH v2 6/6] rs6000: Rename arrays to remove temporary _x suffix 2021-12-06 20:49 ` [PATCH 6/6] rs6000: Rename arrays to remove temporary _x suffix Bill Schmidt @ 2021-12-14 18:01 ` Bill Schmidt 2021-12-14 18:10 ` [PATCH " David Edelsohn 1 sibling, 0 replies; 20+ messages in thread From: Bill Schmidt @ 2021-12-14 18:01 UTC (permalink / raw) To: gcc-patches; +Cc: dje.gcc, segher Ping. Thanks! Bill On 12/6/21 2:49 PM, Bill Schmidt via Gcc-patches wrote: > Hi! > > While we had two sets of built-in infrastructure at once, I added _x as a > suffix to two arrays to disambiguate the old and new versions. Time to fix > that also. > > Bootstrapped and tested on powerpc64le-linux-gnu with no regressions. Is this > okay for trunk? > > Thanks! > Bill > > 2021-12-06 Bill Schmidt <wschmidt@linux.ibm.com> > > gcc/ > * config/rs6000/rs6000-c.c (altivec_build_resolved_builtin): Rename > rs6000_builtin_decls_x to rs6000_builtin_decls. > (altivec_resolve_overloaded_builtin): Likewise. Also rename > rs6000_builtin_info_x to rs6000_builtin_info. > * config/rs6000/rs6000-call.c (rs6000_invalid_builtin): Rename > rs6000_builtin_info_x to rs6000_builtin_info. > (rs6000_builtin_is_supported): Likewise. > (rs6000_gimple_fold_mma_builtin): Likewise. Also rename > rs6000_builtin_decls_x to rs6000_builtin_decls. > (rs6000_gimple_fold_builtin): Rename rs6000_builtin_info_x to > rs6000_builtin_info. > (cpu_expand_builtin): Likewise. > (rs6000_expand_builtin): Likewise. > (rs6000_init_builtins): Likewise. Also rename rs6000_builtin_decls_x > to rs6000_builtin_decls. > (rs6000_builtin_decl): Rename rs6000_builtin_decls_x to > rs6000_builtin_decls. > * config/rs6000/rs6000-gen-builtins.c (write_decls): In generated code, > rename rs6000_builtin_decls_x to rs6000_builtin_decls, and rename > rs6000_builtin_info_x to rs6000_builtin_info. > (write_bif_static_init): In generated code, rename > rs6000_builtin_info_x to rs6000_builtin_info. > (write_init_bif_table): In generated code, rename > rs6000_builtin_decls_x to rs6000_builtin_decls, and rename > rs6000_builtin_info_x to rs6000_builtin_info. > (write_init_ovld_table): In generated code, rename > rs6000_builtin_decls_x to rs6000_builtin_decls. > (write_init_file): Likewise. > * config/rs6000/rs6000.c (rs6000_builtin_vectorized_function): > Likewise. > (rs6000_builtin_md_vectorized_function): Likewise. > (rs6000_builtin_reciprocal): Likewise. > (add_condition_to_bb): Likewise. > (rs6000_atomic_assign_expand_fenv): Likewise. > --- > gcc/config/rs6000/rs6000-c.c | 64 ++++++++++++------------- > gcc/config/rs6000/rs6000-call.c | 46 +++++++++--------- > gcc/config/rs6000/rs6000-gen-builtins.c | 27 +++++------ > gcc/config/rs6000/rs6000.c | 58 +++++++++++----------- > 4 files changed, 96 insertions(+), 99 deletions(-) > > diff --git a/gcc/config/rs6000/rs6000-c.c b/gcc/config/rs6000/rs6000-c.c > index f790c72d621..e0ebdeed548 100644 > --- a/gcc/config/rs6000/rs6000-c.c > +++ b/gcc/config/rs6000/rs6000-c.c > @@ -867,7 +867,7 @@ altivec_build_resolved_builtin (tree *args, int n, tree fntype, tree ret_type, > { > tree argtypes = TYPE_ARG_TYPES (fntype); > tree arg_type[MAX_OVLD_ARGS]; > - tree fndecl = rs6000_builtin_decls_x[bif_id]; > + tree fndecl = rs6000_builtin_decls[bif_id]; > > for (int i = 0; i < n; i++) > { > @@ -1001,13 +1001,13 @@ altivec_resolve_overloaded_builtin (location_t loc, tree fndecl, > case E_SFmode: > { > /* For floats use the xvmulsp instruction directly. */ > - tree call = rs6000_builtin_decls_x[RS6000_BIF_XVMULSP]; > + tree call = rs6000_builtin_decls[RS6000_BIF_XVMULSP]; > return build_call_expr (call, 2, arg0, arg1); > } > case E_DFmode: > { > /* For doubles use the xvmuldp instruction directly. */ > - tree call = rs6000_builtin_decls_x[RS6000_BIF_XVMULDP]; > + tree call = rs6000_builtin_decls[RS6000_BIF_XVMULDP]; > return build_call_expr (call, 2, arg0, arg1); > } > /* Other types are errors. */ > @@ -1066,7 +1066,7 @@ altivec_resolve_overloaded_builtin (location_t loc, tree fndecl, > vec_safe_push (params, arg0); > vec_safe_push (params, arg1); > tree call = altivec_resolve_overloaded_builtin > - (loc, rs6000_builtin_decls_x[RS6000_OVLD_VEC_CMPEQ], > + (loc, rs6000_builtin_decls[RS6000_OVLD_VEC_CMPEQ], > params); > /* Use save_expr to ensure that operands used more than once > that may have side effects (like calls) are only evaluated > @@ -1076,7 +1076,7 @@ altivec_resolve_overloaded_builtin (location_t loc, tree fndecl, > vec_safe_push (params, call); > vec_safe_push (params, call); > return altivec_resolve_overloaded_builtin > - (loc, rs6000_builtin_decls_x[RS6000_OVLD_VEC_NOR], params); > + (loc, rs6000_builtin_decls[RS6000_OVLD_VEC_NOR], params); > } > /* Other types are errors. */ > default: > @@ -1129,9 +1129,9 @@ altivec_resolve_overloaded_builtin (location_t loc, tree fndecl, > vec_safe_push (params, arg1); > > if (fcode == RS6000_OVLD_VEC_ADDE) > - add_sub_builtin = rs6000_builtin_decls_x[RS6000_OVLD_VEC_ADD]; > + add_sub_builtin = rs6000_builtin_decls[RS6000_OVLD_VEC_ADD]; > else > - add_sub_builtin = rs6000_builtin_decls_x[RS6000_OVLD_VEC_SUB]; > + add_sub_builtin = rs6000_builtin_decls[RS6000_OVLD_VEC_SUB]; > > tree call > = altivec_resolve_overloaded_builtin (loc, add_sub_builtin, > @@ -1207,9 +1207,9 @@ altivec_resolve_overloaded_builtin (location_t loc, tree fndecl, > vec_safe_push (params, arg1); > > if (fcode == RS6000_OVLD_VEC_ADDEC) > - as_c_builtin = rs6000_builtin_decls_x[RS6000_OVLD_VEC_ADDC]; > + as_c_builtin = rs6000_builtin_decls[RS6000_OVLD_VEC_ADDC]; > else > - as_c_builtin = rs6000_builtin_decls_x[RS6000_OVLD_VEC_SUBC]; > + as_c_builtin = rs6000_builtin_decls[RS6000_OVLD_VEC_SUBC]; > > tree call1 = altivec_resolve_overloaded_builtin (loc, as_c_builtin, > params); > @@ -1218,9 +1218,9 @@ altivec_resolve_overloaded_builtin (location_t loc, tree fndecl, > vec_safe_push (params, arg1); > > if (fcode == RS6000_OVLD_VEC_ADDEC) > - as_builtin = rs6000_builtin_decls_x[RS6000_OVLD_VEC_ADD]; > + as_builtin = rs6000_builtin_decls[RS6000_OVLD_VEC_ADD]; > else > - as_builtin = rs6000_builtin_decls_x[RS6000_OVLD_VEC_SUB]; > + as_builtin = rs6000_builtin_decls[RS6000_OVLD_VEC_SUB]; > > tree call2 = altivec_resolve_overloaded_builtin (loc, as_builtin, > params); > @@ -1236,7 +1236,7 @@ altivec_resolve_overloaded_builtin (location_t loc, tree fndecl, > params = make_tree_vector (); > vec_safe_push (params, call1); > vec_safe_push (params, call2); > - tree or_builtin = rs6000_builtin_decls_x[RS6000_OVLD_VEC_OR]; > + tree or_builtin = rs6000_builtin_decls[RS6000_OVLD_VEC_OR]; > return altivec_resolve_overloaded_builtin (loc, or_builtin, > params); > } > @@ -1380,34 +1380,34 @@ altivec_resolve_overloaded_builtin (location_t loc, tree fndecl, > break; > > case E_V1TImode: > - call = rs6000_builtin_decls_x[RS6000_BIF_VEC_EXT_V1TI]; > + call = rs6000_builtin_decls[RS6000_BIF_VEC_EXT_V1TI]; > break; > > case E_V2DFmode: > - call = rs6000_builtin_decls_x[RS6000_BIF_VEC_EXT_V2DF]; > + call = rs6000_builtin_decls[RS6000_BIF_VEC_EXT_V2DF]; > break; > > case E_V2DImode: > - call = rs6000_builtin_decls_x[RS6000_BIF_VEC_EXT_V2DI]; > + call = rs6000_builtin_decls[RS6000_BIF_VEC_EXT_V2DI]; > break; > > case E_V4SFmode: > - call = rs6000_builtin_decls_x[RS6000_BIF_VEC_EXT_V4SF]; > + call = rs6000_builtin_decls[RS6000_BIF_VEC_EXT_V4SF]; > break; > > case E_V4SImode: > if (TARGET_DIRECT_MOVE_64BIT) > - call = rs6000_builtin_decls_x[RS6000_BIF_VEC_EXT_V4SI]; > + call = rs6000_builtin_decls[RS6000_BIF_VEC_EXT_V4SI]; > break; > > case E_V8HImode: > if (TARGET_DIRECT_MOVE_64BIT) > - call = rs6000_builtin_decls_x[RS6000_BIF_VEC_EXT_V8HI]; > + call = rs6000_builtin_decls[RS6000_BIF_VEC_EXT_V8HI]; > break; > > case E_V16QImode: > if (TARGET_DIRECT_MOVE_64BIT) > - call = rs6000_builtin_decls_x[RS6000_BIF_VEC_EXT_V16QI]; > + call = rs6000_builtin_decls[RS6000_BIF_VEC_EXT_V16QI]; > break; > } > } > @@ -1422,27 +1422,27 @@ altivec_resolve_overloaded_builtin (location_t loc, tree fndecl, > break; > > case E_V2DFmode: > - call = rs6000_builtin_decls_x[RS6000_BIF_VEC_EXT_V2DF]; > + call = rs6000_builtin_decls[RS6000_BIF_VEC_EXT_V2DF]; > break; > > case E_V2DImode: > - call = rs6000_builtin_decls_x[RS6000_BIF_VEC_EXT_V2DI]; > + call = rs6000_builtin_decls[RS6000_BIF_VEC_EXT_V2DI]; > break; > > case E_V4SFmode: > - call = rs6000_builtin_decls_x[RS6000_BIF_VEC_EXT_V4SF]; > + call = rs6000_builtin_decls[RS6000_BIF_VEC_EXT_V4SF]; > break; > > case E_V4SImode: > - call = rs6000_builtin_decls_x[RS6000_BIF_VEC_EXT_V4SI]; > + call = rs6000_builtin_decls[RS6000_BIF_VEC_EXT_V4SI]; > break; > > case E_V8HImode: > - call = rs6000_builtin_decls_x[RS6000_BIF_VEC_EXT_V8HI]; > + call = rs6000_builtin_decls[RS6000_BIF_VEC_EXT_V8HI]; > break; > > case E_V16QImode: > - call = rs6000_builtin_decls_x[RS6000_BIF_VEC_EXT_V16QI]; > + call = rs6000_builtin_decls[RS6000_BIF_VEC_EXT_V16QI]; > break; > } > } > @@ -1542,9 +1542,9 @@ altivec_resolve_overloaded_builtin (location_t loc, tree fndecl, > > arg2 = wide_int_to_tree (TREE_TYPE (arg2), selector); > if (mode == V2DFmode) > - call = rs6000_builtin_decls_x[RS6000_BIF_VEC_SET_V2DF]; > + call = rs6000_builtin_decls[RS6000_BIF_VEC_SET_V2DF]; > else if (mode == V2DImode) > - call = rs6000_builtin_decls_x[RS6000_BIF_VEC_SET_V2DI]; > + call = rs6000_builtin_decls[RS6000_BIF_VEC_SET_V2DI]; > > /* Note, __builtin_vec_insert_<xxx> has vector and scalar types > reversed. */ > @@ -1554,7 +1554,7 @@ altivec_resolve_overloaded_builtin (location_t loc, tree fndecl, > else if (mode == V1TImode && VECTOR_UNIT_VSX_P (mode) > && TREE_CODE (arg2) == INTEGER_CST) > { > - tree call = rs6000_builtin_decls_x[RS6000_BIF_VEC_SET_V1TI]; > + tree call = rs6000_builtin_decls[RS6000_BIF_VEC_SET_V1TI]; > wide_int selector = wi::zero(32); > > arg2 = wide_int_to_tree (TREE_TYPE (arg2), selector); > @@ -1740,7 +1740,7 @@ altivec_resolve_overloaded_builtin (location_t loc, tree fndecl, > instance = instance->next; > > gcc_assert (instance != NULL); > - tree fntype = rs6000_builtin_info_x[instance->bifid].fntype; > + tree fntype = rs6000_builtin_info[instance->bifid].fntype; > tree parmtype0 = TREE_VALUE (TYPE_ARG_TYPES (fntype)); > tree parmtype1 = TREE_VALUE (TREE_CHAIN (TYPE_ARG_TYPES (fntype))); > > @@ -1798,7 +1798,7 @@ altivec_resolve_overloaded_builtin (location_t loc, tree fndecl, > instance = instance->next; > > gcc_assert (instance != NULL); > - tree fntype = rs6000_builtin_info_x[instance->bifid].fntype; > + tree fntype = rs6000_builtin_info[instance->bifid].fntype; > tree parmtype0 = TREE_VALUE (TYPE_ARG_TYPES (fntype)); > tree parmtype1 = TREE_VALUE (TREE_CHAIN (TYPE_ARG_TYPES (fntype))); > > @@ -1849,7 +1849,7 @@ altivec_resolve_overloaded_builtin (location_t loc, tree fndecl, > if (rs6000_builtin_decl (instance->bifid, false) != error_mark_node > && supported) > { > - tree fntype = rs6000_builtin_info_x[instance->bifid].fntype; > + tree fntype = rs6000_builtin_info[instance->bifid].fntype; > tree ret_type = TREE_TYPE (instance->fntype); > return altivec_build_resolved_builtin (args, n, fntype, > ret_type, > @@ -1876,7 +1876,7 @@ altivec_resolve_overloaded_builtin (location_t loc, tree fndecl, > /* Provide clarity of the relationship between the overload > and the instantiation. */ > const char *internal_name > - = rs6000_builtin_info_x[instance->bifid].bifname; > + = rs6000_builtin_info[instance->bifid].bifname; > rich_location richloc (line_table, input_location); > inform (&richloc, > "overloaded builtin %qs is implemented by builtin %qs", > diff --git a/gcc/config/rs6000/rs6000-call.c b/gcc/config/rs6000/rs6000-call.c > index 5ce0d2cef88..38f0ccc97db 100644 > --- a/gcc/config/rs6000/rs6000-call.c > +++ b/gcc/config/rs6000/rs6000-call.c > @@ -3258,9 +3258,9 @@ void > rs6000_invalid_builtin (enum rs6000_gen_builtins fncode) > { > size_t j = (size_t) fncode; > - const char *name = rs6000_builtin_info_x[j].bifname; > + const char *name = rs6000_builtin_info[j].bifname; > > - switch (rs6000_builtin_info_x[j].enable) > + switch (rs6000_builtin_info[j].enable) > { > case ENB_P5: > error ("%qs requires the %qs option", name, "-mcpu=power5"); > @@ -3510,7 +3510,7 @@ rs6000_builtin_valid_without_lhs (enum rs6000_gen_builtins fn_code, > bool > rs6000_builtin_is_supported (enum rs6000_gen_builtins fncode) > { > - switch (rs6000_builtin_info_x[(size_t) fncode].enable) > + switch (rs6000_builtin_info[(size_t) fncode].enable) > { > case ENB_ALWAYS: > return true; > @@ -3570,18 +3570,18 @@ rs6000_gimple_fold_mma_builtin (gimple_stmt_iterator *gsi, > gimple *stmt = gsi_stmt (*gsi); > size_t fncode = (size_t) fn_code; > > - if (!bif_is_mma (rs6000_builtin_info_x[fncode])) > + if (!bif_is_mma (rs6000_builtin_info[fncode])) > return false; > > /* Each call that can be gimple-expanded has an associated built-in > function that it will expand into. If this one doesn't, we have > already expanded it! Exceptions: lxvp and stxvp. */ > - if (rs6000_builtin_info_x[fncode].assoc_bif == RS6000_BIF_NONE > + if (rs6000_builtin_info[fncode].assoc_bif == RS6000_BIF_NONE > && fncode != RS6000_BIF_LXVP > && fncode != RS6000_BIF_STXVP) > return false; > > - bifdata *bd = &rs6000_builtin_info_x[fncode]; > + bifdata *bd = &rs6000_builtin_info[fncode]; > unsigned nopnds = bd->nargs; > gimple_seq new_seq = NULL; > gimple *new_call; > @@ -3626,7 +3626,7 @@ rs6000_gimple_fold_mma_builtin (gimple_stmt_iterator *gsi, > to emit a xxmfacc instruction now, since we cannot do it later. */ > if (fncode == RS6000_BIF_DISASSEMBLE_ACC) > { > - new_decl = rs6000_builtin_decls_x[RS6000_BIF_XXMFACC_INTERNAL]; > + new_decl = rs6000_builtin_decls[RS6000_BIF_XXMFACC_INTERNAL]; > new_call = gimple_build_call (new_decl, 1, src); > src = create_tmp_reg_or_ssa_name (vector_quad_type_node); > gimple_call_set_lhs (new_call, src); > @@ -3635,7 +3635,7 @@ rs6000_gimple_fold_mma_builtin (gimple_stmt_iterator *gsi, > > /* Copy the accumulator/pair vector by vector. */ > new_decl > - = rs6000_builtin_decls_x[rs6000_builtin_info_x[fncode].assoc_bif]; > + = rs6000_builtin_decls[rs6000_builtin_info[fncode].assoc_bif]; > tree dst_type = build_pointer_type_for_mode (unsigned_V16QI_type_node, > ptr_mode, true); > tree dst_base = build1 (VIEW_CONVERT_EXPR, dst_type, dst_ptr); > @@ -3693,7 +3693,7 @@ rs6000_gimple_fold_mma_builtin (gimple_stmt_iterator *gsi, > > /* Convert this built-in into an internal version that uses pass-by-value > arguments. The internal built-in is found in the assoc_bif field. */ > - new_decl = rs6000_builtin_decls_x[rs6000_builtin_info_x[fncode].assoc_bif]; > + new_decl = rs6000_builtin_decls[rs6000_builtin_info[fncode].assoc_bif]; > tree lhs, op[MAX_MMA_OPERANDS]; > tree acc = gimple_call_arg (stmt, 0); > push_gimplify_context (true); > @@ -3777,8 +3777,8 @@ rs6000_gimple_fold_builtin (gimple_stmt_iterator *gsi) > gimple *g; > > size_t uns_fncode = (size_t) fn_code; > - enum insn_code icode = rs6000_builtin_info_x[uns_fncode].icode; > - const char *fn_name1 = rs6000_builtin_info_x[uns_fncode].bifname; > + enum insn_code icode = rs6000_builtin_info[uns_fncode].icode; > + const char *fn_name1 = rs6000_builtin_info[uns_fncode].bifname; > const char *fn_name2 = (icode != CODE_FOR_nothing) > ? get_insn_name ((int) icode) > : "nothing"; > @@ -4801,7 +4801,7 @@ cpu_expand_builtin (enum rs6000_gen_builtins fcode, > if (TREE_CODE (arg) != STRING_CST) > { > error ("builtin %qs only accepts a string argument", > - rs6000_builtin_info_x[(size_t) fcode].bifname); > + rs6000_builtin_info[(size_t) fcode].bifname); > return const0_rtx; > } > > @@ -4820,7 +4820,7 @@ cpu_expand_builtin (enum rs6000_gen_builtins fcode, > { > /* Invalid CPU argument. */ > error ("cpu %qs is an invalid argument to builtin %qs", > - cpu, rs6000_builtin_info_x[(size_t) fcode].bifname); > + cpu, rs6000_builtin_info[(size_t) fcode].bifname); > return const0_rtx; > } > > @@ -4849,7 +4849,7 @@ cpu_expand_builtin (enum rs6000_gen_builtins fcode, > /* Invalid HWCAP argument. */ > error ("%s %qs is an invalid argument to builtin %qs", > "hwcap", hwcap, > - rs6000_builtin_info_x[(size_t) fcode].bifname); > + rs6000_builtin_info[(size_t) fcode].bifname); > return const0_rtx; > } > > @@ -4877,7 +4877,7 @@ cpu_expand_builtin (enum rs6000_gen_builtins fcode, > > #else > warning (0, "builtin %qs needs GLIBC (2.23 and newer) that exports hardware " > - "capability bits", rs6000_builtin_info_x[(size_t) fcode].bifname); > + "capability bits", rs6000_builtin_info[(size_t) fcode].bifname); > > /* For old LIBCs, always return FALSE. */ > emit_move_insn (target, GEN_INT (0)); > @@ -5479,7 +5479,7 @@ rs6000_expand_builtin (tree exp, rtx target, rtx /* subtarget */, > enum rs6000_gen_builtins fcode > = (enum rs6000_gen_builtins) DECL_MD_FUNCTION_CODE (fndecl); > size_t uns_fcode = (size_t)fcode; > - enum insn_code icode = rs6000_builtin_info_x[uns_fcode].icode; > + enum insn_code icode = rs6000_builtin_info[uns_fcode].icode; > > /* TODO: The following commentary and code is inherited from the original > builtin processing code. The commentary is a bit confusing, with the > @@ -5557,7 +5557,7 @@ rs6000_expand_builtin (tree exp, rtx target, rtx /* subtarget */, > /* In case of "#pragma target" changes, we initialize all builtins > but check for actual availability now, during expand time. For > invalid builtins, generate a normal call. */ > - bifdata *bifaddr = &rs6000_builtin_info_x[uns_fcode]; > + bifdata *bifaddr = &rs6000_builtin_info[uns_fcode]; > bif_enable e = bifaddr->enable; > > if (!(e == ENB_ALWAYS > @@ -6260,7 +6260,7 @@ rs6000_init_builtins (void) > fprintf (stderr, "\nAutogenerated built-in functions:\n\n"); > for (int i = 1; i < (int) RS6000_BIF_MAX; i++) > { > - bif_enable e = rs6000_builtin_info_x[i].enable; > + bif_enable e = rs6000_builtin_info[i].enable; > if (e == ENB_P5 && !TARGET_POPCNTB) > continue; > if (e == ENB_P6 && !TARGET_CMPB) > @@ -6299,10 +6299,10 @@ rs6000_init_builtins (void) > continue; > if (e == ENB_MMA && !TARGET_MMA) > continue; > - tree fntype = rs6000_builtin_info_x[i].fntype; > + tree fntype = rs6000_builtin_info[i].fntype; > tree t = TREE_TYPE (fntype); > fprintf (stderr, "%s %s (", rs6000_type_string (t), > - rs6000_builtin_info_x[i].bifname); > + rs6000_builtin_info[i].bifname); > t = TYPE_ARG_TYPES (fntype); > while (t && TREE_VALUE (t) != void_type_node) > { > @@ -6313,7 +6313,7 @@ rs6000_init_builtins (void) > fprintf (stderr, ", "); > } > fprintf (stderr, "); %s [%4d]\n", > - rs6000_builtin_info_x[i].attr_string, (int) i); > + rs6000_builtin_info[i].attr_string, (int) i); > } > fprintf (stderr, "\nEnd autogenerated built-in functions.\n\n\n"); > } > @@ -6342,7 +6342,7 @@ rs6000_init_builtins (void) > } > > altivec_builtin_mask_for_load > - = rs6000_builtin_decls_x[RS6000_BIF_MASK_FOR_LOAD]; > + = rs6000_builtin_decls[RS6000_BIF_MASK_FOR_LOAD]; > > #ifdef SUBTARGET_INIT_BUILTINS > SUBTARGET_INIT_BUILTINS; > @@ -6359,7 +6359,7 @@ rs6000_builtin_decl (unsigned code, bool /* initialize_p */) > if (fcode >= RS6000_OVLD_MAX) > return error_mark_node; > > - return rs6000_builtin_decls_x[code]; > + return rs6000_builtin_decls[code]; > } > > /* Return the internal arg pointer used for function incoming > diff --git a/gcc/config/rs6000/rs6000-gen-builtins.c b/gcc/config/rs6000/rs6000-gen-builtins.c > index 114289a0034..f1a9d1f0e63 100644 > --- a/gcc/config/rs6000/rs6000-gen-builtins.c > +++ b/gcc/config/rs6000/rs6000-gen-builtins.c > @@ -2208,7 +2208,7 @@ write_decls (void) > fprintf (header_file, " RS6000_OVLD_MAX\n};\n\n"); > > fprintf (header_file, > - "extern GTY(()) tree rs6000_builtin_decls_x[RS6000_OVLD_MAX];\n\n"); > + "extern GTY(()) tree rs6000_builtin_decls[RS6000_OVLD_MAX];\n\n"); > > fprintf (header_file, > "enum rs6000_ovld_instances\n{\n RS6000_INST_NONE,\n"); > @@ -2336,9 +2336,6 @@ write_decls (void) > "#define bif_is_endian(x)\t((x).bifattrs & bif_endian_bit)\n"); > fprintf (header_file, "\n"); > > - /* #### Note that the _x is added for now to avoid conflict with > - the existing rs6000_builtin_info[] file while testing. It will > - be removed as we progress. */ > /* #### Cannot mark this as a GC root because only pointer types can > be marked as GTY((user)) and be GC roots. All trees in here are > kept alive by other globals, so not a big deal. Alternatively, > @@ -2346,7 +2343,7 @@ write_decls (void) > to avoid requiring a GTY((user)) designation, but that seems > unnecessarily gross. */ > fprintf (header_file, > - "extern bifdata rs6000_builtin_info_x[RS6000_BIF_MAX];\n\n"); > + "extern bifdata rs6000_builtin_info[RS6000_BIF_MAX];\n\n"); > > fprintf (header_file, "struct GTY((user)) ovlddata\n"); > fprintf (header_file, "{\n"); > @@ -2495,12 +2492,12 @@ write_header_file (void) > return 1; > } > > -/* Write the decl and initializer for rs6000_builtin_info_x[]. */ > +/* Write the decl and initializer for rs6000_builtin_info[]. */ > static void > write_bif_static_init (void) > { > const char *res[3]; > - fprintf (init_file, "bifdata rs6000_builtin_info_x[RS6000_BIF_MAX] =\n"); > + fprintf (init_file, "bifdata rs6000_builtin_info[RS6000_BIF_MAX] =\n"); > fprintf (init_file, " {\n"); > fprintf (init_file, " { /* RS6000_BIF_NONE: */\n"); > fprintf (init_file, " \"\", ENB_ALWAYS, 0, CODE_FOR_nothing, 0,\n"); > @@ -2665,7 +2662,7 @@ write_init_bif_table (void) > for (int i = 0; i <= curr_bif; i++) > { > fprintf (init_file, > - " rs6000_builtin_info_x[RS6000_BIF_%s].fntype" > + " rs6000_builtin_info[RS6000_BIF_%s].fntype" > "\n = %s;\n", > bifs[i].idname, bifs[i].fndecl); > > @@ -2692,7 +2689,7 @@ write_init_bif_table (void) > } > > fprintf (init_file, > - " rs6000_builtin_decls_x[(int)RS6000_BIF_%s] = t\n", > + " rs6000_builtin_decls[(int)RS6000_BIF_%s] = t\n", > bifs[i].idname); > fprintf (init_file, > " = add_builtin_function (\"%s\",\n", > @@ -2733,7 +2730,7 @@ write_init_bif_table (void) > fprintf (init_file, " }\n"); > fprintf (init_file, " else\n"); > fprintf (init_file, " {\n"); > - fprintf (init_file, " rs6000_builtin_decls_x" > + fprintf (init_file, " rs6000_builtin_decls" > "[(int)RS6000_BIF_%s] = NULL_TREE;\n", bifs[i].idname); > fprintf (init_file, " }\n"); > } > @@ -2786,7 +2783,7 @@ write_init_ovld_table (void) > } > > fprintf (init_file, > - " rs6000_builtin_decls_x[(int)RS6000_OVLD_%s] = t\n", > + " rs6000_builtin_decls[(int)RS6000_OVLD_%s] = t\n", > stanza->stanza_id); > fprintf (init_file, > " = add_builtin_function (\"%s\",\n", > @@ -2835,7 +2832,7 @@ write_init_file (void) > fprintf (init_file, "#include \"rs6000-builtins.h\"\n"); > fprintf (init_file, "\n"); > > - fprintf (init_file, "tree rs6000_builtin_decls_x[RS6000_OVLD_MAX];\n\n"); > + fprintf (init_file, "tree rs6000_builtin_decls[RS6000_OVLD_MAX];\n\n"); > > write_bif_static_init (); > write_ovld_static_init (); > @@ -2851,11 +2848,11 @@ write_init_file (void) > fprintf (init_file, "\n"); > > fprintf (init_file, > - " rs6000_builtin_decls_x[RS6000_BIF_NONE] = NULL_TREE;\n"); > + " rs6000_builtin_decls[RS6000_BIF_NONE] = NULL_TREE;\n"); > fprintf (init_file, > - " rs6000_builtin_decls_x[RS6000_BIF_MAX] = NULL_TREE;\n"); > + " rs6000_builtin_decls[RS6000_BIF_MAX] = NULL_TREE;\n"); > fprintf (init_file, > - " rs6000_builtin_decls_x[RS6000_OVLD_NONE] = NULL_TREE;\n\n"); > + " rs6000_builtin_decls[RS6000_OVLD_NONE] = NULL_TREE;\n\n"); > > write_init_bif_table (); > write_init_ovld_table (); > diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c > index 38e22f927c5..60fbb1ea443 100644 > --- a/gcc/config/rs6000/rs6000.c > +++ b/gcc/config/rs6000/rs6000.c > @@ -5596,95 +5596,95 @@ rs6000_builtin_vectorized_function (unsigned int fn, tree type_out, > if (VECTOR_UNIT_VSX_P (V2DFmode) > && out_mode == DFmode && out_n == 2 > && in_mode == DFmode && in_n == 2) > - return rs6000_builtin_decls_x[RS6000_BIF_CPSGNDP]; > + return rs6000_builtin_decls[RS6000_BIF_CPSGNDP]; > if (VECTOR_UNIT_VSX_P (V4SFmode) > && out_mode == SFmode && out_n == 4 > && in_mode == SFmode && in_n == 4) > - return rs6000_builtin_decls_x[RS6000_BIF_CPSGNSP]; > + return rs6000_builtin_decls[RS6000_BIF_CPSGNSP]; > if (VECTOR_UNIT_ALTIVEC_P (V4SFmode) > && out_mode == SFmode && out_n == 4 > && in_mode == SFmode && in_n == 4) > - return rs6000_builtin_decls_x[RS6000_BIF_COPYSIGN_V4SF]; > + return rs6000_builtin_decls[RS6000_BIF_COPYSIGN_V4SF]; > break; > CASE_CFN_CEIL: > if (VECTOR_UNIT_VSX_P (V2DFmode) > && out_mode == DFmode && out_n == 2 > && in_mode == DFmode && in_n == 2) > - return rs6000_builtin_decls_x[RS6000_BIF_XVRDPIP]; > + return rs6000_builtin_decls[RS6000_BIF_XVRDPIP]; > if (VECTOR_UNIT_VSX_P (V4SFmode) > && out_mode == SFmode && out_n == 4 > && in_mode == SFmode && in_n == 4) > - return rs6000_builtin_decls_x[RS6000_BIF_XVRSPIP]; > + return rs6000_builtin_decls[RS6000_BIF_XVRSPIP]; > if (VECTOR_UNIT_ALTIVEC_P (V4SFmode) > && out_mode == SFmode && out_n == 4 > && in_mode == SFmode && in_n == 4) > - return rs6000_builtin_decls_x[RS6000_BIF_VRFIP]; > + return rs6000_builtin_decls[RS6000_BIF_VRFIP]; > break; > CASE_CFN_FLOOR: > if (VECTOR_UNIT_VSX_P (V2DFmode) > && out_mode == DFmode && out_n == 2 > && in_mode == DFmode && in_n == 2) > - return rs6000_builtin_decls_x[RS6000_BIF_XVRDPIM]; > + return rs6000_builtin_decls[RS6000_BIF_XVRDPIM]; > if (VECTOR_UNIT_VSX_P (V4SFmode) > && out_mode == SFmode && out_n == 4 > && in_mode == SFmode && in_n == 4) > - return rs6000_builtin_decls_x[RS6000_BIF_XVRSPIM]; > + return rs6000_builtin_decls[RS6000_BIF_XVRSPIM]; > if (VECTOR_UNIT_ALTIVEC_P (V4SFmode) > && out_mode == SFmode && out_n == 4 > && in_mode == SFmode && in_n == 4) > - return rs6000_builtin_decls_x[RS6000_BIF_VRFIM]; > + return rs6000_builtin_decls[RS6000_BIF_VRFIM]; > break; > CASE_CFN_FMA: > if (VECTOR_UNIT_VSX_P (V2DFmode) > && out_mode == DFmode && out_n == 2 > && in_mode == DFmode && in_n == 2) > - return rs6000_builtin_decls_x[RS6000_BIF_XVMADDDP]; > + return rs6000_builtin_decls[RS6000_BIF_XVMADDDP]; > if (VECTOR_UNIT_VSX_P (V4SFmode) > && out_mode == SFmode && out_n == 4 > && in_mode == SFmode && in_n == 4) > - return rs6000_builtin_decls_x[RS6000_BIF_XVMADDSP]; > + return rs6000_builtin_decls[RS6000_BIF_XVMADDSP]; > if (VECTOR_UNIT_ALTIVEC_P (V4SFmode) > && out_mode == SFmode && out_n == 4 > && in_mode == SFmode && in_n == 4) > - return rs6000_builtin_decls_x[RS6000_BIF_VMADDFP]; > + return rs6000_builtin_decls[RS6000_BIF_VMADDFP]; > break; > CASE_CFN_TRUNC: > if (VECTOR_UNIT_VSX_P (V2DFmode) > && out_mode == DFmode && out_n == 2 > && in_mode == DFmode && in_n == 2) > - return rs6000_builtin_decls_x[RS6000_BIF_XVRDPIZ]; > + return rs6000_builtin_decls[RS6000_BIF_XVRDPIZ]; > if (VECTOR_UNIT_VSX_P (V4SFmode) > && out_mode == SFmode && out_n == 4 > && in_mode == SFmode && in_n == 4) > - return rs6000_builtin_decls_x[RS6000_BIF_XVRSPIZ]; > + return rs6000_builtin_decls[RS6000_BIF_XVRSPIZ]; > if (VECTOR_UNIT_ALTIVEC_P (V4SFmode) > && out_mode == SFmode && out_n == 4 > && in_mode == SFmode && in_n == 4) > - return rs6000_builtin_decls_x[RS6000_BIF_VRFIZ]; > + return rs6000_builtin_decls[RS6000_BIF_VRFIZ]; > break; > CASE_CFN_NEARBYINT: > if (VECTOR_UNIT_VSX_P (V2DFmode) > && flag_unsafe_math_optimizations > && out_mode == DFmode && out_n == 2 > && in_mode == DFmode && in_n == 2) > - return rs6000_builtin_decls_x[RS6000_BIF_XVRDPI]; > + return rs6000_builtin_decls[RS6000_BIF_XVRDPI]; > if (VECTOR_UNIT_VSX_P (V4SFmode) > && flag_unsafe_math_optimizations > && out_mode == SFmode && out_n == 4 > && in_mode == SFmode && in_n == 4) > - return rs6000_builtin_decls_x[RS6000_BIF_XVRSPI]; > + return rs6000_builtin_decls[RS6000_BIF_XVRSPI]; > break; > CASE_CFN_RINT: > if (VECTOR_UNIT_VSX_P (V2DFmode) > && !flag_trapping_math > && out_mode == DFmode && out_n == 2 > && in_mode == DFmode && in_n == 2) > - return rs6000_builtin_decls_x[RS6000_BIF_XVRDPIC]; > + return rs6000_builtin_decls[RS6000_BIF_XVRDPIC]; > if (VECTOR_UNIT_VSX_P (V4SFmode) > && !flag_trapping_math > && out_mode == SFmode && out_n == 4 > && in_mode == SFmode && in_n == 4) > - return rs6000_builtin_decls_x[RS6000_BIF_XVRSPIC]; > + return rs6000_builtin_decls[RS6000_BIF_XVRSPIC]; > break; > default: > break; > @@ -5731,25 +5731,25 @@ rs6000_builtin_md_vectorized_function (tree fndecl, tree type_out, > if (VECTOR_UNIT_ALTIVEC_OR_VSX_P (V4SFmode) > && out_mode == SFmode && out_n == 4 > && in_mode == SFmode && in_n == 4) > - return rs6000_builtin_decls_x[RS6000_BIF_VRSQRTFP]; > + return rs6000_builtin_decls[RS6000_BIF_VRSQRTFP]; > break; > case RS6000_BIF_RSQRT: > if (VECTOR_UNIT_VSX_P (V2DFmode) > && out_mode == DFmode && out_n == 2 > && in_mode == DFmode && in_n == 2) > - return rs6000_builtin_decls_x[RS6000_BIF_RSQRT_2DF]; > + return rs6000_builtin_decls[RS6000_BIF_RSQRT_2DF]; > break; > case RS6000_BIF_RECIPF: > if (VECTOR_UNIT_ALTIVEC_OR_VSX_P (V4SFmode) > && out_mode == SFmode && out_n == 4 > && in_mode == SFmode && in_n == 4) > - return rs6000_builtin_decls_x[RS6000_BIF_VRECIPFP]; > + return rs6000_builtin_decls[RS6000_BIF_VRECIPFP]; > break; > case RS6000_BIF_RECIP: > if (VECTOR_UNIT_VSX_P (V2DFmode) > && out_mode == DFmode && out_n == 2 > && in_mode == DFmode && in_n == 2) > - return rs6000_builtin_decls_x[RS6000_BIF_RECIP_V2DF]; > + return rs6000_builtin_decls[RS6000_BIF_RECIP_V2DF]; > break; > default: > break; > @@ -5804,7 +5804,7 @@ rs6000_builtin_md_vectorized_function (tree fndecl, tree type_out, > } > > if (in_mode == exp_mode && in_vmode == exp_vmode) > - return rs6000_builtin_decls_x[bif]; > + return rs6000_builtin_decls[bif]; > } > > return NULL_TREE; > @@ -22496,13 +22496,13 @@ rs6000_builtin_reciprocal (tree fndecl) > if (!RS6000_RECIP_AUTO_RSQRTE_P (V2DFmode)) > return NULL_TREE; > > - return rs6000_builtin_decls_x[RS6000_BIF_RSQRT_2DF]; > + return rs6000_builtin_decls[RS6000_BIF_RSQRT_2DF]; > > case RS6000_BIF_XVSQRTSP: > if (!RS6000_RECIP_AUTO_RSQRTE_P (V4SFmode)) > return NULL_TREE; > > - return rs6000_builtin_decls_x[RS6000_BIF_RSQRT_4SF]; > + return rs6000_builtin_decls[RS6000_BIF_RSQRT_4SF]; > > default: > return NULL_TREE; > @@ -25124,7 +25124,7 @@ add_condition_to_bb (tree function_decl, tree version_decl, > > tree bool_zero = build_int_cst (bool_int_type_node, 0); > tree cond_var = create_tmp_var (bool_int_type_node); > - tree predicate_decl = rs6000_builtin_decls_x[(int) RS6000_BIF_CPU_SUPPORTS]; > + tree predicate_decl = rs6000_builtin_decls[(int) RS6000_BIF_CPU_SUPPORTS]; > const char *arg_str = rs6000_clone_map[clone_isa].name; > tree predicate_arg = build_string_literal (strlen (arg_str) + 1, arg_str); > gimple *call_cond_stmt = gimple_build_call (predicate_decl, 1, predicate_arg); > @@ -27764,8 +27764,8 @@ rs6000_atomic_assign_expand_fenv (tree *hold, tree *clear, tree *update) > return; > } > > - tree mffs = rs6000_builtin_decls_x[RS6000_BIF_MFFS]; > - tree mtfsf = rs6000_builtin_decls_x[RS6000_BIF_MTFSF]; > + tree mffs = rs6000_builtin_decls[RS6000_BIF_MFFS]; > + tree mtfsf = rs6000_builtin_decls[RS6000_BIF_MTFSF]; > tree call_mffs = build_call_expr (mffs, 0); > > /* Generates the equivalent of feholdexcept (&fenv_var) ^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [PATCH 6/6] rs6000: Rename arrays to remove temporary _x suffix 2021-12-06 20:49 ` [PATCH 6/6] rs6000: Rename arrays to remove temporary _x suffix Bill Schmidt 2021-12-14 18:01 ` [PATCH v2 " Bill Schmidt @ 2021-12-14 18:10 ` David Edelsohn 1 sibling, 0 replies; 20+ messages in thread From: David Edelsohn @ 2021-12-14 18:10 UTC (permalink / raw) To: Bill Schmidt; +Cc: GCC Patches, Segher Boessenkool On Mon, Dec 6, 2021 at 3:49 PM Bill Schmidt <wschmidt@linux.ibm.com> wrote: > > Hi! > > While we had two sets of built-in infrastructure at once, I added _x as a > suffix to two arrays to disambiguate the old and new versions. Time to fix > that also. > > Bootstrapped and tested on powerpc64le-linux-gnu with no regressions. Is this > okay for trunk? > > Thanks! > Bill > > 2021-12-06 Bill Schmidt <wschmidt@linux.ibm.com> > > gcc/ > * config/rs6000/rs6000-c.c (altivec_build_resolved_builtin): Rename > rs6000_builtin_decls_x to rs6000_builtin_decls. > (altivec_resolve_overloaded_builtin): Likewise. Also rename > rs6000_builtin_info_x to rs6000_builtin_info. > * config/rs6000/rs6000-call.c (rs6000_invalid_builtin): Rename > rs6000_builtin_info_x to rs6000_builtin_info. > (rs6000_builtin_is_supported): Likewise. > (rs6000_gimple_fold_mma_builtin): Likewise. Also rename > rs6000_builtin_decls_x to rs6000_builtin_decls. > (rs6000_gimple_fold_builtin): Rename rs6000_builtin_info_x to > rs6000_builtin_info. > (cpu_expand_builtin): Likewise. > (rs6000_expand_builtin): Likewise. > (rs6000_init_builtins): Likewise. Also rename rs6000_builtin_decls_x > to rs6000_builtin_decls. > (rs6000_builtin_decl): Rename rs6000_builtin_decls_x to > rs6000_builtin_decls. > * config/rs6000/rs6000-gen-builtins.c (write_decls): In generated code, > rename rs6000_builtin_decls_x to rs6000_builtin_decls, and rename > rs6000_builtin_info_x to rs6000_builtin_info. > (write_bif_static_init): In generated code, rename > rs6000_builtin_info_x to rs6000_builtin_info. > (write_init_bif_table): In generated code, rename > rs6000_builtin_decls_x to rs6000_builtin_decls, and rename > rs6000_builtin_info_x to rs6000_builtin_info. > (write_init_ovld_table): In generated code, rename > rs6000_builtin_decls_x to rs6000_builtin_decls. > (write_init_file): Likewise. > * config/rs6000/rs6000.c (rs6000_builtin_vectorized_function): > Likewise. > (rs6000_builtin_md_vectorized_function): Likewise. > (rs6000_builtin_reciprocal): Likewise. > (add_condition_to_bb): Likewise. > (rs6000_atomic_assign_expand_fenv): Likewise. Okay. Thanks, David ^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [PATCH v2 0/6] Remove "old" built-in function infrastructure 2021-12-06 20:49 [PATCH v2 0/6] Remove "old" built-in function infrastructure Bill Schmidt ` (5 preceding siblings ...) 2021-12-06 20:49 ` [PATCH 6/6] rs6000: Rename arrays to remove temporary _x suffix Bill Schmidt @ 2021-12-14 17:32 ` Bill Schmidt 6 siblings, 0 replies; 20+ messages in thread From: Bill Schmidt @ 2021-12-14 17:32 UTC (permalink / raw) To: gcc-patches; +Cc: dje.gcc, segher Hi! I'd like to ping patches 2 through 6 of this series. Much obliged! Thanks, Bill On 12/6/21 2:49 PM, Bill Schmidt via Gcc-patches wrote: > Hi! > > Now that the new built-in function support is all upstream and enabled, it > seems safe and prudent to remove the old code to avoid confusion. I broke this > up to the extent possible, but a couple of patches are still pretty large. > > David Edelsohn found that I had broken some C++ library functions for AIX, and > his fix for that required me to re-spin the patches. I also generated the diff > with a more efficient algorithm to reduce the patch size. Otherwise this > series is identical to V1. > > Thanks! > Bill > > Bill Schmidt (6): > rs6000: Remove new_builtins_are_live and dead code it was guarding > rs6000: Remove altivec_overloaded_builtins array and initialization > rs6000: Rename rs6000-builtin-new.def to rs6000-builtins.def > rs6000: Remove rs6000-builtin.def and associated data and functions > rs6000: Rename functions with "new" in their names > rs6000: Rename arrays to remove temporary _x suffix > > gcc/config/rs6000/darwin.h | 8 +- > gcc/config/rs6000/rs6000-builtin.def | 3350 ----- > ...00-builtin-new.def => rs6000-builtins.def} | 0 > gcc/config/rs6000/rs6000-c.c | 1266 +- > gcc/config/rs6000/rs6000-call.c | 11964 +--------------- > gcc/config/rs6000/rs6000-gen-builtins.c | 115 +- > gcc/config/rs6000/rs6000-internal.h | 2 +- > gcc/config/rs6000/rs6000-protos.h | 3 - > gcc/config/rs6000/rs6000.c | 334 +- > gcc/config/rs6000/rs6000.h | 58 - > gcc/config/rs6000/t-rs6000 | 7 +- > 11 files changed, 224 insertions(+), 16883 deletions(-) > delete mode 100644 gcc/config/rs6000/rs6000-builtin.def > rename gcc/config/rs6000/{rs6000-builtin-new.def => rs6000-builtins.def} (100%) > ^ permalink raw reply [flat|nested] 20+ messages in thread
* [PATCH 0/6] rs6000: Remove "old" built-in function infrastructure @ 2021-12-03 18:22 Bill Schmidt 2021-12-03 18:22 ` [PATCH 2/6] rs6000: Remove altivec_overloaded_builtins array and initialization Bill Schmidt 0 siblings, 1 reply; 20+ messages in thread From: Bill Schmidt @ 2021-12-03 18:22 UTC (permalink / raw) To: gcc-patches; +Cc: segher, dje, Bill Schmidt From: Bill Schmidt <wschmidt@linux.ibm.com> Hi! Now that the new built-in function support is all upstream and enabled, it seems safe and prudent to remove the old code to avoid confusion. I broke this up to the extent possible, but the first patch is a bit large and messy because so many dead functions have to be removed when taking out the "new_builtins_are_live" variable. Bill Schmidt (6): rs6000: Remove new_builtins_are_live and dead code it was guarding rs6000: Remove altivec_overloaded_builtins array and initialization rs6000: Rename rs6000-builtin-new.def to rs6000-builtins.def rs6000: Remove rs6000-builtin.def and associated data and functions rs6000: Rename functions with "new" in their names rs6000: Rename arrays to remove temporary _x suffix gcc/config/rs6000/darwin.h | 8 +- gcc/config/rs6000/rs6000-builtin.def | 3350 --- ...00-builtin-new.def => rs6000-builtins.def} | 0 gcc/config/rs6000/rs6000-c.c | 1342 +- gcc/config/rs6000/rs6000-call.c | 17810 +++------------- gcc/config/rs6000/rs6000-gen-builtins.c | 115 +- gcc/config/rs6000/rs6000-internal.h | 2 +- gcc/config/rs6000/rs6000-protos.h | 3 - gcc/config/rs6000/rs6000.c | 334 +- gcc/config/rs6000/rs6000.h | 58 - gcc/config/rs6000/t-rs6000 | 7 +- 11 files changed, 3173 insertions(+), 19856 deletions(-) delete mode 100644 gcc/config/rs6000/rs6000-builtin.def rename gcc/config/rs6000/{rs6000-builtin-new.def => rs6000-builtins.def} (100%) -- 2.27.0 ^ permalink raw reply [flat|nested] 20+ messages in thread
* [PATCH 2/6] rs6000: Remove altivec_overloaded_builtins array and initialization 2021-12-03 18:22 [PATCH 0/6] rs6000: " Bill Schmidt @ 2021-12-03 18:22 ` Bill Schmidt 0 siblings, 0 replies; 20+ messages in thread From: Bill Schmidt @ 2021-12-03 18:22 UTC (permalink / raw) To: gcc-patches; +Cc: segher, dje, Bill Schmidt From: Bill Schmidt <wschmidt@linux.ibm.com> Hi! This patch just removes the huge altivec_overloaded_builtins array. Bootstrapped and tested on powerpc64le-linux-gnu with no regressions. Is this okay for trunk? Thanks! Bill 2021-12-02 Bill Schmidt <wschmidt@linux.ibm.com> gcc/ * config/rs6000/rs6000-call.c (altivec_overloaded_builtins): Remove. * config/rs6000/rs6000.h (altivec_overloaded_builtins): Remove. --- gcc/config/rs6000/rs6000-call.c | 5892 ------------------------------- gcc/config/rs6000/rs6000.h | 1 - 2 files changed, 5893 deletions(-) diff --git a/gcc/config/rs6000/rs6000-call.c b/gcc/config/rs6000/rs6000-call.c index 7eac3f72abc..734887055b2 100644 --- a/gcc/config/rs6000/rs6000-call.c +++ b/gcc/config/rs6000/rs6000-call.c @@ -305,5898 +305,6 @@ static const struct rs6000_builtin_info_type rs6000_builtin_info[] = #undef RS6000_BUILTIN_P #undef RS6000_BUILTIN_X -const struct altivec_builtin_types altivec_overloaded_builtins[] = { - /* Unary AltiVec/VSX builtins. */ - { ALTIVEC_BUILTIN_VEC_ABS, ALTIVEC_BUILTIN_ABS_V16QI, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_ABS, ALTIVEC_BUILTIN_ABS_V8HI, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_ABS, ALTIVEC_BUILTIN_ABS_V4SI, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_ABS, P8V_BUILTIN_ABS_V2DI, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_ABS, ALTIVEC_BUILTIN_ABS_V4SF, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_ABS, VSX_BUILTIN_XVABSDP, - RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_ABSS, ALTIVEC_BUILTIN_ABSS_V16QI, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_ABSS, ALTIVEC_BUILTIN_ABSS_V8HI, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_ABSS, ALTIVEC_BUILTIN_ABSS_V4SI, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_CEIL, ALTIVEC_BUILTIN_VRFIP, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_CEIL, VSX_BUILTIN_XVRDPIP, - RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_EXPTE, ALTIVEC_BUILTIN_VEXPTEFP, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_FLOOR, VSX_BUILTIN_XVRDPIM, - RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_FLOOR, ALTIVEC_BUILTIN_VRFIM, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_LOGE, ALTIVEC_BUILTIN_VLOGEFP, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_MTVSCR, ALTIVEC_BUILTIN_MTVSCR, - RS6000_BTI_void, RS6000_BTI_V4SI, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_MTVSCR, ALTIVEC_BUILTIN_MTVSCR, - RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_MTVSCR, ALTIVEC_BUILTIN_MTVSCR, - RS6000_BTI_void, RS6000_BTI_bool_V4SI, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_MTVSCR, ALTIVEC_BUILTIN_MTVSCR, - RS6000_BTI_void, RS6000_BTI_V8HI, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_MTVSCR, ALTIVEC_BUILTIN_MTVSCR, - RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_MTVSCR, ALTIVEC_BUILTIN_MTVSCR, - RS6000_BTI_void, RS6000_BTI_bool_V8HI, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_MTVSCR, ALTIVEC_BUILTIN_MTVSCR, - RS6000_BTI_void, RS6000_BTI_pixel_V8HI, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_MTVSCR, ALTIVEC_BUILTIN_MTVSCR, - RS6000_BTI_void, RS6000_BTI_V16QI, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_MTVSCR, ALTIVEC_BUILTIN_MTVSCR, - RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_MTVSCR, ALTIVEC_BUILTIN_MTVSCR, - RS6000_BTI_void, RS6000_BTI_bool_V16QI, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_RE, ALTIVEC_BUILTIN_VREFP, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_RE, VSX_BUILTIN_XVREDP, - RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_ROUND, ALTIVEC_BUILTIN_VRFIN, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_ROUND, VSX_BUILTIN_XVRDPI, - RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_RECIP, ALTIVEC_BUILTIN_VRECIPFP, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, - { ALTIVEC_BUILTIN_VEC_RECIP, VSX_BUILTIN_RECIP_V2DF, - RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 }, - { ALTIVEC_BUILTIN_VEC_RSQRT, ALTIVEC_BUILTIN_VRSQRTFP, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_RSQRT, VSX_BUILTIN_RSQRT_2DF, - RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_RSQRTE, ALTIVEC_BUILTIN_VRSQRTEFP, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_RSQRTE, VSX_BUILTIN_XVRSQRTEDP, - RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_TRUNC, ALTIVEC_BUILTIN_VRFIZ, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_TRUNC, VSX_BUILTIN_XVRDPIZ, - RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_UNPACKH, ALTIVEC_BUILTIN_VUPKHSB, - RS6000_BTI_V8HI, RS6000_BTI_V16QI, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_UNPACKH, ALTIVEC_BUILTIN_VUPKHSB, - RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V16QI, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_UNPACKH, ALTIVEC_BUILTIN_VUPKHSH, - RS6000_BTI_V4SI, RS6000_BTI_V8HI, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_UNPACKH, ALTIVEC_BUILTIN_VUPKHSH, - RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V8HI, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_UNPACKH, P8V_BUILTIN_VUPKHSW, - RS6000_BTI_V2DI, RS6000_BTI_V4SI, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_UNPACKH, P8V_BUILTIN_VUPKHSW, - RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V4SI, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_UNPACKH, ALTIVEC_BUILTIN_VUPKHPX, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_pixel_V8HI, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_UNPACKH, VSX_BUILTIN_DOUBLEH_V4SF, - RS6000_BTI_V2DF, RS6000_BTI_V4SF, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_VUPKHSH, ALTIVEC_BUILTIN_VUPKHSH, - RS6000_BTI_V4SI, RS6000_BTI_V8HI, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_VUPKHSH, ALTIVEC_BUILTIN_VUPKHSH, - RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V8HI, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_VUPKHSH, P8V_BUILTIN_VUPKHSW, - RS6000_BTI_V2DI, RS6000_BTI_V4SI, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_VUPKHSH, P8V_BUILTIN_VUPKHSW, - RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V4SI, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_VUPKHPX, ALTIVEC_BUILTIN_VUPKHPX, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V8HI, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_VUPKHPX, ALTIVEC_BUILTIN_VUPKHPX, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_pixel_V8HI, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_VUPKHSB, ALTIVEC_BUILTIN_VUPKHSB, - RS6000_BTI_V8HI, RS6000_BTI_V16QI, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_VUPKHSB, ALTIVEC_BUILTIN_VUPKHSB, - RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V16QI, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_UNPACKL, ALTIVEC_BUILTIN_VUPKLSB, - RS6000_BTI_V8HI, RS6000_BTI_V16QI, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_UNPACKL, ALTIVEC_BUILTIN_VUPKLSB, - RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V16QI, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_UNPACKL, ALTIVEC_BUILTIN_VUPKLPX, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_pixel_V8HI, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_UNPACKL, ALTIVEC_BUILTIN_VUPKLSH, - RS6000_BTI_V4SI, RS6000_BTI_V8HI, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_UNPACKL, ALTIVEC_BUILTIN_VUPKLSH, - RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V8HI, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_UNPACKL, P8V_BUILTIN_VUPKLSW, - RS6000_BTI_V2DI, RS6000_BTI_V4SI, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_UNPACKL, P8V_BUILTIN_VUPKLSW, - RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V4SI, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_UNPACKL, VSX_BUILTIN_DOUBLEL_V4SF, - RS6000_BTI_V2DF, RS6000_BTI_V4SF, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_VUPKLPX, ALTIVEC_BUILTIN_VUPKLPX, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V8HI, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_VUPKLPX, ALTIVEC_BUILTIN_VUPKLPX, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_pixel_V8HI, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_VUPKLSH, ALTIVEC_BUILTIN_VUPKLSH, - RS6000_BTI_V4SI, RS6000_BTI_V8HI, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_VUPKLSH, ALTIVEC_BUILTIN_VUPKLSH, - RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V8HI, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_VUPKLSB, ALTIVEC_BUILTIN_VUPKLSB, - RS6000_BTI_V8HI, RS6000_BTI_V16QI, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_VUPKLSB, ALTIVEC_BUILTIN_VUPKLSB, - RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V16QI, 0, 0 }, - - /* Binary AltiVec/VSX builtins. */ - { ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUBM, - RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUBM, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUBM, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUBM, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUBM, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUBM, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUHM, - RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUHM, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUHM, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUHM, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUHM, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUHM, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUWM, - RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUWM, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUWM, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUWM, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUWM, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUWM, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_ADD, P8V_BUILTIN_VADDUDM, - RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_ADD, P8V_BUILTIN_VADDUDM, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_ADD, P8V_BUILTIN_VADDUDM, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_ADD, P8V_BUILTIN_VADDUDM, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_ADD, P8V_BUILTIN_VADDUDM, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_ADD, P8V_BUILTIN_VADDUDM, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDFP, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, - { ALTIVEC_BUILTIN_VEC_ADD, VSX_BUILTIN_XVADDDP, - RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 }, - { ALTIVEC_BUILTIN_VEC_ADD, P8V_BUILTIN_VADDUQM, - RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, 0 }, - { ALTIVEC_BUILTIN_VEC_ADD, P8V_BUILTIN_VADDUQM, - RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, - RS6000_BTI_unsigned_V1TI, 0 }, - { ALTIVEC_BUILTIN_VEC_VADDFP, ALTIVEC_BUILTIN_VADDFP, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, - { ALTIVEC_BUILTIN_VEC_VADDUWM, ALTIVEC_BUILTIN_VADDUWM, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VADDUWM, ALTIVEC_BUILTIN_VADDUWM, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VADDUWM, ALTIVEC_BUILTIN_VADDUWM, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VADDUWM, ALTIVEC_BUILTIN_VADDUWM, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VADDUWM, ALTIVEC_BUILTIN_VADDUWM, - RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VADDUWM, ALTIVEC_BUILTIN_VADDUWM, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VADDUWM, ALTIVEC_BUILTIN_VADDUWM, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VADDUWM, ALTIVEC_BUILTIN_VADDUWM, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VADDUHM, ALTIVEC_BUILTIN_VADDUHM, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VADDUHM, ALTIVEC_BUILTIN_VADDUHM, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VADDUHM, ALTIVEC_BUILTIN_VADDUHM, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VADDUHM, ALTIVEC_BUILTIN_VADDUHM, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VADDUHM, ALTIVEC_BUILTIN_VADDUHM, - RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VADDUHM, ALTIVEC_BUILTIN_VADDUHM, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VADDUHM, ALTIVEC_BUILTIN_VADDUHM, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VADDUHM, ALTIVEC_BUILTIN_VADDUHM, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VADDUBM, ALTIVEC_BUILTIN_VADDUBM, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_VADDUBM, ALTIVEC_BUILTIN_VADDUBM, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_VADDUBM, ALTIVEC_BUILTIN_VADDUBM, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_VADDUBM, ALTIVEC_BUILTIN_VADDUBM, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_VADDUBM, ALTIVEC_BUILTIN_VADDUBM, - RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_VADDUBM, ALTIVEC_BUILTIN_VADDUBM, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_VADDUBM, ALTIVEC_BUILTIN_VADDUBM, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_VADDUBM, ALTIVEC_BUILTIN_VADDUBM, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_ADDC, ALTIVEC_BUILTIN_VADDCUW, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_ADDC, ALTIVEC_BUILTIN_VADDCUW, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, - RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_ADDC, P8V_BUILTIN_VADDCUQ, - RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, - RS6000_BTI_unsigned_V1TI, 0 }, - { ALTIVEC_BUILTIN_VEC_ADDC, P8V_BUILTIN_VADDCUQ, - RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, 0 }, - { ALTIVEC_BUILTIN_VEC_ADDEC, P8V_BUILTIN_VADDECUQ, - RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, - RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI }, - { ALTIVEC_BUILTIN_VEC_ADDEC, P8V_BUILTIN_VADDECUQ, - RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI }, - { ALTIVEC_BUILTIN_VEC_ADDS, ALTIVEC_BUILTIN_VADDUBS, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_ADDS, ALTIVEC_BUILTIN_VADDUBS, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_ADDS, ALTIVEC_BUILTIN_VADDUBS, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_ADDS, ALTIVEC_BUILTIN_VADDSBS, - RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_ADDS, ALTIVEC_BUILTIN_VADDSBS, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_ADDS, ALTIVEC_BUILTIN_VADDSBS, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_ADDS, ALTIVEC_BUILTIN_VADDUHS, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_ADDS, ALTIVEC_BUILTIN_VADDUHS, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_ADDS, ALTIVEC_BUILTIN_VADDUHS, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_ADDS, ALTIVEC_BUILTIN_VADDSHS, - RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_ADDS, ALTIVEC_BUILTIN_VADDSHS, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_ADDS, ALTIVEC_BUILTIN_VADDSHS, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_ADDS, ALTIVEC_BUILTIN_VADDUWS, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_ADDS, ALTIVEC_BUILTIN_VADDUWS, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_ADDS, ALTIVEC_BUILTIN_VADDUWS, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_ADDS, ALTIVEC_BUILTIN_VADDSWS, - RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_ADDS, ALTIVEC_BUILTIN_VADDSWS, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_ADDS, ALTIVEC_BUILTIN_VADDSWS, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VADDSWS, ALTIVEC_BUILTIN_VADDSWS, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VADDSWS, ALTIVEC_BUILTIN_VADDSWS, - RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VADDSWS, ALTIVEC_BUILTIN_VADDSWS, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VADDUWS, ALTIVEC_BUILTIN_VADDUWS, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VADDUWS, ALTIVEC_BUILTIN_VADDUWS, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VADDUWS, ALTIVEC_BUILTIN_VADDUWS, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VADDUWS, ALTIVEC_BUILTIN_VADDUWS, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VADDUWS, ALTIVEC_BUILTIN_VADDUWS, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VADDSHS, ALTIVEC_BUILTIN_VADDSHS, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VADDSHS, ALTIVEC_BUILTIN_VADDSHS, - RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VADDSHS, ALTIVEC_BUILTIN_VADDSHS, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VADDUHS, ALTIVEC_BUILTIN_VADDUHS, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VADDUHS, ALTIVEC_BUILTIN_VADDUHS, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VADDUHS, ALTIVEC_BUILTIN_VADDUHS, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VADDUHS, ALTIVEC_BUILTIN_VADDUHS, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VADDUHS, ALTIVEC_BUILTIN_VADDUHS, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VADDSBS, ALTIVEC_BUILTIN_VADDSBS, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_VADDSBS, ALTIVEC_BUILTIN_VADDSBS, - RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_VADDSBS, ALTIVEC_BUILTIN_VADDSBS, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_VADDUBS, ALTIVEC_BUILTIN_VADDUBS, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_VADDUBS, ALTIVEC_BUILTIN_VADDUBS, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_VADDUBS, ALTIVEC_BUILTIN_VADDUBS, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_VADDUBS, ALTIVEC_BUILTIN_VADDUBS, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_VADDUBS, ALTIVEC_BUILTIN_VADDUBS, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, 0 }, - - { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V4SF, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, - { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V4SF, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_bool_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V4SF, - RS6000_BTI_V4SF, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SF, 0 }, - { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V2DF, - RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 }, - { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V2DF, - RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_bool_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V2DF, - RS6000_BTI_V2DF, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DF, 0 }, - { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V2DI, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V2DI, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V2DI, - RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V2DI_UNS, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V2DI_UNS, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V2DI_UNS, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V2DI_UNS, - RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V4SI_UNS, - RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V4SI, - RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V4SI, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V4SI, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V4SI_UNS, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V4SI_UNS, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V4SI_UNS, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V8HI_UNS, - RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V8HI, - RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V8HI, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V8HI, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V8HI_UNS, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V8HI_UNS, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V8HI_UNS, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V16QI, - RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V16QI_UNS, - RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V16QI, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V16QI, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V16QI_UNS, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V16QI_UNS, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V16QI_UNS, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - - { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V4SF, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, - { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V4SF, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_bool_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V4SF, - RS6000_BTI_V4SF, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SF, 0 }, - { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V2DF, - RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 }, - { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V2DF, - RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_bool_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V2DF, - RS6000_BTI_V2DF, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DF, 0 }, - { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V2DI, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V2DI, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V2DI, - RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V2DI_UNS, - RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V2DI_UNS, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V2DI_UNS, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V2DI_UNS, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V4SI_UNS, - RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V4SI, - RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V4SI, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V4SI, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V4SI_UNS, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V4SI_UNS, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V4SI_UNS, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V8HI_UNS, - RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V8HI, - RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V8HI, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V8HI, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V8HI_UNS, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V8HI_UNS, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V8HI_UNS, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V16QI, - RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V16QI_UNS, - RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V16QI, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V16QI, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V16QI_UNS, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V16QI_UNS, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V16QI_UNS, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - - { ALTIVEC_BUILTIN_VEC_AVG, ALTIVEC_BUILTIN_VAVGUB, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_AVG, ALTIVEC_BUILTIN_VAVGSB, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_AVG, ALTIVEC_BUILTIN_VAVGUH, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_AVG, ALTIVEC_BUILTIN_VAVGSH, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_AVG, ALTIVEC_BUILTIN_VAVGUW, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_AVG, ALTIVEC_BUILTIN_VAVGSW, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VAVGSW, ALTIVEC_BUILTIN_VAVGSW, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VAVGUW, ALTIVEC_BUILTIN_VAVGUW, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VAVGSH, ALTIVEC_BUILTIN_VAVGSH, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VAVGUH, ALTIVEC_BUILTIN_VAVGUH, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VAVGSB, ALTIVEC_BUILTIN_VAVGSB, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_VAVGUB, ALTIVEC_BUILTIN_VAVGUB, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_CMPB, ALTIVEC_BUILTIN_VCMPBFP, - RS6000_BTI_V4SI, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, - { ALTIVEC_BUILTIN_VEC_CMPEQ, ALTIVEC_BUILTIN_VCMPEQUB, - RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_CMPEQ, ALTIVEC_BUILTIN_VCMPEQUB, - RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_CMPEQ, ALTIVEC_BUILTIN_VCMPEQUB, - RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_CMPEQ, ALTIVEC_BUILTIN_VCMPEQUH, - RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_CMPEQ, ALTIVEC_BUILTIN_VCMPEQUH, - RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_CMPEQ, ALTIVEC_BUILTIN_VCMPEQUH, - RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_CMPEQ, ALTIVEC_BUILTIN_VCMPEQUW, - RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_CMPEQ, ALTIVEC_BUILTIN_VCMPEQUW, - RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_CMPEQ, ALTIVEC_BUILTIN_VCMPEQUW, - RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_CMPEQ, P8V_BUILTIN_VCMPEQUD, - RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_CMPEQ, P8V_BUILTIN_VCMPEQUD, - RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_CMPEQ, P8V_BUILTIN_VCMPEQUD, - RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_CMPEQ, P10V_BUILTIN_VCMPEQUT, - RS6000_BTI_bool_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, 0 }, - { ALTIVEC_BUILTIN_VEC_CMPEQ, P10V_BUILTIN_VCMPEQUT, - RS6000_BTI_bool_V1TI, RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, 0 }, - { ALTIVEC_BUILTIN_VEC_CMPEQ, ALTIVEC_BUILTIN_VCMPEQFP, - RS6000_BTI_bool_V4SI, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, - { ALTIVEC_BUILTIN_VEC_CMPEQ, VSX_BUILTIN_XVCMPEQDP, - RS6000_BTI_bool_V2DI, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 }, - { ALTIVEC_BUILTIN_VEC_VCMPEQFP, ALTIVEC_BUILTIN_VCMPEQFP, - RS6000_BTI_bool_V4SI, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, - - { ALTIVEC_BUILTIN_VEC_VCMPEQUW, ALTIVEC_BUILTIN_VCMPEQUW, - RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VCMPEQUW, ALTIVEC_BUILTIN_VCMPEQUW, - RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - - { ALTIVEC_BUILTIN_VEC_VCMPEQUH, ALTIVEC_BUILTIN_VCMPEQUH, - RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VCMPEQUH, ALTIVEC_BUILTIN_VCMPEQUH, - RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - - { ALTIVEC_BUILTIN_VEC_VCMPEQUB, ALTIVEC_BUILTIN_VCMPEQUB, - RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_VCMPEQUB, ALTIVEC_BUILTIN_VCMPEQUB, - RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - - { ALTIVEC_BUILTIN_VEC_CMPGE, ALTIVEC_BUILTIN_VCMPGEFP, - RS6000_BTI_bool_V4SI, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, - { ALTIVEC_BUILTIN_VEC_CMPGE, VSX_BUILTIN_XVCMPGEDP, - RS6000_BTI_bool_V2DI, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 }, - { ALTIVEC_BUILTIN_VEC_CMPGE, VSX_BUILTIN_CMPGE_16QI, - RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0}, - { ALTIVEC_BUILTIN_VEC_CMPGE, VSX_BUILTIN_CMPGE_U16QI, - RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, - RS6000_BTI_unsigned_V16QI, 0}, - { ALTIVEC_BUILTIN_VEC_CMPGE, VSX_BUILTIN_CMPGE_8HI, - RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0}, - { ALTIVEC_BUILTIN_VEC_CMPGE, VSX_BUILTIN_CMPGE_U8HI, - RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, - RS6000_BTI_unsigned_V8HI, 0}, - { ALTIVEC_BUILTIN_VEC_CMPGE, VSX_BUILTIN_CMPGE_4SI, - RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0}, - { ALTIVEC_BUILTIN_VEC_CMPGE, VSX_BUILTIN_CMPGE_U4SI, - RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, - RS6000_BTI_unsigned_V4SI, 0}, - { ALTIVEC_BUILTIN_VEC_CMPGE, VSX_BUILTIN_CMPGE_2DI, - RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0}, - { ALTIVEC_BUILTIN_VEC_CMPGE, VSX_BUILTIN_CMPGE_U2DI, - RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI, - RS6000_BTI_unsigned_V2DI, 0}, - - { ALTIVEC_BUILTIN_VEC_CMPGE, P10V_BUILTIN_CMPGE_1TI, - RS6000_BTI_bool_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, 0}, - { ALTIVEC_BUILTIN_VEC_CMPGE, P10V_BUILTIN_CMPGE_U1TI, - RS6000_BTI_bool_V1TI, RS6000_BTI_unsigned_V1TI, - RS6000_BTI_unsigned_V1TI, 0}, - { ALTIVEC_BUILTIN_VEC_CMPGT, ALTIVEC_BUILTIN_VCMPGTUB, - RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_CMPGT, ALTIVEC_BUILTIN_VCMPGTSB, - RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_CMPGT, ALTIVEC_BUILTIN_VCMPGTUH, - RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_CMPGT, ALTIVEC_BUILTIN_VCMPGTSH, - RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_CMPGT, ALTIVEC_BUILTIN_VCMPGTUW, - RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_CMPGT, ALTIVEC_BUILTIN_VCMPGTSW, - RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_CMPGT, P8V_BUILTIN_VCMPGTUD, - RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_CMPGT, P10V_BUILTIN_VCMPGTUT, - RS6000_BTI_bool_V1TI, RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, 0 }, - { ALTIVEC_BUILTIN_VEC_CMPGT, P8V_BUILTIN_VCMPGTSD, - RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_CMPGT, P10V_BUILTIN_VCMPGTST, - RS6000_BTI_bool_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, 0 }, - { ALTIVEC_BUILTIN_VEC_CMPGT, ALTIVEC_BUILTIN_VCMPGTFP, - RS6000_BTI_bool_V4SI, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, - { ALTIVEC_BUILTIN_VEC_CMPGT, VSX_BUILTIN_XVCMPGTDP, - RS6000_BTI_bool_V2DI, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 }, - { ALTIVEC_BUILTIN_VEC_VCMPGTFP, ALTIVEC_BUILTIN_VCMPGTFP, - RS6000_BTI_bool_V4SI, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, - { ALTIVEC_BUILTIN_VEC_VCMPGTSW, ALTIVEC_BUILTIN_VCMPGTSW, - RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VCMPGTUW, ALTIVEC_BUILTIN_VCMPGTUW, - RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VCMPGTSH, ALTIVEC_BUILTIN_VCMPGTSH, - RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VCMPGTUH, ALTIVEC_BUILTIN_VCMPGTUH, - RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VCMPGTSB, ALTIVEC_BUILTIN_VCMPGTSB, - RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_VCMPGTUB, ALTIVEC_BUILTIN_VCMPGTUB, - RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_CMPLE, ALTIVEC_BUILTIN_VCMPGEFP, - RS6000_BTI_bool_V4SI, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, - { ALTIVEC_BUILTIN_VEC_CMPLE, VSX_BUILTIN_XVCMPGEDP, - RS6000_BTI_bool_V2DI, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 }, - { ALTIVEC_BUILTIN_VEC_CMPLE, VSX_BUILTIN_CMPLE_16QI, - RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0}, - { ALTIVEC_BUILTIN_VEC_CMPLE, VSX_BUILTIN_CMPLE_U16QI, - RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, - RS6000_BTI_unsigned_V16QI, 0}, - { ALTIVEC_BUILTIN_VEC_CMPLE, VSX_BUILTIN_CMPLE_8HI, - RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0}, - { ALTIVEC_BUILTIN_VEC_CMPLE, VSX_BUILTIN_CMPLE_U8HI, - RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, - RS6000_BTI_unsigned_V8HI, 0}, - { ALTIVEC_BUILTIN_VEC_CMPLE, VSX_BUILTIN_CMPLE_4SI, - RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0}, - { ALTIVEC_BUILTIN_VEC_CMPLE, VSX_BUILTIN_CMPLE_U4SI, - RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, - RS6000_BTI_unsigned_V4SI, 0}, - { ALTIVEC_BUILTIN_VEC_CMPLE, VSX_BUILTIN_CMPLE_2DI, - RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0}, - { ALTIVEC_BUILTIN_VEC_CMPLE, VSX_BUILTIN_CMPLE_U2DI, - RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI, - RS6000_BTI_unsigned_V2DI, 0}, - { ALTIVEC_BUILTIN_VEC_CMPLE, P10V_BUILTIN_CMPLE_1TI, - RS6000_BTI_bool_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, 0}, - { ALTIVEC_BUILTIN_VEC_CMPLE, P10V_BUILTIN_CMPLE_U1TI, - RS6000_BTI_bool_V1TI, RS6000_BTI_unsigned_V1TI, - RS6000_BTI_unsigned_V1TI, 0}, - { ALTIVEC_BUILTIN_VEC_CMPLT, ALTIVEC_BUILTIN_VCMPGTUB, - RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_CMPLT, ALTIVEC_BUILTIN_VCMPGTSB, - RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_CMPLT, ALTIVEC_BUILTIN_VCMPGTUH, - RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_CMPLT, ALTIVEC_BUILTIN_VCMPGTSH, - RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_CMPLT, ALTIVEC_BUILTIN_VCMPGTUW, - RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_CMPLT, ALTIVEC_BUILTIN_VCMPGTSW, - RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_CMPLT, P8V_BUILTIN_VCMPGTUD, - RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_CMPLT, P8V_BUILTIN_VCMPGTSD, - RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_CMPLT, ALTIVEC_BUILTIN_VCMPGTFP, - RS6000_BTI_bool_V4SI, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, - { ALTIVEC_BUILTIN_VEC_CMPLT, VSX_BUILTIN_XVCMPGTDP, - RS6000_BTI_bool_V2DI, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 }, - { ALTIVEC_BUILTIN_VEC_COPYSIGN, VSX_BUILTIN_CPSGNDP, - RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 }, - { ALTIVEC_BUILTIN_VEC_COPYSIGN, ALTIVEC_BUILTIN_COPYSIGN_V4SF, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, - { ALTIVEC_BUILTIN_VEC_CTF, ALTIVEC_BUILTIN_VCFUX, - RS6000_BTI_V4SF, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, 0 }, - { ALTIVEC_BUILTIN_VEC_CTF, ALTIVEC_BUILTIN_VCFSX, - RS6000_BTI_V4SF, RS6000_BTI_V4SI, RS6000_BTI_INTSI, 0 }, - { ALTIVEC_BUILTIN_VEC_CTF, VSX_BUILTIN_XVCVSXDDP_SCALE, - RS6000_BTI_V2DF, RS6000_BTI_V2DI, RS6000_BTI_INTSI, 0}, - { ALTIVEC_BUILTIN_VEC_CTF, VSX_BUILTIN_XVCVUXDDP_SCALE, - RS6000_BTI_V2DF, RS6000_BTI_unsigned_V2DI, RS6000_BTI_INTSI, 0}, - { ALTIVEC_BUILTIN_VEC_VCFSX, ALTIVEC_BUILTIN_VCFSX, - RS6000_BTI_V4SF, RS6000_BTI_V4SI, RS6000_BTI_INTSI, 0 }, - { ALTIVEC_BUILTIN_VEC_VCFUX, ALTIVEC_BUILTIN_VCFUX, - RS6000_BTI_V4SF, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, 0 }, - { ALTIVEC_BUILTIN_VEC_CTS, ALTIVEC_BUILTIN_VCTSXS, - RS6000_BTI_V4SI, RS6000_BTI_V4SF, RS6000_BTI_INTSI, 0 }, - { ALTIVEC_BUILTIN_VEC_CTS, VSX_BUILTIN_XVCVDPSXDS_SCALE, - RS6000_BTI_V2DI, RS6000_BTI_V2DF, RS6000_BTI_INTSI, 0 }, - { ALTIVEC_BUILTIN_VEC_CTU, ALTIVEC_BUILTIN_VCTUXS, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_V4SF, RS6000_BTI_INTSI, 0 }, - { ALTIVEC_BUILTIN_VEC_CTU, VSX_BUILTIN_XVCVDPUXDS_SCALE, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_V2DF, RS6000_BTI_INTSI, 0 }, - - { P8V_BUILTIN_VEC_BCDADD, MISC_BUILTIN_BCDADD_V1TI, - RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_INTSI }, - { P8V_BUILTIN_VEC_BCDADD, MISC_BUILTIN_BCDADD_V16QI, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI }, - { P8V_BUILTIN_VEC_BCDADD_LT, MISC_BUILTIN_BCDADD_LT_V1TI, - RS6000_BTI_INTSI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_INTSI }, - { P8V_BUILTIN_VEC_BCDADD_LT, MISC_BUILTIN_BCDADD_LT_V16QI, - RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI }, - { P8V_BUILTIN_VEC_BCDADD_EQ, MISC_BUILTIN_BCDADD_EQ_V1TI, - RS6000_BTI_INTSI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_INTSI }, - { P8V_BUILTIN_VEC_BCDADD_EQ, MISC_BUILTIN_BCDADD_EQ_V16QI, - RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI }, - { P8V_BUILTIN_VEC_BCDADD_GT, MISC_BUILTIN_BCDADD_GT_V1TI, - RS6000_BTI_INTSI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_INTSI }, - { P8V_BUILTIN_VEC_BCDADD_GT, MISC_BUILTIN_BCDADD_GT_V16QI, - RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI }, - { P8V_BUILTIN_VEC_BCDADD_OV, MISC_BUILTIN_BCDADD_OV_V1TI, - RS6000_BTI_INTSI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_INTSI }, - { P8V_BUILTIN_VEC_BCDADD_OV, MISC_BUILTIN_BCDADD_OV_V16QI, - RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI }, - { P8V_BUILTIN_VEC_BCDINVALID, MISC_BUILTIN_BCDINVALID_V1TI, - RS6000_BTI_INTSI, RS6000_BTI_V1TI, 0, 0 }, - { P8V_BUILTIN_VEC_BCDINVALID, MISC_BUILTIN_BCDINVALID_V16QI, - RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI, 0, 0 }, - - { P9V_BUILTIN_VEC_BCDMUL10, P9V_BUILTIN_BCDMUL10_V16QI, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0, 0 }, - { P9V_BUILTIN_VEC_BCDDIV10, P9V_BUILTIN_BCDDIV10_V16QI, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0, 0 }, - - { P8V_BUILTIN_VEC_DENBCD, MISC_BUILTIN_DENBCD_V16QI, - RS6000_BTI_dfloat128, RS6000_BTI_unsigned_V16QI, 0, 0 }, - - { P8V_BUILTIN_VEC_BCDSUB, MISC_BUILTIN_BCDSUB_V1TI, - RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_INTSI }, - { P8V_BUILTIN_VEC_BCDSUB, MISC_BUILTIN_BCDSUB_V16QI, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI }, - { P8V_BUILTIN_VEC_BCDSUB_LT, MISC_BUILTIN_BCDSUB_LT_V1TI, - RS6000_BTI_INTSI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_INTSI }, - { P8V_BUILTIN_VEC_BCDSUB_LT, MISC_BUILTIN_BCDSUB_LT_V16QI, - RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI }, - { P8V_BUILTIN_VEC_BCDSUB_LE, MISC_BUILTIN_BCDSUB_LE_V1TI, - RS6000_BTI_INTSI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_INTSI }, - { P8V_BUILTIN_VEC_BCDSUB_LE, MISC_BUILTIN_BCDSUB_LE_V16QI, - RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI }, - { P8V_BUILTIN_VEC_BCDSUB_EQ, MISC_BUILTIN_BCDSUB_EQ_V1TI, - RS6000_BTI_INTSI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_INTSI }, - { P8V_BUILTIN_VEC_BCDSUB_EQ, MISC_BUILTIN_BCDSUB_EQ_V16QI, - RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI }, - { P8V_BUILTIN_VEC_BCDSUB_GT, MISC_BUILTIN_BCDSUB_GT_V1TI, - RS6000_BTI_INTSI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_INTSI }, - { P8V_BUILTIN_VEC_BCDSUB_GT, MISC_BUILTIN_BCDSUB_GT_V16QI, - RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI }, - { P8V_BUILTIN_VEC_BCDSUB_GE, MISC_BUILTIN_BCDSUB_GE_V1TI, - RS6000_BTI_INTSI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_INTSI }, - { P8V_BUILTIN_VEC_BCDSUB_GE, MISC_BUILTIN_BCDSUB_GE_V16QI, - RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI }, - { P8V_BUILTIN_VEC_BCDSUB_OV, MISC_BUILTIN_BCDSUB_OV_V1TI, - RS6000_BTI_INTSI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_INTSI }, - { P8V_BUILTIN_VEC_BCDSUB_OV, MISC_BUILTIN_BCDSUB_OV_V16QI, - RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI }, - - - { VSX_BUILTIN_VEC_DIV, VSX_BUILTIN_XVDIVSP, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, - { VSX_BUILTIN_VEC_DIV, VSX_BUILTIN_XVDIVDP, - RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 }, - { VSX_BUILTIN_VEC_DIV, VSX_BUILTIN_DIV_V2DI, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, - { VSX_BUILTIN_VEC_DIV, VSX_BUILTIN_UDIV_V2DI, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, - - { VSX_BUILTIN_VEC_DIV, P10V_BUILTIN_DIVS_V4SI, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, - { VSX_BUILTIN_VEC_DIV, P10V_BUILTIN_DIVU_V4SI, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, - RS6000_BTI_unsigned_V4SI, 0 }, - { VSX_BUILTIN_VEC_DIV, P10V_BUILTIN_DIVS_V2DI, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, - { VSX_BUILTIN_VEC_DIV, P10V_BUILTIN_DIVU_V2DI, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, - RS6000_BTI_unsigned_V2DI, 0 }, - { VSX_BUILTIN_VEC_DIV, P10V_BUILTIN_DIV_V1TI, - RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, 0 }, - { VSX_BUILTIN_VEC_DIV, P10V_BUILTIN_UDIV_V1TI, - RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, - RS6000_BTI_unsigned_V1TI, 0 }, - - { P10_BUILTIN_VEC_DIVE, P10V_BUILTIN_DIVES_V4SI, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, - { P10_BUILTIN_VEC_DIVE, P10V_BUILTIN_DIVEU_V4SI, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, - RS6000_BTI_unsigned_V4SI, 0 }, - { P10_BUILTIN_VEC_DIVE, P10V_BUILTIN_DIVES_V2DI, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, - { P10_BUILTIN_VEC_DIVE, P10V_BUILTIN_DIVEU_V2DI, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, - RS6000_BTI_unsigned_V2DI, 0 }, - { P10_BUILTIN_VEC_DIVE, P10V_BUILTIN_DIVES_V1TI, - RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, 0 }, - { P10_BUILTIN_VEC_DIVE, P10V_BUILTIN_DIVEU_V1TI, - RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, - RS6000_BTI_unsigned_V1TI, 0 }, - - { P10_BUILTIN_VEC_MOD, P10V_BUILTIN_MODS_V4SI, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, - { P10_BUILTIN_VEC_MOD, P10V_BUILTIN_MODU_V4SI, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, - RS6000_BTI_unsigned_V4SI, 0 }, - { P10_BUILTIN_VEC_MOD, P10V_BUILTIN_MODS_V2DI, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, - { P10_BUILTIN_VEC_MOD, P10V_BUILTIN_MODU_V2DI, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, - RS6000_BTI_unsigned_V2DI, 0 }, - { P10_BUILTIN_VEC_MOD, P10V_BUILTIN_MODS_V1TI, - RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, 0 }, - { P10_BUILTIN_VEC_MOD, P10V_BUILTIN_MODU_V1TI, - RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, - RS6000_BTI_unsigned_V1TI, 0 }, - - { VSX_BUILTIN_VEC_DOUBLE, VSX_BUILTIN_XVCVSXDDP, - RS6000_BTI_V2DF, RS6000_BTI_V2DI, 0, 0 }, - { VSX_BUILTIN_VEC_DOUBLE, VSX_BUILTIN_XVCVUXDDP, - RS6000_BTI_V2DF, RS6000_BTI_unsigned_V2DI, 0, 0 }, - - { VSX_BUILTIN_VEC_DOUBLEE, VSX_BUILTIN_DOUBLEE_V4SI, - RS6000_BTI_V2DF, RS6000_BTI_V4SI, 0, 0 }, - { VSX_BUILTIN_VEC_DOUBLEE, VSX_BUILTIN_UNS_DOUBLEE_V4SI, - RS6000_BTI_V2DF, RS6000_BTI_unsigned_V4SI, 0, 0 }, - { VSX_BUILTIN_VEC_DOUBLEE, VSX_BUILTIN_DOUBLEE_V4SF, - RS6000_BTI_V2DF, RS6000_BTI_V4SF, 0, 0 }, - - { VSX_BUILTIN_VEC_DOUBLEO, VSX_BUILTIN_DOUBLEO_V4SI, - RS6000_BTI_V2DF, RS6000_BTI_V4SI, 0, 0 }, - { VSX_BUILTIN_VEC_DOUBLEO, VSX_BUILTIN_UNS_DOUBLEO_V4SI, - RS6000_BTI_V2DF, RS6000_BTI_unsigned_V4SI, 0, 0 }, - { VSX_BUILTIN_VEC_DOUBLEO, VSX_BUILTIN_DOUBLEO_V4SF, - RS6000_BTI_V2DF, RS6000_BTI_V4SF, 0, 0 }, - - { VSX_BUILTIN_VEC_DOUBLEH, VSX_BUILTIN_DOUBLEH_V4SI, - RS6000_BTI_V2DF, RS6000_BTI_V4SI, 0, 0 }, - { VSX_BUILTIN_VEC_DOUBLEH, VSX_BUILTIN_UNS_DOUBLEH_V4SI, - RS6000_BTI_V2DF, RS6000_BTI_unsigned_V4SI, 0, 0 }, - { VSX_BUILTIN_VEC_DOUBLEH, VSX_BUILTIN_DOUBLEH_V4SF, - RS6000_BTI_V2DF, RS6000_BTI_V4SF, 0, 0 }, - - { VSX_BUILTIN_VEC_DOUBLEL, VSX_BUILTIN_DOUBLEL_V4SI, - RS6000_BTI_V2DF, RS6000_BTI_V4SI, 0, 0 }, - { VSX_BUILTIN_VEC_DOUBLEL, VSX_BUILTIN_UNS_DOUBLEL_V4SI, - RS6000_BTI_V2DF, RS6000_BTI_unsigned_V4SI, 0, 0 }, - { VSX_BUILTIN_VEC_DOUBLEL, VSX_BUILTIN_DOUBLEL_V4SF, - RS6000_BTI_V2DF, RS6000_BTI_V4SF, 0, 0 }, - - { VSX_BUILTIN_VEC_FLOAT, VSX_BUILTIN_XVCVSXWSP_V4SF, - RS6000_BTI_V4SF, RS6000_BTI_V4SI, 0, 0 }, - { VSX_BUILTIN_VEC_FLOAT, VSX_BUILTIN_XVCVUXWSP_V4SF, - RS6000_BTI_V4SF, RS6000_BTI_unsigned_V4SI, 0, 0 }, - { P8V_BUILTIN_VEC_FLOAT2, P8V_BUILTIN_FLOAT2_V2DF, - RS6000_BTI_V4SF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 }, - { P8V_BUILTIN_VEC_FLOAT2, P8V_BUILTIN_FLOAT2_V2DI, - RS6000_BTI_V4SF, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, - { P8V_BUILTIN_VEC_FLOAT2, P8V_BUILTIN_UNS_FLOAT2_V2DI, - RS6000_BTI_V4SF, RS6000_BTI_unsigned_V2DI, - RS6000_BTI_unsigned_V2DI, 0 }, - { VSX_BUILTIN_VEC_FLOATE, VSX_BUILTIN_FLOATE_V2DF, - RS6000_BTI_V4SF, RS6000_BTI_V2DF, 0, 0 }, - { VSX_BUILTIN_VEC_FLOATE, VSX_BUILTIN_FLOATE_V2DI, - RS6000_BTI_V4SF, RS6000_BTI_V2DI, 0, 0 }, - { VSX_BUILTIN_VEC_FLOATE, VSX_BUILTIN_UNS_FLOATE_V2DI, - RS6000_BTI_V4SF, RS6000_BTI_unsigned_V2DI, 0, 0 }, - { VSX_BUILTIN_VEC_FLOATO, VSX_BUILTIN_FLOATO_V2DF, - RS6000_BTI_V4SF, RS6000_BTI_V2DF, 0, 0 }, - { VSX_BUILTIN_VEC_FLOATO, VSX_BUILTIN_FLOATO_V2DI, - RS6000_BTI_V4SF, RS6000_BTI_V2DI, 0, 0 }, - { VSX_BUILTIN_VEC_FLOATO, VSX_BUILTIN_UNS_FLOATO_V2DI, - RS6000_BTI_V4SF, RS6000_BTI_unsigned_V2DI, 0, 0 }, - - { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V1TI, - RS6000_BTI_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_V1TI, 0 }, - { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V1TI, - RS6000_BTI_unsigned_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V1TI, 0 }, - { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V1TI, - RS6000_BTI_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_INTTI, 0 }, - { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V1TI, - RS6000_BTI_unsigned_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTTI, 0 }, - - { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V2DF, - RS6000_BTI_V2DF, RS6000_BTI_INTSI, ~RS6000_BTI_V2DF, 0 }, - { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V2DF, - RS6000_BTI_V2DF, RS6000_BTI_INTSI, ~RS6000_BTI_double, 0 }, - { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V2DI, - RS6000_BTI_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V2DI, - RS6000_BTI_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_long_long, 0 }, - { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V2DI, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_INTSI, - ~RS6000_BTI_unsigned_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V2DI, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_INTSI, - ~RS6000_BTI_unsigned_long_long, 0 }, - { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V2DI, - RS6000_BTI_bool_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V4SF, - RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_V4SF, 0 }, - { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V4SF, - RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float, 0 }, - { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V4SI, - RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V4SI, - RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V4SI, - RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI, 0 }, - { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V4SI, - RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_long, 0 }, - { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V4SI, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V4SI, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI, 0 }, - { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V4SI, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_long, 0 }, - { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V8HI, - RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V8HI, - RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_pixel_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V8HI, - RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V8HI, - RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI, 0 }, - { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V8HI, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V8HI, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI, 0 }, - { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V16QI, - RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V16QI, - RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V16QI, - RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI, 0 }, - { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V16QI, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V16QI, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI, 0 }, - { ALTIVEC_BUILTIN_VEC_LDE, ALTIVEC_BUILTIN_LVEBX, - RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI, 0 }, - { ALTIVEC_BUILTIN_VEC_LDE, ALTIVEC_BUILTIN_LVEBX, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI, 0 }, - { ALTIVEC_BUILTIN_VEC_LDE, ALTIVEC_BUILTIN_LVEHX, - RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI, 0 }, - { ALTIVEC_BUILTIN_VEC_LDE, ALTIVEC_BUILTIN_LVEHX, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI, 0 }, - { ALTIVEC_BUILTIN_VEC_LDE, ALTIVEC_BUILTIN_LVEWX, - RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float, 0 }, - { ALTIVEC_BUILTIN_VEC_LDE, ALTIVEC_BUILTIN_LVEWX, - RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI, 0 }, - { ALTIVEC_BUILTIN_VEC_LDE, ALTIVEC_BUILTIN_LVEWX, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI, 0 }, - { ALTIVEC_BUILTIN_VEC_LDE, ALTIVEC_BUILTIN_LVEWX, - RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_long, 0 }, - { ALTIVEC_BUILTIN_VEC_LDE, ALTIVEC_BUILTIN_LVEWX, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_long, 0 }, - { ALTIVEC_BUILTIN_VEC_LVEWX, ALTIVEC_BUILTIN_LVEWX, - RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float, 0 }, - { ALTIVEC_BUILTIN_VEC_LVEWX, ALTIVEC_BUILTIN_LVEWX, - RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVEWX, ALTIVEC_BUILTIN_LVEWX, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVEWX, ALTIVEC_BUILTIN_LVEWX, - RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_long, 0 }, - { ALTIVEC_BUILTIN_VEC_LVEWX, ALTIVEC_BUILTIN_LVEWX, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_long, 0 }, - { ALTIVEC_BUILTIN_VEC_LVEHX, ALTIVEC_BUILTIN_LVEHX, - RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVEHX, ALTIVEC_BUILTIN_LVEHX, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVEBX, ALTIVEC_BUILTIN_LVEBX, - RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVEBX, ALTIVEC_BUILTIN_LVEBX, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI, 0 }, - - /* vector signed__int128 vec_xl_sext (signed long long, signed char *); - vector signed__int128 vec_xl_sext (signed long long, signed short *); - vector signed__int128 vec_xl_sext (signed long long, signed int *); - vector signed__int128 vec_xl_sext (signed long long, signed longlong *); */ - { P10_BUILTIN_VEC_SE_LXVRX, P10_BUILTIN_SE_LXVRBX, - RS6000_BTI_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI, 0 }, - { P10_BUILTIN_VEC_SE_LXVRX, P10_BUILTIN_SE_LXVRHX, - RS6000_BTI_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI, 0 }, - { P10_BUILTIN_VEC_SE_LXVRX, P10_BUILTIN_SE_LXVRWX, - RS6000_BTI_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI, 0 }, - { P10_BUILTIN_VEC_SE_LXVRX, P10_BUILTIN_SE_LXVRDX, - RS6000_BTI_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_INTDI, 0 }, - { P10_BUILTIN_VEC_SE_LXVRX, P10_BUILTIN_SE_LXVRDX, - RS6000_BTI_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_long_long, 0 }, - - /* vector unsigned__int128 vec_xl_zext (signed long long, unsigned char *); - vector unsigned__int128 vec_xl_zext (signed long long, unsigned short *); - vector unsigned__int128 vec_xl_zext (signed long long, unsigned int *); - vector unsigned__int128 vec_xl_zext (signed long long, unsigned longlong *); */ - { P10_BUILTIN_VEC_ZE_LXVRX, P10_BUILTIN_ZE_LXVRBX, - RS6000_BTI_unsigned_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI, 0 }, - { P10_BUILTIN_VEC_ZE_LXVRX, P10_BUILTIN_ZE_LXVRHX, - RS6000_BTI_unsigned_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI, 0 }, - { P10_BUILTIN_VEC_ZE_LXVRX, P10_BUILTIN_ZE_LXVRWX, - RS6000_BTI_unsigned_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI, 0 }, - { P10_BUILTIN_VEC_ZE_LXVRX, P10_BUILTIN_ZE_LXVRDX, - RS6000_BTI_unsigned_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTDI, 0 }, - { P10_BUILTIN_VEC_ZE_LXVRX, P10_BUILTIN_ZE_LXVRDX, - RS6000_BTI_unsigned_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_long_long, 0 }, - - /* void vec_xst_trunc (vector signed __int128, signed long long, signed char *); - void vec_xst_trunc (vector unsigned __int128, signed long long, unsigned char *); - void vec_xst_trunc (vector signed __int128, signed long long, signed char *); - void vec_xst_trunc (vector unsigned __int128, signed long long, unsigned char *); - void vec_xst_trunc (vector signed __int128, signed long long, signed char *); - void vec_xst_trunc (vector unsigned __int128, signed long long, unsigned char *); - void vec_xst_trunc (vector signed __int128, signed long long, signed char *); - void vec_xst_trunc (vector unsigned __int128, signed long long, unsigned char *); */ - { P10_BUILTIN_VEC_TR_STXVRX, P10_BUILTIN_TR_STXVRBX, RS6000_BTI_void, - RS6000_BTI_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI }, - { P10_BUILTIN_VEC_TR_STXVRX, P10_BUILTIN_TR_STXVRBX, RS6000_BTI_void, - RS6000_BTI_unsigned_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI }, - { P10_BUILTIN_VEC_TR_STXVRX, P10_BUILTIN_TR_STXVRHX, RS6000_BTI_void, - RS6000_BTI_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI }, - { P10_BUILTIN_VEC_TR_STXVRX, P10_BUILTIN_TR_STXVRHX, RS6000_BTI_void, - RS6000_BTI_unsigned_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI }, - { P10_BUILTIN_VEC_TR_STXVRX, P10_BUILTIN_TR_STXVRWX, RS6000_BTI_void, - RS6000_BTI_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI }, - { P10_BUILTIN_VEC_TR_STXVRX, P10_BUILTIN_TR_STXVRWX, RS6000_BTI_void, - RS6000_BTI_unsigned_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI }, - { P10_BUILTIN_VEC_TR_STXVRX, P10_BUILTIN_TR_STXVRDX, RS6000_BTI_void, - RS6000_BTI_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_long_long }, - { P10_BUILTIN_VEC_TR_STXVRX, P10_BUILTIN_TR_STXVRDX, RS6000_BTI_void, - RS6000_BTI_unsigned_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_long_long }, - { P10_BUILTIN_VEC_TR_STXVRX, P10_BUILTIN_TR_STXVRDX, RS6000_BTI_void, - RS6000_BTI_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_INTDI }, - { P10_BUILTIN_VEC_TR_STXVRX, P10_BUILTIN_TR_STXVRDX, RS6000_BTI_void, - RS6000_BTI_unsigned_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTDI }, - - /* vector float vec_ldl (int, vector float *); - vector float vec_ldl (int, float *); */ - { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V4SF, - RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_V4SF, 0 }, - { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V4SF, - RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float, 0 }, - - /* vector bool int vec_ldl (int, vector bool int *); - vector bool int vec_ldl (int, bool int *); - vector int vec_ldl (int, vector int *); - vector int vec_ldl (int, int *); - vector unsigned int vec_ldl (int, vector unsigned int *); - vector unsigned int vec_ldl (int, unsigned int *); */ - { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V4SI, - RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V4SI, - RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_int, 0 }, - { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V4SI, - RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V4SI, - RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI, 0 }, - { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V4SI, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V4SI, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI, 0 }, - - /* vector bool short vec_ldl (int, vector bool short *); - vector bool short vec_ldl (int, bool short *); - vector pixel vec_ldl (int, vector pixel *); - vector short vec_ldl (int, vector short *); - vector short vec_ldl (int, short *); - vector unsigned short vec_ldl (int, vector unsigned short *); - vector unsigned short vec_ldl (int, unsigned short *); */ - { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V8HI, - RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V8HI, - RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_short, 0 }, - { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V8HI, - RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_pixel_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V8HI, - RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V8HI, - RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI, 0 }, - { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V8HI, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V8HI, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI, 0 }, - - /* vector bool char vec_ldl (int, vector bool char *); - vector bool char vec_ldl (int, bool char *); - vector char vec_ldl (int, vector char *); - vector char vec_ldl (int, char *); - vector unsigned char vec_ldl (int, vector unsigned char *); - vector unsigned char vec_ldl (int, unsigned char *); */ - { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V16QI, - RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V16QI, - RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_char, 0 }, - { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V16QI, - RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V16QI, - RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI, 0 }, - { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V16QI, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, - ~RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V16QI, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI, 0 }, - - /* vector double vec_ldl (int, vector double *); - vector double vec_ldl (int, double *); */ - { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V2DF, - RS6000_BTI_V2DF, RS6000_BTI_INTSI, ~RS6000_BTI_V2DF, 0 }, - { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V2DF, - RS6000_BTI_V2DF, RS6000_BTI_INTSI, ~RS6000_BTI_double, 0 }, - - /* vector long long vec_ldl (int, vector long long *); - vector long long vec_ldl (int, long long *); - vector unsigned long long vec_ldl (int, vector unsigned long long *); - vector unsigned long long vec_ldl (int, unsigned long long *); - vector bool long long vec_ldl (int, vector bool long long *); - vector bool long long vec_ldl (int, bool long long *); */ - { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V2DI, - RS6000_BTI_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V2DI, - RS6000_BTI_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_long_long, 0 }, - { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V2DI, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_INTSI, - ~RS6000_BTI_unsigned_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V2DI, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_INTSI, - ~RS6000_BTI_unsigned_long_long, 0 }, - { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V2DI, - RS6000_BTI_bool_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V2DI, - RS6000_BTI_bool_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_long_long, 0 }, - - { ALTIVEC_BUILTIN_VEC_LVSL, ALTIVEC_BUILTIN_LVSL, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVSL, ALTIVEC_BUILTIN_LVSL, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVSL, ALTIVEC_BUILTIN_LVSL, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVSL, ALTIVEC_BUILTIN_LVSL, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVSL, ALTIVEC_BUILTIN_LVSL, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVSL, ALTIVEC_BUILTIN_LVSL, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVSL, ALTIVEC_BUILTIN_LVSL, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_long, 0 }, - { ALTIVEC_BUILTIN_VEC_LVSL, ALTIVEC_BUILTIN_LVSL, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_long, 0 }, - { ALTIVEC_BUILTIN_VEC_LVSL, ALTIVEC_BUILTIN_LVSL, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_float, 0 }, - { ALTIVEC_BUILTIN_VEC_LVSL, ALTIVEC_BUILTIN_LVSL, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_double, 0 }, - { ALTIVEC_BUILTIN_VEC_LVSL, ALTIVEC_BUILTIN_LVSL, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTDI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVSL, ALTIVEC_BUILTIN_LVSL, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTDI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVSL, ALTIVEC_BUILTIN_LVSL, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_long_long, 0 }, - { ALTIVEC_BUILTIN_VEC_LVSL, ALTIVEC_BUILTIN_LVSL, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, - ~RS6000_BTI_unsigned_long_long, 0 }, - { ALTIVEC_BUILTIN_VEC_LVSR, ALTIVEC_BUILTIN_LVSR, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVSR, ALTIVEC_BUILTIN_LVSR, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVSR, ALTIVEC_BUILTIN_LVSR, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVSR, ALTIVEC_BUILTIN_LVSR, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVSR, ALTIVEC_BUILTIN_LVSR, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVSR, ALTIVEC_BUILTIN_LVSR, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVSR, ALTIVEC_BUILTIN_LVSR, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_long, 0 }, - { ALTIVEC_BUILTIN_VEC_LVSR, ALTIVEC_BUILTIN_LVSR, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_long, 0 }, - { ALTIVEC_BUILTIN_VEC_LVSR, ALTIVEC_BUILTIN_LVSR, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_float, 0 }, - { ALTIVEC_BUILTIN_VEC_LVSR, ALTIVEC_BUILTIN_LVSR, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_double, 0 }, - { ALTIVEC_BUILTIN_VEC_LVSR, ALTIVEC_BUILTIN_LVSR, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTDI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVSR, ALTIVEC_BUILTIN_LVSR, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTDI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVSR, ALTIVEC_BUILTIN_LVSR, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_long_long, 0 }, - { ALTIVEC_BUILTIN_VEC_LVSR, ALTIVEC_BUILTIN_LVSR, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, - ~RS6000_BTI_unsigned_long_long, 0 }, - { ALTIVEC_BUILTIN_VEC_LVLX, ALTIVEC_BUILTIN_LVLX, - RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_V4SF, 0 }, - { ALTIVEC_BUILTIN_VEC_LVLX, ALTIVEC_BUILTIN_LVLX, - RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float, 0 }, - { ALTIVEC_BUILTIN_VEC_LVLX, ALTIVEC_BUILTIN_LVLX, - RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVLX, ALTIVEC_BUILTIN_LVLX, - RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVLX, ALTIVEC_BUILTIN_LVLX, - RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVLX, ALTIVEC_BUILTIN_LVLX, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVLX, ALTIVEC_BUILTIN_LVLX, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVLX, ALTIVEC_BUILTIN_LVLX, - RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVLX, ALTIVEC_BUILTIN_LVLX, - RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_pixel_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVLX, ALTIVEC_BUILTIN_LVLX, - RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVLX, ALTIVEC_BUILTIN_LVLX, - RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVLX, ALTIVEC_BUILTIN_LVLX, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVLX, ALTIVEC_BUILTIN_LVLX, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVLX, ALTIVEC_BUILTIN_LVLX, - RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVLX, ALTIVEC_BUILTIN_LVLX, - RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVLX, ALTIVEC_BUILTIN_LVLX, - RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVLX, ALTIVEC_BUILTIN_LVLX, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVLX, ALTIVEC_BUILTIN_LVLX, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVLXL, ALTIVEC_BUILTIN_LVLXL, - RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_V4SF, 0 }, - { ALTIVEC_BUILTIN_VEC_LVLXL, ALTIVEC_BUILTIN_LVLXL, - RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float, 0 }, - { ALTIVEC_BUILTIN_VEC_LVLXL, ALTIVEC_BUILTIN_LVLXL, - RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVLXL, ALTIVEC_BUILTIN_LVLXL, - RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVLXL, ALTIVEC_BUILTIN_LVLXL, - RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVLXL, ALTIVEC_BUILTIN_LVLXL, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVLXL, ALTIVEC_BUILTIN_LVLXL, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVLXL, ALTIVEC_BUILTIN_LVLXL, - RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVLXL, ALTIVEC_BUILTIN_LVLXL, - RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_pixel_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVLXL, ALTIVEC_BUILTIN_LVLXL, - RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVLXL, ALTIVEC_BUILTIN_LVLXL, - RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVLXL, ALTIVEC_BUILTIN_LVLXL, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVLXL, ALTIVEC_BUILTIN_LVLXL, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVLXL, ALTIVEC_BUILTIN_LVLXL, - RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVLXL, ALTIVEC_BUILTIN_LVLXL, - RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVLXL, ALTIVEC_BUILTIN_LVLXL, - RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVLXL, ALTIVEC_BUILTIN_LVLXL, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVLXL, ALTIVEC_BUILTIN_LVLXL, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVRX, ALTIVEC_BUILTIN_LVRX, - RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_V4SF, 0 }, - { ALTIVEC_BUILTIN_VEC_LVRX, ALTIVEC_BUILTIN_LVRX, - RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float, 0 }, - { ALTIVEC_BUILTIN_VEC_LVRX, ALTIVEC_BUILTIN_LVRX, - RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVRX, ALTIVEC_BUILTIN_LVRX, - RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVRX, ALTIVEC_BUILTIN_LVRX, - RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVRX, ALTIVEC_BUILTIN_LVRX, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVRX, ALTIVEC_BUILTIN_LVRX, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVRX, ALTIVEC_BUILTIN_LVRX, - RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVRX, ALTIVEC_BUILTIN_LVRX, - RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_pixel_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVRX, ALTIVEC_BUILTIN_LVRX, - RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVRX, ALTIVEC_BUILTIN_LVRX, - RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVRX, ALTIVEC_BUILTIN_LVRX, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVRX, ALTIVEC_BUILTIN_LVRX, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVRX, ALTIVEC_BUILTIN_LVRX, - RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVRX, ALTIVEC_BUILTIN_LVRX, - RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVRX, ALTIVEC_BUILTIN_LVRX, - RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVRX, ALTIVEC_BUILTIN_LVRX, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVRX, ALTIVEC_BUILTIN_LVRX, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVRXL, ALTIVEC_BUILTIN_LVRXL, - RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_V4SF, 0 }, - { ALTIVEC_BUILTIN_VEC_LVRXL, ALTIVEC_BUILTIN_LVRXL, - RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float, 0 }, - { ALTIVEC_BUILTIN_VEC_LVRXL, ALTIVEC_BUILTIN_LVRXL, - RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVRXL, ALTIVEC_BUILTIN_LVRXL, - RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVRXL, ALTIVEC_BUILTIN_LVRXL, - RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVRXL, ALTIVEC_BUILTIN_LVRXL, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVRXL, ALTIVEC_BUILTIN_LVRXL, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVRXL, ALTIVEC_BUILTIN_LVRXL, - RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVRXL, ALTIVEC_BUILTIN_LVRXL, - RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_pixel_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVRXL, ALTIVEC_BUILTIN_LVRXL, - RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVRXL, ALTIVEC_BUILTIN_LVRXL, - RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVRXL, ALTIVEC_BUILTIN_LVRXL, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVRXL, ALTIVEC_BUILTIN_LVRXL, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVRXL, ALTIVEC_BUILTIN_LVRXL, - RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVRXL, ALTIVEC_BUILTIN_LVRXL, - RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVRXL, ALTIVEC_BUILTIN_LVRXL, - RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVRXL, ALTIVEC_BUILTIN_LVRXL, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_LVRXL, ALTIVEC_BUILTIN_LVRXL, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI, 0 }, - { ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXUB, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXUB, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXUB, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXSB, - RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXSB, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXSB, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXUH, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXUH, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXUH, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXSH, - RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXSH, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXSH, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXUW, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXUW, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXUW, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXSW, - RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXSW, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXSW, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_MAX, P8V_BUILTIN_VMAXUD, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_MAX, P8V_BUILTIN_VMAXUD, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_MAX, P8V_BUILTIN_VMAXUD, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_MAX, P8V_BUILTIN_VMAXSD, - RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_MAX, P8V_BUILTIN_VMAXSD, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_MAX, P8V_BUILTIN_VMAXSD, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXFP, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, - { ALTIVEC_BUILTIN_VEC_MAX, VSX_BUILTIN_XVMAXDP, - RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 }, - { ALTIVEC_BUILTIN_VEC_VMAXFP, ALTIVEC_BUILTIN_VMAXFP, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, - { ALTIVEC_BUILTIN_VEC_VMAXSW, ALTIVEC_BUILTIN_VMAXSW, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMAXSW, ALTIVEC_BUILTIN_VMAXSW, - RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMAXSW, ALTIVEC_BUILTIN_VMAXSW, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMAXUW, ALTIVEC_BUILTIN_VMAXUW, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMAXUW, ALTIVEC_BUILTIN_VMAXUW, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMAXUW, ALTIVEC_BUILTIN_VMAXUW, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMAXUW, ALTIVEC_BUILTIN_VMAXUW, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMAXUW, ALTIVEC_BUILTIN_VMAXUW, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMAXSH, ALTIVEC_BUILTIN_VMAXSH, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMAXSH, ALTIVEC_BUILTIN_VMAXSH, - RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMAXSH, ALTIVEC_BUILTIN_VMAXSH, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMAXUH, ALTIVEC_BUILTIN_VMAXUH, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMAXUH, ALTIVEC_BUILTIN_VMAXUH, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMAXUH, ALTIVEC_BUILTIN_VMAXUH, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMAXUH, ALTIVEC_BUILTIN_VMAXUH, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMAXUH, ALTIVEC_BUILTIN_VMAXUH, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMAXSB, ALTIVEC_BUILTIN_VMAXSB, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMAXSB, ALTIVEC_BUILTIN_VMAXSB, - RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMAXSB, ALTIVEC_BUILTIN_VMAXSB, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMAXUB, ALTIVEC_BUILTIN_VMAXUB, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMAXUB, ALTIVEC_BUILTIN_VMAXUB, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMAXUB, ALTIVEC_BUILTIN_VMAXUB, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMAXUB, ALTIVEC_BUILTIN_VMAXUB, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMAXUB, ALTIVEC_BUILTIN_VMAXUB, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_MERGEH, ALTIVEC_BUILTIN_VMRGHB, - RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_MERGEH, ALTIVEC_BUILTIN_VMRGHB, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_MERGEH, ALTIVEC_BUILTIN_VMRGHB, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_MERGEH, ALTIVEC_BUILTIN_VMRGHH, - RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_MERGEH, ALTIVEC_BUILTIN_VMRGHH, - RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_MERGEH, ALTIVEC_BUILTIN_VMRGHH, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_MERGEH, ALTIVEC_BUILTIN_VMRGHH, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_MERGEH, ALTIVEC_BUILTIN_VMRGHW, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, - { ALTIVEC_BUILTIN_VEC_MERGEH, ALTIVEC_BUILTIN_VMRGHW, - RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_MERGEH, ALTIVEC_BUILTIN_VMRGHW, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_MERGEH, ALTIVEC_BUILTIN_VMRGHW, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_MERGEH, VSX_BUILTIN_VEC_MERGEH_V2DF, - RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 }, - { ALTIVEC_BUILTIN_VEC_MERGEH, VSX_BUILTIN_VEC_MERGEH_V2DI, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_MERGEH, VSX_BUILTIN_VEC_MERGEH_V2DI, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_MERGEH, VSX_BUILTIN_VEC_MERGEH_V2DI, - RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_MERGEH, VSX_BUILTIN_VEC_MERGEH_V2DI, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_MERGEH, VSX_BUILTIN_VEC_MERGEH_V2DI, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_MERGEH, VSX_BUILTIN_VEC_MERGEH_V2DI, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_MERGEH, VSX_BUILTIN_VEC_MERGEH_V2DI, - RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMRGHW, ALTIVEC_BUILTIN_VMRGHW, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, - { ALTIVEC_BUILTIN_VEC_VMRGHW, ALTIVEC_BUILTIN_VMRGHW, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMRGHW, ALTIVEC_BUILTIN_VMRGHW, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMRGHW, ALTIVEC_BUILTIN_VMRGHW, - RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMRGHH, ALTIVEC_BUILTIN_VMRGHH, - RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMRGHH, ALTIVEC_BUILTIN_VMRGHH, - RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMRGHH, ALTIVEC_BUILTIN_VMRGHH, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMRGHH, ALTIVEC_BUILTIN_VMRGHH, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMRGHB, ALTIVEC_BUILTIN_VMRGHB, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMRGHB, ALTIVEC_BUILTIN_VMRGHB, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMRGHB, ALTIVEC_BUILTIN_VMRGHB, - RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_MERGEL, ALTIVEC_BUILTIN_VMRGLB, - RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_MERGEL, ALTIVEC_BUILTIN_VMRGLB, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_MERGEL, ALTIVEC_BUILTIN_VMRGLB, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_MERGEL, ALTIVEC_BUILTIN_VMRGLH, - RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_MERGEL, ALTIVEC_BUILTIN_VMRGLH, - RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_MERGEL, ALTIVEC_BUILTIN_VMRGLH, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_MERGEL, ALTIVEC_BUILTIN_VMRGLH, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_MERGEL, ALTIVEC_BUILTIN_VMRGLW, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, - { ALTIVEC_BUILTIN_VEC_MERGEL, ALTIVEC_BUILTIN_VMRGLW, - RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_MERGEL, ALTIVEC_BUILTIN_VMRGLW, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_MERGEL, ALTIVEC_BUILTIN_VMRGLW, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_MERGEL, VSX_BUILTIN_VEC_MERGEL_V2DF, - RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 }, - { ALTIVEC_BUILTIN_VEC_MERGEL, VSX_BUILTIN_VEC_MERGEL_V2DI, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_MERGEL, VSX_BUILTIN_VEC_MERGEL_V2DI, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_MERGEL, VSX_BUILTIN_VEC_MERGEL_V2DI, - RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_MERGEL, VSX_BUILTIN_VEC_MERGEL_V2DI, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_MERGEL, VSX_BUILTIN_VEC_MERGEL_V2DI, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_MERGEL, VSX_BUILTIN_VEC_MERGEL_V2DI, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_MERGEL, VSX_BUILTIN_VEC_MERGEL_V2DI, - RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMRGLW, ALTIVEC_BUILTIN_VMRGLW, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, - { ALTIVEC_BUILTIN_VEC_VMRGLW, ALTIVEC_BUILTIN_VMRGLW, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMRGLW, ALTIVEC_BUILTIN_VMRGLW, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMRGLW, ALTIVEC_BUILTIN_VMRGLW, - RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMRGLH, ALTIVEC_BUILTIN_VMRGLH, - RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMRGLH, ALTIVEC_BUILTIN_VMRGLH, - RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMRGLH, ALTIVEC_BUILTIN_VMRGLH, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMRGLH, ALTIVEC_BUILTIN_VMRGLH, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMRGLB, ALTIVEC_BUILTIN_VMRGLB, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMRGLB, ALTIVEC_BUILTIN_VMRGLB, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMRGLB, ALTIVEC_BUILTIN_VMRGLB, - RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINUB, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINUB, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINUB, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINSB, - RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINSB, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINSB, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINUH, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINUH, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINUH, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINSH, - RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINSH, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINSH, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINUW, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINUW, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINUW, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINSW, - RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINSW, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINSW, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_MIN, P8V_BUILTIN_VMINUD, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_MIN, P8V_BUILTIN_VMINUD, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_MIN, P8V_BUILTIN_VMINUD, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_MIN, P8V_BUILTIN_VMINSD, - RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_MIN, P8V_BUILTIN_VMINSD, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_MIN, P8V_BUILTIN_VMINSD, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINFP, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, - { ALTIVEC_BUILTIN_VEC_MIN, VSX_BUILTIN_XVMINDP, - RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 }, - { ALTIVEC_BUILTIN_VEC_VMINFP, ALTIVEC_BUILTIN_VMINFP, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, - { ALTIVEC_BUILTIN_VEC_VMINSW, ALTIVEC_BUILTIN_VMINSW, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMINSW, ALTIVEC_BUILTIN_VMINSW, - RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMINSW, ALTIVEC_BUILTIN_VMINSW, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMINUW, ALTIVEC_BUILTIN_VMINUW, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMINUW, ALTIVEC_BUILTIN_VMINUW, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMINUW, ALTIVEC_BUILTIN_VMINUW, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMINUW, ALTIVEC_BUILTIN_VMINUW, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMINUW, ALTIVEC_BUILTIN_VMINUW, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMINSH, ALTIVEC_BUILTIN_VMINSH, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMINSH, ALTIVEC_BUILTIN_VMINSH, - RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMINSH, ALTIVEC_BUILTIN_VMINSH, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMINSB, ALTIVEC_BUILTIN_VMINSB, - RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMINSB, ALTIVEC_BUILTIN_VMINSB, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMINSB, ALTIVEC_BUILTIN_VMINSB, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMINUH, ALTIVEC_BUILTIN_VMINUH, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMINUH, ALTIVEC_BUILTIN_VMINUH, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMINUH, ALTIVEC_BUILTIN_VMINUH, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMINUH, ALTIVEC_BUILTIN_VMINUH, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMINUH, ALTIVEC_BUILTIN_VMINUH, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMINUB, ALTIVEC_BUILTIN_VMINUB, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMINUB, ALTIVEC_BUILTIN_VMINUB, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMINUB, ALTIVEC_BUILTIN_VMINUB, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMINUB, ALTIVEC_BUILTIN_VMINUB, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMINUB, ALTIVEC_BUILTIN_VMINUB, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, 0 }, - { P10_BUILTIN_VEC_MULH, P10V_BUILTIN_MULHS_V4SI, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, - { P10_BUILTIN_VEC_MULH, P10V_BUILTIN_MULHU_V4SI, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, - RS6000_BTI_unsigned_V4SI, 0 }, - { P10_BUILTIN_VEC_MULH, P10V_BUILTIN_MULHS_V2DI, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, - { P10_BUILTIN_VEC_MULH, P10V_BUILTIN_MULHU_V2DI, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, - RS6000_BTI_unsigned_V2DI, 0 }, - - { ALTIVEC_BUILTIN_VEC_MULE, ALTIVEC_BUILTIN_VMULEUB, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_MULE, ALTIVEC_BUILTIN_VMULESB, - RS6000_BTI_V8HI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_MULE, ALTIVEC_BUILTIN_VMULEUH, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_MULE, ALTIVEC_BUILTIN_VMULESH, - RS6000_BTI_V4SI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_MULE, P8V_BUILTIN_VMULESW, - RS6000_BTI_V2DI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_MULE, P8V_BUILTIN_VMULEUW, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V4SI, - RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_MULE, P10V_BUILTIN_VMULESD, - RS6000_BTI_V1TI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_MULE, P10V_BUILTIN_VMULEUD, - RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V2DI, - RS6000_BTI_unsigned_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMULEUB, ALTIVEC_BUILTIN_VMULEUB, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMULESB, ALTIVEC_BUILTIN_VMULESB, - RS6000_BTI_V8HI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMULEUH, ALTIVEC_BUILTIN_VMULEUH, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMULESH, ALTIVEC_BUILTIN_VMULESH, - RS6000_BTI_V4SI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMULEUW, P8V_BUILTIN_VMULEUW, - RS6000_BTI_V2DI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMULESW, P8V_BUILTIN_VMULESW, - RS6000_BTI_V2DI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_MULO, ALTIVEC_BUILTIN_VMULOUB, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_MULO, ALTIVEC_BUILTIN_VMULOSB, - RS6000_BTI_V8HI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_MULO, ALTIVEC_BUILTIN_VMULOUH, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_MULO, P8V_BUILTIN_VMULOSW, - RS6000_BTI_V2DI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_MULO, P8V_BUILTIN_VMULOUW, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V4SI, - RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_MULO, P10V_BUILTIN_VMULOSD, - RS6000_BTI_V1TI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_MULO, P10V_BUILTIN_VMULOUD, - RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V2DI, - RS6000_BTI_unsigned_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_MULO, ALTIVEC_BUILTIN_VMULOSH, - RS6000_BTI_V4SI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMULOSH, ALTIVEC_BUILTIN_VMULOSH, - RS6000_BTI_V4SI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMULOUH, ALTIVEC_BUILTIN_VMULOUH, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMULOSB, ALTIVEC_BUILTIN_VMULOSB, - RS6000_BTI_V8HI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMULOUB, ALTIVEC_BUILTIN_VMULOUB, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMULOUW, P8V_BUILTIN_VMULOUW, - RS6000_BTI_V2DI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VMULOSW, P8V_BUILTIN_VMULOSW, - RS6000_BTI_V2DI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, - - { ALTIVEC_BUILTIN_VEC_NABS, ALTIVEC_BUILTIN_NABS_V16QI, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_NABS, ALTIVEC_BUILTIN_NABS_V8HI, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_NABS, ALTIVEC_BUILTIN_NABS_V4SI, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_NABS, ALTIVEC_BUILTIN_NABS_V2DI, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_NABS, ALTIVEC_BUILTIN_NABS_V4SF, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_NABS, VSX_BUILTIN_XVNABSDP, - RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_NEARBYINT, VSX_BUILTIN_XVRDPI, - RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_NEARBYINT, VSX_BUILTIN_XVRSPI, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0, 0 }, - - { ALTIVEC_BUILTIN_VEC_NOR, ALTIVEC_BUILTIN_VNOR_V4SF, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, - { ALTIVEC_BUILTIN_VEC_NOR, ALTIVEC_BUILTIN_VNOR_V2DF, - RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 }, - { ALTIVEC_BUILTIN_VEC_NOR, ALTIVEC_BUILTIN_VNOR_V2DI, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_NOR, ALTIVEC_BUILTIN_VNOR_V2DI, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_NOR, ALTIVEC_BUILTIN_VNOR_V2DI, - RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_NOR, P10V_BUILTIN_VNOR_V1TI, - RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_bool_V1TI, 0 }, - { ALTIVEC_BUILTIN_VEC_NOR, P10V_BUILTIN_VNOR_V1TI, - RS6000_BTI_V1TI, RS6000_BTI_bool_V1TI, RS6000_BTI_V1TI, 0 }, - { ALTIVEC_BUILTIN_VEC_NOR, P10V_BUILTIN_VNOR_V1TI_UNS, - RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, 0 }, - { ALTIVEC_BUILTIN_VEC_NOR, P10V_BUILTIN_VNOR_V1TI_UNS, - RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, RS6000_BTI_bool_V1TI, 0 }, - { ALTIVEC_BUILTIN_VEC_NOR, P10V_BUILTIN_VNOR_V1TI_UNS, - RS6000_BTI_unsigned_V1TI, RS6000_BTI_bool_V1TI, RS6000_BTI_unsigned_V1TI, 0 }, - { ALTIVEC_BUILTIN_VEC_NOR, ALTIVEC_BUILTIN_VNOR_V2DI_UNS, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_NOR, ALTIVEC_BUILTIN_VNOR_V2DI_UNS, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_NOR, ALTIVEC_BUILTIN_VNOR_V2DI_UNS, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_NOR, ALTIVEC_BUILTIN_VNOR_V2DI_UNS, - RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_NOR, ALTIVEC_BUILTIN_VNOR_V4SI, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_NOR, ALTIVEC_BUILTIN_VNOR_V4SI_UNS, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_NOR, ALTIVEC_BUILTIN_VNOR_V4SI_UNS, - RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_NOR, ALTIVEC_BUILTIN_VNOR_V8HI, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_NOR, ALTIVEC_BUILTIN_VNOR_V8HI_UNS, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_NOR, ALTIVEC_BUILTIN_VNOR_V8HI_UNS, - RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_NOR, ALTIVEC_BUILTIN_VNOR_V16QI, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_NOR, ALTIVEC_BUILTIN_VNOR_V16QI_UNS, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_NOR, ALTIVEC_BUILTIN_VNOR_V16QI_UNS, - RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, 0 }, - - { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V4SF, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, - { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V4SF, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_bool_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V4SF, - RS6000_BTI_V4SF, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SF, 0 }, - { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V2DF, - RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 }, - { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V2DF, - RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_bool_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V2DF, - RS6000_BTI_V2DF, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DF, 0 }, - { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V2DI, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V2DI, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V2DI, - RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V2DI_UNS, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V2DI_UNS, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V2DI_UNS, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V2DI_UNS, - RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V4SI_UNS, - RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V4SI, - RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V4SI, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V4SI, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V4SI_UNS, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V4SI_UNS, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V4SI_UNS, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V8HI_UNS, - RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V8HI, - RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V8HI, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V8HI, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V8HI_UNS, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V8HI_UNS, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V8HI_UNS, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V16QI, - RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V16QI_UNS, - RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V16QI, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V16QI, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V16QI_UNS, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V16QI_UNS, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V16QI_UNS, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - - { ALTIVEC_BUILTIN_VEC_PACK, ALTIVEC_BUILTIN_VPKUHUM, - RS6000_BTI_V16QI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_PACK, ALTIVEC_BUILTIN_VPKUHUM, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_PACK, ALTIVEC_BUILTIN_VPKUHUM, - RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_PACK, ALTIVEC_BUILTIN_VPKUWUM, - RS6000_BTI_V8HI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_PACK, ALTIVEC_BUILTIN_VPKUWUM, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_PACK, ALTIVEC_BUILTIN_VPKUWUM, - RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_PACK, P8V_BUILTIN_VPKUDUM, - RS6000_BTI_V4SI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_PACK, P8V_BUILTIN_VPKUDUM, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_PACK, P8V_BUILTIN_VPKUDUM, - RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_PACK, P8V_BUILTIN_FLOAT2_V2DF, - RS6000_BTI_V4SF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 }, - - { P8V_BUILTIN_VEC_NEG, P8V_BUILTIN_NEG_V16QI, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0, 0 }, - { P8V_BUILTIN_VEC_NEG, P8V_BUILTIN_NEG_V8HI, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0, 0 }, - { P8V_BUILTIN_VEC_NEG, P8V_BUILTIN_NEG_V4SI, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0, 0 }, - { P8V_BUILTIN_VEC_NEG, P8V_BUILTIN_NEG_V2DI, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0, 0 }, - { P8V_BUILTIN_VEC_NEG, P8V_BUILTIN_NEG_V4SF, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0, 0 }, - { P8V_BUILTIN_VEC_NEG, P8V_BUILTIN_NEG_V2DF, - RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0, 0 }, - - { P9V_BUILTIN_VEC_CONVERT_4F32_8I16, P9V_BUILTIN_CONVERT_4F32_8I16, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, - { P9V_BUILTIN_VEC_CONVERT_4F32_8F16, P9V_BUILTIN_CONVERT_4F32_8F16, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, - - { P9V_BUILTIN_VEC_VFIRSTMATCHINDEX, P9V_BUILTIN_VFIRSTMATCHINDEX_V16QI, - RS6000_BTI_UINTSI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, - { P9V_BUILTIN_VEC_VFIRSTMATCHINDEX, P9V_BUILTIN_VFIRSTMATCHINDEX_V16QI, - RS6000_BTI_UINTSI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { P9V_BUILTIN_VEC_VFIRSTMATCHINDEX, P9V_BUILTIN_VFIRSTMATCHINDEX_V8HI, - RS6000_BTI_UINTSI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, - { P9V_BUILTIN_VEC_VFIRSTMATCHINDEX, P9V_BUILTIN_VFIRSTMATCHINDEX_V8HI, - RS6000_BTI_UINTSI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { P9V_BUILTIN_VEC_VFIRSTMATCHINDEX, P9V_BUILTIN_VFIRSTMATCHINDEX_V4SI, - RS6000_BTI_UINTSI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, - { P9V_BUILTIN_VEC_VFIRSTMATCHINDEX, P9V_BUILTIN_VFIRSTMATCHINDEX_V4SI, - RS6000_BTI_UINTSI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { P9V_BUILTIN_VEC_VFIRSTMATCHOREOSINDEX, P9V_BUILTIN_VFIRSTMATCHOREOSINDEX_V16QI, - RS6000_BTI_UINTSI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, - { P9V_BUILTIN_VEC_VFIRSTMATCHOREOSINDEX, P9V_BUILTIN_VFIRSTMATCHOREOSINDEX_V16QI, - RS6000_BTI_UINTSI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { P9V_BUILTIN_VEC_VFIRSTMATCHOREOSINDEX, P9V_BUILTIN_VFIRSTMATCHOREOSINDEX_V8HI, - RS6000_BTI_UINTSI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, - { P9V_BUILTIN_VEC_VFIRSTMATCHOREOSINDEX, P9V_BUILTIN_VFIRSTMATCHOREOSINDEX_V8HI, - RS6000_BTI_UINTSI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { P9V_BUILTIN_VEC_VFIRSTMATCHOREOSINDEX, P9V_BUILTIN_VFIRSTMATCHOREOSINDEX_V4SI, - RS6000_BTI_UINTSI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, - { P9V_BUILTIN_VEC_VFIRSTMATCHOREOSINDEX, P9V_BUILTIN_VFIRSTMATCHOREOSINDEX_V4SI, - RS6000_BTI_UINTSI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { P9V_BUILTIN_VEC_VFIRSTMISMATCHINDEX, P9V_BUILTIN_VFIRSTMISMATCHINDEX_V16QI, - RS6000_BTI_UINTSI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, - { P9V_BUILTIN_VEC_VFIRSTMISMATCHINDEX, P9V_BUILTIN_VFIRSTMISMATCHINDEX_V16QI, - RS6000_BTI_UINTSI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { P9V_BUILTIN_VEC_VFIRSTMISMATCHINDEX, P9V_BUILTIN_VFIRSTMISMATCHINDEX_V8HI, - RS6000_BTI_UINTSI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, - { P9V_BUILTIN_VEC_VFIRSTMISMATCHINDEX, P9V_BUILTIN_VFIRSTMISMATCHINDEX_V8HI, - RS6000_BTI_UINTSI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { P9V_BUILTIN_VEC_VFIRSTMISMATCHINDEX, P9V_BUILTIN_VFIRSTMISMATCHINDEX_V4SI, - RS6000_BTI_UINTSI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, - { P9V_BUILTIN_VEC_VFIRSTMISMATCHINDEX, P9V_BUILTIN_VFIRSTMISMATCHINDEX_V4SI, - RS6000_BTI_UINTSI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - - { P9V_BUILTIN_VEC_VFIRSTMISMATCHOREOSINDEX, - P9V_BUILTIN_VFIRSTMISMATCHOREOSINDEX_V16QI, - RS6000_BTI_UINTSI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, - { P9V_BUILTIN_VEC_VFIRSTMISMATCHOREOSINDEX, - P9V_BUILTIN_VFIRSTMISMATCHOREOSINDEX_V16QI, RS6000_BTI_UINTSI, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { P9V_BUILTIN_VEC_VFIRSTMISMATCHOREOSINDEX, - P9V_BUILTIN_VFIRSTMISMATCHOREOSINDEX_V8HI, - RS6000_BTI_UINTSI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, - { P9V_BUILTIN_VEC_VFIRSTMISMATCHOREOSINDEX, - P9V_BUILTIN_VFIRSTMISMATCHOREOSINDEX_V8HI, - RS6000_BTI_UINTSI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { P9V_BUILTIN_VEC_VFIRSTMISMATCHOREOSINDEX, - P9V_BUILTIN_VFIRSTMISMATCHOREOSINDEX_V4SI, - RS6000_BTI_UINTSI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, - { P9V_BUILTIN_VEC_VFIRSTMISMATCHOREOSINDEX, - P9V_BUILTIN_VFIRSTMISMATCHOREOSINDEX_V4SI, - RS6000_BTI_UINTSI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - - { ALTIVEC_BUILTIN_VEC_VPKUWUM, ALTIVEC_BUILTIN_VPKUWUM, - RS6000_BTI_V8HI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VPKUWUM, ALTIVEC_BUILTIN_VPKUWUM, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VPKUWUM, ALTIVEC_BUILTIN_VPKUWUM, - RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VPKUHUM, ALTIVEC_BUILTIN_VPKUHUM, - RS6000_BTI_V16QI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VPKUHUM, ALTIVEC_BUILTIN_VPKUHUM, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VPKUHUM, ALTIVEC_BUILTIN_VPKUHUM, - RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_PACKPX, ALTIVEC_BUILTIN_VPKPX, - RS6000_BTI_pixel_V8HI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_PACKS, ALTIVEC_BUILTIN_VPKUHUS, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_PACKS, ALTIVEC_BUILTIN_VPKSHSS, - RS6000_BTI_V16QI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_PACKS, ALTIVEC_BUILTIN_VPKUWUS, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_PACKS, ALTIVEC_BUILTIN_VPKSWSS, - RS6000_BTI_V8HI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_PACKS, P8V_BUILTIN_VPKUDUS, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_PACKS, P8V_BUILTIN_VPKSDSS, - RS6000_BTI_V4SI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_VPKSWSS, ALTIVEC_BUILTIN_VPKSWSS, - RS6000_BTI_V8HI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VPKUWUS, ALTIVEC_BUILTIN_VPKUWUS, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VPKSHSS, ALTIVEC_BUILTIN_VPKSHSS, - RS6000_BTI_V16QI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VPKUHUS, ALTIVEC_BUILTIN_VPKUHUS, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_PACKSU, ALTIVEC_BUILTIN_VPKUHUS, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_PACKSU, ALTIVEC_BUILTIN_VPKSHUS, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_PACKSU, ALTIVEC_BUILTIN_VPKUWUS, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_PACKSU, ALTIVEC_BUILTIN_VPKSWUS, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_PACKSU, P8V_BUILTIN_VPKSDUS, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_PACKSU, P8V_BUILTIN_VPKUDUS, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_VPKSWUS, ALTIVEC_BUILTIN_VPKSWUS, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VPKSHUS, ALTIVEC_BUILTIN_VPKSHUS, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_RINT, VSX_BUILTIN_XVRDPIC, - RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_RINT, VSX_BUILTIN_XVRSPIC, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_RL, ALTIVEC_BUILTIN_VRLB, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_RL, ALTIVEC_BUILTIN_VRLB, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_RL, ALTIVEC_BUILTIN_VRLH, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_RL, ALTIVEC_BUILTIN_VRLH, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_RL, ALTIVEC_BUILTIN_VRLW, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_RL, ALTIVEC_BUILTIN_VRLW, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_RL, P8V_BUILTIN_VRLD, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_RL, P8V_BUILTIN_VRLD, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_RL, P10V_BUILTIN_VRLQ, - RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_unsigned_V1TI, 0 }, - { ALTIVEC_BUILTIN_VEC_RL, P10V_BUILTIN_VRLQ, - RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, - RS6000_BTI_unsigned_V1TI, 0 }, - { ALTIVEC_BUILTIN_VEC_VRLW, ALTIVEC_BUILTIN_VRLW, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VRLW, ALTIVEC_BUILTIN_VRLW, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VRLH, ALTIVEC_BUILTIN_VRLH, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VRLH, ALTIVEC_BUILTIN_VRLH, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VRLB, ALTIVEC_BUILTIN_VRLB, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_VRLB, ALTIVEC_BUILTIN_VRLB, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { P9V_BUILTIN_VEC_RLMI, P9V_BUILTIN_VRLWMI, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI }, - { P9V_BUILTIN_VEC_RLMI, P9V_BUILTIN_VRLDMI, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI }, - { P9V_BUILTIN_VEC_RLMI, P10V_BUILTIN_VRLQMI, - RS6000_BTI_V1TI, RS6000_BTI_V1TI, - RS6000_BTI_V1TI, RS6000_BTI_unsigned_V1TI }, - { P9V_BUILTIN_VEC_RLMI, P10V_BUILTIN_VRLQMI, - RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, - RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI }, - { P9V_BUILTIN_VEC_RLNM, P9V_BUILTIN_VRLWNM, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, - RS6000_BTI_unsigned_V4SI, 0 }, - { P9V_BUILTIN_VEC_RLNM, P9V_BUILTIN_VRLDNM, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, - RS6000_BTI_unsigned_V2DI, 0 }, - { P9V_BUILTIN_VEC_RLNM, P10V_BUILTIN_VRLQNM, - RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, - RS6000_BTI_unsigned_V1TI, 0 }, - { P9V_BUILTIN_VEC_RLNM, P10V_BUILTIN_VRLQNM, - RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_unsigned_V1TI, 0 }, - { ALTIVEC_BUILTIN_VEC_SL, ALTIVEC_BUILTIN_VSLB, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SL, ALTIVEC_BUILTIN_VSLB, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SL, ALTIVEC_BUILTIN_VSLH, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_SL, ALTIVEC_BUILTIN_VSLH, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_SL, ALTIVEC_BUILTIN_VSLW, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_SL, ALTIVEC_BUILTIN_VSLW, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_SL, P8V_BUILTIN_VSLD, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_SL, P8V_BUILTIN_VSLD, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_SL, P10V_BUILTIN_VSLQ, - RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_unsigned_V1TI, 0 }, - { ALTIVEC_BUILTIN_VEC_SL, P10V_BUILTIN_VSLQ, - RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, - RS6000_BTI_unsigned_V1TI, 0 }, - { ALTIVEC_BUILTIN_VEC_SQRT, VSX_BUILTIN_XVSQRTDP, - RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_SQRT, VSX_BUILTIN_XVSQRTSP, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_VSLW, ALTIVEC_BUILTIN_VSLW, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSLW, ALTIVEC_BUILTIN_VSLW, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSLH, ALTIVEC_BUILTIN_VSLH, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSLH, ALTIVEC_BUILTIN_VSLH, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSLB, ALTIVEC_BUILTIN_VSLB, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSLB, ALTIVEC_BUILTIN_VSLB, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, - RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, - RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, - RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, - RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, - RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, - RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, - RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, - RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, - RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, - RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, - RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, - RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - - { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, - RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, - RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, - RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V8HI, 0 }, - - { ALTIVEC_BUILTIN_VEC_SLO, ALTIVEC_BUILTIN_VSLO, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SLO, ALTIVEC_BUILTIN_VSLO, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SLO, ALTIVEC_BUILTIN_VSLO, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SLO, ALTIVEC_BUILTIN_VSLO, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SLO, ALTIVEC_BUILTIN_VSLO, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SLO, ALTIVEC_BUILTIN_VSLO, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SLO, ALTIVEC_BUILTIN_VSLO, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SLO, ALTIVEC_BUILTIN_VSLO, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SLO, ALTIVEC_BUILTIN_VSLO, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SLO, ALTIVEC_BUILTIN_VSLO, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SLO, ALTIVEC_BUILTIN_VSLO, - RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SLO, ALTIVEC_BUILTIN_VSLO, - RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SLO, ALTIVEC_BUILTIN_VSLO, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SLO, ALTIVEC_BUILTIN_VSLO, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SLO, ALTIVEC_BUILTIN_VSLO, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SLO, ALTIVEC_BUILTIN_VSLO, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SLO, ALTIVEC_BUILTIN_VSLO, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SLO, ALTIVEC_BUILTIN_VSLO, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SLO, ALTIVEC_BUILTIN_VSLO, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SLO, ALTIVEC_BUILTIN_VSLO, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SPLAT, ALTIVEC_BUILTIN_VSPLTB, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_INTSI, 0 }, - { ALTIVEC_BUILTIN_VEC_SPLAT, ALTIVEC_BUILTIN_VSPLTB, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, 0 }, - { ALTIVEC_BUILTIN_VEC_SPLAT, ALTIVEC_BUILTIN_VSPLTB, - RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, 0 }, - { ALTIVEC_BUILTIN_VEC_SPLAT, ALTIVEC_BUILTIN_VSPLTH, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_INTSI, 0 }, - { ALTIVEC_BUILTIN_VEC_SPLAT, ALTIVEC_BUILTIN_VSPLTH, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, 0 }, - { ALTIVEC_BUILTIN_VEC_SPLAT, ALTIVEC_BUILTIN_VSPLTH, - RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, 0 }, - { ALTIVEC_BUILTIN_VEC_SPLAT, ALTIVEC_BUILTIN_VSPLTH, - RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, 0 }, - { ALTIVEC_BUILTIN_VEC_SPLAT, ALTIVEC_BUILTIN_VSPLTW, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_INTSI, 0 }, - { ALTIVEC_BUILTIN_VEC_SPLAT, ALTIVEC_BUILTIN_VSPLTW, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_INTSI, 0 }, - { ALTIVEC_BUILTIN_VEC_SPLAT, ALTIVEC_BUILTIN_VSPLTW, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, 0 }, - { ALTIVEC_BUILTIN_VEC_SPLAT, ALTIVEC_BUILTIN_VSPLTW, - RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, 0 }, - { ALTIVEC_BUILTIN_VEC_SPLAT, VSX_BUILTIN_XXSPLTD_V2DF, - RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_INTSI, 0 }, - { ALTIVEC_BUILTIN_VEC_SPLAT, VSX_BUILTIN_XXSPLTD_V2DI, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_INTSI, 0 }, - { ALTIVEC_BUILTIN_VEC_SPLAT, VSX_BUILTIN_XXSPLTD_V2DI, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_INTSI, 0 }, - { ALTIVEC_BUILTIN_VEC_SPLAT, VSX_BUILTIN_XXSPLTD_V2DI, - RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_INTSI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSPLTW, ALTIVEC_BUILTIN_VSPLTW, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_INTSI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSPLTW, ALTIVEC_BUILTIN_VSPLTW, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_INTSI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSPLTW, ALTIVEC_BUILTIN_VSPLTW, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSPLTW, ALTIVEC_BUILTIN_VSPLTW, - RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSPLTH, ALTIVEC_BUILTIN_VSPLTH, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_INTSI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSPLTH, ALTIVEC_BUILTIN_VSPLTH, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSPLTH, ALTIVEC_BUILTIN_VSPLTH, - RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSPLTH, ALTIVEC_BUILTIN_VSPLTH, - RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSPLTB, ALTIVEC_BUILTIN_VSPLTB, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_INTSI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSPLTB, ALTIVEC_BUILTIN_VSPLTB, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSPLTB, ALTIVEC_BUILTIN_VSPLTB, - RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, 0 }, - { ALTIVEC_BUILTIN_VEC_SR, ALTIVEC_BUILTIN_VSRB, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SR, ALTIVEC_BUILTIN_VSRB, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SR, ALTIVEC_BUILTIN_VSRH, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_SR, ALTIVEC_BUILTIN_VSRH, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_SR, ALTIVEC_BUILTIN_VSRW, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_SR, ALTIVEC_BUILTIN_VSRW, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_SR, P8V_BUILTIN_VSRD, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_SR, P8V_BUILTIN_VSRD, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_SR, P10V_BUILTIN_VSRQ, - RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_unsigned_V1TI, 0 }, - { ALTIVEC_BUILTIN_VEC_SR, P10V_BUILTIN_VSRQ, - RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, - RS6000_BTI_unsigned_V1TI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSRW, ALTIVEC_BUILTIN_VSRW, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSRW, ALTIVEC_BUILTIN_VSRW, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSRH, ALTIVEC_BUILTIN_VSRH, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSRH, ALTIVEC_BUILTIN_VSRH, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSRB, ALTIVEC_BUILTIN_VSRB, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSRB, ALTIVEC_BUILTIN_VSRB, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SRA, ALTIVEC_BUILTIN_VSRAB, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SRA, ALTIVEC_BUILTIN_VSRAB, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SRA, ALTIVEC_BUILTIN_VSRAH, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_SRA, ALTIVEC_BUILTIN_VSRAH, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_SRA, ALTIVEC_BUILTIN_VSRAW, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_SRA, ALTIVEC_BUILTIN_VSRAW, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_SRA, P8V_BUILTIN_VSRAD, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_SRA, P8V_BUILTIN_VSRAD, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_SRA, P10V_BUILTIN_VSRAQ, - RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_unsigned_V1TI, 0 }, - { ALTIVEC_BUILTIN_VEC_SRA, P10V_BUILTIN_VSRAQ, - RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, - RS6000_BTI_unsigned_V1TI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSRAW, ALTIVEC_BUILTIN_VSRAW, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSRAW, ALTIVEC_BUILTIN_VSRAW, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSRAH, ALTIVEC_BUILTIN_VSRAH, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSRAH, ALTIVEC_BUILTIN_VSRAH, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSRAB, ALTIVEC_BUILTIN_VSRAB, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSRAB, ALTIVEC_BUILTIN_VSRAB, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR, - RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR, - RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR, - RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR, - RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR, - RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR, - RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR, - RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR, - RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR, - RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR, - RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR, - RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR, - RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SRO, ALTIVEC_BUILTIN_VSRO, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SRO, ALTIVEC_BUILTIN_VSRO, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SRO, ALTIVEC_BUILTIN_VSRO, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SRO, ALTIVEC_BUILTIN_VSRO, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SRO, ALTIVEC_BUILTIN_VSRO, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SRO, ALTIVEC_BUILTIN_VSRO, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SRO, ALTIVEC_BUILTIN_VSRO, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SRO, ALTIVEC_BUILTIN_VSRO, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SRO, ALTIVEC_BUILTIN_VSRO, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SRO, ALTIVEC_BUILTIN_VSRO, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SRO, ALTIVEC_BUILTIN_VSRO, - RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SRO, ALTIVEC_BUILTIN_VSRO, - RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SRO, ALTIVEC_BUILTIN_VSRO, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SRO, ALTIVEC_BUILTIN_VSRO, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SRO, ALTIVEC_BUILTIN_VSRO, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SRO, ALTIVEC_BUILTIN_VSRO, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SRO, ALTIVEC_BUILTIN_VSRO, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SRO, ALTIVEC_BUILTIN_VSRO, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SRO, ALTIVEC_BUILTIN_VSRO, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SRO, ALTIVEC_BUILTIN_VSRO, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V16QI, 0 }, - - { ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBUBM, - RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBUBM, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBUBM, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBUBM, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBUBM, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBUBM, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBUHM, - RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBUHM, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBUHM, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBUHM, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBUHM, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBUHM, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBUWM, - RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBUWM, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBUWM, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBUWM, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBUWM, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBUWM, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_SUB, P8V_BUILTIN_VSUBUDM, - RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_SUB, P8V_BUILTIN_VSUBUDM, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_SUB, P8V_BUILTIN_VSUBUDM, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_SUB, P8V_BUILTIN_VSUBUDM, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_SUB, P8V_BUILTIN_VSUBUDM, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_SUB, P8V_BUILTIN_VSUBUDM, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBFP, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, - { ALTIVEC_BUILTIN_VEC_SUB, VSX_BUILTIN_XVSUBDP, - RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 }, - { ALTIVEC_BUILTIN_VEC_SUB, P8V_BUILTIN_VSUBUQM, - RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, 0 }, - { ALTIVEC_BUILTIN_VEC_SUB, P8V_BUILTIN_VSUBUQM, - RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, - RS6000_BTI_unsigned_V1TI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSUBFP, ALTIVEC_BUILTIN_VSUBFP, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, - { ALTIVEC_BUILTIN_VEC_VSUBUWM, ALTIVEC_BUILTIN_VSUBUWM, - RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSUBUWM, ALTIVEC_BUILTIN_VSUBUWM, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSUBUWM, ALTIVEC_BUILTIN_VSUBUWM, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSUBUWM, ALTIVEC_BUILTIN_VSUBUWM, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSUBUWM, ALTIVEC_BUILTIN_VSUBUWM, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSUBUWM, ALTIVEC_BUILTIN_VSUBUWM, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSUBUWM, ALTIVEC_BUILTIN_VSUBUWM, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSUBUWM, ALTIVEC_BUILTIN_VSUBUWM, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSUBUHM, ALTIVEC_BUILTIN_VSUBUHM, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSUBUHM, ALTIVEC_BUILTIN_VSUBUHM, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSUBUHM, ALTIVEC_BUILTIN_VSUBUHM, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSUBUHM, ALTIVEC_BUILTIN_VSUBUHM, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSUBUHM, ALTIVEC_BUILTIN_VSUBUHM, - RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSUBUHM, ALTIVEC_BUILTIN_VSUBUHM, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSUBUHM, ALTIVEC_BUILTIN_VSUBUHM, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSUBUHM, ALTIVEC_BUILTIN_VSUBUHM, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSUBUBM, ALTIVEC_BUILTIN_VSUBUBM, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSUBUBM, ALTIVEC_BUILTIN_VSUBUBM, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSUBUBM, ALTIVEC_BUILTIN_VSUBUBM, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSUBUBM, ALTIVEC_BUILTIN_VSUBUBM, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSUBUBM, ALTIVEC_BUILTIN_VSUBUBM, - RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSUBUBM, ALTIVEC_BUILTIN_VSUBUBM, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSUBUBM, ALTIVEC_BUILTIN_VSUBUBM, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSUBUBM, ALTIVEC_BUILTIN_VSUBUBM, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, 0 }, - - { ALTIVEC_BUILTIN_VEC_SUBC, ALTIVEC_BUILTIN_VSUBCUW, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_SUBC, ALTIVEC_BUILTIN_VSUBCUW, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_SUBC, P8V_BUILTIN_VSUBCUQ, - RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, - RS6000_BTI_unsigned_V1TI, 0 }, - { ALTIVEC_BUILTIN_VEC_SUBC, P8V_BUILTIN_VSUBCUQ, - RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, 0 }, - - { ALTIVEC_BUILTIN_VEC_SUBS, ALTIVEC_BUILTIN_VSUBUBS, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SUBS, ALTIVEC_BUILTIN_VSUBUBS, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SUBS, ALTIVEC_BUILTIN_VSUBUBS, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SUBS, ALTIVEC_BUILTIN_VSUBSBS, - RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SUBS, ALTIVEC_BUILTIN_VSUBSBS, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SUBS, ALTIVEC_BUILTIN_VSUBSBS, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SUBS, ALTIVEC_BUILTIN_VSUBUHS, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_SUBS, ALTIVEC_BUILTIN_VSUBUHS, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_SUBS, ALTIVEC_BUILTIN_VSUBUHS, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_SUBS, ALTIVEC_BUILTIN_VSUBSHS, - RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_SUBS, ALTIVEC_BUILTIN_VSUBSHS, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_SUBS, ALTIVEC_BUILTIN_VSUBSHS, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_SUBS, ALTIVEC_BUILTIN_VSUBUWS, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_SUBS, ALTIVEC_BUILTIN_VSUBUWS, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_SUBS, ALTIVEC_BUILTIN_VSUBUWS, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_SUBS, ALTIVEC_BUILTIN_VSUBSWS, - RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_SUBS, ALTIVEC_BUILTIN_VSUBSWS, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_SUBS, ALTIVEC_BUILTIN_VSUBSWS, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSUBSWS, ALTIVEC_BUILTIN_VSUBSWS, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSUBSWS, ALTIVEC_BUILTIN_VSUBSWS, - RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSUBSWS, ALTIVEC_BUILTIN_VSUBSWS, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSUBUWS, ALTIVEC_BUILTIN_VSUBUWS, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSUBUWS, ALTIVEC_BUILTIN_VSUBUWS, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSUBUWS, ALTIVEC_BUILTIN_VSUBUWS, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSUBUWS, ALTIVEC_BUILTIN_VSUBUWS, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSUBUWS, ALTIVEC_BUILTIN_VSUBUWS, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSUBSHS, ALTIVEC_BUILTIN_VSUBSHS, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSUBSHS, ALTIVEC_BUILTIN_VSUBSHS, - RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSUBSHS, ALTIVEC_BUILTIN_VSUBSHS, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSUBUHS, ALTIVEC_BUILTIN_VSUBUHS, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSUBUHS, ALTIVEC_BUILTIN_VSUBUHS, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSUBUHS, ALTIVEC_BUILTIN_VSUBUHS, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSUBUHS, ALTIVEC_BUILTIN_VSUBUHS, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSUBUHS, ALTIVEC_BUILTIN_VSUBUHS, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSUBSBS, ALTIVEC_BUILTIN_VSUBSBS, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSUBSBS, ALTIVEC_BUILTIN_VSUBSBS, - RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSUBSBS, ALTIVEC_BUILTIN_VSUBSBS, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSUBUBS, ALTIVEC_BUILTIN_VSUBUBS, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSUBUBS, ALTIVEC_BUILTIN_VSUBUBS, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSUBUBS, ALTIVEC_BUILTIN_VSUBUBS, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSUBUBS, ALTIVEC_BUILTIN_VSUBUBS, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSUBUBS, ALTIVEC_BUILTIN_VSUBUBS, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_SUM4S, ALTIVEC_BUILTIN_VSUM4UBS, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_SUM4S, ALTIVEC_BUILTIN_VSUM4SBS, - RS6000_BTI_V4SI, RS6000_BTI_V16QI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_SUM4S, ALTIVEC_BUILTIN_VSUM4SHS, - RS6000_BTI_V4SI, RS6000_BTI_V8HI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSUM4SHS, ALTIVEC_BUILTIN_VSUM4SHS, - RS6000_BTI_V4SI, RS6000_BTI_V8HI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSUM4SBS, ALTIVEC_BUILTIN_VSUM4SBS, - RS6000_BTI_V4SI, RS6000_BTI_V16QI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_VSUM4UBS, ALTIVEC_BUILTIN_VSUM4UBS, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_SUM2S, ALTIVEC_BUILTIN_VSUM2SWS, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_SUMS, ALTIVEC_BUILTIN_VSUMSWS, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, - - { VSX_BUILTIN_VEC_XL, VSX_BUILTIN_LXVD2X_V2DF, - RS6000_BTI_V2DF, RS6000_BTI_INTSI, ~RS6000_BTI_V2DF, 0 }, - { VSX_BUILTIN_VEC_XL, VSX_BUILTIN_LXVD2X_V2DF, - RS6000_BTI_V2DF, RS6000_BTI_INTSI, ~RS6000_BTI_double, 0 }, - { VSX_BUILTIN_VEC_XL, VSX_BUILTIN_LXVD2X_V1TI, - RS6000_BTI_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_INTTI, 0 }, - { VSX_BUILTIN_VEC_XL, VSX_BUILTIN_LXVD2X_V1TI, - RS6000_BTI_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_V1TI, 0 }, - { VSX_BUILTIN_VEC_XL, VSX_BUILTIN_LXVD2X_V1TI, - RS6000_BTI_unsigned_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTTI, 0 }, - { VSX_BUILTIN_VEC_XL, VSX_BUILTIN_LXVD2X_V2DI, - RS6000_BTI_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_V2DI, 0 }, - { VSX_BUILTIN_VEC_XL, VSX_BUILTIN_LXVD2X_V2DI, - RS6000_BTI_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_long_long, 0 }, - { VSX_BUILTIN_VEC_XL, VSX_BUILTIN_LXVD2X_V2DI, - RS6000_BTI_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_INTDI, 0 }, - { VSX_BUILTIN_VEC_XL, VSX_BUILTIN_LXVD2X_V2DI, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_INTSI, - ~RS6000_BTI_unsigned_V2DI, 0 }, - { VSX_BUILTIN_VEC_XL, VSX_BUILTIN_LXVD2X_V2DI, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_INTSI, - ~RS6000_BTI_unsigned_long_long, 0 }, - { VSX_BUILTIN_VEC_XL, VSX_BUILTIN_LXVD2X_V2DI, - RS6000_BTI_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTDI, 0 }, - - { VSX_BUILTIN_VEC_XL, VSX_BUILTIN_LXVW4X_V4SF, - RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_V4SF, 0 }, - { VSX_BUILTIN_VEC_XL, VSX_BUILTIN_LXVW4X_V4SF, - RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float, 0 }, - { VSX_BUILTIN_VEC_XL, VSX_BUILTIN_LXVW4X_V4SI, - RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_V4SI, 0 }, - { VSX_BUILTIN_VEC_XL, VSX_BUILTIN_LXVW4X_V4SI, - RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI, 0 }, - { VSX_BUILTIN_VEC_XL, VSX_BUILTIN_LXVW4X_V4SI, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V4SI, 0 }, - { VSX_BUILTIN_VEC_XL, VSX_BUILTIN_LXVW4X_V4SI, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI, 0 }, - { VSX_BUILTIN_VEC_XL, VSX_BUILTIN_LXVW4X_V8HI, - RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_V8HI, 0 }, - { VSX_BUILTIN_VEC_XL, VSX_BUILTIN_LXVW4X_V8HI, - RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI, 0 }, - { VSX_BUILTIN_VEC_XL, VSX_BUILTIN_LXVW4X_V8HI, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V8HI, 0 }, - { VSX_BUILTIN_VEC_XL, VSX_BUILTIN_LXVW4X_V8HI, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI, 0 }, - { VSX_BUILTIN_VEC_XL, VSX_BUILTIN_LXVW4X_V16QI, - RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_V16QI, 0 }, - { VSX_BUILTIN_VEC_XL, VSX_BUILTIN_LXVW4X_V16QI, - RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI, 0 }, - { VSX_BUILTIN_VEC_XL, VSX_BUILTIN_LXVW4X_V16QI, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, - ~RS6000_BTI_unsigned_V16QI, 0 }, - { VSX_BUILTIN_VEC_XL, VSX_BUILTIN_LXVW4X_V16QI, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI, 0 }, - - { VSX_BUILTIN_VEC_XL_BE, VSX_BUILTIN_LD_ELEMREV_V2DF, - RS6000_BTI_V2DF, RS6000_BTI_INTSI, ~RS6000_BTI_V2DF, 0 }, - { VSX_BUILTIN_VEC_XL_BE, VSX_BUILTIN_LD_ELEMREV_V2DF, - RS6000_BTI_V2DF, RS6000_BTI_INTSI, ~RS6000_BTI_double, 0 }, - { VSX_BUILTIN_VEC_XL_BE, VSX_BUILTIN_LD_ELEMREV_V1TI, - RS6000_BTI_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_INTTI, 0 }, - { VSX_BUILTIN_VEC_XL_BE, VSX_BUILTIN_LD_ELEMREV_V1TI, - RS6000_BTI_unsigned_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTTI, 0 }, - { VSX_BUILTIN_VEC_XL_BE, VSX_BUILTIN_LD_ELEMREV_V2DI, - RS6000_BTI_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_V2DI, 0 }, - { VSX_BUILTIN_VEC_XL_BE, VSX_BUILTIN_LD_ELEMREV_V2DI, - RS6000_BTI_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_long_long, 0 }, - { VSX_BUILTIN_VEC_XL_BE, VSX_BUILTIN_LD_ELEMREV_V2DI, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_INTSI, - ~RS6000_BTI_unsigned_V2DI, 0 }, - { VSX_BUILTIN_VEC_XL_BE, VSX_BUILTIN_LD_ELEMREV_V2DI, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_INTSI, - ~RS6000_BTI_unsigned_long_long, 0 }, - { VSX_BUILTIN_VEC_XL_BE, VSX_BUILTIN_LD_ELEMREV_V4SF, - RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_V4SF, 0 }, - { VSX_BUILTIN_VEC_XL_BE, VSX_BUILTIN_LD_ELEMREV_V4SF, - RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float, 0 }, - { VSX_BUILTIN_VEC_XL_BE, VSX_BUILTIN_LD_ELEMREV_V4SI, - RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_V4SI, 0 }, - { VSX_BUILTIN_VEC_XL_BE, VSX_BUILTIN_LD_ELEMREV_V4SI, - RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI, 0 }, - { VSX_BUILTIN_VEC_XL_BE, VSX_BUILTIN_LD_ELEMREV_V4SI, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V4SI, 0 }, - { VSX_BUILTIN_VEC_XL_BE, VSX_BUILTIN_LD_ELEMREV_V4SI, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI, 0 }, - { VSX_BUILTIN_VEC_XL_BE, VSX_BUILTIN_LD_ELEMREV_V8HI, - RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_V8HI, 0 }, - { VSX_BUILTIN_VEC_XL_BE, VSX_BUILTIN_LD_ELEMREV_V8HI, - RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI, 0 }, - { VSX_BUILTIN_VEC_XL_BE, VSX_BUILTIN_LD_ELEMREV_V8HI, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V8HI, 0 }, - { VSX_BUILTIN_VEC_XL_BE, VSX_BUILTIN_LD_ELEMREV_V8HI, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI, 0 }, - { VSX_BUILTIN_VEC_XL_BE, VSX_BUILTIN_LD_ELEMREV_V16QI, - RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_V16QI, 0 }, - { VSX_BUILTIN_VEC_XL_BE, VSX_BUILTIN_LD_ELEMREV_V16QI, - RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI, 0 }, - { VSX_BUILTIN_VEC_XL_BE, VSX_BUILTIN_LD_ELEMREV_V16QI, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, - ~RS6000_BTI_unsigned_V16QI, 0 }, - { VSX_BUILTIN_VEC_XL_BE, VSX_BUILTIN_LD_ELEMREV_V16QI, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI, 0 }, - - { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V4SF, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, - { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V4SI, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_bool_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V4SF, - RS6000_BTI_V4SF, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SF, 0 }, - { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V2DF, - RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 }, - { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V2DI, - RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_bool_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V2DF, - RS6000_BTI_V2DF, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DF, 0 }, - { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V2DI, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V2DI, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V2DI, - RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V2DI_UNS, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V2DI_UNS, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V2DI_UNS, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V2DI_UNS, - RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V4SI_UNS, - RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V4SI, - RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V4SI, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V4SI, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V4SI_UNS, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V4SI_UNS, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V4SI_UNS, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V8HI_UNS, - RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V8HI, - RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V8HI, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V8HI, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V8HI_UNS, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V8HI_UNS, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V8HI_UNS, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - - { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V16QI, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V16QI, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V16QI, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V16QI_UNS, - RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V16QI_UNS, - RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V16QI_UNS, - RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V16QI_UNS, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V16QI_UNS, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V16QI_UNS, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, - - /* Ternary AltiVec/VSX builtins. */ - { ALTIVEC_BUILTIN_VEC_DST, ALTIVEC_BUILTIN_DST, - RS6000_BTI_void, ~RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DST, ALTIVEC_BUILTIN_DST, - RS6000_BTI_void, ~RS6000_BTI_V16QI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DST, ALTIVEC_BUILTIN_DST, - RS6000_BTI_void, ~RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DST, ALTIVEC_BUILTIN_DST, - RS6000_BTI_void, ~RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DST, ALTIVEC_BUILTIN_DST, - RS6000_BTI_void, ~RS6000_BTI_V8HI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DST, ALTIVEC_BUILTIN_DST, - RS6000_BTI_void, ~RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DST, ALTIVEC_BUILTIN_DST, - RS6000_BTI_void, ~RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DST, ALTIVEC_BUILTIN_DST, - RS6000_BTI_void, ~RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DST, ALTIVEC_BUILTIN_DST, - RS6000_BTI_void, ~RS6000_BTI_V4SI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DST, ALTIVEC_BUILTIN_DST, - RS6000_BTI_void, ~RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DST, ALTIVEC_BUILTIN_DST, - RS6000_BTI_void, ~RS6000_BTI_V4SF, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DST, ALTIVEC_BUILTIN_DST, - RS6000_BTI_void, ~RS6000_BTI_UINTQI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DST, ALTIVEC_BUILTIN_DST, - RS6000_BTI_void, ~RS6000_BTI_INTQI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DST, ALTIVEC_BUILTIN_DST, - RS6000_BTI_void, ~RS6000_BTI_UINTHI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DST, ALTIVEC_BUILTIN_DST, - RS6000_BTI_void, ~RS6000_BTI_INTHI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DST, ALTIVEC_BUILTIN_DST, - RS6000_BTI_void, ~RS6000_BTI_UINTSI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DST, ALTIVEC_BUILTIN_DST, - RS6000_BTI_void, ~RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DST, ALTIVEC_BUILTIN_DST, - RS6000_BTI_void, ~RS6000_BTI_unsigned_long, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DST, ALTIVEC_BUILTIN_DST, - RS6000_BTI_void, ~RS6000_BTI_long, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DST, ALTIVEC_BUILTIN_DST, - RS6000_BTI_void, ~RS6000_BTI_float, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DSTST, ALTIVEC_BUILTIN_DSTST, - RS6000_BTI_void, ~RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DSTST, ALTIVEC_BUILTIN_DSTST, - RS6000_BTI_void, ~RS6000_BTI_V16QI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DSTST, ALTIVEC_BUILTIN_DSTST, - RS6000_BTI_void, ~RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DSTST, ALTIVEC_BUILTIN_DSTST, - RS6000_BTI_void, ~RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DSTST, ALTIVEC_BUILTIN_DSTST, - RS6000_BTI_void, ~RS6000_BTI_V8HI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DSTST, ALTIVEC_BUILTIN_DSTST, - RS6000_BTI_void, ~RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DSTST, ALTIVEC_BUILTIN_DSTST, - RS6000_BTI_void, ~RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DSTST, ALTIVEC_BUILTIN_DSTST, - RS6000_BTI_void, ~RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DSTST, ALTIVEC_BUILTIN_DSTST, - RS6000_BTI_void, ~RS6000_BTI_V4SI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DSTST, ALTIVEC_BUILTIN_DSTST, - RS6000_BTI_void, ~RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DSTST, ALTIVEC_BUILTIN_DSTST, - RS6000_BTI_void, ~RS6000_BTI_V4SF, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DSTST, ALTIVEC_BUILTIN_DSTST, - RS6000_BTI_void, ~RS6000_BTI_UINTQI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DSTST, ALTIVEC_BUILTIN_DSTST, - RS6000_BTI_void, ~RS6000_BTI_INTQI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DSTST, ALTIVEC_BUILTIN_DSTST, - RS6000_BTI_void, ~RS6000_BTI_UINTHI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DSTST, ALTIVEC_BUILTIN_DSTST, - RS6000_BTI_void, ~RS6000_BTI_INTHI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DSTST, ALTIVEC_BUILTIN_DSTST, - RS6000_BTI_void, ~RS6000_BTI_UINTSI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DSTST, ALTIVEC_BUILTIN_DSTST, - RS6000_BTI_void, ~RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DSTST, ALTIVEC_BUILTIN_DSTST, - RS6000_BTI_void, ~RS6000_BTI_unsigned_long, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DSTST, ALTIVEC_BUILTIN_DSTST, - RS6000_BTI_void, ~RS6000_BTI_long, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DSTST, ALTIVEC_BUILTIN_DSTST, - RS6000_BTI_void, ~RS6000_BTI_float, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DSTSTT, ALTIVEC_BUILTIN_DSTSTT, - RS6000_BTI_void, ~RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DSTSTT, ALTIVEC_BUILTIN_DSTSTT, - RS6000_BTI_void, ~RS6000_BTI_V16QI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DSTSTT, ALTIVEC_BUILTIN_DSTSTT, - RS6000_BTI_void, ~RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DSTSTT, ALTIVEC_BUILTIN_DSTSTT, - RS6000_BTI_void, ~RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DSTSTT, ALTIVEC_BUILTIN_DSTSTT, - RS6000_BTI_void, ~RS6000_BTI_V8HI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DSTSTT, ALTIVEC_BUILTIN_DSTSTT, - RS6000_BTI_void, ~RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DSTSTT, ALTIVEC_BUILTIN_DSTSTT, - RS6000_BTI_void, ~RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DSTSTT, ALTIVEC_BUILTIN_DSTSTT, - RS6000_BTI_void, ~RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DSTSTT, ALTIVEC_BUILTIN_DSTSTT, - RS6000_BTI_void, ~RS6000_BTI_V4SI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DSTSTT, ALTIVEC_BUILTIN_DSTSTT, - RS6000_BTI_void, ~RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DSTSTT, ALTIVEC_BUILTIN_DSTSTT, - RS6000_BTI_void, ~RS6000_BTI_V4SF, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DSTSTT, ALTIVEC_BUILTIN_DSTSTT, - RS6000_BTI_void, ~RS6000_BTI_UINTQI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DSTSTT, ALTIVEC_BUILTIN_DSTSTT, - RS6000_BTI_void, ~RS6000_BTI_INTQI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DSTSTT, ALTIVEC_BUILTIN_DSTSTT, - RS6000_BTI_void, ~RS6000_BTI_UINTHI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DSTSTT, ALTIVEC_BUILTIN_DSTSTT, - RS6000_BTI_void, ~RS6000_BTI_INTHI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DSTSTT, ALTIVEC_BUILTIN_DSTSTT, - RS6000_BTI_void, ~RS6000_BTI_UINTSI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DSTSTT, ALTIVEC_BUILTIN_DSTSTT, - RS6000_BTI_void, ~RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DSTSTT, ALTIVEC_BUILTIN_DSTSTT, - RS6000_BTI_void, ~RS6000_BTI_unsigned_long, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DSTSTT, ALTIVEC_BUILTIN_DSTSTT, - RS6000_BTI_void, ~RS6000_BTI_long, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DSTSTT, ALTIVEC_BUILTIN_DSTSTT, - RS6000_BTI_void, ~RS6000_BTI_float, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DSTT, ALTIVEC_BUILTIN_DSTT, - RS6000_BTI_void, ~RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DSTT, ALTIVEC_BUILTIN_DSTT, - RS6000_BTI_void, ~RS6000_BTI_V16QI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DSTT, ALTIVEC_BUILTIN_DSTT, - RS6000_BTI_void, ~RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DSTT, ALTIVEC_BUILTIN_DSTT, - RS6000_BTI_void, ~RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DSTT, ALTIVEC_BUILTIN_DSTT, - RS6000_BTI_void, ~RS6000_BTI_V8HI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DSTT, ALTIVEC_BUILTIN_DSTT, - RS6000_BTI_void, ~RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DSTT, ALTIVEC_BUILTIN_DSTT, - RS6000_BTI_void, ~RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DSTT, ALTIVEC_BUILTIN_DSTT, - RS6000_BTI_void, ~RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DSTT, ALTIVEC_BUILTIN_DSTT, - RS6000_BTI_void, ~RS6000_BTI_V4SI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DSTT, ALTIVEC_BUILTIN_DSTT, - RS6000_BTI_void, ~RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DSTT, ALTIVEC_BUILTIN_DSTT, - RS6000_BTI_void, ~RS6000_BTI_V4SF, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DSTT, ALTIVEC_BUILTIN_DSTT, - RS6000_BTI_void, ~RS6000_BTI_UINTQI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DSTT, ALTIVEC_BUILTIN_DSTT, - RS6000_BTI_void, ~RS6000_BTI_INTQI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DSTT, ALTIVEC_BUILTIN_DSTT, - RS6000_BTI_void, ~RS6000_BTI_UINTHI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DSTT, ALTIVEC_BUILTIN_DSTT, - RS6000_BTI_void, ~RS6000_BTI_INTHI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DSTT, ALTIVEC_BUILTIN_DSTT, - RS6000_BTI_void, ~RS6000_BTI_UINTSI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DSTT, ALTIVEC_BUILTIN_DSTT, - RS6000_BTI_void, ~RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DSTT, ALTIVEC_BUILTIN_DSTT, - RS6000_BTI_void, ~RS6000_BTI_unsigned_long, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DSTT, ALTIVEC_BUILTIN_DSTT, - RS6000_BTI_void, ~RS6000_BTI_long, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_DSTT, ALTIVEC_BUILTIN_DSTT, - RS6000_BTI_void, ~RS6000_BTI_float, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_MADD, ALTIVEC_BUILTIN_VMADDFP, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF }, - { ALTIVEC_BUILTIN_VEC_MADD, VSX_BUILTIN_XVMADDDP, - RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF }, - { ALTIVEC_BUILTIN_VEC_MADD, ALTIVEC_BUILTIN_VMLADDUHM, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI }, - { ALTIVEC_BUILTIN_VEC_MADD, ALTIVEC_BUILTIN_VMLADDUHM, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI }, - { ALTIVEC_BUILTIN_VEC_MADD, ALTIVEC_BUILTIN_VMLADDUHM, - RS6000_BTI_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI }, - { ALTIVEC_BUILTIN_VEC_MADD, ALTIVEC_BUILTIN_VMLADDUHM, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI }, - { ALTIVEC_BUILTIN_VEC_MADDS, ALTIVEC_BUILTIN_VMHADDSHS, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI }, - { ALTIVEC_BUILTIN_VEC_MLADD, ALTIVEC_BUILTIN_VMLADDUHM, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI }, - { ALTIVEC_BUILTIN_VEC_MLADD, ALTIVEC_BUILTIN_VMLADDUHM, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI }, - { ALTIVEC_BUILTIN_VEC_MLADD, ALTIVEC_BUILTIN_VMLADDUHM, - RS6000_BTI_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI }, - { ALTIVEC_BUILTIN_VEC_MLADD, ALTIVEC_BUILTIN_VMLADDUHM, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI }, - { ALTIVEC_BUILTIN_VEC_MRADDS, ALTIVEC_BUILTIN_VMHRADDSHS, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI }, - { VSX_BUILTIN_VEC_MSUB, VSX_BUILTIN_XVMSUBSP, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF }, - { VSX_BUILTIN_VEC_MSUB, VSX_BUILTIN_XVMSUBDP, - RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF }, - { ALTIVEC_BUILTIN_VEC_MSUM, ALTIVEC_BUILTIN_VMSUMUBM, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V4SI }, - { ALTIVEC_BUILTIN_VEC_MSUM, ALTIVEC_BUILTIN_VMSUMMBM, - RS6000_BTI_V4SI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_V4SI }, - { ALTIVEC_BUILTIN_VEC_MSUM, ALTIVEC_BUILTIN_VMSUMUHM, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V4SI }, - { ALTIVEC_BUILTIN_VEC_MSUM, ALTIVEC_BUILTIN_VMSUMSHM, - RS6000_BTI_V4SI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V4SI }, - - { ALTIVEC_BUILTIN_VEC_MSUM, ALTIVEC_BUILTIN_VMSUMUDM, - RS6000_BTI_V1TI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V1TI }, - { ALTIVEC_BUILTIN_VEC_MSUM, ALTIVEC_BUILTIN_VMSUMUDM, - RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V1TI }, - - { ALTIVEC_BUILTIN_VEC_VMSUMSHM, ALTIVEC_BUILTIN_VMSUMSHM, - RS6000_BTI_V4SI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V4SI }, - { ALTIVEC_BUILTIN_VEC_VMSUMUHM, ALTIVEC_BUILTIN_VMSUMUHM, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V4SI }, - { ALTIVEC_BUILTIN_VEC_VMSUMMBM, ALTIVEC_BUILTIN_VMSUMMBM, - RS6000_BTI_V4SI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_V4SI }, - { ALTIVEC_BUILTIN_VEC_VMSUMUBM, ALTIVEC_BUILTIN_VMSUMUBM, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V4SI }, - { ALTIVEC_BUILTIN_VEC_MSUMS, ALTIVEC_BUILTIN_VMSUMUHS, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V4SI }, - { ALTIVEC_BUILTIN_VEC_MSUMS, ALTIVEC_BUILTIN_VMSUMSHS, - RS6000_BTI_V4SI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V4SI }, - { ALTIVEC_BUILTIN_VEC_VMSUMSHS, ALTIVEC_BUILTIN_VMSUMSHS, - RS6000_BTI_V4SI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V4SI }, - { ALTIVEC_BUILTIN_VEC_VMSUMUHS, ALTIVEC_BUILTIN_VMSUMUHS, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V4SI }, - { VSX_BUILTIN_VEC_NMADD, VSX_BUILTIN_XVNMADDSP, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF }, - { VSX_BUILTIN_VEC_NMADD, VSX_BUILTIN_XVNMADDDP, - RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF }, - { ALTIVEC_BUILTIN_VEC_NMSUB, ALTIVEC_BUILTIN_VNMSUBFP, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF }, - { ALTIVEC_BUILTIN_VEC_NMSUB, VSX_BUILTIN_XVNMSUBDP, - RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF }, - { ALTIVEC_BUILTIN_VEC_PERM, ALTIVEC_BUILTIN_VPERM_2DF, - RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_unsigned_V16QI }, - { ALTIVEC_BUILTIN_VEC_PERM, ALTIVEC_BUILTIN_VPERM_2DI, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_unsigned_V16QI }, - { ALTIVEC_BUILTIN_VEC_PERM, ALTIVEC_BUILTIN_VPERM_2DI, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V16QI }, - { ALTIVEC_BUILTIN_VEC_PERM, ALTIVEC_BUILTIN_VPERM_2DI, - RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, - RS6000_BTI_unsigned_V16QI }, - { ALTIVEC_BUILTIN_VEC_PERM, ALTIVEC_BUILTIN_VPERM_4SF, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_unsigned_V16QI }, - { ALTIVEC_BUILTIN_VEC_PERM, ALTIVEC_BUILTIN_VPERM_4SI, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V16QI }, - { ALTIVEC_BUILTIN_VEC_PERM, ALTIVEC_BUILTIN_VPERM_4SI, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V16QI }, - { ALTIVEC_BUILTIN_VEC_PERM, ALTIVEC_BUILTIN_VPERM_4SI, - RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V16QI }, - { ALTIVEC_BUILTIN_VEC_PERM, ALTIVEC_BUILTIN_VPERM_8HI, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V16QI }, - { ALTIVEC_BUILTIN_VEC_PERM, ALTIVEC_BUILTIN_VPERM_8HI, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V16QI }, - { ALTIVEC_BUILTIN_VEC_PERM, ALTIVEC_BUILTIN_VPERM_8HI, - RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V16QI }, - { ALTIVEC_BUILTIN_VEC_PERM, ALTIVEC_BUILTIN_VPERM_8HI, - RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, RS6000_BTI_unsigned_V16QI }, - { ALTIVEC_BUILTIN_VEC_PERM, ALTIVEC_BUILTIN_VPERM_16QI, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI }, - { ALTIVEC_BUILTIN_VEC_PERM, ALTIVEC_BUILTIN_VPERM_16QI, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI }, - { ALTIVEC_BUILTIN_VEC_PERM, ALTIVEC_BUILTIN_VPERM_16QI, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI }, - { ALTIVEC_BUILTIN_VEC_PERM, ALTIVEC_BUILTIN_VPERM_16QI, - RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI }, - { ALTIVEC_BUILTIN_VEC_PERM, ALTIVEC_BUILTIN_VPERM_16QI, - RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI }, - - { P8V_BUILTIN_VEC_VPERMXOR, P8V_BUILTIN_VPERMXOR, - RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, - RS6000_BTI_bool_V16QI }, - { P8V_BUILTIN_VEC_VPERMXOR, P8V_BUILTIN_VPERMXOR, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI }, - { P8V_BUILTIN_VEC_VPERMXOR, P8V_BUILTIN_VPERMXOR, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI }, - - { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_2DF, - RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_bool_V2DI }, - { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_2DF, - RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_unsigned_V2DI }, - { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_2DF, - RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DI }, - { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_2DF, - RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF }, - { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_2DI, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI }, - { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_2DI, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_unsigned_V2DI }, - { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_2DI, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI }, - { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_2DI, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI }, - { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_2DI, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI }, - { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_2DI, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_V2DI }, - { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_2DI, - RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, - RS6000_BTI_bool_V2DI }, - { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_2DI, - RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, - RS6000_BTI_unsigned_V2DI }, - { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_4SF, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_bool_V4SI }, - { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_4SF, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_unsigned_V4SI }, - { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_4SI, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF }, - { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_4SI, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SI }, - { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_4SI, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI }, - { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_4SI, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V4SI }, - { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_4SI, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI }, - { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_4SI, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI }, - { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_4SI, - RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI }, - { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_4SI, - RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI }, - { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_8HI, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI }, - { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_8HI, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V8HI }, - { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_8HI, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI }, - { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_8HI, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI }, - { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_8HI, - RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI }, - { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_8HI, - RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI }, - { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_16QI, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI }, - { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_16QI, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI }, - { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_16QI, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI }, - { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_16QI, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI }, - { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_16QI, - RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI }, - { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_16QI, - RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI }, - { ALTIVEC_BUILTIN_VEC_SLD, ALTIVEC_BUILTIN_VSLDOI_4SF, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_SLD, ALTIVEC_BUILTIN_VSLDOI_4SI, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_SLD, ALTIVEC_BUILTIN_VSLDOI_4SI, - RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_SLD, ALTIVEC_BUILTIN_VSLDOI_4SI, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_SLD, ALTIVEC_BUILTIN_VSLDOI_8HI, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_SLD, ALTIVEC_BUILTIN_VSLDOI_8HI, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_SLD, ALTIVEC_BUILTIN_VSLDOI_8HI, - RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_SLD, ALTIVEC_BUILTIN_VSLDOI_8HI, - RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_SLD, ALTIVEC_BUILTIN_VSLDOI_16QI, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_SLD, ALTIVEC_BUILTIN_VSLDOI_16QI, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_SLD, ALTIVEC_BUILTIN_VSLDOI_16QI, - RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_SLD, ALTIVEC_BUILTIN_VSLDOI_2DF, - RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_SLD, ALTIVEC_BUILTIN_VSLDOI_2DI, - RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_SLD, ALTIVEC_BUILTIN_VSLDOI_2DI, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_SLD, ALTIVEC_BUILTIN_VSLDOI_2DI, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_INTSI }, - - { ALTIVEC_BUILTIN_VEC_SLDW, VSX_BUILTIN_XXSLDWI_16QI, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, - RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_SLDW, VSX_BUILTIN_XXSLDWI_16QI, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_SLDW, VSX_BUILTIN_XXSLDWI_8HI, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, - RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_SLDW, VSX_BUILTIN_XXSLDWI_8HI, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_SLDW, VSX_BUILTIN_XXSLDWI_4SI, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, - RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_SLDW, VSX_BUILTIN_XXSLDWI_4SI, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_SLDW, VSX_BUILTIN_XXSLDWI_2DI, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, - RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_SLDW, VSX_BUILTIN_XXSLDWI_2DI, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_INTSI }, - - { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V2DF, - RS6000_BTI_void, RS6000_BTI_V2DF, RS6000_BTI_INTSI, ~RS6000_BTI_V2DF }, - { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V2DF, - RS6000_BTI_void, RS6000_BTI_V2DF, RS6000_BTI_INTSI, ~RS6000_BTI_double }, - { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V2DI, - RS6000_BTI_void, RS6000_BTI_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_V2DI }, - { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V2DI, - RS6000_BTI_void, RS6000_BTI_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_long_long }, - { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V2DI, - RS6000_BTI_void, RS6000_BTI_unsigned_V2DI, RS6000_BTI_INTSI, - ~RS6000_BTI_unsigned_V2DI }, - { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V2DI, - RS6000_BTI_void, RS6000_BTI_unsigned_V2DI, RS6000_BTI_INTSI, - ~RS6000_BTI_unsigned_long_long }, - { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V2DI, - RS6000_BTI_void, RS6000_BTI_bool_V2DI, RS6000_BTI_INTSI, - ~RS6000_BTI_bool_V2DI }, - { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V2DI, - RS6000_BTI_void, RS6000_BTI_bool_V2DI, RS6000_BTI_INTSI, - ~RS6000_BTI_long_long }, - { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V2DI, - RS6000_BTI_void, RS6000_BTI_bool_V2DI, RS6000_BTI_INTSI, - ~RS6000_BTI_unsigned_long_long }, - { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V4SF, - RS6000_BTI_void, RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_V4SF }, - { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V4SF, - RS6000_BTI_void, RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float }, - { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V4SI, - RS6000_BTI_void, RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_V4SI }, - { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V4SI, - RS6000_BTI_void, RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V4SI, - RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V4SI }, - { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V4SI, - RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI }, - { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V4SI, - RS6000_BTI_void, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V4SI }, - { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V4SI, - RS6000_BTI_void, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI }, - { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V4SI, - RS6000_BTI_void, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V8HI, - RS6000_BTI_void, RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_V8HI }, - { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V8HI, - RS6000_BTI_void, RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI }, - { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V8HI, - RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V8HI }, - { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V8HI, - RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI }, - { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V8HI, - RS6000_BTI_void, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V8HI }, - { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V8HI, - RS6000_BTI_void, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI }, - { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V8HI, - RS6000_BTI_void, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI }, - { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V16QI, - RS6000_BTI_void, RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_V16QI }, - { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V16QI, - RS6000_BTI_void, RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI }, - { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V16QI, - RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V16QI }, - { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V16QI, - RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI }, - { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V16QI, - RS6000_BTI_void, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V16QI }, - { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V16QI, - RS6000_BTI_void, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI }, - { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V16QI, - RS6000_BTI_void, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI }, - { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V8HI, - RS6000_BTI_void, RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_pixel_V8HI }, - { ALTIVEC_BUILTIN_VEC_STE, ALTIVEC_BUILTIN_STVEBX, - RS6000_BTI_void, RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI }, - { ALTIVEC_BUILTIN_VEC_STE, ALTIVEC_BUILTIN_STVEBX, - RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI }, - { ALTIVEC_BUILTIN_VEC_STE, ALTIVEC_BUILTIN_STVEBX, - RS6000_BTI_void, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI }, - { ALTIVEC_BUILTIN_VEC_STE, ALTIVEC_BUILTIN_STVEBX, - RS6000_BTI_void, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI }, - { ALTIVEC_BUILTIN_VEC_STE, ALTIVEC_BUILTIN_STVEHX, - RS6000_BTI_void, RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI }, - { ALTIVEC_BUILTIN_VEC_STE, ALTIVEC_BUILTIN_STVEHX, - RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI }, - { ALTIVEC_BUILTIN_VEC_STE, ALTIVEC_BUILTIN_STVEHX, - RS6000_BTI_void, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI }, - { ALTIVEC_BUILTIN_VEC_STE, ALTIVEC_BUILTIN_STVEHX, - RS6000_BTI_void, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI }, - { ALTIVEC_BUILTIN_VEC_STE, ALTIVEC_BUILTIN_STVEHX, - RS6000_BTI_void, RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI }, - { ALTIVEC_BUILTIN_VEC_STE, ALTIVEC_BUILTIN_STVEHX, - RS6000_BTI_void, RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI }, - { ALTIVEC_BUILTIN_VEC_STE, ALTIVEC_BUILTIN_STVEWX, - RS6000_BTI_void, RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float }, - { ALTIVEC_BUILTIN_VEC_STE, ALTIVEC_BUILTIN_STVEWX, - RS6000_BTI_void, RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_STE, ALTIVEC_BUILTIN_STVEWX, - RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI }, - { ALTIVEC_BUILTIN_VEC_STE, ALTIVEC_BUILTIN_STVEWX, - RS6000_BTI_void, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_STE, ALTIVEC_BUILTIN_STVEWX, - RS6000_BTI_void, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI }, - { ALTIVEC_BUILTIN_VEC_STVEWX, ALTIVEC_BUILTIN_STVEWX, - RS6000_BTI_void, RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float }, - { ALTIVEC_BUILTIN_VEC_STVEWX, ALTIVEC_BUILTIN_STVEWX, - RS6000_BTI_void, RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_STVEWX, ALTIVEC_BUILTIN_STVEWX, - RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI }, - { ALTIVEC_BUILTIN_VEC_STVEWX, ALTIVEC_BUILTIN_STVEWX, - RS6000_BTI_void, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_STVEWX, ALTIVEC_BUILTIN_STVEWX, - RS6000_BTI_void, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI }, - { ALTIVEC_BUILTIN_VEC_STVEWX, ALTIVEC_BUILTIN_STVEWX, - RS6000_BTI_void, RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_void }, - { ALTIVEC_BUILTIN_VEC_STVEWX, ALTIVEC_BUILTIN_STVEWX, - RS6000_BTI_void, RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_void }, - { ALTIVEC_BUILTIN_VEC_STVEWX, ALTIVEC_BUILTIN_STVEWX, - RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_void }, - { ALTIVEC_BUILTIN_VEC_STVEHX, ALTIVEC_BUILTIN_STVEHX, - RS6000_BTI_void, RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI }, - { ALTIVEC_BUILTIN_VEC_STVEHX, ALTIVEC_BUILTIN_STVEHX, - RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI }, - { ALTIVEC_BUILTIN_VEC_STVEHX, ALTIVEC_BUILTIN_STVEHX, - RS6000_BTI_void, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI }, - { ALTIVEC_BUILTIN_VEC_STVEHX, ALTIVEC_BUILTIN_STVEHX, - RS6000_BTI_void, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI }, - { ALTIVEC_BUILTIN_VEC_STVEHX, ALTIVEC_BUILTIN_STVEHX, - RS6000_BTI_void, RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_void }, - { ALTIVEC_BUILTIN_VEC_STVEHX, ALTIVEC_BUILTIN_STVEHX, - RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_void }, - { ALTIVEC_BUILTIN_VEC_STVEBX, ALTIVEC_BUILTIN_STVEBX, - RS6000_BTI_void, RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI }, - { ALTIVEC_BUILTIN_VEC_STVEBX, ALTIVEC_BUILTIN_STVEBX, - RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI }, - { ALTIVEC_BUILTIN_VEC_STVEBX, ALTIVEC_BUILTIN_STVEBX, - RS6000_BTI_void, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI }, - { ALTIVEC_BUILTIN_VEC_STVEBX, ALTIVEC_BUILTIN_STVEBX, - RS6000_BTI_void, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI }, - { ALTIVEC_BUILTIN_VEC_STVEBX, ALTIVEC_BUILTIN_STVEBX, - RS6000_BTI_void, RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_void }, - { ALTIVEC_BUILTIN_VEC_STVEBX, ALTIVEC_BUILTIN_STVEBX, - RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_void }, - { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V4SF, - RS6000_BTI_void, RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_V4SF }, - { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V4SF, - RS6000_BTI_void, RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float }, - { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V4SI, - RS6000_BTI_void, RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_V4SI }, - { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V4SI, - RS6000_BTI_void, RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V4SI, - RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V4SI }, - { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V4SI, - RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI }, - { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V4SI, - RS6000_BTI_void, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V4SI }, - { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V4SI, - RS6000_BTI_void, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI }, - { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V4SI, - RS6000_BTI_void, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V8HI, - RS6000_BTI_void, RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_V8HI }, - { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V8HI, - RS6000_BTI_void, RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI }, - { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V8HI, - RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V8HI }, - { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V8HI, - RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI }, - { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V8HI, - RS6000_BTI_void, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V8HI }, - { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V8HI, - RS6000_BTI_void, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI }, - { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V8HI, - RS6000_BTI_void, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI }, - { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V16QI, - RS6000_BTI_void, RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_V16QI }, - { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V16QI, - RS6000_BTI_void, RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI }, - { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V16QI, - RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V16QI }, - { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V16QI, - RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI }, - { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V16QI, - RS6000_BTI_void, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V16QI }, - { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V16QI, - RS6000_BTI_void, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI }, - { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V16QI, - RS6000_BTI_void, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI }, - { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V8HI, - RS6000_BTI_void, RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_pixel_V8HI }, - { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V2DF, - RS6000_BTI_void, RS6000_BTI_V2DF, RS6000_BTI_INTSI, ~RS6000_BTI_V2DF }, - { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V2DF, - RS6000_BTI_void, RS6000_BTI_V2DF, RS6000_BTI_INTSI, ~RS6000_BTI_double }, - { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V2DI, - RS6000_BTI_void, RS6000_BTI_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_V2DI }, - { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V2DI, - RS6000_BTI_void, RS6000_BTI_unsigned_V2DI, RS6000_BTI_INTSI, - ~RS6000_BTI_unsigned_V2DI }, - { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V2DI, - RS6000_BTI_void, RS6000_BTI_bool_V2DI, RS6000_BTI_INTSI, - ~RS6000_BTI_bool_V2DI }, - { ALTIVEC_BUILTIN_VEC_STVLX, ALTIVEC_BUILTIN_STVLX, - RS6000_BTI_void, RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_V4SF }, - { ALTIVEC_BUILTIN_VEC_STVLX, ALTIVEC_BUILTIN_STVLX, - RS6000_BTI_void, RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float }, - { ALTIVEC_BUILTIN_VEC_STVLX, ALTIVEC_BUILTIN_STVLX, - RS6000_BTI_void, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V4SI }, - { ALTIVEC_BUILTIN_VEC_STVLX, ALTIVEC_BUILTIN_STVLX, - RS6000_BTI_void, RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_V4SI }, - { ALTIVEC_BUILTIN_VEC_STVLX, ALTIVEC_BUILTIN_STVLX, - RS6000_BTI_void, RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_STVLX, ALTIVEC_BUILTIN_STVLX, - RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V4SI }, - { ALTIVEC_BUILTIN_VEC_STVLX, ALTIVEC_BUILTIN_STVLX, - RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI }, - { ALTIVEC_BUILTIN_VEC_STVLX, ALTIVEC_BUILTIN_STVLX, - RS6000_BTI_void, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V8HI }, - { ALTIVEC_BUILTIN_VEC_STVLX, ALTIVEC_BUILTIN_STVLX, - RS6000_BTI_void, RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_pixel_V8HI }, - { ALTIVEC_BUILTIN_VEC_STVLX, ALTIVEC_BUILTIN_STVLX, - RS6000_BTI_void, RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_V8HI }, - { ALTIVEC_BUILTIN_VEC_STVLX, ALTIVEC_BUILTIN_STVLX, - RS6000_BTI_void, RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI }, - { ALTIVEC_BUILTIN_VEC_STVLX, ALTIVEC_BUILTIN_STVLX, - RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V8HI }, - { ALTIVEC_BUILTIN_VEC_STVLX, ALTIVEC_BUILTIN_STVLX, - RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI }, - { ALTIVEC_BUILTIN_VEC_STVLX, ALTIVEC_BUILTIN_STVLX, - RS6000_BTI_void, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V16QI }, - { ALTIVEC_BUILTIN_VEC_STVLX, ALTIVEC_BUILTIN_STVLX, - RS6000_BTI_void, RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_V16QI }, - { ALTIVEC_BUILTIN_VEC_STVLX, ALTIVEC_BUILTIN_STVLX, - RS6000_BTI_void, RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI }, - { ALTIVEC_BUILTIN_VEC_STVLX, ALTIVEC_BUILTIN_STVLX, - RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V16QI }, - { ALTIVEC_BUILTIN_VEC_STVLX, ALTIVEC_BUILTIN_STVLX, - RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI }, - { ALTIVEC_BUILTIN_VEC_STVLXL, ALTIVEC_BUILTIN_STVLXL, - RS6000_BTI_void, RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_V4SF }, - { ALTIVEC_BUILTIN_VEC_STVLXL, ALTIVEC_BUILTIN_STVLXL, - RS6000_BTI_void, RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float }, - { ALTIVEC_BUILTIN_VEC_STVLXL, ALTIVEC_BUILTIN_STVLXL, - RS6000_BTI_void, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V4SI }, - { ALTIVEC_BUILTIN_VEC_STVLXL, ALTIVEC_BUILTIN_STVLXL, - RS6000_BTI_void, RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_V4SI }, - { ALTIVEC_BUILTIN_VEC_STVLXL, ALTIVEC_BUILTIN_STVLXL, - RS6000_BTI_void, RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_STVLXL, ALTIVEC_BUILTIN_STVLXL, - RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V4SI }, - { ALTIVEC_BUILTIN_VEC_STVLXL, ALTIVEC_BUILTIN_STVLXL, - RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI }, - { ALTIVEC_BUILTIN_VEC_STVLXL, ALTIVEC_BUILTIN_STVLXL, - RS6000_BTI_void, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V8HI }, - { ALTIVEC_BUILTIN_VEC_STVLXL, ALTIVEC_BUILTIN_STVLXL, - RS6000_BTI_void, RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_pixel_V8HI }, - { ALTIVEC_BUILTIN_VEC_STVLXL, ALTIVEC_BUILTIN_STVLXL, - RS6000_BTI_void, RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_V8HI }, - { ALTIVEC_BUILTIN_VEC_STVLXL, ALTIVEC_BUILTIN_STVLXL, - RS6000_BTI_void, RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI }, - { ALTIVEC_BUILTIN_VEC_STVLXL, ALTIVEC_BUILTIN_STVLXL, - RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V8HI }, - { ALTIVEC_BUILTIN_VEC_STVLXL, ALTIVEC_BUILTIN_STVLXL, - RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI }, - { ALTIVEC_BUILTIN_VEC_STVLXL, ALTIVEC_BUILTIN_STVLXL, - RS6000_BTI_void, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V16QI }, - { ALTIVEC_BUILTIN_VEC_STVLXL, ALTIVEC_BUILTIN_STVLXL, - RS6000_BTI_void, RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_V16QI }, - { ALTIVEC_BUILTIN_VEC_STVLXL, ALTIVEC_BUILTIN_STVLXL, - RS6000_BTI_void, RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI }, - { ALTIVEC_BUILTIN_VEC_STVLXL, ALTIVEC_BUILTIN_STVLXL, - RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V16QI }, - { ALTIVEC_BUILTIN_VEC_STVLXL, ALTIVEC_BUILTIN_STVLXL, - RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI }, - { ALTIVEC_BUILTIN_VEC_STVRX, ALTIVEC_BUILTIN_STVRX, - RS6000_BTI_void, RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_V4SF }, - { ALTIVEC_BUILTIN_VEC_STVRX, ALTIVEC_BUILTIN_STVRX, - RS6000_BTI_void, RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float }, - { ALTIVEC_BUILTIN_VEC_STVRX, ALTIVEC_BUILTIN_STVRX, - RS6000_BTI_void, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V4SI }, - { ALTIVEC_BUILTIN_VEC_STVRX, ALTIVEC_BUILTIN_STVRX, - RS6000_BTI_void, RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_V4SI }, - { ALTIVEC_BUILTIN_VEC_STVRX, ALTIVEC_BUILTIN_STVRX, - RS6000_BTI_void, RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_STVRX, ALTIVEC_BUILTIN_STVRX, - RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V4SI }, - { ALTIVEC_BUILTIN_VEC_STVRX, ALTIVEC_BUILTIN_STVRX, - RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI }, - { ALTIVEC_BUILTIN_VEC_STVRX, ALTIVEC_BUILTIN_STVRX, - RS6000_BTI_void, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V8HI }, - { ALTIVEC_BUILTIN_VEC_STVRX, ALTIVEC_BUILTIN_STVRX, - RS6000_BTI_void, RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_pixel_V8HI }, - { ALTIVEC_BUILTIN_VEC_STVRX, ALTIVEC_BUILTIN_STVRX, - RS6000_BTI_void, RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_V8HI }, - { ALTIVEC_BUILTIN_VEC_STVRX, ALTIVEC_BUILTIN_STVRX, - RS6000_BTI_void, RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI }, - { ALTIVEC_BUILTIN_VEC_STVRX, ALTIVEC_BUILTIN_STVRX, - RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V8HI }, - { ALTIVEC_BUILTIN_VEC_STVRX, ALTIVEC_BUILTIN_STVRX, - RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI }, - { ALTIVEC_BUILTIN_VEC_STVRX, ALTIVEC_BUILTIN_STVRX, - RS6000_BTI_void, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V16QI }, - { ALTIVEC_BUILTIN_VEC_STVRX, ALTIVEC_BUILTIN_STVRX, - RS6000_BTI_void, RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_V16QI }, - { ALTIVEC_BUILTIN_VEC_STVRX, ALTIVEC_BUILTIN_STVRX, - RS6000_BTI_void, RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI }, - { ALTIVEC_BUILTIN_VEC_STVRX, ALTIVEC_BUILTIN_STVRX, - RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V16QI }, - { ALTIVEC_BUILTIN_VEC_STVRX, ALTIVEC_BUILTIN_STVRX, - RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI }, - { ALTIVEC_BUILTIN_VEC_STVRXL, ALTIVEC_BUILTIN_STVRXL, - RS6000_BTI_void, RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_V4SF }, - { ALTIVEC_BUILTIN_VEC_STVRXL, ALTIVEC_BUILTIN_STVRXL, - RS6000_BTI_void, RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float }, - { ALTIVEC_BUILTIN_VEC_STVRXL, ALTIVEC_BUILTIN_STVRXL, - RS6000_BTI_void, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V4SI }, - { ALTIVEC_BUILTIN_VEC_STVRXL, ALTIVEC_BUILTIN_STVRXL, - RS6000_BTI_void, RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_V4SI }, - { ALTIVEC_BUILTIN_VEC_STVRXL, ALTIVEC_BUILTIN_STVRXL, - RS6000_BTI_void, RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI }, - { ALTIVEC_BUILTIN_VEC_STVRXL, ALTIVEC_BUILTIN_STVRXL, - RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V4SI }, - { ALTIVEC_BUILTIN_VEC_STVRXL, ALTIVEC_BUILTIN_STVRXL, - RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI }, - { ALTIVEC_BUILTIN_VEC_STVRXL, ALTIVEC_BUILTIN_STVRXL, - RS6000_BTI_void, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V8HI }, - { ALTIVEC_BUILTIN_VEC_STVRXL, ALTIVEC_BUILTIN_STVRXL, - RS6000_BTI_void, RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_pixel_V8HI }, - { ALTIVEC_BUILTIN_VEC_STVRXL, ALTIVEC_BUILTIN_STVRXL, - RS6000_BTI_void, RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_V8HI }, - { ALTIVEC_BUILTIN_VEC_STVRXL, ALTIVEC_BUILTIN_STVRXL, - RS6000_BTI_void, RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI }, - { ALTIVEC_BUILTIN_VEC_STVRXL, ALTIVEC_BUILTIN_STVRXL, - RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V8HI }, - { ALTIVEC_BUILTIN_VEC_STVRXL, ALTIVEC_BUILTIN_STVRXL, - RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI }, - { ALTIVEC_BUILTIN_VEC_STVRXL, ALTIVEC_BUILTIN_STVRXL, - RS6000_BTI_void, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V16QI }, - { ALTIVEC_BUILTIN_VEC_STVRXL, ALTIVEC_BUILTIN_STVRXL, - RS6000_BTI_void, RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_V16QI }, - { ALTIVEC_BUILTIN_VEC_STVRXL, ALTIVEC_BUILTIN_STVRXL, - RS6000_BTI_void, RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI }, - { ALTIVEC_BUILTIN_VEC_STVRXL, ALTIVEC_BUILTIN_STVRXL, - RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V16QI }, - { ALTIVEC_BUILTIN_VEC_STVRXL, ALTIVEC_BUILTIN_STVRXL, - RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI }, - { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_STXVD2X_V2DF, - RS6000_BTI_void, RS6000_BTI_V2DF, RS6000_BTI_INTSI, ~RS6000_BTI_V2DF }, - { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_STXVD2X_V2DF, - RS6000_BTI_void, RS6000_BTI_V2DF, RS6000_BTI_INTSI, ~RS6000_BTI_double }, - { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_STXVD2X_V2DI, - RS6000_BTI_void, RS6000_BTI_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_V2DI }, - { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_STXVD2X_V2DI, - RS6000_BTI_void, RS6000_BTI_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_long_long }, - { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_STXVD2X_V2DI, RS6000_BTI_void, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_long_long }, - { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_STXVD2X_V2DI, - RS6000_BTI_void, RS6000_BTI_unsigned_V2DI, RS6000_BTI_INTSI, - ~RS6000_BTI_unsigned_V2DI }, - { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_STXVD2X_V2DI, - RS6000_BTI_void, RS6000_BTI_bool_V2DI, RS6000_BTI_INTSI, - ~RS6000_BTI_bool_V2DI }, - { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_STXVW4X_V4SF, - RS6000_BTI_void, RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_V4SF }, - { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_STXVW4X_V4SF, - RS6000_BTI_void, RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float }, - { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_STXVW4X_V4SI, - RS6000_BTI_void, RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_V4SI }, - { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_STXVW4X_V4SI, - RS6000_BTI_void, RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI }, - { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_STXVW4X_V4SI, - RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V4SI }, - { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_STXVW4X_V4SI, - RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI }, - { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_STXVW4X_V4SI, - RS6000_BTI_void, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V4SI }, - { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_STXVW4X_V4SI, - RS6000_BTI_void, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI }, - { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_STXVW4X_V4SI, - RS6000_BTI_void, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI }, - { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_STXVW4X_V8HI, - RS6000_BTI_void, RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_V8HI }, - { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_STXVW4X_V8HI, - RS6000_BTI_void, RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI }, - { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_STXVW4X_V8HI, - RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V8HI }, - { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_STXVW4X_V8HI, - RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI }, - { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_STXVW4X_V8HI, - RS6000_BTI_void, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V8HI }, - { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_STXVW4X_V8HI, - RS6000_BTI_void, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI }, - { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_STXVW4X_V8HI, - RS6000_BTI_void, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI }, - { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_STXVW4X_V16QI, - RS6000_BTI_void, RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_V16QI }, - { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_STXVW4X_V16QI, - RS6000_BTI_void, RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI }, - { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_STXVW4X_V16QI, - RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V16QI }, - { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_STXVW4X_V16QI, - RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI }, - { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_STXVW4X_V16QI, - RS6000_BTI_void, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V16QI }, - { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_STXVW4X_V16QI, - RS6000_BTI_void, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI }, - { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_STXVW4X_V16QI, - RS6000_BTI_void, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI }, - { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_STXVW4X_V8HI, - RS6000_BTI_void, RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_pixel_V8HI }, - { VSX_BUILTIN_VEC_XST_BE, VSX_BUILTIN_ST_ELEMREV_V2DF, - RS6000_BTI_void, RS6000_BTI_V2DF, RS6000_BTI_INTSI, ~RS6000_BTI_V2DF }, - { VSX_BUILTIN_VEC_XST_BE, VSX_BUILTIN_ST_ELEMREV_V2DF, - RS6000_BTI_void, RS6000_BTI_V2DF, RS6000_BTI_INTSI, ~RS6000_BTI_double }, - { VSX_BUILTIN_VEC_XST_BE, VSX_BUILTIN_ST_ELEMREV_V1TI, - RS6000_BTI_void, RS6000_BTI_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_INTTI }, - { VSX_BUILTIN_VEC_XST_BE, VSX_BUILTIN_ST_ELEMREV_V1TI, - RS6000_BTI_void, RS6000_BTI_unsigned_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTTI }, - { VSX_BUILTIN_VEC_XST_BE, VSX_BUILTIN_ST_ELEMREV_V2DI, - RS6000_BTI_void, RS6000_BTI_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_V2DI }, - { VSX_BUILTIN_VEC_XST_BE, VSX_BUILTIN_ST_ELEMREV_V2DI, - RS6000_BTI_void, RS6000_BTI_V2DI, RS6000_BTI_INTSI, - ~RS6000_BTI_long_long }, - { VSX_BUILTIN_VEC_XST_BE, VSX_BUILTIN_ST_ELEMREV_V2DI, - RS6000_BTI_void, RS6000_BTI_unsigned_V2DI, RS6000_BTI_INTSI, - ~RS6000_BTI_unsigned_V2DI }, - { VSX_BUILTIN_VEC_XST_BE, VSX_BUILTIN_ST_ELEMREV_V2DI, - RS6000_BTI_void, RS6000_BTI_unsigned_V2DI, RS6000_BTI_INTSI, - ~RS6000_BTI_unsigned_long_long }, - { VSX_BUILTIN_VEC_XST_BE, VSX_BUILTIN_ST_ELEMREV_V4SF, - RS6000_BTI_void, RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_V4SF }, - { VSX_BUILTIN_VEC_XST_BE, VSX_BUILTIN_ST_ELEMREV_V4SF, - RS6000_BTI_void, RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float }, - { VSX_BUILTIN_VEC_XST_BE, VSX_BUILTIN_ST_ELEMREV_V4SI, - RS6000_BTI_void, RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_V4SI }, - { VSX_BUILTIN_VEC_XST_BE, VSX_BUILTIN_ST_ELEMREV_V4SI, - RS6000_BTI_void, RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI }, - { VSX_BUILTIN_VEC_XST_BE, VSX_BUILTIN_ST_ELEMREV_V4SI, - RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, - ~RS6000_BTI_unsigned_V4SI }, - { VSX_BUILTIN_VEC_XST_BE, VSX_BUILTIN_ST_ELEMREV_V4SI, - RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, - ~RS6000_BTI_UINTSI }, - { VSX_BUILTIN_VEC_XST_BE, VSX_BUILTIN_ST_ELEMREV_V8HI, - RS6000_BTI_void, RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_V8HI }, - { VSX_BUILTIN_VEC_XST_BE, VSX_BUILTIN_ST_ELEMREV_V8HI, - RS6000_BTI_void, RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI }, - { VSX_BUILTIN_VEC_XST_BE, VSX_BUILTIN_ST_ELEMREV_V8HI, - RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, - ~RS6000_BTI_unsigned_V8HI }, - { VSX_BUILTIN_VEC_XST_BE, VSX_BUILTIN_ST_ELEMREV_V8HI, - RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, - ~RS6000_BTI_UINTHI }, - { VSX_BUILTIN_VEC_XST_BE, VSX_BUILTIN_ST_ELEMREV_V16QI, - RS6000_BTI_void, RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_V16QI }, - { VSX_BUILTIN_VEC_XST_BE, VSX_BUILTIN_ST_ELEMREV_V16QI, - RS6000_BTI_void, RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI }, - { VSX_BUILTIN_VEC_XST_BE, VSX_BUILTIN_ST_ELEMREV_V16QI, - RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, - ~RS6000_BTI_unsigned_V16QI }, - { VSX_BUILTIN_VEC_XST_BE, VSX_BUILTIN_ST_ELEMREV_V16QI, - RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, - ~RS6000_BTI_UINTQI }, - { VSX_BUILTIN_VEC_XXSLDWI, VSX_BUILTIN_XXSLDWI_16QI, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_INTSI }, - { VSX_BUILTIN_VEC_XXSLDWI, VSX_BUILTIN_XXSLDWI_16QI, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, - RS6000_BTI_INTSI }, - { VSX_BUILTIN_VEC_XXSLDWI, VSX_BUILTIN_XXSLDWI_8HI, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_INTSI }, - { VSX_BUILTIN_VEC_XXSLDWI, VSX_BUILTIN_XXSLDWI_8HI, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, - RS6000_BTI_INTSI }, - { VSX_BUILTIN_VEC_XXSLDWI, VSX_BUILTIN_XXSLDWI_4SI, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_INTSI }, - { VSX_BUILTIN_VEC_XXSLDWI, VSX_BUILTIN_XXSLDWI_4SI, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, - RS6000_BTI_INTSI }, - { VSX_BUILTIN_VEC_XXSLDWI, VSX_BUILTIN_XXSLDWI_2DI, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_INTSI }, - { VSX_BUILTIN_VEC_XXSLDWI, VSX_BUILTIN_XXSLDWI_2DI, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, - RS6000_BTI_INTSI }, - { VSX_BUILTIN_VEC_XXSLDWI, VSX_BUILTIN_XXSLDWI_4SF, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_INTSI }, - { VSX_BUILTIN_VEC_XXSLDWI, VSX_BUILTIN_XXSLDWI_2DF, - RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_INTSI }, - - { VSX_BUILTIN_VEC_XXPERMDI, VSX_BUILTIN_XXPERMDI_2DF, - RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_INTSI }, - { VSX_BUILTIN_VEC_XXPERMDI, VSX_BUILTIN_XXPERMDI_2DI, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_INTSI }, - { VSX_BUILTIN_VEC_XXPERMDI, VSX_BUILTIN_XXPERMDI_2DI, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, - RS6000_BTI_INTSI }, - { VSX_BUILTIN_VEC_XXPERMDI, VSX_BUILTIN_XXPERMDI_4SF, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_INTSI }, - { VSX_BUILTIN_VEC_XXPERMDI, VSX_BUILTIN_XXPERMDI_4SI, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_INTSI }, - { VSX_BUILTIN_VEC_XXPERMDI, VSX_BUILTIN_XXPERMDI_4SI, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, - RS6000_BTI_INTSI }, - { VSX_BUILTIN_VEC_XXPERMDI, VSX_BUILTIN_XXPERMDI_8HI, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_INTSI }, - { VSX_BUILTIN_VEC_XXPERMDI, VSX_BUILTIN_XXPERMDI_8HI, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, - RS6000_BTI_INTSI }, - { VSX_BUILTIN_VEC_XXPERMDI, VSX_BUILTIN_XXPERMDI_16QI, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_INTSI }, - { VSX_BUILTIN_VEC_XXPERMDI, VSX_BUILTIN_XXPERMDI_16QI, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, - RS6000_BTI_INTSI }, - - { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVD2X_V2DF, - RS6000_BTI_V2DF, RS6000_BTI_INTSI, ~RS6000_BTI_V2DF, 0 }, - { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVD2X_V2DF, - RS6000_BTI_V2DF, RS6000_BTI_INTSI, ~RS6000_BTI_double, 0 }, - { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVD2X_V2DI, - RS6000_BTI_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_V2DI, 0 }, - { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVD2X_V2DI, - RS6000_BTI_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_INTTI, 0 }, - { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVD2X_V2DI, - RS6000_BTI_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_long_long, 0 }, - { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVD2X_V2DI, - RS6000_BTI_unsigned_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTTI, 0 }, - { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVD2X_V2DI, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_INTSI, - ~RS6000_BTI_unsigned_V2DI, 0 }, - { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVD2X_V2DI, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_long_long, 0 }, - { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVD2X_V2DI, - RS6000_BTI_bool_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V2DI, 0 }, - { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVW4X_V4SF, - RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_V4SF, 0 }, - { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVW4X_V4SF, - RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float, 0 }, - { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVW4X_V4SI, - RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V4SI, 0 }, - { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVW4X_V4SI, - RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_V4SI, 0 }, - { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVW4X_V4SI, - RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI, 0 }, - { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVW4X_V4SI, - RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_long, 0 }, - { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVW4X_V4SI, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, - ~RS6000_BTI_unsigned_V4SI, 0 }, - { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVW4X_V4SI, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI, 0 }, - { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVW4X_V4SI, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, - ~RS6000_BTI_unsigned_long, 0 }, - { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVW4X_V8HI, - RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V8HI, 0 }, - { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVW4X_V8HI, - RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_pixel_V8HI, 0 }, - { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVW4X_V8HI, - RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_V8HI, 0 }, - { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVW4X_V8HI, - RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI, 0 }, - { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVW4X_V8HI, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, - ~RS6000_BTI_unsigned_V8HI, 0 }, - { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVW4X_V8HI, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI, 0 }, - { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVW4X_V16QI, - RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V16QI, 0 }, - { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVW4X_V16QI, - RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_V16QI, 0 }, - { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVW4X_V16QI, - RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI, 0 }, - { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVW4X_V16QI, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, - ~RS6000_BTI_unsigned_V16QI, 0 }, - { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVW4X_V16QI, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI, 0 }, - - { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVD2X_V2DF, - RS6000_BTI_void, RS6000_BTI_V2DF, RS6000_BTI_INTSI, ~RS6000_BTI_V2DF }, - { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVD2X_V2DF, - RS6000_BTI_void, RS6000_BTI_V2DF, RS6000_BTI_INTSI, ~RS6000_BTI_double }, - { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVD2X_V2DI, - RS6000_BTI_void, RS6000_BTI_V2DI, RS6000_BTI_INTDI, - ~RS6000_BTI_long_long }, - { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVD2X_V2DI, - RS6000_BTI_void, RS6000_BTI_unsigned_V2DI, RS6000_BTI_INTDI, - ~RS6000_BTI_unsigned_long_long }, - { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVD2X_V1TI, - RS6000_BTI_void, RS6000_BTI_V1TI, RS6000_BTI_INTDI, ~RS6000_BTI_INTTI }, - { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVD2X_V1TI, - RS6000_BTI_void, RS6000_BTI_unsigned_V1TI, RS6000_BTI_INTDI, ~RS6000_BTI_UINTTI }, - { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVD2X_V2DI, - RS6000_BTI_void, RS6000_BTI_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_V2DI }, - { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVD2X_V2DI, - RS6000_BTI_void, RS6000_BTI_unsigned_V2DI, RS6000_BTI_INTSI, - ~RS6000_BTI_unsigned_V2DI }, - { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVD2X_V2DI, - RS6000_BTI_void, RS6000_BTI_bool_V2DI, RS6000_BTI_INTSI, - ~RS6000_BTI_bool_V2DI }, - { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V4SF, - RS6000_BTI_void, RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_V4SF }, - { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V4SF, - RS6000_BTI_void, RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float }, - { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V4SI, - RS6000_BTI_void, RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_V4SI }, - { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V4SI, - RS6000_BTI_void, RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI }, - { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V4SI, - RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, - ~RS6000_BTI_unsigned_V4SI }, - { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V4SI, - RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, - ~RS6000_BTI_UINTSI }, - { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V4SI, - RS6000_BTI_void, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, - ~RS6000_BTI_bool_V4SI }, - { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V4SI, - RS6000_BTI_void, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, - ~RS6000_BTI_UINTSI }, - { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V4SI, - RS6000_BTI_void, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, - ~RS6000_BTI_INTSI }, - { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V8HI, - RS6000_BTI_void, RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_V8HI }, - { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V8HI, - RS6000_BTI_void, RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI }, - { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V8HI, - RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, - ~RS6000_BTI_unsigned_V8HI }, - { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V8HI, - RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, - ~RS6000_BTI_UINTHI }, - { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V8HI, - RS6000_BTI_void, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, - ~RS6000_BTI_bool_V8HI }, - { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V8HI, - RS6000_BTI_void, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, - ~RS6000_BTI_UINTHI }, - { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V8HI, - RS6000_BTI_void, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, - ~RS6000_BTI_INTHI }, - { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V16QI, - RS6000_BTI_void, RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_V16QI }, - { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V16QI, - RS6000_BTI_void, RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI }, - { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V16QI, - RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, - ~RS6000_BTI_unsigned_V16QI }, - { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V16QI, - RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, - ~RS6000_BTI_UINTQI }, - { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V16QI, - RS6000_BTI_void, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, - ~RS6000_BTI_bool_V16QI }, - { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V16QI, - RS6000_BTI_void, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, - ~RS6000_BTI_UINTQI }, - { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V16QI, - RS6000_BTI_void, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, - ~RS6000_BTI_INTQI }, - { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V16QI, - RS6000_BTI_void, RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, - ~RS6000_BTI_pixel_V8HI }, - - /* Predicates. */ - { ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTUB_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI }, - { ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTUB_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI }, - { ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTUB_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI }, - { ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTSB_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI }, - { ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTSB_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI }, - { ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTSB_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V16QI, RS6000_BTI_V16QI }, - { ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTUH_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI }, - { ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTUH_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI }, - { ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTUH_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI }, - { ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTSH_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V8HI, RS6000_BTI_V8HI }, - { ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTSH_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI }, - { ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTSH_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI }, - { ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTUW_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI }, - { ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTUW_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI }, - { ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTUW_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI }, - { ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTSW_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI }, - { ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTSW_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI }, - { ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTSW_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V4SI, RS6000_BTI_V4SI }, - { ALTIVEC_BUILTIN_VEC_VCMPGT_P, P8V_BUILTIN_VCMPGTUD_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI }, - { ALTIVEC_BUILTIN_VEC_VCMPGT_P, P8V_BUILTIN_VCMPGTUD_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI }, - { ALTIVEC_BUILTIN_VEC_VCMPGT_P, P8V_BUILTIN_VCMPGTUD_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI }, - { ALTIVEC_BUILTIN_VEC_VCMPGT_P, P10V_BUILTIN_VCMPGTUT_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI }, - { ALTIVEC_BUILTIN_VEC_VCMPGT_P, P8V_BUILTIN_VCMPGTSD_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI }, - { ALTIVEC_BUILTIN_VEC_VCMPGT_P, P8V_BUILTIN_VCMPGTSD_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI }, - { ALTIVEC_BUILTIN_VEC_VCMPGT_P, P8V_BUILTIN_VCMPGTSD_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V2DI, RS6000_BTI_V2DI }, - { ALTIVEC_BUILTIN_VEC_VCMPGT_P, P10V_BUILTIN_VCMPGTST_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V1TI, RS6000_BTI_V1TI }, - { ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTFP_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V4SF, RS6000_BTI_V4SF }, - { ALTIVEC_BUILTIN_VEC_VCMPGT_P, VSX_BUILTIN_XVCMPGTDP_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V2DF, RS6000_BTI_V2DF }, - - - { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUB_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI }, - { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUB_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI }, - { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUB_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI }, - { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUB_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI }, - { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUB_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI }, - { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUB_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V16QI, RS6000_BTI_V16QI }, - { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUB_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI }, - { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUH_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI }, - { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUH_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI }, - { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUH_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI }, - { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUH_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V8HI, RS6000_BTI_V8HI }, - { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUH_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI }, - { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUH_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI }, - { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUH_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI }, - { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUH_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI }, - { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUW_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI }, - { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUW_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI }, - { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUW_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI }, - { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUW_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI }, - { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUW_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI }, - { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUW_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V4SI, RS6000_BTI_V4SI }, - { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUW_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI }, - { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, P8V_BUILTIN_VCMPEQUD_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI }, - { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, P8V_BUILTIN_VCMPEQUD_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI }, - { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, P8V_BUILTIN_VCMPEQUD_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI }, - { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, P8V_BUILTIN_VCMPEQUD_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI }, - { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, P8V_BUILTIN_VCMPEQUD_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI }, - { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, P8V_BUILTIN_VCMPEQUD_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V2DI, RS6000_BTI_V2DI }, - { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, P8V_BUILTIN_VCMPEQUD_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI }, - { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, P10V_BUILTIN_VCMPEQUT_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V1TI, RS6000_BTI_V1TI }, - { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, P10V_BUILTIN_VCMPEQUT_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI }, - { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQFP_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V4SF, RS6000_BTI_V4SF }, - { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, VSX_BUILTIN_XVCMPEQDP_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V2DF, RS6000_BTI_V2DF }, - - - /* cmpge is the same as cmpgt for all cases except floating point. - There is further code to deal with this special case in - altivec_build_resolved_builtin. */ - { ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTUB_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI }, - { ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTUB_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI }, - { ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTUB_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI }, - { ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTSB_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI }, - { ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTSB_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI }, - { ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTSB_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V16QI, RS6000_BTI_V16QI }, - { ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTUH_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI }, - { ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTUH_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI }, - { ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTUH_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI }, - { ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTSH_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V8HI, RS6000_BTI_V8HI }, - { ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTSH_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI }, - { ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTSH_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI }, - { ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTUW_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI }, - { ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTUW_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI }, - { ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTUW_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI }, - { ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTSW_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI }, - { ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTSW_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI }, - { ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTSW_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V4SI, RS6000_BTI_V4SI }, - { ALTIVEC_BUILTIN_VEC_VCMPGE_P, P8V_BUILTIN_VCMPGTUD_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI }, - { ALTIVEC_BUILTIN_VEC_VCMPGE_P, P8V_BUILTIN_VCMPGTUD_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI }, - { ALTIVEC_BUILTIN_VEC_VCMPGE_P, P8V_BUILTIN_VCMPGTUD_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI }, - { ALTIVEC_BUILTIN_VEC_VCMPGE_P, P10V_BUILTIN_VCMPGTUT_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI }, - { ALTIVEC_BUILTIN_VEC_VCMPGE_P, P8V_BUILTIN_VCMPGTSD_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI }, - { ALTIVEC_BUILTIN_VEC_VCMPGE_P, P8V_BUILTIN_VCMPGTSD_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI }, - { ALTIVEC_BUILTIN_VEC_VCMPGE_P, P8V_BUILTIN_VCMPGTSD_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V2DI, RS6000_BTI_V2DI }, - { ALTIVEC_BUILTIN_VEC_VCMPGE_P, P10V_BUILTIN_VCMPGTST_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V1TI, RS6000_BTI_V1TI }, - { ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGEFP_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V4SF, RS6000_BTI_V4SF }, - { ALTIVEC_BUILTIN_VEC_VCMPGE_P, VSX_BUILTIN_XVCMPGEDP_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V2DF, RS6000_BTI_V2DF }, - - /* Power8 vector overloaded functions. */ - { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V16QI, - RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 }, - { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V16QI, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, 0 }, - { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V16QI, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, - { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V16QI_UNS, - RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, 0 }, - { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V16QI_UNS, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, - RS6000_BTI_unsigned_V16QI, 0 }, - { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V16QI_UNS, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, - RS6000_BTI_bool_V16QI, 0 }, - { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V16QI_UNS, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, - RS6000_BTI_unsigned_V16QI, 0 }, - { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V8HI, - RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, 0 }, - { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V8HI, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, 0 }, - { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V8HI, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, - { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V8HI_UNS, - RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, 0 }, - { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V8HI_UNS, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, - RS6000_BTI_unsigned_V8HI, 0 }, - { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V8HI_UNS, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, - RS6000_BTI_bool_V8HI, 0 }, - { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V8HI_UNS, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, - RS6000_BTI_unsigned_V8HI, 0 }, - { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V4SI, - RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, 0 }, - { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V4SI, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, 0 }, - { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V4SI, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, - { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V4SI_UNS, - RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, 0 }, - { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V4SI_UNS, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, - RS6000_BTI_unsigned_V4SI, 0 }, - { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V4SI_UNS, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, - RS6000_BTI_bool_V4SI, 0 }, - { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V4SI_UNS, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, - RS6000_BTI_unsigned_V4SI, 0 }, - { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V2DI, - RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, 0 }, - { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V2DI, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, 0 }, - { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V2DI, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, - { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V2DI_UNS, - RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, 0 }, - { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V2DI_UNS, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, - RS6000_BTI_unsigned_V2DI, 0 }, - { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V2DI_UNS, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, - RS6000_BTI_bool_V2DI, 0 }, - { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V2DI_UNS, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, - RS6000_BTI_unsigned_V2DI, 0 }, - { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V4SF, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, - { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V2DF, - RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 }, - - { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V16QI, - RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 }, - { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V16QI, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, 0 }, - { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V16QI, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, - { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V16QI_UNS, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, - RS6000_BTI_unsigned_V16QI, 0 }, - { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V16QI_UNS, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, - RS6000_BTI_bool_V16QI, 0 }, - { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V16QI_UNS, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, - RS6000_BTI_unsigned_V16QI, 0 }, - { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V16QI_UNS, - RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, 0 }, - { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V8HI, - RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, 0 }, - { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V8HI, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, 0 }, - { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V8HI, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, - { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V8HI_UNS, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, - RS6000_BTI_unsigned_V8HI, 0 }, - { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V8HI_UNS, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, - RS6000_BTI_bool_V8HI, 0 }, - { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V8HI_UNS, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, - RS6000_BTI_unsigned_V8HI, 0 }, - { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V8HI_UNS, - RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, 0 }, - { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V4SI, - RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, 0 }, - { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V4SI, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, 0 }, - { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V4SI, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, - { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V4SI_UNS, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, - RS6000_BTI_unsigned_V4SI, 0 }, - { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V4SI_UNS, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, - RS6000_BTI_bool_V4SI, 0 }, - { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V4SI_UNS, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, - RS6000_BTI_unsigned_V4SI, 0 }, - { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V4SI_UNS, - RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, 0 }, - { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V2DI, - RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, 0 }, - { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V2DI, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, 0 }, - { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V2DI, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, - { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V2DI_UNS, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, - RS6000_BTI_unsigned_V2DI, 0 }, - { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V2DI_UNS, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, - RS6000_BTI_bool_V2DI, 0 }, - { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V2DI_UNS, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, - RS6000_BTI_unsigned_V2DI, 0 }, - { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V2DI_UNS, - RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, 0 }, - { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V4SF, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, - { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V2DF, - RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 }, - - { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V16QI, - RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 }, - { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V16QI, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, 0 }, - { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V16QI, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, - { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V16QI_UNS, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, - RS6000_BTI_unsigned_V16QI, 0 }, - { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V16QI_UNS, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, - RS6000_BTI_bool_V16QI, 0 }, - { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V16QI_UNS, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, - RS6000_BTI_unsigned_V16QI, 0 }, - { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V16QI_UNS, - RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, 0 }, - { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V8HI, - RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, 0 }, - { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V8HI, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, 0 }, - { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V8HI, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, - { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V8HI_UNS, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, - RS6000_BTI_unsigned_V8HI, 0 }, - { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V8HI_UNS, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, - RS6000_BTI_bool_V8HI, 0 }, - { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V8HI_UNS, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, - RS6000_BTI_unsigned_V8HI, 0 }, - { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V8HI_UNS, - RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, 0 }, - { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V4SI, - RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, 0 }, - { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V4SI, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, 0 }, - { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V4SI, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, - { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V4SI_UNS, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, - RS6000_BTI_unsigned_V4SI, 0 }, - { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V4SI_UNS, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, - RS6000_BTI_bool_V4SI, 0 }, - { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V4SI_UNS, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, - RS6000_BTI_unsigned_V4SI, 0 }, - { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V4SI_UNS, - RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, 0 }, - { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V2DI, - RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, 0 }, - { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V2DI, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, 0 }, - { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V2DI, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, - { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V2DI_UNS, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, - RS6000_BTI_unsigned_V2DI, 0 }, - { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V2DI_UNS, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, - RS6000_BTI_bool_V2DI, 0 }, - { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V2DI_UNS, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, - RS6000_BTI_unsigned_V2DI, 0 }, - { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V2DI_UNS, - RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, 0 }, - { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V4SF, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, - { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V2DF, - RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 }, - - { P8V_BUILTIN_VEC_VADDCUQ, P8V_BUILTIN_VADDCUQ, - RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, 0 }, - { P8V_BUILTIN_VEC_VADDCUQ, P8V_BUILTIN_VADDCUQ, - RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, - RS6000_BTI_unsigned_V1TI, 0 }, - - { P8V_BUILTIN_VEC_VADDUDM, P8V_BUILTIN_VADDUDM, - RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, 0 }, - { P8V_BUILTIN_VEC_VADDUDM, P8V_BUILTIN_VADDUDM, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, 0 }, - { P8V_BUILTIN_VEC_VADDUDM, P8V_BUILTIN_VADDUDM, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, - { P8V_BUILTIN_VEC_VADDUDM, P8V_BUILTIN_VADDUDM, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, - { P8V_BUILTIN_VEC_VADDUDM, P8V_BUILTIN_VADDUDM, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, 0 }, - { P8V_BUILTIN_VEC_VADDUDM, P8V_BUILTIN_VADDUDM, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, - - { P8V_BUILTIN_VEC_VADDUQM, P8V_BUILTIN_VADDUQM, - RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, 0 }, - { P8V_BUILTIN_VEC_VADDUQM, P8V_BUILTIN_VADDUQM, - RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, - RS6000_BTI_unsigned_V1TI, 0 }, - - { P9V_BUILTIN_VEC_VBPERM, P9V_BUILTIN_VBPERMD, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, - RS6000_BTI_unsigned_V16QI, 0 }, - { P9V_BUILTIN_VEC_VBPERM, P8V_BUILTIN_VBPERMQ, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V1TI, - RS6000_BTI_unsigned_V16QI, 0 }, - { P9V_BUILTIN_VEC_VBPERM, P8V_BUILTIN_VBPERMQ2, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, - RS6000_BTI_unsigned_V16QI, 0 }, - - { P8V_BUILTIN_VEC_VBPERMQ, P8V_BUILTIN_VBPERMQ, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, - RS6000_BTI_unsigned_V16QI, 0 }, - { P8V_BUILTIN_VEC_VBPERMQ, P8V_BUILTIN_VBPERMQ, - RS6000_BTI_V2DI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, - { P8V_BUILTIN_VEC_VBPERMQ, P8V_BUILTIN_VBPERMQ, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V16QI, - RS6000_BTI_unsigned_V16QI, 0 }, - { P8V_BUILTIN_VEC_VBPERMQ, P8V_BUILTIN_VBPERMQ, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V1TI, - RS6000_BTI_unsigned_V16QI, 0 }, - - { P8V_BUILTIN_VEC_VCLZ, P8V_BUILTIN_VCLZB, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0, 0 }, - { P8V_BUILTIN_VEC_VCLZ, P8V_BUILTIN_VCLZB, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0, 0 }, - { P8V_BUILTIN_VEC_VCLZ, P8V_BUILTIN_VCLZH, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0, 0 }, - { P8V_BUILTIN_VEC_VCLZ, P8V_BUILTIN_VCLZH, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0, 0 }, - { P8V_BUILTIN_VEC_VCLZ, P8V_BUILTIN_VCLZW, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0, 0 }, - { P8V_BUILTIN_VEC_VCLZ, P8V_BUILTIN_VCLZW, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0, 0 }, - { P8V_BUILTIN_VEC_VCLZ, P8V_BUILTIN_VCLZD, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0, 0 }, - { P8V_BUILTIN_VEC_VCLZ, P8V_BUILTIN_VCLZD, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0, 0 }, - - { P8V_BUILTIN_VEC_VCLZB, P8V_BUILTIN_VCLZB, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0, 0 }, - { P8V_BUILTIN_VEC_VCLZB, P8V_BUILTIN_VCLZB, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0, 0 }, - - { P8V_BUILTIN_VEC_VCLZH, P8V_BUILTIN_VCLZH, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0, 0 }, - { P8V_BUILTIN_VEC_VCLZH, P8V_BUILTIN_VCLZH, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0, 0 }, - - { P8V_BUILTIN_VEC_VCLZW, P8V_BUILTIN_VCLZW, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0, 0 }, - { P8V_BUILTIN_VEC_VCLZW, P8V_BUILTIN_VCLZW, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0, 0 }, - - { P8V_BUILTIN_VEC_VCLZD, P8V_BUILTIN_VCLZD, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0, 0 }, - { P8V_BUILTIN_VEC_VCLZD, P8V_BUILTIN_VCLZD, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0, 0 }, - - { P9_BUILTIN_DFP_TSTSFI_LT, MISC_BUILTIN_TSTSFI_LT_TD, - RS6000_BTI_INTSI, RS6000_BTI_UINTSI, RS6000_BTI_dfloat128, 0 }, - { P9_BUILTIN_DFP_TSTSFI_LT, MISC_BUILTIN_TSTSFI_LT_DD, - RS6000_BTI_INTSI, RS6000_BTI_UINTSI, RS6000_BTI_dfloat64, 0 }, - - { P9_BUILTIN_DFP_TSTSFI_LT_TD, MISC_BUILTIN_TSTSFI_LT_TD, - RS6000_BTI_INTSI, RS6000_BTI_UINTSI, RS6000_BTI_dfloat128, 0 }, - { P9_BUILTIN_DFP_TSTSFI_LT_DD, MISC_BUILTIN_TSTSFI_LT_DD, - RS6000_BTI_INTSI, RS6000_BTI_UINTSI, RS6000_BTI_dfloat64, 0 }, - - { P9_BUILTIN_DFP_TSTSFI_EQ, MISC_BUILTIN_TSTSFI_EQ_TD, - RS6000_BTI_INTSI, RS6000_BTI_UINTSI, RS6000_BTI_dfloat128, 0 }, - { P9_BUILTIN_DFP_TSTSFI_EQ, MISC_BUILTIN_TSTSFI_EQ_DD, - RS6000_BTI_INTSI, RS6000_BTI_UINTSI, RS6000_BTI_dfloat64, 0 }, - - { P9_BUILTIN_DFP_TSTSFI_EQ_TD, MISC_BUILTIN_TSTSFI_EQ_TD, - RS6000_BTI_INTSI, RS6000_BTI_UINTSI, RS6000_BTI_dfloat128, 0 }, - { P9_BUILTIN_DFP_TSTSFI_EQ_DD, MISC_BUILTIN_TSTSFI_EQ_DD, - RS6000_BTI_INTSI, RS6000_BTI_UINTSI, RS6000_BTI_dfloat64, 0 }, - - { P9_BUILTIN_DFP_TSTSFI_GT, MISC_BUILTIN_TSTSFI_GT_TD, - RS6000_BTI_INTSI, RS6000_BTI_UINTSI, RS6000_BTI_dfloat128, 0 }, - { P9_BUILTIN_DFP_TSTSFI_GT, MISC_BUILTIN_TSTSFI_GT_DD, - RS6000_BTI_INTSI, RS6000_BTI_UINTSI, RS6000_BTI_dfloat64, 0 }, - - { P9_BUILTIN_DFP_TSTSFI_GT_TD, MISC_BUILTIN_TSTSFI_GT_TD, - RS6000_BTI_INTSI, RS6000_BTI_UINTSI, RS6000_BTI_dfloat128, 0 }, - { P9_BUILTIN_DFP_TSTSFI_GT_DD, MISC_BUILTIN_TSTSFI_GT_DD, - RS6000_BTI_INTSI, RS6000_BTI_UINTSI, RS6000_BTI_dfloat64, 0 }, - - { P9_BUILTIN_DFP_TSTSFI_OV, MISC_BUILTIN_TSTSFI_OV_TD, - RS6000_BTI_INTSI, RS6000_BTI_UINTSI, RS6000_BTI_dfloat128, 0 }, - { P9_BUILTIN_DFP_TSTSFI_OV, MISC_BUILTIN_TSTSFI_OV_DD, - RS6000_BTI_INTSI, RS6000_BTI_UINTSI, RS6000_BTI_dfloat64, 0 }, - - { P9_BUILTIN_DFP_TSTSFI_OV_TD, MISC_BUILTIN_TSTSFI_OV_TD, - RS6000_BTI_INTSI, RS6000_BTI_UINTSI, RS6000_BTI_dfloat128, 0 }, - { P9_BUILTIN_DFP_TSTSFI_OV_DD, MISC_BUILTIN_TSTSFI_OV_DD, - RS6000_BTI_INTSI, RS6000_BTI_UINTSI, RS6000_BTI_dfloat64, 0 }, - - { P9V_BUILTIN_VEC_VCTZ, P9V_BUILTIN_VCTZB, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0, 0 }, - { P9V_BUILTIN_VEC_VCTZ, P9V_BUILTIN_VCTZB, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0, 0 }, - { P9V_BUILTIN_VEC_VCTZ, P9V_BUILTIN_VCTZH, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0, 0 }, - { P9V_BUILTIN_VEC_VCTZ, P9V_BUILTIN_VCTZH, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0, 0 }, - { P9V_BUILTIN_VEC_VCTZ, P9V_BUILTIN_VCTZW, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0, 0 }, - { P9V_BUILTIN_VEC_VCTZ, P9V_BUILTIN_VCTZW, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0, 0 }, - { P9V_BUILTIN_VEC_VCTZ, P9V_BUILTIN_VCTZD, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0, 0 }, - { P9V_BUILTIN_VEC_VCTZ, P9V_BUILTIN_VCTZD, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0, 0 }, - - { P9V_BUILTIN_VEC_VCTZB, P9V_BUILTIN_VCTZB, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0, 0 }, - { P9V_BUILTIN_VEC_VCTZB, P9V_BUILTIN_VCTZB, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0, 0 }, - - { P9V_BUILTIN_VEC_VCTZH, P9V_BUILTIN_VCTZH, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0, 0 }, - { P9V_BUILTIN_VEC_VCTZH, P9V_BUILTIN_VCTZH, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0, 0 }, - - { P9V_BUILTIN_VEC_VCTZW, P9V_BUILTIN_VCTZW, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0, 0 }, - { P9V_BUILTIN_VEC_VCTZW, P9V_BUILTIN_VCTZW, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0, 0 }, - - { P9V_BUILTIN_VEC_VCTZD, P9V_BUILTIN_VCTZD, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0, 0 }, - { P9V_BUILTIN_VEC_VCTZD, P9V_BUILTIN_VCTZD, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0, 0 }, - - { P9V_BUILTIN_VEC_VADU, P9V_BUILTIN_VADUB, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, - RS6000_BTI_unsigned_V16QI, 0 }, - { P9V_BUILTIN_VEC_VADU, P9V_BUILTIN_VADUH, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, - RS6000_BTI_unsigned_V8HI, 0 }, - { P9V_BUILTIN_VEC_VADU, P9V_BUILTIN_VADUW, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, - RS6000_BTI_unsigned_V4SI, 0 }, - - { P9V_BUILTIN_VEC_VADUB, P9V_BUILTIN_VADUB, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, - RS6000_BTI_unsigned_V16QI, 0 }, - - { P9V_BUILTIN_VEC_VADUH, P9V_BUILTIN_VADUH, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, - RS6000_BTI_unsigned_V8HI, 0 }, - - { P9V_BUILTIN_VEC_VADUW, P9V_BUILTIN_VADUW, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, - RS6000_BTI_unsigned_V4SI, 0 }, - - { P9V_BUILTIN_VEC_VES, P9V_BUILTIN_VESSP, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_V4SF, 0, 0 }, - { P9V_BUILTIN_VEC_VES, P9V_BUILTIN_VESDP, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_V2DF, 0, 0 }, - - { P9V_BUILTIN_VEC_VESSP, P9V_BUILTIN_VESSP, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_V4SF, 0, 0 }, - { P9V_BUILTIN_VEC_VESDP, P9V_BUILTIN_VESDP, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_V2DF, 0, 0 }, - - { P9V_BUILTIN_VEC_VEE, P9V_BUILTIN_VEESP, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_V4SF, 0, 0 }, - { P9V_BUILTIN_VEC_VEE, P9V_BUILTIN_VEEDP, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_V2DF, 0, 0 }, - - { P9V_BUILTIN_VEC_VEESP, P9V_BUILTIN_VEESP, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_V4SF, 0, 0 }, - { P9V_BUILTIN_VEC_VEEDP, P9V_BUILTIN_VEEDP, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_V2DF, 0, 0 }, - - { P9V_BUILTIN_VEC_VTDC, P9V_BUILTIN_VTDCSP, - RS6000_BTI_bool_V4SI, RS6000_BTI_V4SF, RS6000_BTI_INTSI, 0 }, - { P9V_BUILTIN_VEC_VTDC, P9V_BUILTIN_VTDCDP, - RS6000_BTI_bool_V2DI, RS6000_BTI_V2DF, RS6000_BTI_INTSI, 0 }, - - { P9V_BUILTIN_VEC_VTDCSP, P9V_BUILTIN_VTDCSP, - RS6000_BTI_bool_V4SI, RS6000_BTI_V4SF, RS6000_BTI_INTSI, 0 }, - { P9V_BUILTIN_VEC_VTDCDP, P9V_BUILTIN_VTDCDP, - RS6000_BTI_bool_V2DI, RS6000_BTI_V2DF, RS6000_BTI_INTSI, 0 }, - - { P9V_BUILTIN_VEC_VIE, P9V_BUILTIN_VIESP, - RS6000_BTI_V4SF, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { P9V_BUILTIN_VEC_VIE, P9V_BUILTIN_VIESP, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_unsigned_V4SI, 0 }, - - { P9V_BUILTIN_VEC_VIE, P9V_BUILTIN_VIEDP, - RS6000_BTI_V2DF, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, - { P9V_BUILTIN_VEC_VIE, P9V_BUILTIN_VIEDP, - RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_unsigned_V2DI, 0 }, - - { P9V_BUILTIN_VEC_VIESP, P9V_BUILTIN_VIESP, - RS6000_BTI_V4SF, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { P9V_BUILTIN_VEC_VIESP, P9V_BUILTIN_VIESP, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_unsigned_V4SI, 0 }, - - { P9V_BUILTIN_VEC_VIEDP, P9V_BUILTIN_VIEDP, - RS6000_BTI_V2DF, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, - { P9V_BUILTIN_VEC_VIEDP, P9V_BUILTIN_VIEDP, - RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_unsigned_V2DI, 0 }, - - { P9V_BUILTIN_VEC_VSTDC, P9V_BUILTIN_VSTDCSP, - RS6000_BTI_bool_int, RS6000_BTI_float, RS6000_BTI_INTSI, 0 }, - { P9V_BUILTIN_VEC_VSTDC, P9V_BUILTIN_VSTDCDP, - RS6000_BTI_bool_int, RS6000_BTI_double, RS6000_BTI_INTSI, 0 }, - { P9V_BUILTIN_VEC_VSTDC, P9V_BUILTIN_VSTDCQP, - RS6000_BTI_bool_int, RS6000_BTI_ieee128_float, RS6000_BTI_INTSI, 0 }, - - { P9V_BUILTIN_VEC_VSTDCSP, P9V_BUILTIN_VSTDCSP, - RS6000_BTI_bool_int, RS6000_BTI_float, RS6000_BTI_INTSI, 0 }, - { P9V_BUILTIN_VEC_VSTDCDP, P9V_BUILTIN_VSTDCDP, - RS6000_BTI_bool_int, RS6000_BTI_double, RS6000_BTI_INTSI, 0 }, - { P9V_BUILTIN_VEC_VSTDCQP, P9V_BUILTIN_VSTDCQP, - RS6000_BTI_bool_int, RS6000_BTI_ieee128_float, RS6000_BTI_INTSI, 0 }, - - { P9V_BUILTIN_VEC_VSTDCN, P9V_BUILTIN_VSTDCNSP, - RS6000_BTI_bool_int, RS6000_BTI_float, 0, 0 }, - { P9V_BUILTIN_VEC_VSTDCN, P9V_BUILTIN_VSTDCNDP, - RS6000_BTI_bool_int, RS6000_BTI_double, 0, 0 }, - { P9V_BUILTIN_VEC_VSTDCN, P9V_BUILTIN_VSTDCNQP, - RS6000_BTI_bool_int, RS6000_BTI_ieee128_float, 0, 0 }, - - { P9V_BUILTIN_VEC_VSTDCNSP, P9V_BUILTIN_VSTDCNSP, - RS6000_BTI_bool_int, RS6000_BTI_float, 0, 0 }, - { P9V_BUILTIN_VEC_VSTDCNDP, P9V_BUILTIN_VSTDCNDP, - RS6000_BTI_bool_int, RS6000_BTI_double, 0, 0 }, - { P9V_BUILTIN_VEC_VSTDCNQP, P9V_BUILTIN_VSTDCNQP, - RS6000_BTI_bool_int, RS6000_BTI_ieee128_float, 0, 0 }, - - { P9V_BUILTIN_VEC_VSEEDP, P9V_BUILTIN_VSEEDP, - RS6000_BTI_UINTSI, RS6000_BTI_double, 0, 0 }, - { P9V_BUILTIN_VEC_VSEEDP, P9V_BUILTIN_VSEEQP, - RS6000_BTI_UINTDI, RS6000_BTI_ieee128_float, 0, 0 }, - - { P9V_BUILTIN_VEC_VSESDP, P9V_BUILTIN_VSESDP, - RS6000_BTI_UINTDI, RS6000_BTI_double, 0, 0 }, - { P9V_BUILTIN_VEC_VSESDP, P9V_BUILTIN_VSESQP, - RS6000_BTI_UINTTI, RS6000_BTI_ieee128_float, 0, 0 }, - - { P9V_BUILTIN_VEC_VSIEDP, P9V_BUILTIN_VSIEDP, - RS6000_BTI_double, RS6000_BTI_UINTDI, RS6000_BTI_UINTDI, 0 }, - { P9V_BUILTIN_VEC_VSIEDP, P9V_BUILTIN_VSIEDPF, - RS6000_BTI_double, RS6000_BTI_double, RS6000_BTI_UINTDI, 0 }, - - { P9V_BUILTIN_VEC_VSIEDP, P9V_BUILTIN_VSIEQP, - RS6000_BTI_ieee128_float, RS6000_BTI_UINTTI, RS6000_BTI_UINTDI, 0 }, - { P9V_BUILTIN_VEC_VSIEDP, P9V_BUILTIN_VSIEQPF, - RS6000_BTI_ieee128_float, RS6000_BTI_ieee128_float, RS6000_BTI_UINTDI, 0 }, - - { P9V_BUILTIN_VEC_VSCEGT, P9V_BUILTIN_VSCEDPGT, - RS6000_BTI_INTSI, RS6000_BTI_double, RS6000_BTI_double, 0 }, - { P9V_BUILTIN_VEC_VSCEGT, P9V_BUILTIN_VSCEQPGT, - RS6000_BTI_INTSI, RS6000_BTI_ieee128_float, RS6000_BTI_ieee128_float, 0 }, - { P9V_BUILTIN_VEC_VSCELT, P9V_BUILTIN_VSCEDPLT, - RS6000_BTI_INTSI, RS6000_BTI_double, RS6000_BTI_double, 0 }, - { P9V_BUILTIN_VEC_VSCELT, P9V_BUILTIN_VSCEQPLT, - RS6000_BTI_INTSI, RS6000_BTI_ieee128_float, RS6000_BTI_ieee128_float, 0 }, - { P9V_BUILTIN_VEC_VSCEEQ, P9V_BUILTIN_VSCEDPEQ, - RS6000_BTI_INTSI, RS6000_BTI_double, RS6000_BTI_double, 0 }, - { P9V_BUILTIN_VEC_VSCEEQ, P9V_BUILTIN_VSCEQPEQ, - RS6000_BTI_INTSI, RS6000_BTI_ieee128_float, RS6000_BTI_ieee128_float, 0 }, - { P9V_BUILTIN_VEC_VSCEUO, P9V_BUILTIN_VSCEDPUO, - RS6000_BTI_INTSI, RS6000_BTI_double, RS6000_BTI_double, 0 }, - { P9V_BUILTIN_VEC_VSCEUO, P9V_BUILTIN_VSCEQPUO, - RS6000_BTI_INTSI, RS6000_BTI_ieee128_float, RS6000_BTI_ieee128_float, 0 }, - - { P9V_BUILTIN_VEC_XL_LEN_R, P9V_BUILTIN_XL_LEN_R, - RS6000_BTI_unsigned_V16QI, ~RS6000_BTI_UINTQI, - RS6000_BTI_unsigned_long_long, 0 }, - - { P9V_BUILTIN_VEC_LXVL, P9V_BUILTIN_LXVL, - RS6000_BTI_V16QI, ~RS6000_BTI_INTQI, - RS6000_BTI_unsigned_long_long, 0 }, - { P9V_BUILTIN_VEC_LXVL, P9V_BUILTIN_LXVL, - RS6000_BTI_unsigned_V16QI, ~RS6000_BTI_UINTQI, - RS6000_BTI_unsigned_long_long, 0 }, - - { P9V_BUILTIN_VEC_LXVL, P9V_BUILTIN_LXVL, - RS6000_BTI_V4SI, ~RS6000_BTI_INTSI, - RS6000_BTI_unsigned_long_long, 0 }, - { P9V_BUILTIN_VEC_LXVL, P9V_BUILTIN_LXVL, - RS6000_BTI_unsigned_V4SI, ~RS6000_BTI_UINTSI, - RS6000_BTI_unsigned_long_long, 0 }, - - { P9V_BUILTIN_VEC_LXVL, P9V_BUILTIN_LXVL, - RS6000_BTI_V1TI, ~RS6000_BTI_INTTI, - RS6000_BTI_unsigned_long_long, 0 }, - { P9V_BUILTIN_VEC_LXVL, P9V_BUILTIN_LXVL, - RS6000_BTI_unsigned_V1TI, ~RS6000_BTI_UINTTI, - RS6000_BTI_unsigned_long_long, 0 }, - - { P9V_BUILTIN_VEC_LXVL, P9V_BUILTIN_LXVL, - RS6000_BTI_V2DI, ~RS6000_BTI_long_long, - RS6000_BTI_unsigned_long_long, 0 }, - { P9V_BUILTIN_VEC_LXVL, P9V_BUILTIN_LXVL, - RS6000_BTI_unsigned_V2DI, ~RS6000_BTI_unsigned_long_long, - RS6000_BTI_unsigned_long_long, 0 }, - - { P9V_BUILTIN_VEC_LXVL, P9V_BUILTIN_LXVL, - RS6000_BTI_V8HI, ~RS6000_BTI_INTHI, - RS6000_BTI_unsigned_long_long, 0 }, - { P9V_BUILTIN_VEC_LXVL, P9V_BUILTIN_LXVL, - RS6000_BTI_unsigned_V8HI, ~RS6000_BTI_UINTHI, - RS6000_BTI_unsigned_long_long, 0 }, - - { P9V_BUILTIN_VEC_LXVL, P9V_BUILTIN_LXVL, - RS6000_BTI_V2DF, ~RS6000_BTI_double, - RS6000_BTI_unsigned_long_long, 0 }, - { P9V_BUILTIN_VEC_LXVL, P9V_BUILTIN_LXVL, - RS6000_BTI_V4SF, ~RS6000_BTI_float, - RS6000_BTI_unsigned_long_long, 0 }, - /* At an appropriate future time, add support for the - RS6000_BTI_Float16 (exact name to be determined) type here. */ - - { P9V_BUILTIN_VEC_XST_LEN_R, P9V_BUILTIN_XST_LEN_R, - RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, - ~RS6000_BTI_UINTQI, RS6000_BTI_unsigned_long_long}, - - { P9V_BUILTIN_VEC_STXVL, P9V_BUILTIN_STXVL, - RS6000_BTI_void, RS6000_BTI_V16QI, ~RS6000_BTI_INTQI, - RS6000_BTI_unsigned_long_long }, - { P9V_BUILTIN_VEC_STXVL, P9V_BUILTIN_STXVL, - RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, ~RS6000_BTI_UINTQI, - RS6000_BTI_unsigned_long_long }, - - { P9V_BUILTIN_VEC_STXVL, P9V_BUILTIN_STXVL, - RS6000_BTI_void, RS6000_BTI_V4SI, ~RS6000_BTI_INTSI, - RS6000_BTI_unsigned_long_long }, - { P9V_BUILTIN_VEC_STXVL, P9V_BUILTIN_STXVL, - RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, ~RS6000_BTI_UINTSI, - RS6000_BTI_unsigned_long_long }, - - { P9V_BUILTIN_VEC_STXVL, P9V_BUILTIN_STXVL, - RS6000_BTI_void, RS6000_BTI_V1TI, ~RS6000_BTI_INTTI, - RS6000_BTI_unsigned_long_long }, - { P9V_BUILTIN_VEC_STXVL, P9V_BUILTIN_STXVL, - RS6000_BTI_void, RS6000_BTI_unsigned_V1TI, ~RS6000_BTI_UINTTI, - RS6000_BTI_unsigned_long_long }, - - { P9V_BUILTIN_VEC_STXVL, P9V_BUILTIN_STXVL, - RS6000_BTI_void, RS6000_BTI_V2DI, ~RS6000_BTI_long_long, - RS6000_BTI_unsigned_long_long }, - { P9V_BUILTIN_VEC_STXVL, P9V_BUILTIN_STXVL, - RS6000_BTI_void, RS6000_BTI_unsigned_V2DI, ~RS6000_BTI_unsigned_long_long, - RS6000_BTI_unsigned_long_long }, - - { P9V_BUILTIN_VEC_STXVL, P9V_BUILTIN_STXVL, - RS6000_BTI_void, RS6000_BTI_V8HI, ~RS6000_BTI_INTHI, - RS6000_BTI_unsigned_long_long }, - { P9V_BUILTIN_VEC_STXVL, P9V_BUILTIN_STXVL, - RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, ~RS6000_BTI_UINTHI, - RS6000_BTI_unsigned_long_long }, - - { P9V_BUILTIN_VEC_STXVL, P9V_BUILTIN_STXVL, - RS6000_BTI_void, RS6000_BTI_V2DF, ~RS6000_BTI_double, - RS6000_BTI_unsigned_long_long }, - { P9V_BUILTIN_VEC_STXVL, P9V_BUILTIN_STXVL, - RS6000_BTI_void, RS6000_BTI_V4SF, ~RS6000_BTI_float, - RS6000_BTI_unsigned_long_long }, - /* At an appropriate future time, add support for the - RS6000_BTI_Float16 (exact name to be determined) type here. */ - - { ALTIVEC_BUILTIN_VEC_CMPNE, P9V_BUILTIN_CMPNEB, - RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, - RS6000_BTI_bool_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_CMPNE, P9V_BUILTIN_CMPNEB, - RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, - RS6000_BTI_V16QI, 0 }, - { ALTIVEC_BUILTIN_VEC_CMPNE, P9V_BUILTIN_CMPNEB, - RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, - RS6000_BTI_unsigned_V16QI, 0 }, - - { ALTIVEC_BUILTIN_VEC_CMPNE, P9V_BUILTIN_CMPNEH, - RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, - RS6000_BTI_bool_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_CMPNE, P9V_BUILTIN_CMPNEH, - RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, - RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_CMPNE, P9V_BUILTIN_CMPNEH, - RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, - RS6000_BTI_unsigned_V8HI, 0 }, - - { ALTIVEC_BUILTIN_VEC_CMPNE, P9V_BUILTIN_CMPNEW, - RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, - RS6000_BTI_bool_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_CMPNE, P9V_BUILTIN_CMPNEW, - RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, - RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_CMPNE, P9V_BUILTIN_CMPNEW, - RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, - RS6000_BTI_unsigned_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_CMPNE, P10V_BUILTIN_CMPNET, - RS6000_BTI_bool_V1TI, RS6000_BTI_V1TI, - RS6000_BTI_V1TI, 0 }, - { ALTIVEC_BUILTIN_VEC_CMPNE, P10V_BUILTIN_CMPNET, - RS6000_BTI_bool_V1TI, RS6000_BTI_unsigned_V1TI, - RS6000_BTI_unsigned_V1TI, 0 }, - - /* The following 2 entries have been deprecated. */ - { P9V_BUILTIN_VEC_VCMPNE_P, P9V_BUILTIN_VCMPNEB_P, - RS6000_BTI_INTSI, RS6000_BTI_bool_V16QI, - RS6000_BTI_unsigned_V16QI, 0 }, - { P9V_BUILTIN_VEC_VCMPNE_P, P9V_BUILTIN_VCMPNEB_P, - RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI, - RS6000_BTI_bool_V16QI, 0 }, - { P9V_BUILTIN_VEC_VCMPNE_P, P9V_BUILTIN_VCMPNEB_P, - RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI, - RS6000_BTI_unsigned_V16QI, 0 }, - - /* The following 2 entries have been deprecated. */ - { P9V_BUILTIN_VEC_VCMPNE_P, P9V_BUILTIN_VCMPNEB_P, - RS6000_BTI_INTSI, RS6000_BTI_bool_V16QI, - RS6000_BTI_V16QI, 0 }, - { P9V_BUILTIN_VEC_VCMPNE_P, P9V_BUILTIN_VCMPNEB_P, - RS6000_BTI_INTSI, RS6000_BTI_V16QI, - RS6000_BTI_bool_V16QI, 0 }, - { P9V_BUILTIN_VEC_VCMPNE_P, P9V_BUILTIN_VCMPNEB_P, - RS6000_BTI_INTSI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, - { P9V_BUILTIN_VEC_VCMPNE_P, P9V_BUILTIN_VCMPNEB_P, - RS6000_BTI_INTSI, RS6000_BTI_bool_V16QI, - RS6000_BTI_bool_V16QI, 0 }, - - /* The following 2 entries have been deprecated. */ - { P9V_BUILTIN_VEC_VCMPNE_P, P9V_BUILTIN_VCMPNEH_P, - RS6000_BTI_INTSI, RS6000_BTI_bool_V8HI, - RS6000_BTI_unsigned_V8HI, 0 }, - { P9V_BUILTIN_VEC_VCMPNE_P, P9V_BUILTIN_VCMPNEH_P, - RS6000_BTI_INTSI, RS6000_BTI_unsigned_V8HI, - RS6000_BTI_bool_V8HI, 0 }, - { P9V_BUILTIN_VEC_VCMPNE_P, P9V_BUILTIN_VCMPNEH_P, - RS6000_BTI_INTSI, RS6000_BTI_unsigned_V8HI, - RS6000_BTI_unsigned_V8HI, 0 }, - { P9V_BUILTIN_VEC_VCMPNE_P, P9V_BUILTIN_VCMPNEH_P, - RS6000_BTI_INTSI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, - - /* The following 2 entries have been deprecated. */ - { P9V_BUILTIN_VEC_VCMPNE_P, P9V_BUILTIN_VCMPNEH_P, - RS6000_BTI_INTSI, RS6000_BTI_bool_V8HI, - RS6000_BTI_V8HI, 0 }, - { P9V_BUILTIN_VEC_VCMPNE_P, P9V_BUILTIN_VCMPNEH_P, - RS6000_BTI_INTSI, RS6000_BTI_V8HI, - RS6000_BTI_bool_V8HI, 0 }, - { P9V_BUILTIN_VEC_VCMPNE_P, P9V_BUILTIN_VCMPNEH_P, - RS6000_BTI_INTSI, RS6000_BTI_bool_V8HI, - RS6000_BTI_bool_V8HI, 0 }, - { P9V_BUILTIN_VEC_VCMPNE_P, P9V_BUILTIN_VCMPNEH_P, - RS6000_BTI_INTSI, RS6000_BTI_pixel_V8HI, - RS6000_BTI_pixel_V8HI, 0 }, - - /* The following 2 entries have been deprecated. */ - { P9V_BUILTIN_VEC_VCMPNE_P, P9V_BUILTIN_VCMPNEW_P, - RS6000_BTI_INTSI, RS6000_BTI_bool_V4SI, - RS6000_BTI_unsigned_V4SI, 0 }, - { P9V_BUILTIN_VEC_VCMPNE_P, P9V_BUILTIN_VCMPNEW_P, - RS6000_BTI_INTSI, RS6000_BTI_unsigned_V4SI, - RS6000_BTI_bool_V4SI, 0 }, - { P9V_BUILTIN_VEC_VCMPNE_P, P9V_BUILTIN_VCMPNEW_P, - RS6000_BTI_INTSI, RS6000_BTI_unsigned_V4SI, - RS6000_BTI_unsigned_V4SI, 0 }, - - /* The following 2 entries have been deprecated. */ - { P9V_BUILTIN_VEC_VCMPNE_P, P9V_BUILTIN_VCMPNEW_P, - RS6000_BTI_INTSI, RS6000_BTI_bool_V4SI, - RS6000_BTI_V4SI, 0 }, - { P9V_BUILTIN_VEC_VCMPNE_P, P9V_BUILTIN_VCMPNEW_P, - RS6000_BTI_INTSI, RS6000_BTI_V4SI, - RS6000_BTI_bool_V4SI, 0 }, - { P9V_BUILTIN_VEC_VCMPNE_P, P9V_BUILTIN_VCMPNEW_P, - RS6000_BTI_INTSI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, - { P9V_BUILTIN_VEC_VCMPNE_P, P9V_BUILTIN_VCMPNEW_P, - RS6000_BTI_INTSI, RS6000_BTI_bool_V4SI, - RS6000_BTI_bool_V4SI, 0 }, - - /* The following 2 entries have been deprecated. */ - { P9V_BUILTIN_VEC_VCMPNE_P, P9V_BUILTIN_VCMPNED_P, - RS6000_BTI_INTSI, RS6000_BTI_bool_V2DI, - RS6000_BTI_unsigned_V2DI, 0 }, - { P9V_BUILTIN_VEC_VCMPNE_P, P9V_BUILTIN_VCMPNED_P, - RS6000_BTI_INTSI, RS6000_BTI_unsigned_V2DI, - RS6000_BTI_bool_V2DI, 0 }, - { P9V_BUILTIN_VEC_VCMPNE_P, P9V_BUILTIN_VCMPNED_P, - RS6000_BTI_INTSI, RS6000_BTI_unsigned_V2DI, - RS6000_BTI_unsigned_V2DI, 0 - }, - - /* The following 2 entries have been deprecated. */ - { P9V_BUILTIN_VEC_VCMPNE_P, P9V_BUILTIN_VCMPNED_P, - RS6000_BTI_INTSI, RS6000_BTI_bool_V2DI, - RS6000_BTI_V2DI, 0 }, - { P9V_BUILTIN_VEC_VCMPNE_P, P9V_BUILTIN_VCMPNED_P, - RS6000_BTI_INTSI, RS6000_BTI_V2DI, - RS6000_BTI_bool_V2DI, 0 }, - { P9V_BUILTIN_VEC_VCMPNE_P, P9V_BUILTIN_VCMPNED_P, - RS6000_BTI_INTSI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, - { P9V_BUILTIN_VEC_VCMPNE_P, P9V_BUILTIN_VCMPNED_P, - RS6000_BTI_INTSI, RS6000_BTI_bool_V2DI, - RS6000_BTI_bool_V2DI, 0 }, - { P9V_BUILTIN_VEC_VCMPNE_P, P10V_BUILTIN_VCMPNET_P, - RS6000_BTI_INTSI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, 0 }, - { P9V_BUILTIN_VEC_VCMPNE_P, P10V_BUILTIN_VCMPNET_P, - RS6000_BTI_INTSI, RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, 0 }, - - { P9V_BUILTIN_VEC_VCMPNE_P, P9V_BUILTIN_VCMPNEFP_P, - RS6000_BTI_INTSI, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, - { P9V_BUILTIN_VEC_VCMPNE_P, P9V_BUILTIN_VCMPNEDP_P, - RS6000_BTI_INTSI, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 }, - - /* The following 2 entries have been deprecated. */ - { P9V_BUILTIN_VEC_VCMPAE_P, P9V_BUILTIN_VCMPAEB_P, - RS6000_BTI_INTSI, RS6000_BTI_bool_V16QI, - RS6000_BTI_unsigned_V16QI, 0 }, - { P9V_BUILTIN_VEC_VCMPAE_P, P9V_BUILTIN_VCMPAEB_P, - RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI, - RS6000_BTI_bool_V16QI, 0 }, - { P9V_BUILTIN_VEC_VCMPAE_P, P9V_BUILTIN_VCMPAEB_P, - RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI, - RS6000_BTI_unsigned_V16QI, 0 }, - - /* The following 2 entries have been deprecated. */ - { P9V_BUILTIN_VEC_VCMPAE_P, P9V_BUILTIN_VCMPAEB_P, - RS6000_BTI_INTSI, RS6000_BTI_bool_V16QI, - RS6000_BTI_V16QI, 0 }, - { P9V_BUILTIN_VEC_VCMPAE_P, P9V_BUILTIN_VCMPAEB_P, - RS6000_BTI_INTSI, RS6000_BTI_V16QI, - RS6000_BTI_bool_V16QI, 0 }, - { P9V_BUILTIN_VEC_VCMPAE_P, P9V_BUILTIN_VCMPAEB_P, - RS6000_BTI_INTSI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, - { P9V_BUILTIN_VEC_VCMPAE_P, P9V_BUILTIN_VCMPAEB_P, - RS6000_BTI_INTSI, RS6000_BTI_bool_V16QI, - RS6000_BTI_bool_V16QI, 0 }, - - /* The following 2 entries have been deprecated. */ - { P9V_BUILTIN_VEC_VCMPAE_P, P9V_BUILTIN_VCMPAEH_P, - RS6000_BTI_INTSI, RS6000_BTI_bool_V8HI, - RS6000_BTI_unsigned_V8HI, 0 }, - { P9V_BUILTIN_VEC_VCMPAE_P, P9V_BUILTIN_VCMPAEH_P, - RS6000_BTI_INTSI, RS6000_BTI_unsigned_V8HI, - RS6000_BTI_bool_V8HI, 0 }, - { P9V_BUILTIN_VEC_VCMPAE_P, P9V_BUILTIN_VCMPAEH_P, - RS6000_BTI_INTSI, RS6000_BTI_unsigned_V8HI, - RS6000_BTI_unsigned_V8HI, 0 }, - { P9V_BUILTIN_VEC_VCMPAE_P, P9V_BUILTIN_VCMPAEH_P, - RS6000_BTI_INTSI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, - - /* The following 2 entries have been deprecated. */ - { P9V_BUILTIN_VEC_VCMPAE_P, P9V_BUILTIN_VCMPAEH_P, - RS6000_BTI_INTSI, RS6000_BTI_bool_V8HI, - RS6000_BTI_V8HI, 0 }, - { P9V_BUILTIN_VEC_VCMPAE_P, P9V_BUILTIN_VCMPAEH_P, - RS6000_BTI_INTSI, RS6000_BTI_V8HI, - RS6000_BTI_bool_V8HI, 0 }, - { P9V_BUILTIN_VEC_VCMPAE_P, P9V_BUILTIN_VCMPAEH_P, - RS6000_BTI_INTSI, RS6000_BTI_bool_V8HI, - RS6000_BTI_bool_V8HI, 0 }, - { P9V_BUILTIN_VEC_VCMPAE_P, P9V_BUILTIN_VCMPAEH_P, - RS6000_BTI_INTSI, RS6000_BTI_pixel_V8HI, - RS6000_BTI_pixel_V8HI, 0 }, - - /* The following 2 entries have been deprecated. */ - { P9V_BUILTIN_VEC_VCMPAE_P, P9V_BUILTIN_VCMPAEW_P, - RS6000_BTI_INTSI, RS6000_BTI_bool_V4SI, - RS6000_BTI_unsigned_V4SI, 0 }, - { P9V_BUILTIN_VEC_VCMPAE_P, P9V_BUILTIN_VCMPAEW_P, - RS6000_BTI_INTSI, RS6000_BTI_unsigned_V4SI, - RS6000_BTI_bool_V4SI, 0 }, - { P9V_BUILTIN_VEC_VCMPAE_P, P9V_BUILTIN_VCMPAEW_P, - RS6000_BTI_INTSI, RS6000_BTI_unsigned_V4SI, - RS6000_BTI_unsigned_V4SI, 0 }, - - /* The following 2 entries have been deprecated. */ - { P9V_BUILTIN_VEC_VCMPAE_P, P9V_BUILTIN_VCMPAEW_P, - RS6000_BTI_INTSI, RS6000_BTI_bool_V4SI, - RS6000_BTI_V4SI, 0 }, - { P9V_BUILTIN_VEC_VCMPAE_P, P9V_BUILTIN_VCMPAEW_P, - RS6000_BTI_INTSI, RS6000_BTI_V4SI, - RS6000_BTI_bool_V4SI, 0 }, - { P9V_BUILTIN_VEC_VCMPAE_P, P9V_BUILTIN_VCMPAEW_P, - RS6000_BTI_INTSI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, - { P9V_BUILTIN_VEC_VCMPAE_P, P9V_BUILTIN_VCMPAEW_P, - RS6000_BTI_INTSI, RS6000_BTI_bool_V4SI, - RS6000_BTI_bool_V4SI, 0 }, - - /* The following 2 entries have been deprecated. */ - { P9V_BUILTIN_VEC_VCMPAE_P, P9V_BUILTIN_VCMPAED_P, - RS6000_BTI_INTSI, RS6000_BTI_bool_V2DI, - RS6000_BTI_unsigned_V2DI, 0 }, - { P9V_BUILTIN_VEC_VCMPAE_P, P9V_BUILTIN_VCMPAED_P, - RS6000_BTI_INTSI, RS6000_BTI_unsigned_V2DI, - RS6000_BTI_bool_V2DI, 0 }, - { P9V_BUILTIN_VEC_VCMPAE_P, P9V_BUILTIN_VCMPAED_P, - RS6000_BTI_INTSI, RS6000_BTI_unsigned_V2DI, - RS6000_BTI_unsigned_V2DI, 0 - }, - - /* The following 2 entries have been deprecated. */ - { P9V_BUILTIN_VEC_VCMPAE_P, P9V_BUILTIN_VCMPAED_P, - RS6000_BTI_INTSI, RS6000_BTI_bool_V2DI, - RS6000_BTI_V2DI, 0 }, - { P9V_BUILTIN_VEC_VCMPAE_P, P9V_BUILTIN_VCMPAED_P, - RS6000_BTI_INTSI, RS6000_BTI_V2DI, - RS6000_BTI_bool_V2DI, 0 }, - { P9V_BUILTIN_VEC_VCMPAE_P, P9V_BUILTIN_VCMPAED_P, - RS6000_BTI_INTSI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, - { P9V_BUILTIN_VEC_VCMPAE_P, P9V_BUILTIN_VCMPAED_P, - RS6000_BTI_INTSI, RS6000_BTI_bool_V2DI, - RS6000_BTI_bool_V2DI, 0 }, - { P9V_BUILTIN_VEC_VCMPAE_P, P10V_BUILTIN_VCMPAET_P, - RS6000_BTI_INTSI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, 0 }, - { P9V_BUILTIN_VEC_VCMPAE_P, P10V_BUILTIN_VCMPAET_P, - RS6000_BTI_INTSI, RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, 0 }, - { P9V_BUILTIN_VEC_VCMPAE_P, P9V_BUILTIN_VCMPAEFP_P, - RS6000_BTI_INTSI, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, - { P9V_BUILTIN_VEC_VCMPAE_P, P9V_BUILTIN_VCMPAEDP_P, - RS6000_BTI_INTSI, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 }, - - { P9V_BUILTIN_VEC_VCMPNEZ_P, P9V_BUILTIN_VCMPNEZB_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI, - RS6000_BTI_unsigned_V16QI }, - { P9V_BUILTIN_VEC_VCMPNEZ_P, P9V_BUILTIN_VCMPNEZB_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V16QI, RS6000_BTI_V16QI }, - - { P9V_BUILTIN_VEC_VCMPNEZ_P, P9V_BUILTIN_VCMPNEZH_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V8HI, - RS6000_BTI_unsigned_V8HI }, - { P9V_BUILTIN_VEC_VCMPNEZ_P, P9V_BUILTIN_VCMPNEZH_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V8HI, RS6000_BTI_V8HI }, - - { P9V_BUILTIN_VEC_VCMPNEZ_P, P9V_BUILTIN_VCMPNEZW_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V4SI, - RS6000_BTI_unsigned_V4SI }, - { P9V_BUILTIN_VEC_VCMPNEZ_P, P9V_BUILTIN_VCMPNEZW_P, - RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V4SI, RS6000_BTI_V4SI }, - - { P9V_BUILTIN_VEC_CMPNEZ, P9V_BUILTIN_CMPNEZB, - RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, - RS6000_BTI_V16QI, 0 }, - { P9V_BUILTIN_VEC_CMPNEZ, P9V_BUILTIN_CMPNEZB, - RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, - RS6000_BTI_unsigned_V16QI, 0 }, - - { P9V_BUILTIN_VEC_CMPNEZ, P9V_BUILTIN_CMPNEZH, - RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, - RS6000_BTI_V8HI, 0 }, - { P9V_BUILTIN_VEC_CMPNEZ, P9V_BUILTIN_CMPNEZH, - RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, - RS6000_BTI_unsigned_V8HI, 0 }, - - { P9V_BUILTIN_VEC_CMPNEZ, P9V_BUILTIN_CMPNEZW, - RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, - RS6000_BTI_V4SI, 0 }, - { P9V_BUILTIN_VEC_CMPNEZ, P9V_BUILTIN_CMPNEZW, - RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, - RS6000_BTI_unsigned_V4SI, 0 }, - - { P9V_BUILTIN_VEC_VCLZLSBB, P9V_BUILTIN_VCLZLSBB_V16QI, - RS6000_BTI_INTSI, RS6000_BTI_V16QI, 0, 0 }, - { P9V_BUILTIN_VEC_VCLZLSBB, P9V_BUILTIN_VCLZLSBB_V16QI, - RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI, 0, 0 }, - - { P9V_BUILTIN_VEC_VCTZLSBB, P9V_BUILTIN_VCTZLSBB_V16QI, - RS6000_BTI_INTSI, RS6000_BTI_V16QI, 0, 0 }, - { P9V_BUILTIN_VEC_VCTZLSBB, P9V_BUILTIN_VCTZLSBB_V16QI, - RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI, 0, 0 }, - { P9V_BUILTIN_VEC_VCTZLSBB, P9V_BUILTIN_VCTZLSBB_V8HI, - RS6000_BTI_INTSI, RS6000_BTI_V8HI, 0, 0 }, - { P9V_BUILTIN_VEC_VCTZLSBB, P9V_BUILTIN_VCTZLSBB_V4SI, - RS6000_BTI_INTSI, RS6000_BTI_V4SI, 0, 0 }, - - { P9V_BUILTIN_VEC_EXTRACT4B, P9V_BUILTIN_EXTRACT4B, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, 0 }, - - { P9V_BUILTIN_VEC_VEXTRACT_FP_FROM_SHORTH, P9V_BUILTIN_VEXTRACT_FP_FROM_SHORTH, - RS6000_BTI_V4SF, RS6000_BTI_unsigned_V8HI, 0, 0 }, - { P9V_BUILTIN_VEC_VEXTRACT_FP_FROM_SHORTL, P9V_BUILTIN_VEXTRACT_FP_FROM_SHORTL, - RS6000_BTI_V4SF, RS6000_BTI_unsigned_V8HI, 0, 0 }, - - { P9V_BUILTIN_VEC_VEXTULX, P9V_BUILTIN_VEXTUBLX, - RS6000_BTI_INTQI, RS6000_BTI_UINTSI, - RS6000_BTI_V16QI, 0 }, - { P9V_BUILTIN_VEC_VEXTULX, P9V_BUILTIN_VEXTUBLX, - RS6000_BTI_UINTQI, RS6000_BTI_UINTSI, - RS6000_BTI_unsigned_V16QI, 0 }, - - { P9V_BUILTIN_VEC_VEXTULX, P9V_BUILTIN_VEXTUHLX, - RS6000_BTI_INTHI, RS6000_BTI_UINTSI, - RS6000_BTI_V8HI, 0 }, - { P9V_BUILTIN_VEC_VEXTULX, P9V_BUILTIN_VEXTUHLX, - RS6000_BTI_UINTHI, RS6000_BTI_UINTSI, - RS6000_BTI_unsigned_V8HI, 0 }, - - { P9V_BUILTIN_VEC_VEXTULX, P9V_BUILTIN_VEXTUWLX, - RS6000_BTI_INTSI, RS6000_BTI_UINTSI, - RS6000_BTI_V4SI, 0 }, - { P9V_BUILTIN_VEC_VEXTULX, P9V_BUILTIN_VEXTUWLX, - RS6000_BTI_UINTSI, RS6000_BTI_UINTSI, - RS6000_BTI_unsigned_V4SI, 0 }, - { P9V_BUILTIN_VEC_VEXTULX, P9V_BUILTIN_VEXTUWLX, - RS6000_BTI_float, RS6000_BTI_UINTSI, - RS6000_BTI_V4SF, 0 }, - - { P9V_BUILTIN_VEC_VEXTURX, P9V_BUILTIN_VEXTUBRX, - RS6000_BTI_INTQI, RS6000_BTI_UINTSI, - RS6000_BTI_V16QI, 0 }, - { P9V_BUILTIN_VEC_VEXTURX, P9V_BUILTIN_VEXTUBRX, - RS6000_BTI_UINTQI, RS6000_BTI_UINTSI, - RS6000_BTI_unsigned_V16QI, 0 }, - - { P9V_BUILTIN_VEC_VEXTURX, P9V_BUILTIN_VEXTUHRX, - RS6000_BTI_INTHI, RS6000_BTI_UINTSI, - RS6000_BTI_V8HI, 0 }, - { P9V_BUILTIN_VEC_VEXTURX, P9V_BUILTIN_VEXTUHRX, - RS6000_BTI_UINTHI, RS6000_BTI_UINTSI, - RS6000_BTI_unsigned_V8HI, 0 }, - - { P9V_BUILTIN_VEC_VEXTURX, P9V_BUILTIN_VEXTUWRX, - RS6000_BTI_INTSI, RS6000_BTI_UINTSI, - RS6000_BTI_V4SI, 0 }, - { P9V_BUILTIN_VEC_VEXTURX, P9V_BUILTIN_VEXTUWRX, - RS6000_BTI_UINTSI, RS6000_BTI_UINTSI, - RS6000_BTI_unsigned_V4SI, 0 }, - { P9V_BUILTIN_VEC_VEXTURX, P9V_BUILTIN_VEXTUWRX, - RS6000_BTI_float, RS6000_BTI_UINTSI, - RS6000_BTI_V4SF, 0 }, - - { P8V_BUILTIN_VEC_VGBBD, P8V_BUILTIN_VGBBD, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0, 0 }, - { P8V_BUILTIN_VEC_VGBBD, P8V_BUILTIN_VGBBD, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0, 0 }, - - { P9V_BUILTIN_VEC_INSERT4B, P9V_BUILTIN_INSERT4B, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_V4SI, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI }, - { P9V_BUILTIN_VEC_INSERT4B, P9V_BUILTIN_INSERT4B, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V4SI, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI }, - - { P8V_BUILTIN_VEC_VADDECUQ, P8V_BUILTIN_VADDECUQ, - RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI }, - { P8V_BUILTIN_VEC_VADDECUQ, P8V_BUILTIN_VADDECUQ, - RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, - RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI }, - - { P8V_BUILTIN_VEC_VADDEUQM, P8V_BUILTIN_VADDEUQM, - RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI }, - { P8V_BUILTIN_VEC_VADDEUQM, P8V_BUILTIN_VADDEUQM, - RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, - RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI }, - - { P8V_BUILTIN_VEC_VSUBECUQ, P8V_BUILTIN_VSUBECUQ, - RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI }, - { P8V_BUILTIN_VEC_VSUBECUQ, P8V_BUILTIN_VSUBECUQ, - RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, - RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI }, - - { P8V_BUILTIN_VEC_VSUBEUQM, P8V_BUILTIN_VSUBEUQM, - RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI }, - { P8V_BUILTIN_VEC_VSUBEUQM, P8V_BUILTIN_VSUBEUQM, - RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, - RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI }, - - { P8V_BUILTIN_VEC_VMINSD, P8V_BUILTIN_VMINSD, - RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, 0 }, - { P8V_BUILTIN_VEC_VMINSD, P8V_BUILTIN_VMINSD, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, 0 }, - { P8V_BUILTIN_VEC_VMINSD, P8V_BUILTIN_VMINSD, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, - - { P8V_BUILTIN_VEC_VMAXSD, P8V_BUILTIN_VMAXSD, - RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, 0 }, - { P8V_BUILTIN_VEC_VMAXSD, P8V_BUILTIN_VMAXSD, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, 0 }, - { P8V_BUILTIN_VEC_VMAXSD, P8V_BUILTIN_VMAXSD, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, - - { P8V_BUILTIN_VEC_VMINUD, P8V_BUILTIN_VMINUD, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, - RS6000_BTI_unsigned_V2DI, 0 }, - { P8V_BUILTIN_VEC_VMINUD, P8V_BUILTIN_VMINUD, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, - RS6000_BTI_bool_V2DI, 0 }, - { P8V_BUILTIN_VEC_VMINUD, P8V_BUILTIN_VMINUD, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, - RS6000_BTI_unsigned_V2DI, 0 }, - - { P8V_BUILTIN_VEC_VMAXUD, P8V_BUILTIN_VMAXUD, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, - RS6000_BTI_unsigned_V2DI, 0 }, - { P8V_BUILTIN_VEC_VMAXUD, P8V_BUILTIN_VMAXUD, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, - RS6000_BTI_bool_V2DI, 0 }, - { P8V_BUILTIN_VEC_VMAXUD, P8V_BUILTIN_VMAXUD, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, - RS6000_BTI_unsigned_V2DI, 0 }, - - { P8V_BUILTIN_VEC_VMRGEW, P8V_BUILTIN_VMRGEW_V2DI, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, - { P8V_BUILTIN_VEC_VMRGEW, P8V_BUILTIN_VMRGEW_V2DI, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, - RS6000_BTI_unsigned_V2DI, 0 }, - { P8V_BUILTIN_VEC_VMRGEW, P8V_BUILTIN_VMRGEW_V2DI, - RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, 0 }, - { P8V_BUILTIN_VEC_VMRGEW, P8V_BUILTIN_VMRGEW_V4SF, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, - { P8V_BUILTIN_VEC_VMRGEW, P8V_BUILTIN_VMRGEW_V2DF, - RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 }, - { P8V_BUILTIN_VEC_VMRGEW, P8V_BUILTIN_VMRGEW_V4SI, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, - { P8V_BUILTIN_VEC_VMRGEW, P8V_BUILTIN_VMRGEW_V4SI, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, - RS6000_BTI_unsigned_V4SI, 0 }, - { P8V_BUILTIN_VEC_VMRGEW, P8V_BUILTIN_VMRGEW_V4SI, - RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, 0 }, - - { P8V_BUILTIN_VEC_VMRGOW, P8V_BUILTIN_VMRGOW_V4SI, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, - { P8V_BUILTIN_VEC_VMRGOW, P8V_BUILTIN_VMRGOW_V4SI, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, - RS6000_BTI_unsigned_V4SI, 0 }, - { P8V_BUILTIN_VEC_VMRGOW, P8V_BUILTIN_VMRGOW_V4SI, - RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, 0 }, - { P8V_BUILTIN_VEC_VMRGOW, P8V_BUILTIN_VMRGOW_V2DI, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, - { P8V_BUILTIN_VEC_VMRGOW, P8V_BUILTIN_VMRGOW_V2DI, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, - RS6000_BTI_unsigned_V2DI, 0 }, - { P8V_BUILTIN_VEC_VMRGOW, P8V_BUILTIN_VMRGOW_V2DI, - RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, 0 }, - { P8V_BUILTIN_VEC_VMRGOW, P8V_BUILTIN_VMRGOW_V2DF, - RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 }, - { P8V_BUILTIN_VEC_VMRGOW, P8V_BUILTIN_VMRGOW_V4SF, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, - - { P8V_BUILTIN_VEC_VPMSUM, P8V_BUILTIN_VPMSUMB, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V16QI, - RS6000_BTI_unsigned_V16QI, 0 }, - { P8V_BUILTIN_VEC_VPMSUM, P8V_BUILTIN_VPMSUMH, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V8HI, - RS6000_BTI_unsigned_V8HI, 0 }, - { P8V_BUILTIN_VEC_VPMSUM, P8V_BUILTIN_VPMSUMW, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V4SI, - RS6000_BTI_unsigned_V4SI, 0 }, - { P8V_BUILTIN_VEC_VPMSUM, P8V_BUILTIN_VPMSUMD, - RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V2DI, - RS6000_BTI_unsigned_V2DI, 0 }, - - { P8V_BUILTIN_VEC_VPOPCNT, P8V_BUILTIN_VPOPCNTB, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0, 0 }, - { P8V_BUILTIN_VEC_VPOPCNT, P8V_BUILTIN_VPOPCNTB, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0, 0 }, - { P8V_BUILTIN_VEC_VPOPCNT, P8V_BUILTIN_VPOPCNTH, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0, 0 }, - { P8V_BUILTIN_VEC_VPOPCNT, P8V_BUILTIN_VPOPCNTH, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0, 0 }, - { P8V_BUILTIN_VEC_VPOPCNT, P8V_BUILTIN_VPOPCNTW, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0, 0 }, - { P8V_BUILTIN_VEC_VPOPCNT, P8V_BUILTIN_VPOPCNTW, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0, 0 }, - { P8V_BUILTIN_VEC_VPOPCNT, P8V_BUILTIN_VPOPCNTD, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0, 0 }, - { P8V_BUILTIN_VEC_VPOPCNT, P8V_BUILTIN_VPOPCNTD, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0, 0 }, - - { P8V_BUILTIN_VEC_VPOPCNTB, P8V_BUILTIN_VPOPCNTB, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0, 0 }, - { P8V_BUILTIN_VEC_VPOPCNTB, P8V_BUILTIN_VPOPCNTB, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0, 0 }, - - { P8V_BUILTIN_VEC_VPOPCNTU, P8V_BUILTIN_VPOPCNTUB, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_V16QI, 0, 0 }, - { P8V_BUILTIN_VEC_VPOPCNTU, P8V_BUILTIN_VPOPCNTUB, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0, 0 }, - - { P8V_BUILTIN_VEC_VPOPCNTU, P8V_BUILTIN_VPOPCNTUH, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_V8HI, 0, 0 }, - { P8V_BUILTIN_VEC_VPOPCNTU, P8V_BUILTIN_VPOPCNTUH, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0, 0 }, - - { P8V_BUILTIN_VEC_VPOPCNTU, P8V_BUILTIN_VPOPCNTUW, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_V4SI, 0, 0 }, - { P8V_BUILTIN_VEC_VPOPCNTU, P8V_BUILTIN_VPOPCNTUW, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0, 0 }, - - { P8V_BUILTIN_VEC_VPOPCNTU, P8V_BUILTIN_VPOPCNTUD, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_V2DI, 0, 0 }, - { P8V_BUILTIN_VEC_VPOPCNTU, P8V_BUILTIN_VPOPCNTUD, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0, 0 }, - - { P8V_BUILTIN_VEC_VPOPCNTH, P8V_BUILTIN_VPOPCNTH, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0, 0 }, - { P8V_BUILTIN_VEC_VPOPCNTH, P8V_BUILTIN_VPOPCNTH, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0, 0 }, - - { P8V_BUILTIN_VEC_VPOPCNTW, P8V_BUILTIN_VPOPCNTW, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0, 0 }, - { P8V_BUILTIN_VEC_VPOPCNTW, P8V_BUILTIN_VPOPCNTW, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0, 0 }, - - { P8V_BUILTIN_VEC_VPOPCNTD, P8V_BUILTIN_VPOPCNTD, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0, 0 }, - { P8V_BUILTIN_VEC_VPOPCNTD, P8V_BUILTIN_VPOPCNTD, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0, 0 }, - - { P9V_BUILTIN_VEC_VPRTYB, P9V_BUILTIN_VPRTYBW, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0, 0 }, - { P9V_BUILTIN_VEC_VPRTYB, P9V_BUILTIN_VPRTYBW, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0, 0 }, - { P9V_BUILTIN_VEC_VPRTYB, P9V_BUILTIN_VPRTYBD, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0, 0 }, - { P9V_BUILTIN_VEC_VPRTYB, P9V_BUILTIN_VPRTYBD, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0, 0 }, - { P9V_BUILTIN_VEC_VPRTYB, P9V_BUILTIN_VPRTYBQ, - RS6000_BTI_V1TI, RS6000_BTI_V1TI, 0, 0 }, - { P9V_BUILTIN_VEC_VPRTYB, P9V_BUILTIN_VPRTYBQ, - RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, 0, 0 }, - { P9V_BUILTIN_VEC_VPRTYB, P9V_BUILTIN_VPRTYBQ, - RS6000_BTI_INTTI, RS6000_BTI_INTTI, 0, 0 }, - { P9V_BUILTIN_VEC_VPRTYB, P9V_BUILTIN_VPRTYBQ, - RS6000_BTI_UINTTI, RS6000_BTI_UINTTI, 0, 0 }, - - { P9V_BUILTIN_VEC_VPRTYBW, P9V_BUILTIN_VPRTYBW, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0, 0 }, - { P9V_BUILTIN_VEC_VPRTYBW, P9V_BUILTIN_VPRTYBW, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0, 0 }, - - { P9V_BUILTIN_VEC_VPRTYBD, P9V_BUILTIN_VPRTYBD, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0, 0 }, - { P9V_BUILTIN_VEC_VPRTYBD, P9V_BUILTIN_VPRTYBD, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0, 0 }, - - { P9V_BUILTIN_VEC_VPRTYBQ, P9V_BUILTIN_VPRTYBQ, - RS6000_BTI_V1TI, RS6000_BTI_V1TI, 0, 0 }, - { P9V_BUILTIN_VEC_VPRTYBQ, P9V_BUILTIN_VPRTYBQ, - RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, 0, 0 }, - { P9V_BUILTIN_VEC_VPRTYBQ, P9V_BUILTIN_VPRTYBQ, - RS6000_BTI_INTTI, RS6000_BTI_INTTI, 0, 0 }, - { P9V_BUILTIN_VEC_VPRTYBQ, P9V_BUILTIN_VPRTYBQ, - RS6000_BTI_UINTTI, RS6000_BTI_UINTTI, 0, 0 }, - - { P9V_BUILTIN_VEC_VPARITY_LSBB, P9V_BUILTIN_VPRTYBW, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_V4SI, 0, 0 }, - { P9V_BUILTIN_VEC_VPARITY_LSBB, P9V_BUILTIN_VPRTYBW, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0, 0 }, - { P9V_BUILTIN_VEC_VPARITY_LSBB, P9V_BUILTIN_VPRTYBD, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_V2DI, 0, 0 }, - { P9V_BUILTIN_VEC_VPARITY_LSBB, P9V_BUILTIN_VPRTYBD, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0, 0 }, - { P9V_BUILTIN_VEC_VPARITY_LSBB, P9V_BUILTIN_VPRTYBQ, - RS6000_BTI_unsigned_V1TI, RS6000_BTI_V1TI, 0, 0 }, - { P9V_BUILTIN_VEC_VPARITY_LSBB, P9V_BUILTIN_VPRTYBQ, - RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, 0, 0 }, - - { P9_BUILTIN_CMPRB, P9_BUILTIN_SCALAR_CMPRB, - RS6000_BTI_INTSI, RS6000_BTI_UINTQI, RS6000_BTI_UINTSI, 0 }, - { P9_BUILTIN_CMPRB2, P9_BUILTIN_SCALAR_CMPRB2, - RS6000_BTI_INTSI, RS6000_BTI_UINTQI, RS6000_BTI_UINTSI, 0 }, - { P9_BUILTIN_CMPEQB, P9_BUILTIN_SCALAR_CMPEQB, - RS6000_BTI_INTSI, RS6000_BTI_UINTQI, RS6000_BTI_UINTDI, 0 }, - - { P8V_BUILTIN_VEC_VPKUDUM, P8V_BUILTIN_VPKUDUM, - RS6000_BTI_V4SI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, - { P8V_BUILTIN_VEC_VPKUDUM, P8V_BUILTIN_VPKUDUM, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, - { P8V_BUILTIN_VEC_VPKUDUM, P8V_BUILTIN_VPKUDUM, - RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, 0 }, - - { P8V_BUILTIN_VEC_VPKSDSS, P8V_BUILTIN_VPKSDSS, - RS6000_BTI_V4SI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, - - { P8V_BUILTIN_VEC_VPKUDUS, P8V_BUILTIN_VPKUDUS, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, - - { P8V_BUILTIN_VEC_VPKSDUS, P8V_BUILTIN_VPKSDUS, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, - - { P8V_BUILTIN_VEC_VRLD, P8V_BUILTIN_VRLD, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, - { P8V_BUILTIN_VEC_VRLD, P8V_BUILTIN_VRLD, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, - - { P8V_BUILTIN_VEC_VSLD, P8V_BUILTIN_VSLD, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, - { P8V_BUILTIN_VEC_VSLD, P8V_BUILTIN_VSLD, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, - - { P8V_BUILTIN_VEC_VSRD, P8V_BUILTIN_VSRD, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, - { P8V_BUILTIN_VEC_VSRD, P8V_BUILTIN_VSRD, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, - - { P8V_BUILTIN_VEC_VSRAD, P8V_BUILTIN_VSRAD, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, - { P8V_BUILTIN_VEC_VSRAD, P8V_BUILTIN_VSRAD, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, - - { P8V_BUILTIN_VEC_VSUBCUQ, P8V_BUILTIN_VSUBCUQ, - RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, 0 }, - { P8V_BUILTIN_VEC_VSUBCUQ, P8V_BUILTIN_VSUBCUQ, - RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, - RS6000_BTI_unsigned_V1TI, 0 }, - - { P8V_BUILTIN_VEC_VSUBUDM, P8V_BUILTIN_VSUBUDM, - RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, 0 }, - { P8V_BUILTIN_VEC_VSUBUDM, P8V_BUILTIN_VSUBUDM, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, 0 }, - { P8V_BUILTIN_VEC_VSUBUDM, P8V_BUILTIN_VSUBUDM, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, - { P8V_BUILTIN_VEC_VSUBUDM, P8V_BUILTIN_VSUBUDM, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, - { P8V_BUILTIN_VEC_VSUBUDM, P8V_BUILTIN_VSUBUDM, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, 0 }, - { P8V_BUILTIN_VEC_VSUBUDM, P8V_BUILTIN_VSUBUDM, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, - - { P8V_BUILTIN_VEC_VSUBUQM, P8V_BUILTIN_VSUBUQM, - RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, 0 }, - { P8V_BUILTIN_VEC_VSUBUQM, P8V_BUILTIN_VSUBUQM, - RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, - RS6000_BTI_unsigned_V1TI, 0 }, - - { P6_OV_BUILTIN_CMPB, P6_BUILTIN_CMPB_32, - RS6000_BTI_UINTSI, RS6000_BTI_UINTSI, RS6000_BTI_UINTSI, 0 }, - { P6_OV_BUILTIN_CMPB, P6_BUILTIN_CMPB, - RS6000_BTI_UINTDI, RS6000_BTI_UINTDI, RS6000_BTI_UINTDI, 0 }, - - { P8V_BUILTIN_VEC_VUPKHSW, P8V_BUILTIN_VUPKHSW, - RS6000_BTI_V2DI, RS6000_BTI_V4SI, 0, 0 }, - { P8V_BUILTIN_VEC_VUPKHSW, P8V_BUILTIN_VUPKHSW, - RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V4SI, 0, 0 }, - - { P8V_BUILTIN_VEC_VUPKLSW, P8V_BUILTIN_VUPKLSW, - RS6000_BTI_V2DI, RS6000_BTI_V4SI, 0, 0 }, - { P8V_BUILTIN_VEC_VUPKLSW, P8V_BUILTIN_VUPKLSW, - RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V4SI, 0, 0 }, - - { P9V_BUILTIN_VEC_VSLV, P9V_BUILTIN_VSLV, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, - RS6000_BTI_unsigned_V16QI, 0 }, - { P9V_BUILTIN_VEC_VSRV, P9V_BUILTIN_VSRV, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, - RS6000_BTI_unsigned_V16QI, 0 }, - - { P8V_BUILTIN_VEC_REVB, P8V_BUILTIN_REVB_V1TI, - RS6000_BTI_V1TI, RS6000_BTI_V1TI, 0, 0 }, - { P8V_BUILTIN_VEC_REVB, P8V_BUILTIN_REVB_V1TI, - RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, 0, 0 }, - { P8V_BUILTIN_VEC_REVB, P8V_BUILTIN_REVB_V2DI, - RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, 0, 0 }, - { P8V_BUILTIN_VEC_REVB, P8V_BUILTIN_REVB_V2DI, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0, 0 }, - { P8V_BUILTIN_VEC_REVB, P8V_BUILTIN_REVB_V2DI, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0, 0 }, - { P8V_BUILTIN_VEC_REVB, P8V_BUILTIN_REVB_V4SI, - RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, 0, 0 }, - { P8V_BUILTIN_VEC_REVB, P8V_BUILTIN_REVB_V4SI, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0, 0 }, - { P8V_BUILTIN_VEC_REVB, P8V_BUILTIN_REVB_V4SI, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0, 0 }, - { P8V_BUILTIN_VEC_REVB, P8V_BUILTIN_REVB_V8HI, - RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, 0, 0 }, - { P8V_BUILTIN_VEC_REVB, P8V_BUILTIN_REVB_V8HI, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0, 0 }, - { P8V_BUILTIN_VEC_REVB, P8V_BUILTIN_REVB_V8HI, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0, 0 }, - { P8V_BUILTIN_VEC_REVB, P8V_BUILTIN_REVB_V16QI, - RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, 0, 0 }, - { P8V_BUILTIN_VEC_REVB, P8V_BUILTIN_REVB_V16QI, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0, 0 }, - { P8V_BUILTIN_VEC_REVB, P8V_BUILTIN_REVB_V16QI, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0, 0 }, - { P8V_BUILTIN_VEC_REVB, P8V_BUILTIN_REVB_V2DF, - RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0, 0 }, - { P8V_BUILTIN_VEC_REVB, P8V_BUILTIN_REVB_V4SF, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0, 0 }, - - { ALTIVEC_BUILTIN_VEC_VREVE, ALTIVEC_BUILTIN_VREVE_V2DI, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_VREVE, ALTIVEC_BUILTIN_VREVE_V4SI, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_VREVE, ALTIVEC_BUILTIN_VREVE_V8HI, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_VREVE, ALTIVEC_BUILTIN_VREVE_V16QI, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_VREVE, ALTIVEC_BUILTIN_VREVE_V2DI, - RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_VREVE, ALTIVEC_BUILTIN_VREVE_V4SI, - RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_VREVE, ALTIVEC_BUILTIN_VREVE_V8HI, - RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_VREVE, ALTIVEC_BUILTIN_VREVE_V16QI, - RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_VREVE, ALTIVEC_BUILTIN_VREVE_V2DF, - RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_VREVE, ALTIVEC_BUILTIN_VREVE_V4SF, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_VREVE, ALTIVEC_BUILTIN_VREVE_V2DI, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_VREVE, ALTIVEC_BUILTIN_VREVE_V4SI, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_VREVE, ALTIVEC_BUILTIN_VREVE_V8HI, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_VREVE, ALTIVEC_BUILTIN_VREVE_V16QI, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0, 0 }, - - { VSX_BUILTIN_VEC_VSIGNED, VSX_BUILTIN_VEC_VSIGNED_V4SF, - RS6000_BTI_V4SI, RS6000_BTI_V4SF, 0, 0 }, - { VSX_BUILTIN_VEC_VSIGNED, VSX_BUILTIN_VEC_VSIGNED_V2DF, - RS6000_BTI_V2DI, RS6000_BTI_V2DF, 0, 0 }, - { VSX_BUILTIN_VEC_VSIGNEDE, VSX_BUILTIN_VEC_VSIGNEDE_V2DF, - RS6000_BTI_V4SI, RS6000_BTI_V2DF, 0, 0 }, - { VSX_BUILTIN_VEC_VSIGNEDO, VSX_BUILTIN_VEC_VSIGNEDO_V2DF, - RS6000_BTI_V4SI, RS6000_BTI_V2DF, 0, 0 }, - { P8V_BUILTIN_VEC_VSIGNED2, P8V_BUILTIN_VEC_VSIGNED2_V2DF, - RS6000_BTI_V4SI, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 }, - - { VSX_BUILTIN_VEC_VUNSIGNED, VSX_BUILTIN_VEC_VUNSIGNED_V4SF, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_V4SF, 0, 0 }, - { VSX_BUILTIN_VEC_VUNSIGNED, VSX_BUILTIN_VEC_VUNSIGNED_V2DF, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_V2DF, 0, 0 }, - { VSX_BUILTIN_VEC_VUNSIGNEDE, VSX_BUILTIN_VEC_VUNSIGNEDE_V2DF, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_V2DF, 0, 0 }, - { VSX_BUILTIN_VEC_VUNSIGNEDO, VSX_BUILTIN_VEC_VUNSIGNEDO_V2DF, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_V2DF, 0, 0 }, - { P8V_BUILTIN_VEC_VUNSIGNED2, P8V_BUILTIN_VEC_VUNSIGNED2_V2DF, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_V2DF, - RS6000_BTI_V2DF, 0 }, - - /* Crypto builtins. */ - { CRYPTO_BUILTIN_VPERMXOR, CRYPTO_BUILTIN_VPERMXOR_V16QI, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI }, - { CRYPTO_BUILTIN_VPERMXOR, CRYPTO_BUILTIN_VPERMXOR_V8HI, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI }, - { CRYPTO_BUILTIN_VPERMXOR, CRYPTO_BUILTIN_VPERMXOR_V4SI, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI }, - { CRYPTO_BUILTIN_VPERMXOR, CRYPTO_BUILTIN_VPERMXOR_V2DI, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI }, - - { CRYPTO_BUILTIN_VPMSUM, CRYPTO_BUILTIN_VPMSUMB, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, - RS6000_BTI_unsigned_V16QI, 0 }, - { CRYPTO_BUILTIN_VPMSUM, CRYPTO_BUILTIN_VPMSUMH, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, - RS6000_BTI_unsigned_V8HI, 0 }, - { CRYPTO_BUILTIN_VPMSUM, CRYPTO_BUILTIN_VPMSUMW, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, - RS6000_BTI_unsigned_V4SI, 0 }, - { CRYPTO_BUILTIN_VPMSUM, CRYPTO_BUILTIN_VPMSUMD, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, - RS6000_BTI_unsigned_V2DI, 0 }, - - { CRYPTO_BUILTIN_VSHASIGMA, CRYPTO_BUILTIN_VSHASIGMAW, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, - RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - { CRYPTO_BUILTIN_VSHASIGMA, CRYPTO_BUILTIN_VSHASIGMAD, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, - RS6000_BTI_INTSI, RS6000_BTI_INTSI }, - - /* Sign extend builtins that work work on ISA 3.0, not added until ISA 3.1 */ - { P9V_BUILTIN_VEC_VSIGNEXTI, P9V_BUILTIN_VSIGNEXTSB2W, - RS6000_BTI_V4SI, RS6000_BTI_V16QI, 0, 0 }, - { P9V_BUILTIN_VEC_VSIGNEXTI, P9V_BUILTIN_VSIGNEXTSH2W, - RS6000_BTI_V4SI, RS6000_BTI_V8HI, 0, 0 }, - - { P9V_BUILTIN_VEC_VSIGNEXTLL, P9V_BUILTIN_VSIGNEXTSB2D, - RS6000_BTI_V2DI, RS6000_BTI_V16QI, 0, 0 }, - { P9V_BUILTIN_VEC_VSIGNEXTLL, P9V_BUILTIN_VSIGNEXTSH2D, - RS6000_BTI_V2DI, RS6000_BTI_V8HI, 0, 0 }, - { P9V_BUILTIN_VEC_VSIGNEXTLL, P9V_BUILTIN_VSIGNEXTSW2D, - RS6000_BTI_V2DI, RS6000_BTI_V4SI, 0, 0 }, - - /* Overloaded built-in functions for ISA3.1 (power10). */ - { P10_BUILTIN_VEC_CLRL, P10V_BUILTIN_VCLRLB, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_UINTSI, 0 }, - { P10_BUILTIN_VEC_CLRL, P10V_BUILTIN_VCLRLB, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, - RS6000_BTI_UINTSI, 0 }, - { P10_BUILTIN_VEC_CLRR, P10V_BUILTIN_VCLRRB, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_UINTSI, 0 }, - { P10_BUILTIN_VEC_CLRR, P10V_BUILTIN_VCLRRB, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, - RS6000_BTI_UINTSI, 0 }, - - { P10_BUILTIN_VEC_GNB, P10V_BUILTIN_VGNB, RS6000_BTI_unsigned_long_long, - RS6000_BTI_unsigned_V1TI, RS6000_BTI_UINTQI, 0 }, - { P10_BUILTIN_VEC_XXGENPCVM, P10V_BUILTIN_XXGENPCVM_V2DI, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_INTSI, 0 }, - { P10_BUILTIN_VEC_XXGENPCVM, P10V_BUILTIN_XXGENPCVM_V4SI, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, 0 }, - { P10_BUILTIN_VEC_XXGENPCVM, P10V_BUILTIN_XXGENPCVM_V8HI, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, 0 }, - { P10_BUILTIN_VEC_XXGENPCVM, P10V_BUILTIN_XXGENPCVM_V16QI, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, - RS6000_BTI_INTSI, 0 }, - - /* The overloaded XXEVAL definitions are handled specially because the - fourth unsigned char operand is not encoded in this table. */ - { P10_BUILTIN_VEC_XXEVAL, P10V_BUILTIN_XXEVAL, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI }, - { P10_BUILTIN_VEC_XXEVAL, P10V_BUILTIN_XXEVAL, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI }, - { P10_BUILTIN_VEC_XXEVAL, P10V_BUILTIN_XXEVAL, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI }, - { P10_BUILTIN_VEC_XXEVAL, P10V_BUILTIN_XXEVAL, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI }, - { P10_BUILTIN_VEC_XXEVAL, P10V_BUILTIN_XXEVAL, - RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, - RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI }, - - /* The overloaded XXPERMX definitions are handled specially because the - fourth unsigned char operand is not encoded in this table. */ - { P10_BUILTIN_VEC_XXPERMX, P10V_BUILTIN_VXXPERMX, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, - RS6000_BTI_unsigned_V16QI }, - { P10_BUILTIN_VEC_XXPERMX, P10V_BUILTIN_VXXPERMX, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI }, - { P10_BUILTIN_VEC_XXPERMX, P10V_BUILTIN_VXXPERMX, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, - RS6000_BTI_unsigned_V16QI }, - { P10_BUILTIN_VEC_XXPERMX, P10V_BUILTIN_VXXPERMX, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V16QI }, - { P10_BUILTIN_VEC_XXPERMX, P10V_BUILTIN_VXXPERMX, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, - RS6000_BTI_unsigned_V16QI }, - { P10_BUILTIN_VEC_XXPERMX, P10V_BUILTIN_VXXPERMX, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V16QI }, - { P10_BUILTIN_VEC_XXPERMX, P10V_BUILTIN_VXXPERMX, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, - RS6000_BTI_unsigned_V16QI }, - { P10_BUILTIN_VEC_XXPERMX, P10V_BUILTIN_VXXPERMX, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V16QI }, - { P10_BUILTIN_VEC_XXPERMX, P10V_BUILTIN_VXXPERMX, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, - RS6000_BTI_unsigned_V16QI }, - { P10_BUILTIN_VEC_XXPERMX, P10V_BUILTIN_VXXPERMX, - RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, - RS6000_BTI_unsigned_V16QI }, - - { P10_BUILTIN_VEC_EXTRACTL, P10V_BUILTIN_VEXTRACTBL, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V16QI, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_UINTQI }, - { P10_BUILTIN_VEC_EXTRACTL, P10V_BUILTIN_VEXTRACTHL, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V8HI, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_UINTQI }, - { P10_BUILTIN_VEC_EXTRACTL, P10V_BUILTIN_VEXTRACTWL, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V4SI, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_UINTQI }, - { P10_BUILTIN_VEC_EXTRACTL, P10V_BUILTIN_VEXTRACTDL, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_UINTQI }, - - { P10_BUILTIN_VEC_INSERTL, P10V_BUILTIN_VINSERTGPRBL, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_UINTQI, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_UINTSI }, - { P10_BUILTIN_VEC_INSERTL, P10V_BUILTIN_VINSERTGPRHL, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_UINTHI, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_UINTSI }, - { P10_BUILTIN_VEC_INSERTL, P10V_BUILTIN_VINSERTGPRWL, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_UINTSI, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_UINTSI }, - { P10_BUILTIN_VEC_INSERTL, P10V_BUILTIN_VINSERTGPRDL, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_UINTDI, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_UINTSI }, - { P10_BUILTIN_VEC_INSERTL, P10V_BUILTIN_VINSERTVPRBL, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_UINTQI }, - { P10_BUILTIN_VEC_INSERTL, P10V_BUILTIN_VINSERTVPRHL, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_UINTQI }, - { P10_BUILTIN_VEC_INSERTL, P10V_BUILTIN_VINSERTVPRWL, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_UINTQI }, - - { P10_BUILTIN_VEC_EXTRACTH, P10V_BUILTIN_VEXTRACTBR, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V16QI, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_UINTQI }, - { P10_BUILTIN_VEC_EXTRACTH, P10V_BUILTIN_VEXTRACTHR, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V8HI, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_UINTQI }, - { P10_BUILTIN_VEC_EXTRACTH, P10V_BUILTIN_VEXTRACTWR, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V4SI, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_UINTQI }, - { P10_BUILTIN_VEC_EXTRACTH, P10V_BUILTIN_VEXTRACTDR, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_UINTQI }, - - { P10_BUILTIN_VEC_INSERTH, P10V_BUILTIN_VINSERTGPRBR, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_UINTQI, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_UINTSI }, - { P10_BUILTIN_VEC_INSERTH, P10V_BUILTIN_VINSERTGPRHR, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_UINTHI, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_UINTSI }, - { P10_BUILTIN_VEC_INSERTH, P10V_BUILTIN_VINSERTGPRWR, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_UINTSI, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_UINTSI }, - { P10_BUILTIN_VEC_INSERTH, P10V_BUILTIN_VINSERTGPRDR, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_UINTDI, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_UINTSI }, - { P10_BUILTIN_VEC_INSERTH, P10V_BUILTIN_VINSERTVPRBR, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_UINTQI }, - { P10_BUILTIN_VEC_INSERTH, P10V_BUILTIN_VINSERTVPRHR, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_UINTQI }, - { P10_BUILTIN_VEC_INSERTH, P10V_BUILTIN_VINSERTVPRWR, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_UINTQI }, - - { P10_BUILTIN_VEC_REPLACE_ELT, P10V_BUILTIN_VREPLACE_ELT_UV4SI, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, - RS6000_BTI_UINTSI, RS6000_BTI_UINTQI }, - { P10_BUILTIN_VEC_REPLACE_ELT, P10V_BUILTIN_VREPLACE_ELT_V4SI, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_INTSI, RS6000_BTI_INTQI }, - { P10_BUILTIN_VEC_REPLACE_ELT, P10V_BUILTIN_VREPLACE_ELT_V4SF, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_float, RS6000_BTI_INTQI }, - { P10_BUILTIN_VEC_REPLACE_ELT, P10V_BUILTIN_VREPLACE_ELT_UV2DI, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, - RS6000_BTI_UINTDI, RS6000_BTI_UINTQI }, - { P10_BUILTIN_VEC_REPLACE_ELT, P10V_BUILTIN_VREPLACE_ELT_V2DI, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_INTDI, RS6000_BTI_INTQI }, - { P10_BUILTIN_VEC_REPLACE_ELT, P10V_BUILTIN_VREPLACE_ELT_V2DF, - RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_double, RS6000_BTI_INTQI }, - - { P10_BUILTIN_VEC_REPLACE_UN, P10V_BUILTIN_VREPLACE_UN_UV4SI, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, - RS6000_BTI_UINTSI, RS6000_BTI_UINTQI }, - { P10_BUILTIN_VEC_REPLACE_UN, P10V_BUILTIN_VREPLACE_UN_V4SI, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_INTSI, RS6000_BTI_INTQI }, - { P10_BUILTIN_VEC_REPLACE_UN, P10V_BUILTIN_VREPLACE_UN_V4SF, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_float, RS6000_BTI_INTQI }, - { P10_BUILTIN_VEC_REPLACE_UN, P10V_BUILTIN_VREPLACE_UN_UV2DI, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, - RS6000_BTI_UINTDI, RS6000_BTI_UINTQI }, - { P10_BUILTIN_VEC_REPLACE_UN, P10V_BUILTIN_VREPLACE_UN_V2DI, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_INTDI, RS6000_BTI_INTQI }, - { P10_BUILTIN_VEC_REPLACE_UN, P10V_BUILTIN_VREPLACE_UN_V2DF, - RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_double, RS6000_BTI_INTQI }, - - { P10_BUILTIN_VEC_SLDB, P10V_BUILTIN_VSLDB_V16QI, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, - RS6000_BTI_V16QI, RS6000_BTI_UINTQI }, - { P10_BUILTIN_VEC_SLDB, P10V_BUILTIN_VSLDB_V16QI, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_UINTQI }, - { P10_BUILTIN_VEC_SLDB, P10V_BUILTIN_VSLDB_V8HI, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, - RS6000_BTI_V8HI, RS6000_BTI_UINTQI }, - { P10_BUILTIN_VEC_SLDB, P10V_BUILTIN_VSLDB_V8HI, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_UINTQI }, - { P10_BUILTIN_VEC_SLDB, P10V_BUILTIN_VSLDB_V4SI, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, - RS6000_BTI_V4SI, RS6000_BTI_UINTQI }, - { P10_BUILTIN_VEC_SLDB, P10V_BUILTIN_VSLDB_V4SI, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_UINTQI }, - { P10_BUILTIN_VEC_SLDB, P10V_BUILTIN_VSLDB_V2DI, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, - RS6000_BTI_V2DI, RS6000_BTI_UINTQI }, - { P10_BUILTIN_VEC_SLDB, P10V_BUILTIN_VSLDB_V2DI, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_UINTQI }, - - { P10_BUILTIN_VEC_XXSPLTIW, P10V_BUILTIN_VXXSPLTIW_V4SI, - RS6000_BTI_V4SI, RS6000_BTI_INTSI, 0, 0 }, - { P10_BUILTIN_VEC_XXSPLTIW, P10V_BUILTIN_VXXSPLTIW_V4SF, - RS6000_BTI_V4SF, RS6000_BTI_float, 0, 0 }, - - { P10_BUILTIN_VEC_XXSPLTID, P10V_BUILTIN_VXXSPLTID, - RS6000_BTI_V2DF, RS6000_BTI_float, 0, 0 }, - - { P10_BUILTIN_VEC_XXSPLTI32DX, P10V_BUILTIN_VXXSPLTI32DX_V4SI, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_UINTQI, RS6000_BTI_INTSI }, - { P10_BUILTIN_VEC_XXSPLTI32DX, P10V_BUILTIN_VXXSPLTI32DX_V4SI, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_UINTQI, - RS6000_BTI_UINTSI }, - { P10_BUILTIN_VEC_XXSPLTI32DX, P10V_BUILTIN_VXXSPLTI32DX_V4SF, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_UINTQI, RS6000_BTI_float }, - - { P10_BUILTIN_VEC_XXBLEND, P10V_BUILTIN_VXXBLEND_V16QI, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, - RS6000_BTI_unsigned_V16QI }, - { P10_BUILTIN_VEC_XXBLEND, P10V_BUILTIN_VXXBLEND_V16QI, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI }, - { P10_BUILTIN_VEC_XXBLEND, P10V_BUILTIN_VXXBLEND_V8HI, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, - RS6000_BTI_unsigned_V8HI }, - { P10_BUILTIN_VEC_XXBLEND, P10V_BUILTIN_VXXBLEND_V8HI, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI }, - { P10_BUILTIN_VEC_XXBLEND, P10V_BUILTIN_VXXBLEND_V4SI, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, - RS6000_BTI_unsigned_V4SI }, - { P10_BUILTIN_VEC_XXBLEND, P10V_BUILTIN_VXXBLEND_V4SI, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI }, - { P10_BUILTIN_VEC_XXBLEND, P10V_BUILTIN_VXXBLEND_V2DI, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, - RS6000_BTI_unsigned_V2DI }, - { P10_BUILTIN_VEC_XXBLEND, P10V_BUILTIN_VXXBLEND_V2DI, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI }, - { P10_BUILTIN_VEC_XXBLEND, P10V_BUILTIN_VXXBLEND_V4SF, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, - RS6000_BTI_unsigned_V4SI }, - { P10_BUILTIN_VEC_XXBLEND, P10V_BUILTIN_VXXBLEND_V2DF, - RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, - RS6000_BTI_unsigned_V2DI }, - - { P10_BUILTIN_VEC_SRDB, P10V_BUILTIN_VSRDB_V16QI, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, - RS6000_BTI_V16QI, RS6000_BTI_UINTQI }, - { P10_BUILTIN_VEC_SRDB, P10V_BUILTIN_VSRDB_V16QI, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_UINTQI }, - { P10_BUILTIN_VEC_SRDB, P10V_BUILTIN_VSRDB_V8HI, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, - RS6000_BTI_V8HI, RS6000_BTI_UINTQI }, - { P10_BUILTIN_VEC_SRDB, P10V_BUILTIN_VSRDB_V8HI, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_UINTQI }, - { P10_BUILTIN_VEC_SRDB, P10V_BUILTIN_VSRDB_V4SI, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, - RS6000_BTI_V4SI, RS6000_BTI_UINTQI }, - { P10_BUILTIN_VEC_SRDB, P10V_BUILTIN_VSRDB_V4SI, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_UINTQI }, - { P10_BUILTIN_VEC_SRDB, P10V_BUILTIN_VSRDB_V2DI, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, - RS6000_BTI_V2DI, RS6000_BTI_UINTQI }, - { P10_BUILTIN_VEC_SRDB, P10V_BUILTIN_VSRDB_V2DI, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_UINTQI }, - - { P10_BUILTIN_VEC_VSTRIL, P10V_BUILTIN_VSTRIBL, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0, 0 }, - { P10_BUILTIN_VEC_VSTRIL, P10V_BUILTIN_VSTRIBL, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0, 0 }, - - { P10_BUILTIN_VEC_VSTRIL, P10V_BUILTIN_VSTRIHL, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0, 0 }, - { P10_BUILTIN_VEC_VSTRIL, P10V_BUILTIN_VSTRIHL, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0, 0 }, - - { P10_BUILTIN_VEC_VSTRIL_P, P10V_BUILTIN_VSTRIBL_P, - RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI, 0, 0 }, - { P10_BUILTIN_VEC_VSTRIL_P, P10V_BUILTIN_VSTRIBL_P, - RS6000_BTI_INTSI, RS6000_BTI_V16QI, 0, 0 }, - - { P10_BUILTIN_VEC_VSTRIL_P, P10V_BUILTIN_VSTRIHL_P, - RS6000_BTI_INTSI, RS6000_BTI_unsigned_V8HI, 0, 0 }, - { P10_BUILTIN_VEC_VSTRIL_P, P10V_BUILTIN_VSTRIHL_P, - RS6000_BTI_INTSI, RS6000_BTI_V8HI, 0, 0 }, - - { P10_BUILTIN_VEC_VSTRIR, P10V_BUILTIN_VSTRIBR, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0, 0 }, - { P10_BUILTIN_VEC_VSTRIR, P10V_BUILTIN_VSTRIBR, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0, 0 }, - - { P10_BUILTIN_VEC_VSTRIR, P10V_BUILTIN_VSTRIHR, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0, 0 }, - { P10_BUILTIN_VEC_VSTRIR, P10V_BUILTIN_VSTRIHR, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0, 0 }, - - { P10_BUILTIN_VEC_VSTRIR_P, P10V_BUILTIN_VSTRIBR_P, - RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI, 0, 0 }, - { P10_BUILTIN_VEC_VSTRIR_P, P10V_BUILTIN_VSTRIBR_P, - RS6000_BTI_INTSI, RS6000_BTI_V16QI, 0, 0 }, - - { P10_BUILTIN_VEC_VSTRIR_P, P10V_BUILTIN_VSTRIHR_P, - RS6000_BTI_INTSI, RS6000_BTI_unsigned_V8HI, 0, 0 }, - { P10_BUILTIN_VEC_VSTRIR_P, P10V_BUILTIN_VSTRIHR_P, - RS6000_BTI_INTSI, RS6000_BTI_V8HI, 0, 0 }, - - { P10_BUILTIN_VEC_MTVSRBM, P10V_BUILTIN_MTVSRBM, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_UINTDI, 0, 0 }, - { P10_BUILTIN_VEC_MTVSRHM, P10V_BUILTIN_MTVSRHM, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_UINTDI, 0, 0 }, - { P10_BUILTIN_VEC_MTVSRWM, P10V_BUILTIN_MTVSRWM, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_UINTDI, 0, 0 }, - { P10_BUILTIN_VEC_MTVSRDM, P10V_BUILTIN_MTVSRDM, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_UINTDI, 0, 0 }, - { P10_BUILTIN_VEC_MTVSRQM, P10V_BUILTIN_MTVSRQM, - RS6000_BTI_unsigned_V1TI, RS6000_BTI_UINTDI, 0, 0 }, - - { P10_BUILTIN_VEC_VCNTM, P10V_BUILTIN_VCNTMBB, - RS6000_BTI_unsigned_long_long, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_UINTQI, 0 }, - { P10_BUILTIN_VEC_VCNTM, P10V_BUILTIN_VCNTMBH, - RS6000_BTI_unsigned_long_long, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_UINTQI, 0 }, - { P10_BUILTIN_VEC_VCNTM, P10V_BUILTIN_VCNTMBW, - RS6000_BTI_unsigned_long_long, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_UINTQI, 0 }, - { P10_BUILTIN_VEC_VCNTM, P10V_BUILTIN_VCNTMBD, - RS6000_BTI_unsigned_long_long, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_UINTQI, 0 }, - - { P10_BUILTIN_VEC_VEXPANDM, P10V_BUILTIN_VEXPANDMB, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0, 0 }, - { P10_BUILTIN_VEC_VEXPANDM, P10V_BUILTIN_VEXPANDMH, - RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0, 0 }, - { P10_BUILTIN_VEC_VEXPANDM, P10V_BUILTIN_VEXPANDMW, - RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0, 0 }, - { P10_BUILTIN_VEC_VEXPANDM, P10V_BUILTIN_VEXPANDMD, - RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0, 0 }, - { P10_BUILTIN_VEC_VEXPANDM, P10V_BUILTIN_VEXPANDMQ, - RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, 0, 0 }, - - { P10_BUILTIN_VEC_VEXTRACTM, P10V_BUILTIN_VEXTRACTMB, - RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI, 0, 0 }, - { P10_BUILTIN_VEC_VEXTRACTM, P10V_BUILTIN_VEXTRACTMH, - RS6000_BTI_INTSI, RS6000_BTI_unsigned_V8HI, 0, 0 }, - { P10_BUILTIN_VEC_VEXTRACTM, P10V_BUILTIN_VEXTRACTMW, - RS6000_BTI_INTSI, RS6000_BTI_unsigned_V4SI, 0, 0 }, - { P10_BUILTIN_VEC_VEXTRACTM, P10V_BUILTIN_VEXTRACTMD, - RS6000_BTI_INTSI, RS6000_BTI_unsigned_V2DI, 0, 0 }, - { P10_BUILTIN_VEC_VEXTRACTM, P10V_BUILTIN_VEXTRACTMQ, - RS6000_BTI_INTSI, RS6000_BTI_unsigned_V1TI, 0, 0 }, - - { P10_BUILTIN_VEC_XVTLSBB_ZEROS, P10V_BUILTIN_XVTLSBB_ZEROS, - RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI, 0, 0 }, - { P10_BUILTIN_VEC_XVTLSBB_ONES, P10V_BUILTIN_XVTLSBB_ONES, - RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI, 0, 0 }, - - { P10_BUILTIN_VEC_SIGNEXT, P10V_BUILTIN_VSIGNEXTSD2Q, - RS6000_BTI_V1TI, RS6000_BTI_V2DI, 0, 0 }, - - { RS6000_BUILTIN_NONE, RS6000_BUILTIN_NONE, 0, 0, 0, 0 } -}; \f /* Nonzero if we can use a floating-point register to pass this arg. */ #define USE_FP_FOR_ARG_P(CUM,MODE) \ diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h index 3eba1c072cf..b12ee8bfe5b 100644 --- a/gcc/config/rs6000/rs6000.h +++ b/gcc/config/rs6000/rs6000.h @@ -2399,7 +2399,6 @@ struct altivec_builtin_types signed char op2; signed char op3; }; -extern const struct altivec_builtin_types altivec_overloaded_builtins[]; enum rs6000_builtin_type_index { -- 2.27.0 ^ permalink raw reply [flat|nested] 20+ messages in thread
end of thread, other threads:[~2021-12-14 18:10 UTC | newest] Thread overview: 20+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2021-12-06 20:49 [PATCH v2 0/6] Remove "old" built-in function infrastructure Bill Schmidt 2021-12-06 20:49 ` [PATCH 1/6] rs6000: Remove new_builtins_are_live and dead code it was guarding Bill Schmidt 2021-12-07 1:09 ` Segher Boessenkool 2021-12-06 20:49 ` [PATCH 2/6] rs6000: Remove altivec_overloaded_builtins array and initialization Bill Schmidt 2021-12-14 17:57 ` [PATCH v2 " Bill Schmidt 2021-12-14 18:04 ` [PATCH " David Edelsohn 2021-12-06 20:49 ` [PATCH 3/6] rs6000: Rename rs6000-builtin-new.def to rs6000-builtins.def Bill Schmidt 2021-12-14 18:00 ` [PATCH v2 " Bill Schmidt 2021-12-14 18:05 ` [PATCH " David Edelsohn 2021-12-06 20:49 ` [PATCH 4/6] rs6000: Remove rs6000-builtin.def and associated data and functions Bill Schmidt 2021-12-14 18:00 ` [PATCH v2 " Bill Schmidt 2021-12-14 18:08 ` [PATCH " David Edelsohn 2021-12-06 20:49 ` [PATCH 5/6] rs6000: Rename functions with "new" in their names Bill Schmidt 2021-12-14 18:01 ` [PATCH v2 /6] " Bill Schmidt 2021-12-14 18:08 ` [PATCH 5/6] " David Edelsohn 2021-12-06 20:49 ` [PATCH 6/6] rs6000: Rename arrays to remove temporary _x suffix Bill Schmidt 2021-12-14 18:01 ` [PATCH v2 " Bill Schmidt 2021-12-14 18:10 ` [PATCH " David Edelsohn 2021-12-14 17:32 ` [PATCH v2 0/6] Remove "old" built-in function infrastructure Bill Schmidt -- strict thread matches above, loose matches on Subject: below -- 2021-12-03 18:22 [PATCH 0/6] rs6000: " Bill Schmidt 2021-12-03 18:22 ` [PATCH 2/6] rs6000: Remove altivec_overloaded_builtins array and initialization Bill Schmidt
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