From: Jeff Law <jeffreyalaw@gmail.com>
To: Andrew Waterman <andrew@sifive.com>, Vineet Gupta <vineetg@rivosinc.com>
Cc: gcc-patches@gcc.gnu.org, kito.cheng@gmail.com,
Palmer Dabbelt <palmer@rivosinc.com>,
gnu-toolchain@rivosinc.com, Robin Dapp <rdapp.gcc@gmail.com>
Subject: Re: [gcc-15 2/3] RISC-V: avoid LUI based const mat: keep stack offsets aligned
Date: Tue, 19 Mar 2024 07:10:09 -0600 [thread overview]
Message-ID: <dba774ff-478e-408b-bf9f-ec616a844bf4@gmail.com> (raw)
In-Reply-To: <CA++6G0B5guBZr+toRrC-LVVMNTsNNKiySVjwdz0AUEheEdL=6Q@mail.gmail.com>
On 3/19/24 12:48 AM, Andrew Waterman wrote:
> On Mon, Mar 18, 2024 at 5:28 PM Vineet Gupta <vineetg@rivosinc.com> wrote:
>>
>>
>>
>> On 3/16/24 13:21, Jeff Law wrote:
>>> | 59944: add s0,sp,2047 <----
>>> | 59948: mv a2,a0
>>> | 5994c: mv a3,a1
>>> | 59950: mv a0,sp
>>> | 59954: li a4,1
>>> | 59958: lui a1,0x1
>>> | 5995c: add s0,s0,1 <---
>>> | 59960: jal 59a3c
>>>
>>> SP here becomes unaligned, even if transitively which is undesirable as
>>> well as incorrect:
>>> - ABI requires stack to be 8 byte aligned
>>> - asm code looks weird and unexpected
>>> - to the user it might falsely seem like a compiler bug even when not,
>>> specially when staring at asm for debugging unrelated issue.
>>> It's not ideal, but I think it's still ABI compliant as-is. If it
>>> wasn't, then I suspect things like virtual origins in Ada couldn't be
>>> made ABI compliant.
>>
>> To be clear are u suggesting ADD sp, sp, 2047 is ABI compliant ?
>> I'd still like to avoid it as I'm sure someone will complain about it.
>>
>>>> With the patch, we get following correct code instead:
>>>>
>>>> | ..
>>>> | 59944: add s0,sp,2032
>>>> | ..
>>>> | 5995c: add s0,s0,16
>>> Alternately you could tighten the positive side of the range of the
>>> splitter from patch 1/3 so that you could always use 2032 rather than
>>> 2047 on the first addi. ie instead of allowing 2048..4094, allow
>>> 2048..4064.
>>
>> 2033..4064 vs. 2048..4094
>>
>> Yeah I was a bit split about this as well. Since you are OK with either,
>> I'll keep them as-is and perhaps add this observation to commitlog.
>
> There's a subset of embedded use cases where an interrupt service
> routine continues on the same stack as the interrupted thread,
> requiring sp to always have an ABI-compliant value (i.e. 16B aligned,
> and with no important data on the stack at an address below sp).
>
> Although not all use cases care about this property, it seems more
> straightforward to maintain the invariant everywhere, rather than
> selectively enforce it.
Just to be clear, the changes don't misalign the stack pointer at all.
They merely have the potential to create *another* pointer into the
stack which may or may not be aligned. Which is totally normal, it's no
different than taking the address of a char on the stack.
jeff
next prev parent reply other threads:[~2024-03-19 13:10 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-03-16 17:35 [gcc-15 0/3] RISC-V improve stack/array access by constant mat tweak Vineet Gupta
2024-03-16 17:35 ` [gcc-15 1/3] RISC-V: avoid LUI based const materialization ... [part of PR/106265] Vineet Gupta
2024-03-16 20:28 ` Jeff Law
2024-03-19 0:07 ` Vineet Gupta
2024-03-23 5:59 ` Jeff Law
2024-03-16 17:35 ` [gcc-15 2/3] RISC-V: avoid LUI based const mat: keep stack offsets aligned Vineet Gupta
2024-03-16 20:21 ` Jeff Law
2024-03-19 0:27 ` Vineet Gupta
2024-03-19 6:48 ` Andrew Waterman
2024-03-19 13:10 ` Jeff Law [this message]
2024-03-19 20:05 ` Vineet Gupta
2024-03-19 20:58 ` Andrew Waterman
2024-03-19 21:17 ` Palmer Dabbelt
2024-03-20 18:57 ` Jeff Law
2024-03-23 6:05 ` Jeff Law
2024-03-16 17:35 ` [gcc-15 3/3] RISC-V: avoid LUI based const mat in prologue/epilogue expansion [PR/105733] Vineet Gupta
2024-03-16 20:27 ` Jeff Law
2024-03-19 4:41 ` [gcc-15 0/3] RISC-V improve stack/array access by constant mat tweak Jeff Law
2024-03-21 0:45 ` Vineet Gupta
2024-03-21 14:36 ` scheduler queue flush (was Re: [gcc-15 0/3] RISC-V improve stack/array access by constant mat tweak) Vineet Gupta
2024-03-21 14:45 ` Jeff Law
2024-03-21 17:19 ` Vineet Gupta
2024-03-21 19:56 ` Jeff Law
2024-03-22 0:34 ` scheduler queue flush Vineet Gupta
2024-03-22 8:47 ` scheduler queue flush (was Re: [gcc-15 0/3] RISC-V improve stack/array access by constant mat tweak) Richard Biener
2024-03-22 12:29 ` Jeff Law
2024-03-22 16:56 ` Vineet Gupta
2024-03-25 3:05 ` Jeff Law
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