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Tue, 28 Nov 2023 09:33:29 GMT Received: from smtpav06.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id EBA7620040; Tue, 28 Nov 2023 09:33:28 +0000 (GMT) Received: from smtpav06.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 8C41020049; Tue, 28 Nov 2023 09:33:26 +0000 (GMT) Received: from [9.177.24.176] (unknown [9.177.24.176]) by smtpav06.fra02v.mail.ibm.com (Postfix) with ESMTP; Tue, 28 Nov 2023 09:33:26 +0000 (GMT) Message-ID: Date: Tue, 28 Nov 2023 17:33:24 +0800 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Macintosh; Intel Mac OS X 10.15; rv:91.0) Gecko/20100101 Thunderbird/91.6.1 Subject: Re: [PATCH v2] rs6000: Add new pass for replacement of contiguous addresses vector load lxv with lxvp Content-Language: en-US To: Michael Meissner References: <77426697-1571-e180-add9-cfb6d10f8424@linux.ibm.com> Cc: GCC Patches , Segher Boessenkool , David Edelsohn , Peter Bergner , Ajit Agarwal From: "Kewen.Lin" In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: v_lg1HhBkDNqIKu_x1Ib_P-zu-esSMht X-Proofpoint-GUID: urXoxrYZKslRoJVaEfC8Ogr1B9dsrlpZ X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.987,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-11-28_08,2023-11-27_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 bulkscore=0 spamscore=0 lowpriorityscore=0 mlxlogscore=999 adultscore=0 malwarescore=0 phishscore=0 priorityscore=1501 mlxscore=0 suspectscore=0 impostorscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2311060000 definitions=main-2311280074 X-Spam-Status: No, score=-5.2 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_EF,NICE_REPLY_A,RCVD_IN_MSPIKE_H4,RCVD_IN_MSPIKE_WL,SPF_HELO_NONE,SPF_PASS,TXREP,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: Hi Mike, on 2023/11/28 12:34, Michael Meissner wrote: > On Fri, Nov 24, 2023 at 05:31:20PM +0800, Kewen.Lin wrote: >> Hi Ajit, >> >> Don't forget to CC David (CC-ed) :), some comments are inlined below. >> >> on 2023/10/8 03:04, Ajit Agarwal wrote: >>> Hello All: >>> >>> This patch add new pass to replace contiguous addresses vector load lxv with mma instruction >>> lxvp. >> >> IMHO the current binding lxvp (and lxvpx, stxvp{x,}) to MMA looks wrong, it's only >> Power10 and VSX required, these instructions should perform well without MMA support. >> So one patch to separate their support from MMA seems to go first. > > I tend to agree with you, but I recall the decision being made because at the > time, vector pairs and vector quads were only used with MMA. We now have > various attempts to improve things for using vector pairs for non-MMA code. In Thanks for the comments! Yeah, so this time seems a good timing to make it separated from MMA support. > my patches, I keeped the MMA requirement, but if we decide to make it ISA 3.1 > only if is fairly straight forward to look at all of the TARGET_MMA tests. > > Now in the GCC 13 days, it was useful that -mmma controlled vector pair. There > was an issue if we enabled memcpy to use store vector pair, it would lead to > one slow down. When I was doing the tests, it was easy to use -mno-mma and it > would stop memcpy from using load/store vector pair since GCC doesn't generate > code to use MMA without using the built-ins. OK, maybe a vector store pair specific option can be added for the disablement need. BR, Kewen