From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 86502 invoked by alias); 13 Mar 2019 11:48:28 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 86167 invoked by uid 89); 13 Mar 2019 11:48:21 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-18.1 required=5.0 tests=AWL,BAYES_00,GIT_PATCH_0,GIT_PATCH_1,GIT_PATCH_2,GIT_PATCH_3,SPF_PASS autolearn=ham version=3.3.1 spammy=dgskipif, dg-skip-if, 269596 X-HELO: foss.arm.com Received: from foss.arm.com (HELO foss.arm.com) (217.140.101.70) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Wed, 13 Mar 2019 11:48:19 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 0459580D for ; Wed, 13 Mar 2019 04:48:18 -0700 (PDT) Received: from [10.2.207.62] (e107157-lin.cambridge.arm.com [10.2.207.62]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id A41263F71D for ; Wed, 13 Mar 2019 04:48:17 -0700 (PDT) Subject: Re: [GCC-8, Arm, committed] Fix availability of FP16-FP64 conversion instructions To: gcc-patches@gcc.gnu.org References: <7a5f471c-6302-1d94-f3f4-bafa2e843da1@arm.com> <3dd7020e-4fbe-5da0-a880-6e28f48836b1@arm.com> <199bac31-d8e8-63ba-29e9-ac6e8a6d88fe@arm.com> From: "Andre Vieira (lists)" Message-ID: Date: Wed, 13 Mar 2019 11:58:00 -0000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.5.1 MIME-Version: 1.0 In-Reply-To: <199bac31-d8e8-63ba-29e9-ac6e8a6d88fe@arm.com> Content-Type: multipart/mixed; boundary="------------161FCD4795F9F6AEBD764A4A" X-IsSubscribed: yes X-SW-Source: 2019-03/txt/msg00630.txt.bz2 This is a multi-part message in MIME format. --------------161FCD4795F9F6AEBD764A4A Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 8bit Content-length: 3355 Hi, After also testing on the gcc-7 branch I committed a backport of r269499 including the testism fix 269596 to gcc-7 branch in r269647. Cheers, Andre gcc/ChangeLog: 2019-03-13 Andre Vieira Backport from mainline 2019-03-08 Andre Vieira * config/arm/arm.h (TARGET_FP16_TO_DOUBLE): Add TARGET_VFP_DOUBLE requirement. gcc/testsuite/ChangeLog: 2019-03-13 Andre Vieira Backport from mainline 2019-03-08 Andre Vieira * gcc.target/arm/f16_f64_conv_no_dp.c: New test. Backport from mainline 2019-03-11 Christophe Lyon * gcc.target/arm/f16_f64_conv_no_dp.c: Add arm_fp16_ok effective target. On 12/03/2019 14:54, Andre Vieira (lists) wrote: > Hi, > > Thanks Christophe! I have committed a backport of r269499 including the > testism fix r269596 to gcc-8 branch in r269613. > > gcc/ChangeLog: > 2019-03-12  Andre Vieira  > >         Backport from mainline >         2019-03-08  Andre Vieira  > >         * config/arm/arm.h (TARGET_FP16_TO_DOUBLE): Add TARGET_VFP_DOUBLE >         requirement. > > gcc/testsuite/ChangeLog: > 2019-03-12  Andre Vieira  > >         Backport from mainline >         2019-03-08  Andre Vieira  > >         * gcc.target/arm/f16_f64_conv_no_dp.c: New test. > >         Backport from mainline >         2019-03-11  Christophe Lyon  > >         * gcc.target/arm/f16_f64_conv_no_dp.c: Add arm_fp16_ok effective >         target. > > On 11/03/2019 20:50, Ramana Radhakrishnan wrote: >> Nope, just do it after testing it and adjust with Christophes follow up >> >> R >> >> On Mon, 11 Mar 2019, 10:36 Andre Vieira (lists), >> > > wrote: >> >>     Hi, >> >>     Any objections to me backporting this to GCC 8 and 7? >> >>     Cheers, >>     Andre >> >>     On 08/03/2019 17:30, Andre Vieira (lists) wrote: >>      > Hi, >>      > >>      > vcvtb.f16.f64 and vcvtb.f64.f16 were being made available even >>     for FPUs >>      > that do not support double precision.  This patch fixes that. >>      > >>      > Regression tested for arm-none-eabi. >>      > >>      > Committed in r269499. >>      > >>      > Cheers, >>      > Andre >>      > >>      > gcc/ChangeLog: >>      > 2019-03-08  Andre Vieira  >     > >>      > >>      >          * config/arm/arm.h (TARGET_FP16_TO_DOUBLE): Add >>     TARGET_VFP_DOUBLE >>      >          requirement. >>      > >>      > gcc/testsuite/ChangeLog: >>      > >>      > 2019-03-08  Andre Vieira  >     > >>      > >>      >          * gcc.target/arm/f16_f64_conv_no_dp.c: New test. >> --------------161FCD4795F9F6AEBD764A4A Content-Type: text/x-patch; name="rb10800.patch" Content-Transfer-Encoding: 7bit Content-Disposition: attachment; filename="rb10800.patch" Content-length: 1484 diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h index 68a6fa56c7cc3cf1c369156d6b2f68f8997ed58b..d89b6d345f40c83fd525ff50dd5fcdbe74746b0b 100644 --- a/gcc/config/arm/arm.h +++ b/gcc/config/arm/arm.h @@ -186,7 +186,7 @@ extern tree arm_fp16_type_node; /* FPU supports converting between HFmode and DFmode in a single hardware step. */ #define TARGET_FP16_TO_DOUBLE \ - (TARGET_HARD_FLOAT && (TARGET_FP16 && TARGET_VFP5)) + (TARGET_HARD_FLOAT && TARGET_FP16 && TARGET_VFP5 && TARGET_VFP_DOUBLE) /* FPU supports fused-multiply-add operations. */ #define TARGET_FMA (bitmap_bit_p (arm_active_target.isa, isa_bit_VFPv4)) diff --git a/gcc/testsuite/gcc.target/arm/f16_f64_conv_no_dp.c b/gcc/testsuite/gcc.target/arm/f16_f64_conv_no_dp.c new file mode 100644 index 0000000000000000000000000000000000000000..2620e57000425665c3891f7965f00d2c7645781b --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/f16_f64_conv_no_dp.c @@ -0,0 +1,16 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target arm_fp16_ok } */ +/* { dg-skip-if "do not override fpu" { *-*-* } { "-mfpu=*" } { "-mfpu=fpv5-sp-d16" } } */ +/* { dg-skip-if "do not disable fpu" { *-*-* } { "-mfloat-abi=soft" } { * } } */ +/* { dg-skip-if "do not override fp16-format" { *-*-* } { "-mfp16-format=*" } { "-mfp16-format=ieee" } } */ +/* { dg-options "-O1 -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mfp16-format=ieee" } */ + +__fp16 foo (double a) +{ + return a; +} + +double bar (__fp16 a) +{ + return a; +} --------------161FCD4795F9F6AEBD764A4A--