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* [PATCH PR96757] aarch64: ICE during GIMPLE pass: vect
@ 2020-08-26  9:30 duanbo (C)
  2020-08-28 18:30 ` Richard Sandiford
  0 siblings, 1 reply; 8+ messages in thread
From: duanbo (C) @ 2020-08-26  9:30 UTC (permalink / raw)
  To: GCC Patches; +Cc: rguenther

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Hi, 

This is a fix for PR96757.
Before vect pass, the main statements of the test case will be optimized like：
	_1 = d_10(D) > 3;
	_2 = a_11(D) > m_12(D);
	_18 = _1 > _2 ? _26 : 0; 
At the beginning of vectorization analysis, function vect_recog_mask_conversion_pattern 
processed the gimple  _18 = _1 > _2 ? _15 : 0, and produce:
	patt_17 = _1 > _2
	patt_3 = patt_17 ? _15 : 0
it didn't consider the situation that  _1, _2's vectype is different, which leading to an ICE in 
some special  mode , like V4HImode for this case.

This patch added the identification and handling for this situation in vect_recog_mask_conversion_pattern. 
With that _18 = _1 > _2 ? _15 : 0 will be transformed to:
	patt_3 = (<signed-boolean:16>) _2;
	patt_17 = _1 > patt_3;
	patt_20 = patt_17 ? _26 : 0;

More details in https://gcc.gnu.org/bugzilla/show_bug.cgi?id=96757.
Bootstrap and tested on both aarch64 and x86 Linux platform, no new regression witnessed.
Ok for trunk?

Thanks, 
Duan Bo
	

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From 421dc953cecf09193273827f272a0d185c936f91 Mon Sep 17 00:00:00 2001
From: Duan bo <duanbo3@huawei.com>
Date: Wed, 26 Aug 2020 03:53:32 -0400
Subject: [PATCH] vect: Fix an ICE in vect_recog_mask_conversion_pattern

When processing the cond expression, vect_recog_mask_conversion_pattern
doesn't consider the situation that two operands of rhs1 are different
vectypes, leading to a vect ICE. This patch adds the identification and
handling of the situation to fix the problem.

gcc/ChangeLog:

	PR target/96757
	* tree-vect-patterns.c (vect_recog_mask_conversion_pattern): Add
	the identification and handling of the dropped situation in the cond
	expression processing phase.

gcc/testsuite/ChangeLog:

	PR target/96757
	* gcc.target/aarch64/pr96757.c: New test.
---
 gcc/testsuite/gcc.target/aarch64/pr96757.c | 24 +++++++++++++++
 gcc/tree-vect-patterns.c                   | 34 ++++++++++++++++++++++
 2 files changed, 58 insertions(+)
 create mode 100644 gcc/testsuite/gcc.target/aarch64/pr96757.c

diff --git a/gcc/testsuite/gcc.target/aarch64/pr96757.c b/gcc/testsuite/gcc.target/aarch64/pr96757.c
new file mode 100644
index 00000000000..4bca0fa1680
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/pr96757.c
@@ -0,0 +1,24 @@
+/* PR target/96757 */
+/* { dg-do compile } */
+/* { dg-options "-O3" } */
+
+short 
+fun1(short i, short j)
+{ 
+  return i * j; 
+}
+
+int 
+fun(int a, int b, int c) 
+{
+  int *v, z, k, m;
+  short f, d;
+  for (int i=0; i<c; i++) 
+  {
+    f= 4 <= d;
+    k= a > m;
+    z = f > k;
+    *v += fun1(z,b);
+  }
+}
+
diff --git a/gcc/tree-vect-patterns.c b/gcc/tree-vect-patterns.c
index 03d50ec5c90..00dfaa6b395 100644
--- a/gcc/tree-vect-patterns.c
+++ b/gcc/tree-vect-patterns.c
@@ -4395,6 +4395,40 @@ vect_recog_mask_conversion_pattern (vec_info *vinfo,
 	{
 	  tmp = vect_recog_temp_ssa_var (TREE_TYPE (rhs1), NULL);
 	  pattern_stmt = gimple_build_assign (tmp, rhs1);
+	  tree rhs1_op0 = TREE_OPERAND (rhs1, 0);
+	  tree rhs1_op1 = TREE_OPERAND (rhs1, 1);
+	  if (rhs1_op0 && rhs1_op1
+	      && (TREE_CODE (TREE_TYPE (rhs1_op0)) == BOOLEAN_TYPE)
+	      && (TREE_CODE (TREE_TYPE (rhs1_op1)) == BOOLEAN_TYPE))
+	    {
+	      tree rhs1_op0_type = integer_type_for_mask (rhs1_op0, vinfo);
+	      tree rhs1_op1_type = integer_type_for_mask (rhs1_op1, vinfo);
+	      enum tree_code rhs1_code = gimple_assign_rhs_code (pattern_stmt);
+	      if (rhs1_op0_type && rhs1_op1_type
+		  && (!(TYPE_PRECISION (rhs1_op0_type)
+			== TYPE_PRECISION (rhs1_op1_type))))
+		{
+		  if (TYPE_PRECISION (rhs1_op0_type)
+		      < TYPE_PRECISION (rhs1_op1_type))
+		    {
+		      vectype2
+			= get_mask_type_for_scalar_type (vinfo, rhs1_op0_type);
+		      if (vectype2)
+			rhs1_op1 = build_mask_conversion (vinfo, rhs1_op1,
+							  vectype2, stmt_vinfo);
+		    }
+		  else
+		    {
+		      vectype2
+			= get_mask_type_for_scalar_type (vinfo, rhs1_op1_type);
+		      if (vectype2)
+			rhs1_op0 = build_mask_conversion (vinfo, rhs1_op0,
+							  vectype2, stmt_vinfo);
+		    }
+		  pattern_stmt = gimple_build_assign (tmp, rhs1_code,
+				 		      rhs1_op0, rhs1_op1);
+		}
+	    }
 	  rhs1 = tmp;
 	  append_pattern_def_seq (vinfo, stmt_vinfo, pattern_stmt, vectype2,
 				  rhs1_type);
-- 
2.19.1


^ permalink raw reply	[flat|nested] 8+ messages in thread
end of thread, other threads:[~2020-10-12 11:33 UTC | newest]

Thread overview: 8+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-08-26  9:30 [PATCH PR96757] aarch64: ICE during GIMPLE pass: vect duanbo (C)
2020-08-28 18:30 ` Richard Sandiford
2020-09-19  8:06   ` duanbo (C)
2020-09-24 11:55     ` Richard Sandiford
2020-09-30  2:03       ` duanbo (C)
2020-09-30 10:38         ` Richard Sandiford
2020-10-09  7:21           ` duanbo (C)
2020-10-12 11:33             ` Richard Sandiford

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