From: Jeff Law <jeffreyalaw@gmail.com>
To: Vineet Gupta <vineetg@rivosinc.com>, gcc-patches@gcc.gnu.org
Cc: kito.cheng@gmail.com, Palmer Dabbelt <palmer@rivosinc.com>,
Christoph Mullner <christoph.muellner@vrull.eu>,
gnu-toolchain@rivosinc.com
Subject: Re: [PATCH] RISC-V: improve codegen for large constants with same 32-bit lo and hi parts [2]
Date: Fri, 19 May 2023 10:33:34 -0600 [thread overview]
Message-ID: <df620128-2956-5976-c368-903cf1ef8e48@gmail.com> (raw)
In-Reply-To: <20230518205716.3258223-1-vineetg@rivosinc.com>
On 5/18/23 14:57, Vineet Gupta wrote:
> [part #2 of PR/109279]
>
> SPEC2017 deepsjeng uses large constants which currently generates less than
> ideal code. This fix improves codegen for large constants which have
> same low and hi parts: e.g.
>
> long long f(void) { return 0x0101010101010101ull; }
>
> Before
> li a5,0x1010000
> addi a5,a5,0x101
> mv a0,a5
> slli a5,a5,32
> add a0,a5,a0
> ret
>
> With patch
> li a5,0x1010000
> addi a5,a5,0x101
> slli a0,a5,32
> add a0,a0,a5
> ret
>
> This is testsuite clean.
>
> gcc/ChangeLog:
>
> * config/riscv/riscv.cc (riscv_split_integer): if loval is equal
> to hival, ASHIFT the corresponding regs.
LGTM. Please install. Thanks for taking care of this! The updated
sequence looks good.
Jeff
next prev parent reply other threads:[~2023-05-19 16:33 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-05-18 20:57 Vineet Gupta
2023-05-19 16:33 ` Jeff Law [this message]
2023-05-19 16:36 ` Palmer Dabbelt
2023-05-19 17:21 ` Vineet Gupta
2023-05-19 17:21 ` [Committed] " Vineet Gupta
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