From: "Kewen.Lin" <linkw@linux.ibm.com>
To: jeevitha <jeevitha@linux.vnet.ibm.com>
Cc: GCC Patches <gcc-patches@gcc.gnu.org>,
Segher Boessenkool <segher@kernel.crashing.org>,
Michael Meissner <meissner@linux.ibm.com>,
Peter Bergner <bergner@linux.ibm.com>
Subject: Re: [PATCH V3] rs6000: Don't ICE when compiling the __builtin_vsx_splat_2di built-in [PR113950]
Date: Wed, 6 Mar 2024 17:27:45 +0800 [thread overview]
Message-ID: <dfb20f7a-fb21-d437-ec90-1762e16df75e@linux.ibm.com> (raw)
In-Reply-To: <d15dcf16-ee4c-45fe-a194-80d779467c23@linux.vnet.ibm.com>
Hi,
on 2024/3/4 02:55, jeevitha wrote:
> Hi All,
>
> The following patch has been bootstrapped and regtested on powerpc64le-linux.
>
> When we expand the __builtin_vsx_splat_2di function, we were allowing immediate
> value for second operand which causes an unrecognizable insn ICE. Even though
> the immediate value was forced into a register, it wasn't correctly assigned
> to the second operand. So corrected the assignment of op1 to operands[1].
>
> 2024-02-29 Jeevitha Palanisamy <jeevitha@linux.ibm.com>
>
> gcc/
> PR target/113950
> * config/rs6000/vsx.md (vsx_splat_<mode>): Corrected assignment to
> operand1.
Nit: s/Corrected/Correct/, maybe add "and simplify else if with else.".
>
> gcc/testsuite/
> PR target/113950
> * gcc.target/powerpc/pr113950.c: New testcase.
>
> diff --git a/gcc/config/rs6000/vsx.md b/gcc/config/rs6000/vsx.md
> index 6111cc90eb7..f135fa079bd 100644
> --- a/gcc/config/rs6000/vsx.md
> +++ b/gcc/config/rs6000/vsx.md
> @@ -4666,8 +4666,8 @@
> rtx op1 = operands[1];
> if (MEM_P (op1))
> operands[1] = rs6000_force_indexed_or_indirect_mem (op1);
> - else if (!REG_P (op1))
> - op1 = force_reg (<VSX_D:VEC_base>mode, op1);
> + else
> + operands[1] = force_reg (<VSX_D:VEC_base>mode, op1);
> })
>
> (define_insn "vsx_splat_<mode>_reg"
> diff --git a/gcc/testsuite/gcc.target/powerpc/pr113950.c b/gcc/testsuite/gcc.target/powerpc/pr113950.c
> new file mode 100644
> index 00000000000..64566a580d9
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/powerpc/pr113950.c
> @@ -0,0 +1,24 @@
> +/* PR target/113950 */
> +/* { dg-require-effective-target powerpc_vsx_ok } */
> +/* { dg-options "-O1 -mvsx" } */
Nit: s/-O1/-O2/, -O2 is preferred when the failure can be reproduced
with -O2 (not just -O1), since optimization may change the level in
which it's placed, -O2 is more general.
As the discussions in the thread of the previous versions, I think
Segher agreed this approach, so OK for trunk with the above nits
tweaked, thanks!
BR,
Kewen
> +
> +/* Verify we do not ICE on the following. */
> +
> +void abort (void);
> +
> +int main ()
> +{
> + int i;
> + vector signed long long vsll_result, vsll_expected_result;
> + signed long long sll_arg1;
> +
> + sll_arg1 = 300;
> + vsll_expected_result = (vector signed long long) {300, 300};
> + vsll_result = __builtin_vsx_splat_2di (sll_arg1);
> +
> + for (i = 0; i < 2; i++)
> + if (vsll_result[i] != vsll_expected_result[i])
> + abort();
> +
> + return 0;
> +}
>
>
next prev parent reply other threads:[~2024-03-06 9:31 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-03-03 18:55 jeevitha
2024-03-06 9:27 ` Kewen.Lin [this message]
2024-03-15 20:34 ` Peter Bergner
2024-03-18 1:30 ` Kewen.Lin
2024-04-17 9:05 ` jeevitha
2024-04-17 9:28 ` Kewen.Lin
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