From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-pf1-x433.google.com (mail-pf1-x433.google.com [IPv6:2607:f8b0:4864:20::433]) by sourceware.org (Postfix) with ESMTPS id 38E3E3858C78 for ; Wed, 19 Jul 2023 23:15:23 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 38E3E3858C78 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=gmail.com Received: by mail-pf1-x433.google.com with SMTP id d2e1a72fcca58-6682909acadso91176b3a.3 for ; Wed, 19 Jul 2023 16:15:23 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20221208; t=1689808522; x=1692400522; h=content-transfer-encoding:in-reply-to:from:references:cc:to :content-language:subject:user-agent:mime-version:date:message-id :from:to:cc:subject:date:message-id:reply-to; bh=2zOgkttg6pPw5hGrElYlauyrCwG7ISh6GCOyWxrP/uQ=; b=CAwEzhEl2hvQDhX92lp6xebKrNvn0Z72QK4eoozOFb1T/hePpqyow98BqLtSBGvRAy VCg4C0AVnG2joGE332y65Hfba8kTjCSlFAKJSTqa5s+JbXfvm4T098YrkkDYOHH9gskW 5Ng80sn6IcS8nqJUx7Qm7sNTxwLb3igRWDWt2P7f3VhRRgvOQx/7dQgDMwwu9T/7FBYK RpiZKH7bQNSHNiY2fOcGi1cTbowou9Nux1ZTlmuZMSu7Yl7/o95ITG4RNI1nbWE7eWL0 Vfomtk9zNENN8wcEYT2YmTlqmNn0jWuSFir6VulOW5J217GHKodk1kCIyDn5DemHx97P KbVw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1689808522; x=1692400522; h=content-transfer-encoding:in-reply-to:from:references:cc:to :content-language:subject:user-agent:mime-version:date:message-id :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=2zOgkttg6pPw5hGrElYlauyrCwG7ISh6GCOyWxrP/uQ=; b=OaIaLGUJ/oQD88Igo5JIW3gGKsHINrZFgwlCTMm2PWBPOpnOytyjH5KtLlKdtdVxyn kjhoRGpiyay30kfM84SZiUmeKFWGWshb2HFyxzE8Aj3UDH3IDeSvRHz/ahoKsJwCzL8J UBDVgEGsZywdnA/r8YG09NuoDMMia/K/6Rm71eD0vEgem3JEast+vZJrhgDua2yB08Fc YN1OfjGaTx/eiyO7+UA33Ab+gfF8e4XIAnnxWSKDNb/dEF6CvKlAuPc2ZM54fADN9hVK yd5/VGs9IJ2JKP8PUZ4L8rqHEwT45Mdb5OnwFde5uX41tKie2huZRd0dX0rKSbu3KpvU zNPw== X-Gm-Message-State: ABy/qLaULjzlNibZn2MFKSlZQ8YxlNxF28TRbWWz3ihTLWQfxdR3T+z4 1nxjbdRku+DowCi8znxMJp4= X-Google-Smtp-Source: APBJJlFRkrwlEhDOzgOTtZznpunMpXbrl53c8cGydoelv1vGLWF6fqgGt359dzU+qAXnGYLAmf15/A== X-Received: by 2002:a05:6a00:1587:b0:67b:1f97:f897 with SMTP id u7-20020a056a00158700b0067b1f97f897mr4918066pfk.8.1689808521910; Wed, 19 Jul 2023 16:15:21 -0700 (PDT) Received: from [172.31.0.109] ([136.36.130.248]) by smtp.gmail.com with ESMTPSA id u71-20020a63794a000000b00551df489590sm4056621pgc.12.2023.07.19.16.15.20 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 19 Jul 2023 16:15:21 -0700 (PDT) Message-ID: Date: Wed, 19 Jul 2023 17:15:20 -0600 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.12.0 Subject: Re: [PATCH V2] RISC-V: Refactor RVV machine modes Content-Language: en-US To: Juzhe-Zhong , gcc-patches@gcc.gnu.org Cc: kito.cheng@sifive.com, kito.cheng@gmail.com, rdapp.gcc@gmail.com References: <20230719224502.67323-1-juzhe.zhong@rivai.ai> From: Jeff Law In-Reply-To: <20230719224502.67323-1-juzhe.zhong@rivai.ai> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-Spam-Status: No, score=-2.3 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM,NICE_REPLY_A,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,TXREP,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: On 7/19/23 16:45, Juzhe-Zhong wrote: > Current machine modes layout is hard to maintain && read && understand. > > For a LMUL = 1 SI vector mode: > 1. VNx1SI mode when TARGET_MIN_VLEN = 32. > 2. VNx2SI mode when TARGET_MIN_VLEN = 64. > 3. VNx4SI mode when TARGET_MIN_VLEN = 128. > > Such implementation produces redundant machine modes and thus redudant machine description patterns. > > Now, this patch refactor machine modes into 3 follow formats: > > 1. mask mode: RVVMF64BImode, RVVMF32BImode, ...., RVVM1BImode. > RVVMF64BImode means such mask mode occupy 1/64 of a RVV M1 reg. > RVVM1BImode size = LMUL = 1 reg. > 2. non-tuple vector modes: > RVV: E.g. RVVMF8QImode = SEW = 8 && LMUL = MF8 > 3. tuple vector modes: > RVVx. > > For example, for SEW = 16, LMUL = MF2 , int mode is always RVVMF4HImode, then adjust its size according to TARGET_MIN_VLEN. > > Before this patch, the machine description patterns: 17551 > After this patch, the machine description patterns: 14132 =====> reduce 3K+ patterns. > > Regression of gcc/g++ rv32/rv64 all passed. I haven't had a chance to look at this yet. But does it change insn-emit.cc in any significant way? Particularly the maybe_code_for_* functions which I think are playing a major role in the build time regressions we're seeing, particularly native builds in qemu. jeff