On 6/12/20 11:43 AM, Richard Biener wrote:
> So ... how far are you with enforcing a split VEC_COND_EXPR?
> Thus can we avoid the above completely (even as intermediate
> state)?

Apparently, I'm quite close. Using the attached patch I see only 2 testsuite
failures:

FAIL: gcc.dg/tree-ssa/pr68714.c scan-tree-dump-times reassoc1 " <= " 1
FAIL: gcc.target/i386/pr78102.c scan-assembler-times pcmpeqq 3

The first one is about teaching reassoc about the SSA_NAMEs in VEC_COND_EXPR. I haven't
analyze the second failure.

I'm also not sure about the gimlification change, I see a superfluous assignments:
   vec_cond_cmp.5 = _1 == _2;
   vec_cond_cmp.6 = vec_cond_cmp.5;
   vec_cond_cmp.7 = vec_cond_cmp.6;
   _3 = VEC_COND_EXPR <vec_cond_cmp.7, { -1, -1, -1, -1, -1, -1, -1, -1 }, { 0, 0, 0, 0, 0, 0, 0, 0 }>;
?

So with the suggested patch, the EH should be gone as you suggested. Right?

Martin