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From: Toru Kisuki <tkisuki@tachyum.com>
To: "gcc-patches@gcc.gnu.org" <gcc-patches@gcc.gnu.org>
Subject: [PATCH] Do not allow "x + 0.0" to "x" optimization with -fsignaling-nans
Date: Mon, 19 Jun 2023 10:32:41 +0000	[thread overview]
Message-ID: <e63d1b9404594f12847b1ccb0ad81bbb@tachyum.com> (raw)

[-- Attachment #1: Type: text/plain, Size: 1063 bytes --]

Hi,


With -O3 -fsignaling-nans -fno-signed-zeros, compiler should not simplify 'x + 0.0' to 'x'.


GCC Bugzilla : Bug 110305


gcc/ChangeLog:

2023-06-19  Toru Kisuki  <tkisuki@tachyum.com>

* simplify-rtx.cc (simplify_context::simplify_binary_operation_1):

---
 gcc/simplify-rtx.cc | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/gcc/simplify-rtx.cc b/gcc/simplify-rtx.cc
index e152918b0f1..cc96b36ad4e 100644
--- a/gcc/simplify-rtx.cc
+++ b/gcc/simplify-rtx.cc
@@ -2698,7 +2698,8 @@ simplify_context::simplify_binary_operation_1 (rtx_code code,
         when x is NaN, infinite, or finite and nonzero.  They aren't
         when x is -0 and the rounding mode is not towards -infinity,
         since (-0) + 0 is then 0.  */
-      if (!HONOR_SIGNED_ZEROS (mode) && trueop1 == CONST0_RTX (mode))
+      if (!HONOR_SIGNED_ZEROS (mode) && !HONOR_SNANS (mode)
+          && trueop1 == CONST0_RTX (mode))
        return op0;

       /* ((-a) + b) -> (b - a) and similarly for (a + (-b)).  These
--
2.38.1


             reply	other threads:[~2023-06-19 10:32 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-06-19 10:32 Toru Kisuki [this message]
2023-06-19 11:41 ` Richard Biener
2023-06-19 17:55   ` Jeff Law
2023-06-20  5:18     ` Toru Kisuki

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