From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-ed1-x529.google.com (mail-ed1-x529.google.com [IPv6:2a00:1450:4864:20::529]) by sourceware.org (Postfix) with ESMTPS id 0FA823858D35 for ; Tue, 23 May 2023 14:12:25 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 0FA823858D35 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=gmail.com Received: by mail-ed1-x529.google.com with SMTP id 4fb4d7f45d1cf-510eb3dbaaeso1751868a12.1 for ; Tue, 23 May 2023 07:12:25 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20221208; t=1684851143; x=1687443143; h=content-transfer-encoding:in-reply-to:from:references:to :content-language:subject:cc:user-agent:mime-version:date:message-id :from:to:cc:subject:date:message-id:reply-to; bh=06SycH5hj5aK7xVhScq5A0gaxS32Z4whpqdPGJn3pxo=; b=h14Ti8lAwJEAryM+tfalvEwlt8f6hGqwUEcM2BDWK85KorblyQG+5CmZuPbb8JCz5j lCUPebRkXZu15TK+Ihh5iD6Q0gyKAigKvXFF5FCiT0b4sBE1opjX90bSL79rNVollWFq hN9Jh3eyKLuP51bbaz2uOz/TUN8FTmzca5EY5PN/l+16BiOGqGyquNYRd7GvCBGdnYa0 6/nt/G+eMrmFod7REvvEPjbShdm0DT5yt8c7ZqRTM32IAXy4SyW0q4Ek5AwElQepcrHo Ouc6+BdmLiFkxhnK4sCo+4v9JzxSKIqWn3zR5twuqLGQIdXrNfCWVqtTnWJJPen2Ftun AmrQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1684851143; x=1687443143; h=content-transfer-encoding:in-reply-to:from:references:to :content-language:subject:cc:user-agent:mime-version:date:message-id :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=06SycH5hj5aK7xVhScq5A0gaxS32Z4whpqdPGJn3pxo=; b=X8OsdhjyGLZk+RocoZNgJKHbAnDph5ruvjyEUG4SNvzDPWKEPipmweCSyldR/X+nKB 8GRORhe+EWMy6pb4LyPDg2ULGjaZmsL6b+jLj4fLAjysM0k4pFwWOPmXM4RGJJfLBPdC p7CC8SdCkRzhWnOHmGycAj9GZjCw8LAQ5KH8LAEg2yJ3Dqvyu0J6qM6BKO02Y0hrsHHk bRUWEaPtKMV/O8m1Ocs7gYG3KDMuBBZw9RFzG3Dx3/v5YmV5FFxFZ463US2Ub5Ow/fS9 xgHdQHm3HVXSH/X1GuvAUP0TT1dYbwOJCEBogLNlp51HUroJEXNvW2QZaGGW8BDSpPLT lwFw== X-Gm-Message-State: AC+VfDwNq4F1DhJEYymhchvo2FIF1yqwJKSSDFjpqKUBfMYWm4NqmvX1 j6bSBfRBpwFjQM+oCLJTodw= X-Google-Smtp-Source: ACHHUZ47NWIUw6hapALXZ80y6AaamzDNNZ4P7uB3+KDGLbLL9hVaO3ulurcYq45Sd6INDSNFXaud6A== X-Received: by 2002:a17:907:749:b0:966:3310:50ae with SMTP id xc9-20020a170907074900b00966331050aemr11072300ejb.47.1684851143054; Tue, 23 May 2023 07:12:23 -0700 (PDT) Received: from [192.168.1.23] (ip-046-005-130-086.um12.pools.vodafone-ip.de. [46.5.130.86]) by smtp.gmail.com with ESMTPSA id op8-20020a170906bce800b0096a16e49b0fsm4467949ejb.51.2023.05.23.07.12.22 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 23 May 2023 07:12:22 -0700 (PDT) Message-ID: Date: Tue, 23 May 2023 16:12:21 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.10.0 Cc: rdapp.gcc@gmail.com, kito.cheng@gmail.com, kito.cheng@sifive.com, palmer@dabbelt.com, palmer@rivosinc.com, jeffreyalaw@gmail.com, Richard Sandiford Subject: Re: [PATCH V2] RISC-V: Add RVV comparison autovectorization Content-Language: en-US To: juzhe.zhong@rivai.ai, gcc-patches@gcc.gnu.org References: <20230523135007.682279-1-juzhe.zhong@rivai.ai> From: Robin Dapp In-Reply-To: <20230523135007.682279-1-juzhe.zhong@rivai.ai> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM,NICE_REPLY_A,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,TXREP,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: > +(define_expand "vec_cmp" > + [(set (match_operand: 0 "register_operand") > + (match_operator: 1 "comparison_operator" > + [(match_operand:VI 2 "register_operand") > + (match_operand:VI 3 "register_operand")]))] > + "TARGET_VECTOR" > + { > + riscv_vector::expand_vec_cmp (operands[0], GET_CODE (operands[1]), > + operands[2], operands[3]); > + DONE; > + } > +) > + > +(define_expand "vec_cmpu" > + [(set (match_operand: 0 "register_operand") > + (match_operator: 1 "comparison_operator" > + [(match_operand:VI 2 "register_operand") > + (match_operand:VI 3 "register_operand")]))] > + "TARGET_VECTOR" > + { > + riscv_vector::expand_vec_cmp (operands[0], GET_CODE (operands[1]), > + operands[2], operands[3]); > + DONE; > + } > +) > + > +(define_expand "vec_cmp" > + [(set (match_operand: 0 "register_operand") > + (match_operator: 1 "comparison_operator" > + [(match_operand:VF 2 "register_operand") > + (match_operand:VF 3 "register_operand")]))] > + "TARGET_VECTOR" > + { > + riscv_vector::expand_vec_cmp_float (operands[0], GET_CODE (operands[1]), > + operands[2], operands[3], false); > + DONE; > + } > +) Don't you want to use your shiny new operand passing style here as with the other expanders? > + /* We have a maximum of 11 operands for RVV instruction patterns according to > + * vector.md. */ > + insn_expander<11> e (/*OP_NUM*/ op_num, /*HAS_DEST_P*/ true, > + /*FULLY_UNMASKED_P*/ false, > + /*USE_REAL_MERGE_P*/ false, /*HAS_AVL_P*/ true, > + /*VLMAX_P*/ true, > + /*DEST_MODE*/ data_mode, /*MASK_MODE*/ mask_mode); > + e.set_policy (TAIL_ANY); > + e.emit_insn ((enum insn_code) icode, ops); > +} I don't think we need the same comment in each of these. Same for /*DEST_MODE*/ and /*MASK_MODE*/ which would be redundant if data_mode were called dest_mode. > +/* Expand an RVV comparison. */ > + > +void > +expand_vec_cmp (rtx target, rtx_code code, rtx op0, rtx op1) > +{ > + machine_mode mask_mode = GET_MODE (target); > + machine_mode data_mode = GET_MODE (op0); > + insn_code icode = get_cmp_insn_code (code, data_mode); > + > + if (code == LTGT) > + { > + rtx gt = gen_reg_rtx (mask_mode); > + rtx lt = gen_reg_rtx (mask_mode); > + expand_vec_cmp (gt, GT, op0, op1); > + expand_vec_cmp (lt, LT, op0, op1); > + icode = code_for_pred (IOR, mask_mode); > + rtx ops[3] = {target, gt, lt}; > + emit_vlmax_insn (icode, riscv_vector::RVV_BINOP, ops); > + return; > + } Swap lt and gt here for consistency's sake. Regards Robin