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* [PATCH v1] LoongArch: Implement C[LT]Z_DEFINED_VALUE_AT_ZERO
@ 2023-11-16 12:30 Li Wei
  2023-11-16 12:45 ` Xi Ruoyao
  0 siblings, 1 reply; 2+ messages in thread
From: Li Wei @ 2023-11-16 12:30 UTC (permalink / raw)
  To: gcc-patches; +Cc: xry111, i, xuchenghua, chenglulu, Li Wei

The LoongArch has defined ctz and clz on the backend, but if we want GCC
do CTZ transformation optimization in forwprop2 pass, GCC need to know
the value of c[lt]z at zero, which may be beneficial for some test cases
(like spec2017 deepsjeng_r).

After implementing the macro, we test dynamic instruction count on
deepsjeng_r:
- before 1688423249186
- after  1660311215745 (1.66% reduction)
---
 gcc/config/loongarch/loongarch.h | 5 +++++
 gcc/testsuite/gcc.dg/pr90838.c   | 5 +++++
 2 files changed, 10 insertions(+)

diff --git a/gcc/config/loongarch/loongarch.h b/gcc/config/loongarch/loongarch.h
index ddac8e98ea9..115222e70fd 100644
--- a/gcc/config/loongarch/loongarch.h
+++ b/gcc/config/loongarch/loongarch.h
@@ -1239,3 +1239,8 @@ struct GTY (()) machine_function
 
 #define TARGET_EXPLICIT_RELOCS \
   (la_opt_explicit_relocs == EXPLICIT_RELOCS_ALWAYS)
+
+#define CLZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) \
+  ((VALUE) = GET_MODE_UNIT_BITSIZE (MODE), 2)
+#define CTZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) \
+  ((VALUE) = GET_MODE_UNIT_BITSIZE (MODE), 2)
diff --git a/gcc/testsuite/gcc.dg/pr90838.c b/gcc/testsuite/gcc.dg/pr90838.c
index 759059683a9..40aad70499d 100644
--- a/gcc/testsuite/gcc.dg/pr90838.c
+++ b/gcc/testsuite/gcc.dg/pr90838.c
@@ -83,3 +83,8 @@ int ctz4 (unsigned long x)
 /* { dg-final { scan-assembler-times "ctz\t" 3 { target { rv32 } } } } */
 /* { dg-final { scan-assembler-times "andi\t" 1 { target { rv32 } } } } */
 /* { dg-final { scan-assembler-times "mul\t" 1 { target { rv32 } } } } */
+
+/* { dg-final { scan-tree-dump-times {= \.CTZ} 4 "forwprop2" { target { loongarch64*-*-* } } } } */
+/* { dg-final { scan-assembler-times "ctz.d\t" 1 { target { loongarch64*-*-* } } } } */
+/* { dg-final { scan-assembler-times "ctz.w\t" 3 { target { loongarch64*-*-* } } } } */
+/* { dg-final { scan-assembler-times "andi\t" 4 { target { loongarch64*-*-* } } } } */
-- 
2.31.1


^ permalink raw reply	[flat|nested] 2+ messages in thread

* Re: [PATCH v1] LoongArch: Implement C[LT]Z_DEFINED_VALUE_AT_ZERO
  2023-11-16 12:30 [PATCH v1] LoongArch: Implement C[LT]Z_DEFINED_VALUE_AT_ZERO Li Wei
@ 2023-11-16 12:45 ` Xi Ruoyao
  0 siblings, 0 replies; 2+ messages in thread
From: Xi Ruoyao @ 2023-11-16 12:45 UTC (permalink / raw)
  To: Li Wei, gcc-patches; +Cc: i, xuchenghua, chenglulu

On Thu, 2023-11-16 at 20:30 +0800, Li Wei wrote:
> The LoongArch has defined ctz and clz on the backend, but if we want GCC
> do CTZ transformation optimization in forwprop2 pass, GCC need to know
> the value of c[lt]z at zero, which may be beneficial for some test cases
> (like spec2017 deepsjeng_r).
> 
> After implementing the macro, we test dynamic instruction count on
> deepsjeng_r:
> - before 1688423249186
> - after  1660311215745 (1.66% reduction)

LGTM, nice catch!

> ---
>  gcc/config/loongarch/loongarch.h | 5 +++++
>  gcc/testsuite/gcc.dg/pr90838.c   | 5 +++++
>  2 files changed, 10 insertions(+)
> 
> diff --git a/gcc/config/loongarch/loongarch.h b/gcc/config/loongarch/loongarch.h
> index ddac8e98ea9..115222e70fd 100644
> --- a/gcc/config/loongarch/loongarch.h
> +++ b/gcc/config/loongarch/loongarch.h
> @@ -1239,3 +1239,8 @@ struct GTY (()) machine_function
>  
>  #define TARGET_EXPLICIT_RELOCS \
>    (la_opt_explicit_relocs == EXPLICIT_RELOCS_ALWAYS)
> +
> +#define CLZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) \
> +  ((VALUE) = GET_MODE_UNIT_BITSIZE (MODE), 2)
> +#define CTZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) \
> +  ((VALUE) = GET_MODE_UNIT_BITSIZE (MODE), 2)
> diff --git a/gcc/testsuite/gcc.dg/pr90838.c b/gcc/testsuite/gcc.dg/pr90838.c
> index 759059683a9..40aad70499d 100644
> --- a/gcc/testsuite/gcc.dg/pr90838.c
> +++ b/gcc/testsuite/gcc.dg/pr90838.c
> @@ -83,3 +83,8 @@ int ctz4 (unsigned long x)
>  /* { dg-final { scan-assembler-times "ctz\t" 3 { target { rv32 } } } } */
>  /* { dg-final { scan-assembler-times "andi\t" 1 { target { rv32 } } } } */
>  /* { dg-final { scan-assembler-times "mul\t" 1 { target { rv32 } } } } */
> +
> +/* { dg-final { scan-tree-dump-times {= \.CTZ} 4 "forwprop2" { target { loongarch64*-*-* } } } } */
> +/* { dg-final { scan-assembler-times "ctz.d\t" 1 { target { loongarch64*-*-* } } } } */
> +/* { dg-final { scan-assembler-times "ctz.w\t" 3 { target { loongarch64*-*-* } } } } */
> +/* { dg-final { scan-assembler-times "andi\t" 4 { target { loongarch64*-*-* } } } } */

-- 
Xi Ruoyao <xry111@xry111.site>
School of Aerospace Science and Technology, Xidian University

^ permalink raw reply	[flat|nested] 2+ messages in thread

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