Re: RISC-V: Replace unspec with bitreverse in riscv_brev8_<mode> insn

[Jeff Law <jeffreyalaw@gmail.com>]

On 7/26/23 02:21, Kito Cheng via Gcc-patches wrote:
> My understanding is the semantic is slightly different, brev8 is only
> the bit reverse within each byte, but bitreverse means did bit reverse
> for the whole content of the mode, e.g. riscv_brev8_si will bit
> reserved within 32 bit.
> 
> Using RV32 as example:
> UNSPEC_BREV8:
> rd[0...7]  = rs[7...0]
> rd[8...15]  = rs[15...8]
> rd[16...23]  = rs[23...16]
> rd[16...23]  = rs[31...24]
> 
> bitreverse:
> rd[0...31] = rs[31...0]
Yea, I think you're right Kito.  Goof on our side.

Jivan, I think this explains why it's not working for all of Mariam's 
cases -- odds are the cases where it is working are for the reversed crc8.

Let's drop this since it doesn't match the semantics of GCC's bitreverse.

Mariam's call on whether or not to utilize brev8 for the crc8 cases 
where it's likely faster than other sequences to reverse bits.

jeff