From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from nh605-vm1.bullet.mail.ssk.yahoo.co.jp (nh605-vm1.bullet.mail.ssk.yahoo.co.jp [182.22.90.74]) by sourceware.org (Postfix) with SMTP id 57A193857363 for ; Tue, 14 Jun 2022 03:54:42 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 57A193857363 Received: from [182.22.66.106] by nh605.bullet.mail.ssk.yahoo.co.jp with NNFMP; 14 Jun 2022 03:54:40 -0000 Received: from [182.22.91.129] by t604.bullet.mail.ssk.yahoo.co.jp with NNFMP; 14 Jun 2022 03:54:40 -0000 Received: from [127.0.0.1] by omp602.mail.ssk.yahoo.co.jp with NNFMP; 14 Jun 2022 03:54:40 -0000 X-Yahoo-Newman-Property: ymail-3 X-Yahoo-Newman-Id: 623587.13723.bm@omp602.mail.ssk.yahoo.co.jp Received: (qmail 4969 invoked by alias); 14 Jun 2022 03:54:40 -0000 Received: from unknown (HELO ?192.168.2.3?) (175.177.45.163 with ) by smtp6005.mail.ssk.ynwp.yahoo.co.jp with SMTP; 14 Jun 2022 03:54:40 -0000 X-YMail-JAS: oCfeK74VM1kagkCd3prYXpw4AjDDvf.nxZBXqiCVZ3bY4KcTpzm9L6geJzJseguamRqWnRJWyZ4xtgjzmJ.wW6DL1k2odNBjKrCks6AzFbK3JSk.32DEekVbDCNaLQjjkh_ctHxBkg-- X-Apparently-From: X-YMail-OSG: nXAaS5cVM1lsgYtcTM8c1eLFvesaildKLVDxu7.gw1fVj4i aqma4IWz3hMGXSSR77iN9RmxyJcGLL9uQBg_usD5wuHE4AqJnYtJ452lk6j3 52thdW2IRH2iGXzujh5vNQHj5e8LotYOqXzpn4e9_MtpWTv.5FaBGJClHV_g x6xAO8Wewzk7siXIZ02wf6QNJqVZzWHyO8DfiFmyyNEIiO5zCEF0i.yKB9Wp 9kVzUzupOTlenoushAJFrdw92uL8ikeY1rVa0obKmY4flUPqavsSGrjqbB6H _Hl66B.BsjYI7999Rnim7DXhdzBbn_XGHhuUm4IQV89EmlYXrFYd3kZVuZhY b61SXz5NyXH9HO0Bxo6SoqH5wvg153RSAutd9xyYtn6Ak1PhHtjj.hI6bPsJ VjEYHkFS5B5PBsmXCrGpNgUfAtn3nI2ozXCfErJsJUHv55_e1x6mRrffK4L_ aHpIkzR7p81_OW4jIfjy.mXJJWtIMgEwdsizFxIksMFt9Z1RJZOqjhzA9T.V j4i1iFiLdtT3st23diT1xBZi_dwZ8kqXrgl.a1X2SUNEwW1HVUUO0LtzjBcp AWav.Q898XQ_wZmgoBBZWHM.FnYD4.7ptSa_0walKkCvey0pWmMnJeH2OBFa .MEKS6yeG.QF5C.w8xzTC7lkzfg_JseQUPtiXQBLcZmdsbWycPakmEsOHbSz XN0NSgeMGlhpU63kmnibVoBMXq0YAapF3qtIkbBgSHItnV2vHVu.wqIR3iFK YBt_RXCYViWON5CYoZVJaW2C6b52PyljXMNFyBTfaSMHqbyl5tJL0tFS4quF lP.SsAvNVxaRHf5MNGjiNozNtEPFct0tRD9YIqS_j76PFt4M4g8E70jwmhHV hcC3IocGv6Au_LGIaE_r2KSdYHujJdPkXcfa6rWxM.GHtG.n.JSeqUMWeGyi jgLJvMyBJwTVOsOU90A-- Message-ID: Date: Tue, 14 Jun 2022 12:53:04 +0900 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 6.1; Win64; x64; rv:91.0) Gecko/20100101 Thunderbird/91.10.0 Content-Language: en-US To: GCC Patches From: Takayuki 'January June' Suwa Subject: [PATCH 5/5] xtensa: Eliminate [DS]Cmode hard register clobber that is immediately followed by whole overwrite the register Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Spam-Status: No, score=-12.9 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_ENVFROM_END_DIGIT, FREEMAIL_FROM, GIT_PATCH_0, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 14 Jun 2022 03:54:44 -0000 RTL expansion of substitution to [DS]Cmode hard register includes obstructive register clobber. A simplest example: double _Complex test(double _Complex c) { return c; } will be converted to: (set (reg:DF 42 [ c ]) (reg:DF 2 a2)) (set (reg:DF 43 [ c+8 ]) (reg:DF 4 a4)) (clobber (reg:DC 2 a2)) (set (reg:DF 2 a2) (reg:DF 42 [ c ])) (set (reg:DF 4 a4) (reg:DF 43 [ c+8 ])) (use (reg:DC 2 a2)) (return) and then finally: test: mov a8, a2 mov a9, a3 mov a6, a4 mov a7, a5 mov a2, a8 mov a3, a9 mov a4, a6 mov a5, a7 ret As you see, it is so ridiculous. This patch eliminates such clobber in order to prune away the wasted move instructions by the optimizer: test: ret gcc/ChangeLog: * config/xtensa/xtensa.md (DSC): New split pattern and mode iterator. --- gcc/config/xtensa/xtensa.md | 28 ++++++++++++++++++++++++++++ 1 file changed, 28 insertions(+) diff --git a/gcc/config/xtensa/xtensa.md b/gcc/config/xtensa/xtensa.md index e6f5594762f..3b3be5f8436 100644 --- a/gcc/config/xtensa/xtensa.md +++ b/gcc/config/xtensa/xtensa.md @@ -86,6 +86,10 @@ ;; This code iterator is for *shlrd and its variants. (define_code_iterator ior_op [ior plus]) +;; This mode iterator allows the DC and SC patterns to be defined from +;; the same template. +(define_mode_iterator DSC [DC SC]) + ;; Attributes. @@ -2755,3 +2759,27 @@ operands[6] = gen_rtx_MEM (SFmode, XEXP (operands[6], 0)); operands[7] = gen_rtx_MEM (SFmode, XEXP (operands[7], 0)); }) + +(define_split + [(clobber (match_operand:DSC 0 "register_operand"))] + "GP_REG_P (REGNO (operands[0]))" + [(const_int 0)] +{ + unsigned int regno = REGNO (operands[0]); + machine_mode inner_mode = GET_MODE_INNER (mode); + rtx_insn *insn; + rtx x; + if (! ((insn = next_nonnote_nondebug_insn (curr_insn)) + && NONJUMP_INSN_P (insn) + && GET_CODE (x = PATTERN (insn)) == SET + && REG_P (x = XEXP (x, 0)) + && GET_MODE (x) == inner_mode + && REGNO (x) == regno + && (insn = next_nonnote_nondebug_insn (insn)) + && NONJUMP_INSN_P (insn) + && GET_CODE (x = PATTERN (insn)) == SET + && REG_P (x = XEXP (x, 0)) + && GET_MODE (x) == inner_mode + && REGNO (x) == regno + REG_NREGS (operands[0]) / 2)) + FAIL; +}) -- 2.20.1