Re: [PATCH] RISC-V: Add Zvfbfmin extension to the -march= option

[Jeff Law <jeffreyalaw@gmail.com>]

On 12/12/23 20:24, Xiao Zeng wrote:
> This patch would like to add new sub extension (aka Zvfbfmin) to the
> -march= option. It introduces a new data type BF16.
> 
> Depending on different usage scenarios, the Zvfbfmin extension may
> depend on 'V' or 'Zve32f'. This patch only implements dependencies
> in scenario of Embedded Processor. In scenario of Application
> Processor, it is necessary to explicitly indicate the dependent
> 'V' extension.
> 
> You can locate more information about Zvfbfmin from below spec doc.
> 
> https://github.com/riscv/riscv-bfloat16/releases/download/20231027/riscv-bfloat16.pdf
> 
> gcc/ChangeLog:
> 
> 	* common/config/riscv/riscv-common.cc:
> 	(riscv_implied_info): Add zvfbfmin item.
>          (riscv_ext_version_table): Ditto.
>          (riscv_ext_flag_table): Ditto.
> 	* config/riscv/riscv.opt:
> 	(MASK_ZVFBFMIN): New macro.
> 	(MASK_VECTOR_ELEN_BF_16): Ditto.
> 	(TARGET_ZVFBFMIN): Ditto.
> 
> gcc/testsuite/ChangeLog:
> 
> 	* gcc.target/riscv/arch-31.c: New test.
> 	* gcc.target/riscv/arch-32.c: New test.
> 	* gcc.target/riscv/predef-32.c: New test.
> 	* gcc.target/riscv/predef-33.c: New test.
I fixed the trivial whitespace issue with the ChangeLog and pushed this 
to the trunk.  However, I do want to stress that all future 
contributions need to indicate that the patch was successfully 
regression tested.

jeff