From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mx07-00178001.pphosted.com (mx07-00178001.pphosted.com [185.132.182.106]) by sourceware.org (Postfix) with ESMTPS id EEB1F384D168 for ; Fri, 16 Sep 2022 12:25:47 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org EEB1F384D168 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=foss.st.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=foss.st.com Received: from pps.filterd (m0241204.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.17.1.5/8.17.1.5) with ESMTP id 28GABTne024821; Fri, 16 Sep 2022 14:25:41 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=foss.st.com; h=message-id : date : mime-version : subject : to : cc : references : from : in-reply-to : content-type : content-transfer-encoding; s=selector1; bh=4CaKiNXGitjfvZ35Esun5jlWiOITl32Zc3IAtnDsz8w=; b=JhDkYQGqPYQnhlN2q37HvtDjlnyVjS+aOogBNDNOhqEVbFcddNY79cP8D5PIJbVh4vCJ Adnd3KY/2mi+1fzcTIkWZZqqz6XO56MQ8ZHqrQjAzeQLtUUlolzHY+JDO3apDhael8P1 R+e2p21xDYngr3rsLmzt0PWAD0iPo9LHrhDqkc2dDo3XjwILgKFR0oRXHfiWAdo0CvDW l+fqs7BP8OzCKPRQrq3H5KI8c9M9SlHbbxm392nw3dVnLH8ybG93lxADfwBjA2EZLE5X Q4HV+kZUDKXorBE2uJHzGfk03A4x9ChhXyYJEJqBAylzyz7JZNBcF4mRCkX5j+/er/DX mA== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com (PPS) with ESMTPS id 3jm8ybmwe4-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 16 Sep 2022 14:25:41 +0200 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 0A9DA10002A; Fri, 16 Sep 2022 14:25:38 +0200 (CEST) Received: from Webmail-eu.st.com (shfdag1node3.st.com [10.75.129.71]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id CA17A229A9C; Fri, 16 Sep 2022 14:25:38 +0200 (CEST) Received: from [10.210.55.83] (10.75.127.50) by SHFDAG1NODE3.st.com (10.75.129.71) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256) id 15.1.2375.31; Fri, 16 Sep 2022 14:25:35 +0200 Message-ID: Date: Fri, 16 Sep 2022 14:25:34 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:102.0) Gecko/20100101 Thunderbird/102.1.2 Subject: Re: [PATCH] testsuite: Disable zero-scratch-regs-{7, 9, 11}.c on arm Content-Language: en-US To: CC: , , References: <20220915065416.1172508-1-torbjorn.svensson@foss.st.com> From: Torbjorn SVENSSON In-Reply-To: <20220915065416.1172508-1-torbjorn.svensson@foss.st.com> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 8bit X-Originating-IP: [10.75.127.50] X-ClientProxiedBy: SFHDAG2NODE3.st.com (10.75.127.6) To SHFDAG1NODE3.st.com (10.75.129.71) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.895,Hydra:6.0.528,FMLib:17.11.122.1 definitions=2022-09-16_07,2022-09-16_01,2022-06-22_01 X-Spam-Status: No, score=-13.1 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,GIT_PATCH_0,NICE_REPLY_A,RCVD_IN_DNSWL_LOW,SPF_HELO_NONE,SPF_PASS,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: Hi all, Appears that this is just a problem for gcc11 (and perhaps gcc12?). Master already has the needed implementation, so the patch below is not needed. Sorry for the buzz. Kind regards, Torbjörn On 2022-09-15 08:54, Torbjörn SVENSSON wrote: > -fzero-call-used-regs=all and -fzero-call-used-regs=all-gpr are not > supported on arm*. On arm-none-eabi, the testcases fails with: > > sorry, unimplemented: '-fzero-call-used-regs' not supported on this target > > 2022-09-15 Torbjörn SVENSSON > > gcc/testsuite/ChangeLog: > > * c-c++-common/zero-scratch-regs-7.c: Skip on arm. > * c-c++-common/zero-scratch-regs-9.c: Likewise. > * c-c++-common/zero-scratch-regs-11.c: Likewise. > > Co-Authored-By: Yvan ROUX > Signed-off-by: Torbjörn SVENSSON > --- > gcc/testsuite/c-c++-common/zero-scratch-regs-11.c | 2 +- > gcc/testsuite/c-c++-common/zero-scratch-regs-7.c | 1 + > gcc/testsuite/c-c++-common/zero-scratch-regs-9.c | 2 +- > 3 files changed, 3 insertions(+), 2 deletions(-) > > diff --git a/gcc/testsuite/c-c++-common/zero-scratch-regs-11.c b/gcc/testsuite/c-c++-common/zero-scratch-regs-11.c > index b7739b2c6f6..6fd2a1dc382 100644 > --- a/gcc/testsuite/c-c++-common/zero-scratch-regs-11.c > +++ b/gcc/testsuite/c-c++-common/zero-scratch-regs-11.c > @@ -1,5 +1,5 @@ > /* { dg-do run } */ > -/* { dg-skip-if "not implemented" { ! { i?86*-*-* x86_64*-*-* sparc*-*-* aarch64*-*-* arm*-*-* nvptx*-*-* s390*-*-* loongarch64*-*-* } } } */ > +/* { dg-skip-if "not implemented" { ! { i?86*-*-* x86_64*-*-* sparc*-*-* aarch64*-*-* nvptx*-*-* s390*-*-* loongarch64*-*-* } } } */ > /* { dg-options "-O2 -fzero-call-used-regs=all" } */ > > #include "zero-scratch-regs-10.c" > diff --git a/gcc/testsuite/c-c++-common/zero-scratch-regs-7.c b/gcc/testsuite/c-c++-common/zero-scratch-regs-7.c > index 2a4c8b2e73d..c684b4a02f9 100644 > --- a/gcc/testsuite/c-c++-common/zero-scratch-regs-7.c > +++ b/gcc/testsuite/c-c++-common/zero-scratch-regs-7.c > @@ -1,5 +1,6 @@ > /* { dg-do run } */ > /* { dg-skip-if "not implemented" { ia64*-*-* } } */ > +/* { dg-skip-if "not implemented" { arm*-*-* } } */ > /* { dg-options "-O2 -fzero-call-used-regs=all-gpr" } */ > > #include "zero-scratch-regs-1.c" > diff --git a/gcc/testsuite/c-c++-common/zero-scratch-regs-9.c b/gcc/testsuite/c-c++-common/zero-scratch-regs-9.c > index ea83bc146b7..0e8922053e8 100644 > --- a/gcc/testsuite/c-c++-common/zero-scratch-regs-9.c > +++ b/gcc/testsuite/c-c++-common/zero-scratch-regs-9.c > @@ -1,5 +1,5 @@ > /* { dg-do run } */ > -/* { dg-skip-if "not implemented" { ! { i?86*-*-* x86_64*-*-* sparc*-*-* aarch64*-*-* arm*-*-* nvptx*-*-* s390*-*-* loongarch64*-*-* } } } */ > +/* { dg-skip-if "not implemented" { ! { i?86*-*-* x86_64*-*-* sparc*-*-* aarch64*-*-* nvptx*-*-* s390*-*-* loongarch64*-*-* } } } */ > /* { dg-options "-O2 -fzero-call-used-regs=all" } */ > > #include "zero-scratch-regs-1.c"