[PATCH 0/6] rs6000: Remove "old" built-in function infrastructure

[PATCH 0/6] rs6000: Remove "old" built-in function infrastructure

[Bill Schmidt]

From: Bill Schmidt <wschmidt@linux.ibm.com>

Hi!

Now that the new built-in function support is all upstream and enabled, it
seems safe and prudent to remove the old code to avoid confusion.  I broke this
up to the extent possible, but the first patch is a bit large and messy because
so many dead functions have to be removed when taking out the
"new_builtins_are_live" variable.

Bill Schmidt (6):
  rs6000: Remove new_builtins_are_live and dead code it was guarding
  rs6000: Remove altivec_overloaded_builtins array and initialization
  rs6000: Rename rs6000-builtin-new.def to rs6000-builtins.def
  rs6000: Remove rs6000-builtin.def and associated data and functions
  rs6000: Rename functions with "new" in their names
  rs6000: Rename arrays to remove temporary _x suffix

 gcc/config/rs6000/darwin.h                    |     8 +-
 gcc/config/rs6000/rs6000-builtin.def          |  3350 ---
 ...00-builtin-new.def => rs6000-builtins.def} |     0
 gcc/config/rs6000/rs6000-c.c                  |  1342 +-
 gcc/config/rs6000/rs6000-call.c               | 17810 +++-------------
 gcc/config/rs6000/rs6000-gen-builtins.c       |   115 +-
 gcc/config/rs6000/rs6000-internal.h           |     2 +-
 gcc/config/rs6000/rs6000-protos.h             |     3 -
 gcc/config/rs6000/rs6000.c                    |   334 +-
 gcc/config/rs6000/rs6000.h                    |    58 -
 gcc/config/rs6000/t-rs6000                    |     7 +-
 11 files changed, 3173 insertions(+), 19856 deletions(-)
 delete mode 100644 gcc/config/rs6000/rs6000-builtin.def
 rename gcc/config/rs6000/{rs6000-builtin-new.def => rs6000-builtins.def} (100%)

-- 
2.27.0

[PATCH 2/6] rs6000: Remove altivec_overloaded_builtins array and initialization

[Bill Schmidt]

From: Bill Schmidt <wschmidt@linux.ibm.com>

Hi!

This patch just removes the huge altivec_overloaded_builtins array.

Bootstrapped and tested on powerpc64le-linux-gnu with no regressions.  Is this
okay for trunk?

Thanks!
Bill

2021-12-02  Bill Schmidt  <wschmidt@linux.ibm.com>

gcc/
	* config/rs6000/rs6000-call.c (altivec_overloaded_builtins): Remove.
	* config/rs6000/rs6000.h (altivec_overloaded_builtins): Remove.
---
 gcc/config/rs6000/rs6000-call.c | 5892 -------------------------------
 gcc/config/rs6000/rs6000.h      |    1 -
 2 files changed, 5893 deletions(-)

diff --git a/gcc/config/rs6000/rs6000-call.c b/gcc/config/rs6000/rs6000-call.c
index 7eac3f72abc..734887055b2 100644
--- a/gcc/config/rs6000/rs6000-call.c
+++ b/gcc/config/rs6000/rs6000-call.c
@@ -305,5898 +305,6 @@ static const struct rs6000_builtin_info_type rs6000_builtin_info[] =
 #undef RS6000_BUILTIN_P
 #undef RS6000_BUILTIN_X
 
-const struct altivec_builtin_types altivec_overloaded_builtins[] = {
-  /* Unary AltiVec/VSX builtins.  */
-  { ALTIVEC_BUILTIN_VEC_ABS, ALTIVEC_BUILTIN_ABS_V16QI,
-    RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0, 0 },
-  { ALTIVEC_BUILTIN_VEC_ABS, ALTIVEC_BUILTIN_ABS_V8HI,
-    RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0, 0 },
-  { ALTIVEC_BUILTIN_VEC_ABS, ALTIVEC_BUILTIN_ABS_V4SI,
-    RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0, 0 },
-  { ALTIVEC_BUILTIN_VEC_ABS, P8V_BUILTIN_ABS_V2DI,
-    RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0, 0 },
-  { ALTIVEC_BUILTIN_VEC_ABS, ALTIVEC_BUILTIN_ABS_V4SF,
-    RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0, 0 },
-  { ALTIVEC_BUILTIN_VEC_ABS, VSX_BUILTIN_XVABSDP,
-    RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0, 0 },
-  { ALTIVEC_BUILTIN_VEC_ABSS, ALTIVEC_BUILTIN_ABSS_V16QI,
-    RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0, 0 },
-  { ALTIVEC_BUILTIN_VEC_ABSS, ALTIVEC_BUILTIN_ABSS_V8HI,
-    RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0, 0 },
-  { ALTIVEC_BUILTIN_VEC_ABSS, ALTIVEC_BUILTIN_ABSS_V4SI,
-    RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0, 0 },
-  { ALTIVEC_BUILTIN_VEC_CEIL, ALTIVEC_BUILTIN_VRFIP,
-    RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0, 0 },
-  { ALTIVEC_BUILTIN_VEC_CEIL, VSX_BUILTIN_XVRDPIP,
-    RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0, 0 },
-  { ALTIVEC_BUILTIN_VEC_EXPTE, ALTIVEC_BUILTIN_VEXPTEFP,
-    RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0, 0 },
-  { ALTIVEC_BUILTIN_VEC_FLOOR, VSX_BUILTIN_XVRDPIM,
-    RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0, 0 },
-  { ALTIVEC_BUILTIN_VEC_FLOOR, ALTIVEC_BUILTIN_VRFIM,
-    RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0, 0 },
-  { ALTIVEC_BUILTIN_VEC_LOGE, ALTIVEC_BUILTIN_VLOGEFP,
-    RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0, 0 },
-  { ALTIVEC_BUILTIN_VEC_MTVSCR, ALTIVEC_BUILTIN_MTVSCR,
-    RS6000_BTI_void, RS6000_BTI_V4SI, 0, 0 },
-  { ALTIVEC_BUILTIN_VEC_MTVSCR, ALTIVEC_BUILTIN_MTVSCR,
-    RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, 0, 0 },
-  { ALTIVEC_BUILTIN_VEC_MTVSCR, ALTIVEC_BUILTIN_MTVSCR,
-    RS6000_BTI_void, RS6000_BTI_bool_V4SI, 0, 0 },
-  { ALTIVEC_BUILTIN_VEC_MTVSCR, ALTIVEC_BUILTIN_MTVSCR,
-    RS6000_BTI_void, RS6000_BTI_V8HI, 0, 0 },
-  { ALTIVEC_BUILTIN_VEC_MTVSCR, ALTIVEC_BUILTIN_MTVSCR,
-    RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, 0, 0 },
-  { ALTIVEC_BUILTIN_VEC_MTVSCR, ALTIVEC_BUILTIN_MTVSCR,
-    RS6000_BTI_void, RS6000_BTI_bool_V8HI, 0, 0 },
-  { ALTIVEC_BUILTIN_VEC_MTVSCR, ALTIVEC_BUILTIN_MTVSCR,
-    RS6000_BTI_void, RS6000_BTI_pixel_V8HI, 0, 0 },
-  { ALTIVEC_BUILTIN_VEC_MTVSCR, ALTIVEC_BUILTIN_MTVSCR,
-    RS6000_BTI_void, RS6000_BTI_V16QI, 0, 0 },
-  { ALTIVEC_BUILTIN_VEC_MTVSCR, ALTIVEC_BUILTIN_MTVSCR,
-    RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, 0, 0 },
-  { ALTIVEC_BUILTIN_VEC_MTVSCR, ALTIVEC_BUILTIN_MTVSCR,
-    RS6000_BTI_void, RS6000_BTI_bool_V16QI, 0, 0 },
-  { ALTIVEC_BUILTIN_VEC_RE, ALTIVEC_BUILTIN_VREFP,
-    RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0, 0 },
-  { ALTIVEC_BUILTIN_VEC_RE, VSX_BUILTIN_XVREDP,
-    RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0, 0 },
-  { ALTIVEC_BUILTIN_VEC_ROUND, ALTIVEC_BUILTIN_VRFIN,
-    RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0, 0 },
-  { ALTIVEC_BUILTIN_VEC_ROUND, VSX_BUILTIN_XVRDPI,
-    RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0, 0 },
-  { ALTIVEC_BUILTIN_VEC_RECIP, ALTIVEC_BUILTIN_VRECIPFP,
-    RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 },
-  { ALTIVEC_BUILTIN_VEC_RECIP, VSX_BUILTIN_RECIP_V2DF,
-    RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 },
-  { ALTIVEC_BUILTIN_VEC_RSQRT, ALTIVEC_BUILTIN_VRSQRTFP,
-    RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0, 0 },
-  { ALTIVEC_BUILTIN_VEC_RSQRT, VSX_BUILTIN_RSQRT_2DF,
-    RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0, 0 },
-  { ALTIVEC_BUILTIN_VEC_RSQRTE, ALTIVEC_BUILTIN_VRSQRTEFP,
-    RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0, 0 },
-  { ALTIVEC_BUILTIN_VEC_RSQRTE, VSX_BUILTIN_XVRSQRTEDP,
-    RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0, 0 },
-  { ALTIVEC_BUILTIN_VEC_TRUNC, ALTIVEC_BUILTIN_VRFIZ,
-    RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0, 0 },
-  { ALTIVEC_BUILTIN_VEC_TRUNC, VSX_BUILTIN_XVRDPIZ,
-    RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0, 0 },
-  { ALTIVEC_BUILTIN_VEC_UNPACKH, ALTIVEC_BUILTIN_VUPKHSB,
-    RS6000_BTI_V8HI, RS6000_BTI_V16QI, 0, 0 },
-  { ALTIVEC_BUILTIN_VEC_UNPACKH, ALTIVEC_BUILTIN_VUPKHSB,
-    RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V16QI, 0, 0 },
-  { ALTIVEC_BUILTIN_VEC_UNPACKH, ALTIVEC_BUILTIN_VUPKHSH,
-    RS6000_BTI_V4SI, RS6000_BTI_V8HI, 0, 0 },
-  { ALTIVEC_BUILTIN_VEC_UNPACKH, ALTIVEC_BUILTIN_VUPKHSH,
-    RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V8HI, 0, 0 },
-  { ALTIVEC_BUILTIN_VEC_UNPACKH, P8V_BUILTIN_VUPKHSW,
-    RS6000_BTI_V2DI, RS6000_BTI_V4SI, 0, 0 },
-  { ALTIVEC_BUILTIN_VEC_UNPACKH, P8V_BUILTIN_VUPKHSW,
-    RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V4SI, 0, 0 },
-  { ALTIVEC_BUILTIN_VEC_UNPACKH, ALTIVEC_BUILTIN_VUPKHPX,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_pixel_V8HI, 0, 0 },
-  { ALTIVEC_BUILTIN_VEC_UNPACKH, VSX_BUILTIN_DOUBLEH_V4SF,
-    RS6000_BTI_V2DF, RS6000_BTI_V4SF, 0, 0 },
-  { ALTIVEC_BUILTIN_VEC_VUPKHSH, ALTIVEC_BUILTIN_VUPKHSH,
-    RS6000_BTI_V4SI, RS6000_BTI_V8HI, 0, 0 },
-  { ALTIVEC_BUILTIN_VEC_VUPKHSH, ALTIVEC_BUILTIN_VUPKHSH,
-    RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V8HI, 0, 0 },
-  { ALTIVEC_BUILTIN_VEC_VUPKHSH, P8V_BUILTIN_VUPKHSW,
-    RS6000_BTI_V2DI, RS6000_BTI_V4SI, 0, 0 },
-  { ALTIVEC_BUILTIN_VEC_VUPKHSH, P8V_BUILTIN_VUPKHSW,
-    RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V4SI, 0, 0 },
-  { ALTIVEC_BUILTIN_VEC_VUPKHPX, ALTIVEC_BUILTIN_VUPKHPX,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V8HI, 0, 0 },
-  { ALTIVEC_BUILTIN_VEC_VUPKHPX, ALTIVEC_BUILTIN_VUPKHPX,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_pixel_V8HI, 0, 0 },
-  { ALTIVEC_BUILTIN_VEC_VUPKHSB, ALTIVEC_BUILTIN_VUPKHSB,
-    RS6000_BTI_V8HI, RS6000_BTI_V16QI, 0, 0 },
-  { ALTIVEC_BUILTIN_VEC_VUPKHSB, ALTIVEC_BUILTIN_VUPKHSB,
-    RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V16QI, 0, 0 },
-  { ALTIVEC_BUILTIN_VEC_UNPACKL, ALTIVEC_BUILTIN_VUPKLSB,
-    RS6000_BTI_V8HI, RS6000_BTI_V16QI, 0, 0 },
-  { ALTIVEC_BUILTIN_VEC_UNPACKL, ALTIVEC_BUILTIN_VUPKLSB,
-    RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V16QI, 0, 0 },
-  { ALTIVEC_BUILTIN_VEC_UNPACKL, ALTIVEC_BUILTIN_VUPKLPX,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_pixel_V8HI, 0, 0 },
-  { ALTIVEC_BUILTIN_VEC_UNPACKL, ALTIVEC_BUILTIN_VUPKLSH,
-    RS6000_BTI_V4SI, RS6000_BTI_V8HI, 0, 0 },
-  { ALTIVEC_BUILTIN_VEC_UNPACKL, ALTIVEC_BUILTIN_VUPKLSH,
-    RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V8HI, 0, 0 },
-  { ALTIVEC_BUILTIN_VEC_UNPACKL, P8V_BUILTIN_VUPKLSW,
-    RS6000_BTI_V2DI, RS6000_BTI_V4SI, 0, 0 },
-  { ALTIVEC_BUILTIN_VEC_UNPACKL, P8V_BUILTIN_VUPKLSW,
-    RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V4SI, 0, 0 },
-  { ALTIVEC_BUILTIN_VEC_UNPACKL, VSX_BUILTIN_DOUBLEL_V4SF,
-    RS6000_BTI_V2DF, RS6000_BTI_V4SF, 0, 0 },
-  { ALTIVEC_BUILTIN_VEC_VUPKLPX, ALTIVEC_BUILTIN_VUPKLPX,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V8HI, 0, 0 },
-  { ALTIVEC_BUILTIN_VEC_VUPKLPX, ALTIVEC_BUILTIN_VUPKLPX,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_pixel_V8HI, 0, 0 },
-  { ALTIVEC_BUILTIN_VEC_VUPKLSH, ALTIVEC_BUILTIN_VUPKLSH,
-    RS6000_BTI_V4SI, RS6000_BTI_V8HI, 0, 0 },
-  { ALTIVEC_BUILTIN_VEC_VUPKLSH, ALTIVEC_BUILTIN_VUPKLSH,
-    RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V8HI, 0, 0 },
-  { ALTIVEC_BUILTIN_VEC_VUPKLSB, ALTIVEC_BUILTIN_VUPKLSB,
-    RS6000_BTI_V8HI, RS6000_BTI_V16QI, 0, 0 },
-  { ALTIVEC_BUILTIN_VEC_VUPKLSB, ALTIVEC_BUILTIN_VUPKLSB,
-    RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V16QI, 0, 0 },
-
-  /* Binary AltiVec/VSX builtins.  */
-  { ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUBM,
-    RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUBM,
-    RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUBM,
-    RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUBM,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUBM,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUBM,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUHM,
-    RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUHM,
-    RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUHM,
-    RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUHM,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUHM,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUHM,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUWM,
-    RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUWM,
-    RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUWM,
-    RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUWM,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUWM,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUWM,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_ADD, P8V_BUILTIN_VADDUDM,
-    RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, 0 },
-  { ALTIVEC_BUILTIN_VEC_ADD, P8V_BUILTIN_VADDUDM,
-    RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, 0 },
-  { ALTIVEC_BUILTIN_VEC_ADD, P8V_BUILTIN_VADDUDM,
-    RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 },
-  { ALTIVEC_BUILTIN_VEC_ADD, P8V_BUILTIN_VADDUDM,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI, 0 },
-  { ALTIVEC_BUILTIN_VEC_ADD, P8V_BUILTIN_VADDUDM,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, 0 },
-  { ALTIVEC_BUILTIN_VEC_ADD, P8V_BUILTIN_VADDUDM,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 },
-  { ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDFP,
-    RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 },
-  { ALTIVEC_BUILTIN_VEC_ADD, VSX_BUILTIN_XVADDDP,
-    RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 },
-  { ALTIVEC_BUILTIN_VEC_ADD, P8V_BUILTIN_VADDUQM,
-    RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, 0 },
-  { ALTIVEC_BUILTIN_VEC_ADD, P8V_BUILTIN_VADDUQM,
-    RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI,
-    RS6000_BTI_unsigned_V1TI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VADDFP, ALTIVEC_BUILTIN_VADDFP,
-    RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 },
-  { ALTIVEC_BUILTIN_VEC_VADDUWM, ALTIVEC_BUILTIN_VADDUWM,
-    RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VADDUWM, ALTIVEC_BUILTIN_VADDUWM,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VADDUWM, ALTIVEC_BUILTIN_VADDUWM,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VADDUWM, ALTIVEC_BUILTIN_VADDUWM,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VADDUWM, ALTIVEC_BUILTIN_VADDUWM,
-    RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VADDUWM, ALTIVEC_BUILTIN_VADDUWM,
-    RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VADDUWM, ALTIVEC_BUILTIN_VADDUWM,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VADDUWM, ALTIVEC_BUILTIN_VADDUWM,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VADDUHM, ALTIVEC_BUILTIN_VADDUHM,
-    RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VADDUHM, ALTIVEC_BUILTIN_VADDUHM,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VADDUHM, ALTIVEC_BUILTIN_VADDUHM,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VADDUHM, ALTIVEC_BUILTIN_VADDUHM,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VADDUHM, ALTIVEC_BUILTIN_VADDUHM,
-    RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VADDUHM, ALTIVEC_BUILTIN_VADDUHM,
-    RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VADDUHM, ALTIVEC_BUILTIN_VADDUHM,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VADDUHM, ALTIVEC_BUILTIN_VADDUHM,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VADDUBM, ALTIVEC_BUILTIN_VADDUBM,
-    RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VADDUBM, ALTIVEC_BUILTIN_VADDUBM,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VADDUBM, ALTIVEC_BUILTIN_VADDUBM,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VADDUBM, ALTIVEC_BUILTIN_VADDUBM,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VADDUBM, ALTIVEC_BUILTIN_VADDUBM,
-    RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VADDUBM, ALTIVEC_BUILTIN_VADDUBM,
-    RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VADDUBM, ALTIVEC_BUILTIN_VADDUBM,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VADDUBM, ALTIVEC_BUILTIN_VADDUBM,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_ADDC, ALTIVEC_BUILTIN_VADDCUW,
-    RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_ADDC, ALTIVEC_BUILTIN_VADDCUW,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI,
-    RS6000_BTI_unsigned_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_ADDC, P8V_BUILTIN_VADDCUQ,
-    RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI,
-    RS6000_BTI_unsigned_V1TI, 0 },
-  { ALTIVEC_BUILTIN_VEC_ADDC, P8V_BUILTIN_VADDCUQ,
-    RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, 0 },
-  { ALTIVEC_BUILTIN_VEC_ADDEC, P8V_BUILTIN_VADDECUQ,
-    RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI,
-    RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI },
-  { ALTIVEC_BUILTIN_VEC_ADDEC, P8V_BUILTIN_VADDECUQ,
-    RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI },
-  { ALTIVEC_BUILTIN_VEC_ADDS, ALTIVEC_BUILTIN_VADDUBS,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_ADDS, ALTIVEC_BUILTIN_VADDUBS,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_ADDS, ALTIVEC_BUILTIN_VADDUBS,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_ADDS, ALTIVEC_BUILTIN_VADDSBS,
-    RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_ADDS, ALTIVEC_BUILTIN_VADDSBS,
-    RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_ADDS, ALTIVEC_BUILTIN_VADDSBS,
-    RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_ADDS, ALTIVEC_BUILTIN_VADDUHS,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_ADDS, ALTIVEC_BUILTIN_VADDUHS,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_ADDS, ALTIVEC_BUILTIN_VADDUHS,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_ADDS, ALTIVEC_BUILTIN_VADDSHS,
-    RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_ADDS, ALTIVEC_BUILTIN_VADDSHS,
-    RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_ADDS, ALTIVEC_BUILTIN_VADDSHS,
-    RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_ADDS, ALTIVEC_BUILTIN_VADDUWS,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_ADDS, ALTIVEC_BUILTIN_VADDUWS,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_ADDS, ALTIVEC_BUILTIN_VADDUWS,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_ADDS, ALTIVEC_BUILTIN_VADDSWS,
-    RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_ADDS, ALTIVEC_BUILTIN_VADDSWS,
-    RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_ADDS, ALTIVEC_BUILTIN_VADDSWS,
-    RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VADDSWS, ALTIVEC_BUILTIN_VADDSWS,
-    RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VADDSWS, ALTIVEC_BUILTIN_VADDSWS,
-    RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VADDSWS, ALTIVEC_BUILTIN_VADDSWS,
-    RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VADDUWS, ALTIVEC_BUILTIN_VADDUWS,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VADDUWS, ALTIVEC_BUILTIN_VADDUWS,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VADDUWS, ALTIVEC_BUILTIN_VADDUWS,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VADDUWS, ALTIVEC_BUILTIN_VADDUWS,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VADDUWS, ALTIVEC_BUILTIN_VADDUWS,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VADDSHS, ALTIVEC_BUILTIN_VADDSHS,
-    RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VADDSHS, ALTIVEC_BUILTIN_VADDSHS,
-    RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VADDSHS, ALTIVEC_BUILTIN_VADDSHS,
-    RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VADDUHS, ALTIVEC_BUILTIN_VADDUHS,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VADDUHS, ALTIVEC_BUILTIN_VADDUHS,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VADDUHS, ALTIVEC_BUILTIN_VADDUHS,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VADDUHS, ALTIVEC_BUILTIN_VADDUHS,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VADDUHS, ALTIVEC_BUILTIN_VADDUHS,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VADDSBS, ALTIVEC_BUILTIN_VADDSBS,
-    RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VADDSBS, ALTIVEC_BUILTIN_VADDSBS,
-    RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VADDSBS, ALTIVEC_BUILTIN_VADDSBS,
-    RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VADDUBS, ALTIVEC_BUILTIN_VADDUBS,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VADDUBS, ALTIVEC_BUILTIN_VADDUBS,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VADDUBS, ALTIVEC_BUILTIN_VADDUBS,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VADDUBS, ALTIVEC_BUILTIN_VADDUBS,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VADDUBS, ALTIVEC_BUILTIN_VADDUBS,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, 0 },
-
-  { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V4SF,
-    RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 },
-  { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V4SF,
-    RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_bool_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V4SF,
-    RS6000_BTI_V4SF, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SF, 0 },
-  { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V2DF,
-    RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 },
-  { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V2DF,
-    RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_bool_V2DI, 0 },
-  { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V2DF,
-    RS6000_BTI_V2DF, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DF, 0 },
-  { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V2DI,
-    RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 },
-  { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V2DI,
-    RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, 0 },
-  { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V2DI,
-    RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, 0 },
-  { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V2DI_UNS,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 },
-  { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V2DI_UNS,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, 0 },
-  { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V2DI_UNS,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI, 0 },
-  { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V2DI_UNS,
-    RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, 0 },
-  { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V4SI_UNS,
-    RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V4SI,
-    RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V4SI,
-    RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V4SI,
-    RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V4SI_UNS,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V4SI_UNS,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V4SI_UNS,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V8HI_UNS,
-    RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V8HI,
-    RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V8HI,
-    RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V8HI,
-    RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V8HI_UNS,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V8HI_UNS,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V8HI_UNS,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V16QI,
-    RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V16QI_UNS,
-    RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V16QI,
-    RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V16QI,
-    RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V16QI_UNS,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V16QI_UNS,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V16QI_UNS,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
-
-  { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V4SF,
-    RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 },
-  { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V4SF,
-    RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_bool_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V4SF,
-    RS6000_BTI_V4SF, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SF, 0 },
-  { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V2DF,
-    RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 },
-  { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V2DF,
-    RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_bool_V2DI, 0 },
-  { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V2DF,
-    RS6000_BTI_V2DF, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DF, 0 },
-  { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V2DI,
-    RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 },
-  { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V2DI,
-    RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, 0 },
-  { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V2DI,
-    RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, 0 },
-  { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V2DI_UNS,
-    RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, 0 },
-  { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V2DI_UNS,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 },
-  { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V2DI_UNS,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, 0 },
-  { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V2DI_UNS,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI, 0 },
-  { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V4SI_UNS,
-    RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V4SI,
-    RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V4SI,
-    RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V4SI,
-    RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V4SI_UNS,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V4SI_UNS,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V4SI_UNS,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V8HI_UNS,
-    RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V8HI,
-    RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V8HI,
-    RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V8HI,
-    RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V8HI_UNS,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V8HI_UNS,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V8HI_UNS,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V16QI,
-    RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V16QI_UNS,
-    RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V16QI,
-    RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V16QI,
-    RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V16QI_UNS,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V16QI_UNS,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V16QI_UNS,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
-
-  { ALTIVEC_BUILTIN_VEC_AVG, ALTIVEC_BUILTIN_VAVGUB,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_AVG, ALTIVEC_BUILTIN_VAVGSB,
-    RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_AVG, ALTIVEC_BUILTIN_VAVGUH,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_AVG, ALTIVEC_BUILTIN_VAVGSH,
-    RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_AVG, ALTIVEC_BUILTIN_VAVGUW,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_AVG, ALTIVEC_BUILTIN_VAVGSW,
-    RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VAVGSW, ALTIVEC_BUILTIN_VAVGSW,
-    RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VAVGUW, ALTIVEC_BUILTIN_VAVGUW,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VAVGSH, ALTIVEC_BUILTIN_VAVGSH,
-    RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VAVGUH, ALTIVEC_BUILTIN_VAVGUH,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VAVGSB, ALTIVEC_BUILTIN_VAVGSB,
-    RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VAVGUB, ALTIVEC_BUILTIN_VAVGUB,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_CMPB, ALTIVEC_BUILTIN_VCMPBFP,
-    RS6000_BTI_V4SI, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 },
-  { ALTIVEC_BUILTIN_VEC_CMPEQ, ALTIVEC_BUILTIN_VCMPEQUB,
-    RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_CMPEQ, ALTIVEC_BUILTIN_VCMPEQUB,
-    RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_CMPEQ, ALTIVEC_BUILTIN_VCMPEQUB,
-    RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_CMPEQ, ALTIVEC_BUILTIN_VCMPEQUH,
-    RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_CMPEQ, ALTIVEC_BUILTIN_VCMPEQUH,
-    RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_CMPEQ, ALTIVEC_BUILTIN_VCMPEQUH,
-    RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_CMPEQ, ALTIVEC_BUILTIN_VCMPEQUW,
-    RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_CMPEQ, ALTIVEC_BUILTIN_VCMPEQUW,
-    RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_CMPEQ, ALTIVEC_BUILTIN_VCMPEQUW,
-    RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_CMPEQ, P8V_BUILTIN_VCMPEQUD,
-    RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, 0 },
-  { ALTIVEC_BUILTIN_VEC_CMPEQ, P8V_BUILTIN_VCMPEQUD,
-    RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 },
-  { ALTIVEC_BUILTIN_VEC_CMPEQ, P8V_BUILTIN_VCMPEQUD,
-    RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 },
-  { ALTIVEC_BUILTIN_VEC_CMPEQ, P10V_BUILTIN_VCMPEQUT,
-    RS6000_BTI_bool_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, 0 },
-  { ALTIVEC_BUILTIN_VEC_CMPEQ, P10V_BUILTIN_VCMPEQUT,
-    RS6000_BTI_bool_V1TI, RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, 0 },
-  { ALTIVEC_BUILTIN_VEC_CMPEQ, ALTIVEC_BUILTIN_VCMPEQFP,
-    RS6000_BTI_bool_V4SI, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 },
-  { ALTIVEC_BUILTIN_VEC_CMPEQ, VSX_BUILTIN_XVCMPEQDP,
-    RS6000_BTI_bool_V2DI, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 },
-  { ALTIVEC_BUILTIN_VEC_VCMPEQFP, ALTIVEC_BUILTIN_VCMPEQFP,
-    RS6000_BTI_bool_V4SI, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 },
-
-  { ALTIVEC_BUILTIN_VEC_VCMPEQUW, ALTIVEC_BUILTIN_VCMPEQUW,
-    RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VCMPEQUW, ALTIVEC_BUILTIN_VCMPEQUW,
-    RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
-
-  { ALTIVEC_BUILTIN_VEC_VCMPEQUH, ALTIVEC_BUILTIN_VCMPEQUH,
-    RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VCMPEQUH, ALTIVEC_BUILTIN_VCMPEQUH,
-    RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
-
-  { ALTIVEC_BUILTIN_VEC_VCMPEQUB, ALTIVEC_BUILTIN_VCMPEQUB,
-    RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VCMPEQUB, ALTIVEC_BUILTIN_VCMPEQUB,
-    RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
-
-  { ALTIVEC_BUILTIN_VEC_CMPGE, ALTIVEC_BUILTIN_VCMPGEFP,
-    RS6000_BTI_bool_V4SI, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 },
-  { ALTIVEC_BUILTIN_VEC_CMPGE, VSX_BUILTIN_XVCMPGEDP,
-    RS6000_BTI_bool_V2DI, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 },
-  { ALTIVEC_BUILTIN_VEC_CMPGE, VSX_BUILTIN_CMPGE_16QI,
-    RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0},
-  { ALTIVEC_BUILTIN_VEC_CMPGE, VSX_BUILTIN_CMPGE_U16QI,
-    RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI,
-    RS6000_BTI_unsigned_V16QI, 0},
-  { ALTIVEC_BUILTIN_VEC_CMPGE, VSX_BUILTIN_CMPGE_8HI,
-    RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0},
-  { ALTIVEC_BUILTIN_VEC_CMPGE, VSX_BUILTIN_CMPGE_U8HI,
-    RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI,
-    RS6000_BTI_unsigned_V8HI, 0},
-  { ALTIVEC_BUILTIN_VEC_CMPGE, VSX_BUILTIN_CMPGE_4SI,
-    RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0},
-  { ALTIVEC_BUILTIN_VEC_CMPGE, VSX_BUILTIN_CMPGE_U4SI,
-    RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI,
-    RS6000_BTI_unsigned_V4SI, 0},
-  { ALTIVEC_BUILTIN_VEC_CMPGE, VSX_BUILTIN_CMPGE_2DI,
-    RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0},
-  { ALTIVEC_BUILTIN_VEC_CMPGE, VSX_BUILTIN_CMPGE_U2DI,
-    RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI,
-    RS6000_BTI_unsigned_V2DI, 0},
-
-  { ALTIVEC_BUILTIN_VEC_CMPGE, P10V_BUILTIN_CMPGE_1TI,
-    RS6000_BTI_bool_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, 0},
-  { ALTIVEC_BUILTIN_VEC_CMPGE, P10V_BUILTIN_CMPGE_U1TI,
-    RS6000_BTI_bool_V1TI, RS6000_BTI_unsigned_V1TI,
-    RS6000_BTI_unsigned_V1TI, 0},
-  { ALTIVEC_BUILTIN_VEC_CMPGT, ALTIVEC_BUILTIN_VCMPGTUB,
-    RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_CMPGT, ALTIVEC_BUILTIN_VCMPGTSB,
-    RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_CMPGT, ALTIVEC_BUILTIN_VCMPGTUH,
-    RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_CMPGT, ALTIVEC_BUILTIN_VCMPGTSH,
-    RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_CMPGT, ALTIVEC_BUILTIN_VCMPGTUW,
-    RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_CMPGT, ALTIVEC_BUILTIN_VCMPGTSW,
-    RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_CMPGT, P8V_BUILTIN_VCMPGTUD,
-    RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 },
-  { ALTIVEC_BUILTIN_VEC_CMPGT, P10V_BUILTIN_VCMPGTUT,
-    RS6000_BTI_bool_V1TI, RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, 0 },
-  { ALTIVEC_BUILTIN_VEC_CMPGT, P8V_BUILTIN_VCMPGTSD,
-    RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 },
-  { ALTIVEC_BUILTIN_VEC_CMPGT, P10V_BUILTIN_VCMPGTST,
-    RS6000_BTI_bool_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, 0 },
-  { ALTIVEC_BUILTIN_VEC_CMPGT, ALTIVEC_BUILTIN_VCMPGTFP,
-    RS6000_BTI_bool_V4SI, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 },
-  { ALTIVEC_BUILTIN_VEC_CMPGT, VSX_BUILTIN_XVCMPGTDP,
-    RS6000_BTI_bool_V2DI, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 },
-  { ALTIVEC_BUILTIN_VEC_VCMPGTFP, ALTIVEC_BUILTIN_VCMPGTFP,
-    RS6000_BTI_bool_V4SI, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 },
-  { ALTIVEC_BUILTIN_VEC_VCMPGTSW, ALTIVEC_BUILTIN_VCMPGTSW,
-    RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VCMPGTUW, ALTIVEC_BUILTIN_VCMPGTUW,
-    RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VCMPGTSH, ALTIVEC_BUILTIN_VCMPGTSH,
-    RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VCMPGTUH, ALTIVEC_BUILTIN_VCMPGTUH,
-    RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VCMPGTSB, ALTIVEC_BUILTIN_VCMPGTSB,
-    RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VCMPGTUB, ALTIVEC_BUILTIN_VCMPGTUB,
-    RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_CMPLE, ALTIVEC_BUILTIN_VCMPGEFP,
-    RS6000_BTI_bool_V4SI, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 },
-  { ALTIVEC_BUILTIN_VEC_CMPLE, VSX_BUILTIN_XVCMPGEDP,
-    RS6000_BTI_bool_V2DI, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 },
-  { ALTIVEC_BUILTIN_VEC_CMPLE, VSX_BUILTIN_CMPLE_16QI,
-    RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0},
-  { ALTIVEC_BUILTIN_VEC_CMPLE, VSX_BUILTIN_CMPLE_U16QI,
-    RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI,
-    RS6000_BTI_unsigned_V16QI, 0},
-  { ALTIVEC_BUILTIN_VEC_CMPLE, VSX_BUILTIN_CMPLE_8HI,
-    RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0},
-  { ALTIVEC_BUILTIN_VEC_CMPLE, VSX_BUILTIN_CMPLE_U8HI,
-    RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI,
-    RS6000_BTI_unsigned_V8HI, 0},
-  { ALTIVEC_BUILTIN_VEC_CMPLE, VSX_BUILTIN_CMPLE_4SI,
-    RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0},
-  { ALTIVEC_BUILTIN_VEC_CMPLE, VSX_BUILTIN_CMPLE_U4SI,
-    RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI,
-    RS6000_BTI_unsigned_V4SI, 0},
-  { ALTIVEC_BUILTIN_VEC_CMPLE, VSX_BUILTIN_CMPLE_2DI,
-    RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0},
-  { ALTIVEC_BUILTIN_VEC_CMPLE, VSX_BUILTIN_CMPLE_U2DI,
-    RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI,
-    RS6000_BTI_unsigned_V2DI, 0},
-  { ALTIVEC_BUILTIN_VEC_CMPLE, P10V_BUILTIN_CMPLE_1TI,
-    RS6000_BTI_bool_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, 0},
-  { ALTIVEC_BUILTIN_VEC_CMPLE, P10V_BUILTIN_CMPLE_U1TI,
-    RS6000_BTI_bool_V1TI, RS6000_BTI_unsigned_V1TI,
-    RS6000_BTI_unsigned_V1TI, 0},
-  { ALTIVEC_BUILTIN_VEC_CMPLT, ALTIVEC_BUILTIN_VCMPGTUB,
-    RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_CMPLT, ALTIVEC_BUILTIN_VCMPGTSB,
-    RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_CMPLT, ALTIVEC_BUILTIN_VCMPGTUH,
-    RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_CMPLT, ALTIVEC_BUILTIN_VCMPGTSH,
-    RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_CMPLT, ALTIVEC_BUILTIN_VCMPGTUW,
-    RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_CMPLT, ALTIVEC_BUILTIN_VCMPGTSW,
-    RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_CMPLT, P8V_BUILTIN_VCMPGTUD,
-    RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 },
-  { ALTIVEC_BUILTIN_VEC_CMPLT, P8V_BUILTIN_VCMPGTSD,
-    RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 },
-  { ALTIVEC_BUILTIN_VEC_CMPLT, ALTIVEC_BUILTIN_VCMPGTFP,
-    RS6000_BTI_bool_V4SI, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 },
-  { ALTIVEC_BUILTIN_VEC_CMPLT, VSX_BUILTIN_XVCMPGTDP,
-    RS6000_BTI_bool_V2DI, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 },
-  { ALTIVEC_BUILTIN_VEC_COPYSIGN, VSX_BUILTIN_CPSGNDP,
-    RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 },
-  { ALTIVEC_BUILTIN_VEC_COPYSIGN, ALTIVEC_BUILTIN_COPYSIGN_V4SF,
-    RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 },
-  { ALTIVEC_BUILTIN_VEC_CTF, ALTIVEC_BUILTIN_VCFUX,
-    RS6000_BTI_V4SF, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, 0 },
-  { ALTIVEC_BUILTIN_VEC_CTF, ALTIVEC_BUILTIN_VCFSX,
-    RS6000_BTI_V4SF, RS6000_BTI_V4SI, RS6000_BTI_INTSI, 0 },
-  { ALTIVEC_BUILTIN_VEC_CTF, VSX_BUILTIN_XVCVSXDDP_SCALE,
-    RS6000_BTI_V2DF, RS6000_BTI_V2DI, RS6000_BTI_INTSI, 0},
-  { ALTIVEC_BUILTIN_VEC_CTF, VSX_BUILTIN_XVCVUXDDP_SCALE,
-    RS6000_BTI_V2DF, RS6000_BTI_unsigned_V2DI, RS6000_BTI_INTSI, 0},
-  { ALTIVEC_BUILTIN_VEC_VCFSX, ALTIVEC_BUILTIN_VCFSX,
-    RS6000_BTI_V4SF, RS6000_BTI_V4SI, RS6000_BTI_INTSI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VCFUX, ALTIVEC_BUILTIN_VCFUX,
-    RS6000_BTI_V4SF, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, 0 },
-  { ALTIVEC_BUILTIN_VEC_CTS, ALTIVEC_BUILTIN_VCTSXS,
-    RS6000_BTI_V4SI, RS6000_BTI_V4SF, RS6000_BTI_INTSI, 0 },
-  { ALTIVEC_BUILTIN_VEC_CTS, VSX_BUILTIN_XVCVDPSXDS_SCALE,
-    RS6000_BTI_V2DI, RS6000_BTI_V2DF, RS6000_BTI_INTSI, 0 },
-  { ALTIVEC_BUILTIN_VEC_CTU, ALTIVEC_BUILTIN_VCTUXS,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_V4SF, RS6000_BTI_INTSI, 0 },
-  { ALTIVEC_BUILTIN_VEC_CTU, VSX_BUILTIN_XVCVDPUXDS_SCALE,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_V2DF, RS6000_BTI_INTSI, 0 },
-
-  { P8V_BUILTIN_VEC_BCDADD, MISC_BUILTIN_BCDADD_V1TI,
-    RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_INTSI },
-  { P8V_BUILTIN_VEC_BCDADD, MISC_BUILTIN_BCDADD_V16QI,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI },
-  { P8V_BUILTIN_VEC_BCDADD_LT, MISC_BUILTIN_BCDADD_LT_V1TI,
-    RS6000_BTI_INTSI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_INTSI },
-  { P8V_BUILTIN_VEC_BCDADD_LT, MISC_BUILTIN_BCDADD_LT_V16QI,
-    RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI },
-  { P8V_BUILTIN_VEC_BCDADD_EQ, MISC_BUILTIN_BCDADD_EQ_V1TI,
-    RS6000_BTI_INTSI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_INTSI },
-  { P8V_BUILTIN_VEC_BCDADD_EQ, MISC_BUILTIN_BCDADD_EQ_V16QI,
-    RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI },
-  { P8V_BUILTIN_VEC_BCDADD_GT, MISC_BUILTIN_BCDADD_GT_V1TI,
-    RS6000_BTI_INTSI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_INTSI },
-  { P8V_BUILTIN_VEC_BCDADD_GT, MISC_BUILTIN_BCDADD_GT_V16QI,
-    RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI },
-  { P8V_BUILTIN_VEC_BCDADD_OV, MISC_BUILTIN_BCDADD_OV_V1TI,
-    RS6000_BTI_INTSI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_INTSI },
-  { P8V_BUILTIN_VEC_BCDADD_OV, MISC_BUILTIN_BCDADD_OV_V16QI,
-    RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI },
-  { P8V_BUILTIN_VEC_BCDINVALID, MISC_BUILTIN_BCDINVALID_V1TI,
-    RS6000_BTI_INTSI, RS6000_BTI_V1TI, 0, 0 },
-  { P8V_BUILTIN_VEC_BCDINVALID, MISC_BUILTIN_BCDINVALID_V16QI,
-    RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI, 0, 0 },
-
-  { P9V_BUILTIN_VEC_BCDMUL10, P9V_BUILTIN_BCDMUL10_V16QI,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0, 0 },
-  { P9V_BUILTIN_VEC_BCDDIV10, P9V_BUILTIN_BCDDIV10_V16QI,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0, 0 },
-
-  { P8V_BUILTIN_VEC_DENBCD, MISC_BUILTIN_DENBCD_V16QI,
-    RS6000_BTI_dfloat128, RS6000_BTI_unsigned_V16QI, 0, 0 },
-
-  { P8V_BUILTIN_VEC_BCDSUB, MISC_BUILTIN_BCDSUB_V1TI,
-    RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_INTSI },
-  { P8V_BUILTIN_VEC_BCDSUB, MISC_BUILTIN_BCDSUB_V16QI,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI },
-  { P8V_BUILTIN_VEC_BCDSUB_LT, MISC_BUILTIN_BCDSUB_LT_V1TI,
-    RS6000_BTI_INTSI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_INTSI },
-  { P8V_BUILTIN_VEC_BCDSUB_LT, MISC_BUILTIN_BCDSUB_LT_V16QI,
-    RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI },
-  { P8V_BUILTIN_VEC_BCDSUB_LE, MISC_BUILTIN_BCDSUB_LE_V1TI,
-    RS6000_BTI_INTSI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_INTSI },
-  { P8V_BUILTIN_VEC_BCDSUB_LE, MISC_BUILTIN_BCDSUB_LE_V16QI,
-    RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI },
-  { P8V_BUILTIN_VEC_BCDSUB_EQ, MISC_BUILTIN_BCDSUB_EQ_V1TI,
-    RS6000_BTI_INTSI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_INTSI },
-  { P8V_BUILTIN_VEC_BCDSUB_EQ, MISC_BUILTIN_BCDSUB_EQ_V16QI,
-    RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI },
-  { P8V_BUILTIN_VEC_BCDSUB_GT, MISC_BUILTIN_BCDSUB_GT_V1TI,
-    RS6000_BTI_INTSI, RS6000_BTI_V1TI,  RS6000_BTI_V1TI, RS6000_BTI_INTSI },
-  { P8V_BUILTIN_VEC_BCDSUB_GT, MISC_BUILTIN_BCDSUB_GT_V16QI,
-    RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI },
-  { P8V_BUILTIN_VEC_BCDSUB_GE, MISC_BUILTIN_BCDSUB_GE_V1TI,
-    RS6000_BTI_INTSI, RS6000_BTI_V1TI,  RS6000_BTI_V1TI, RS6000_BTI_INTSI },
-  { P8V_BUILTIN_VEC_BCDSUB_GE, MISC_BUILTIN_BCDSUB_GE_V16QI,
-    RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI },
-  { P8V_BUILTIN_VEC_BCDSUB_OV, MISC_BUILTIN_BCDSUB_OV_V1TI,
-    RS6000_BTI_INTSI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_INTSI },
-  { P8V_BUILTIN_VEC_BCDSUB_OV, MISC_BUILTIN_BCDSUB_OV_V16QI,
-    RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI },
-
-
-  { VSX_BUILTIN_VEC_DIV, VSX_BUILTIN_XVDIVSP,
-    RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 },
-  { VSX_BUILTIN_VEC_DIV, VSX_BUILTIN_XVDIVDP,
-    RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 },
-  { VSX_BUILTIN_VEC_DIV, VSX_BUILTIN_DIV_V2DI,
-    RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 },
-  { VSX_BUILTIN_VEC_DIV, VSX_BUILTIN_UDIV_V2DI,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 },
-
-  { VSX_BUILTIN_VEC_DIV, P10V_BUILTIN_DIVS_V4SI,
-    RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },
-  { VSX_BUILTIN_VEC_DIV, P10V_BUILTIN_DIVU_V4SI,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI,
-    RS6000_BTI_unsigned_V4SI, 0 },
-  { VSX_BUILTIN_VEC_DIV, P10V_BUILTIN_DIVS_V2DI,
-    RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 },
-  { VSX_BUILTIN_VEC_DIV, P10V_BUILTIN_DIVU_V2DI,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI,
-    RS6000_BTI_unsigned_V2DI, 0 },
-  { VSX_BUILTIN_VEC_DIV, P10V_BUILTIN_DIV_V1TI,
-    RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, 0 },
-  { VSX_BUILTIN_VEC_DIV, P10V_BUILTIN_UDIV_V1TI,
-    RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI,
-    RS6000_BTI_unsigned_V1TI, 0 },
-
-  { P10_BUILTIN_VEC_DIVE, P10V_BUILTIN_DIVES_V4SI,
-    RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },
-  { P10_BUILTIN_VEC_DIVE, P10V_BUILTIN_DIVEU_V4SI,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI,
-    RS6000_BTI_unsigned_V4SI, 0 },
-  { P10_BUILTIN_VEC_DIVE, P10V_BUILTIN_DIVES_V2DI,
-    RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 },
-  { P10_BUILTIN_VEC_DIVE, P10V_BUILTIN_DIVEU_V2DI,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI,
-    RS6000_BTI_unsigned_V2DI, 0 },
-  { P10_BUILTIN_VEC_DIVE, P10V_BUILTIN_DIVES_V1TI,
-    RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, 0 },
-  { P10_BUILTIN_VEC_DIVE, P10V_BUILTIN_DIVEU_V1TI,
-    RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI,
-    RS6000_BTI_unsigned_V1TI, 0 },
-
-  { P10_BUILTIN_VEC_MOD, P10V_BUILTIN_MODS_V4SI,
-    RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },
-  { P10_BUILTIN_VEC_MOD, P10V_BUILTIN_MODU_V4SI,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI,
-    RS6000_BTI_unsigned_V4SI, 0 },
-  { P10_BUILTIN_VEC_MOD, P10V_BUILTIN_MODS_V2DI,
-    RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 },
-  { P10_BUILTIN_VEC_MOD, P10V_BUILTIN_MODU_V2DI,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI,
-    RS6000_BTI_unsigned_V2DI, 0 },
-  { P10_BUILTIN_VEC_MOD, P10V_BUILTIN_MODS_V1TI,
-    RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, 0 },
-  { P10_BUILTIN_VEC_MOD, P10V_BUILTIN_MODU_V1TI,
-    RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI,
-    RS6000_BTI_unsigned_V1TI, 0 },
-
-  { VSX_BUILTIN_VEC_DOUBLE, VSX_BUILTIN_XVCVSXDDP,
-    RS6000_BTI_V2DF, RS6000_BTI_V2DI, 0, 0 },
-  { VSX_BUILTIN_VEC_DOUBLE, VSX_BUILTIN_XVCVUXDDP,
-    RS6000_BTI_V2DF, RS6000_BTI_unsigned_V2DI, 0, 0 },
-
-  { VSX_BUILTIN_VEC_DOUBLEE, VSX_BUILTIN_DOUBLEE_V4SI,
-    RS6000_BTI_V2DF, RS6000_BTI_V4SI, 0, 0 },
-  { VSX_BUILTIN_VEC_DOUBLEE, VSX_BUILTIN_UNS_DOUBLEE_V4SI,
-    RS6000_BTI_V2DF, RS6000_BTI_unsigned_V4SI, 0, 0 },
-  { VSX_BUILTIN_VEC_DOUBLEE, VSX_BUILTIN_DOUBLEE_V4SF,
-    RS6000_BTI_V2DF, RS6000_BTI_V4SF, 0, 0 },
-
-  { VSX_BUILTIN_VEC_DOUBLEO, VSX_BUILTIN_DOUBLEO_V4SI,
-    RS6000_BTI_V2DF, RS6000_BTI_V4SI, 0, 0 },
-  { VSX_BUILTIN_VEC_DOUBLEO, VSX_BUILTIN_UNS_DOUBLEO_V4SI,
-    RS6000_BTI_V2DF, RS6000_BTI_unsigned_V4SI, 0, 0 },
-  { VSX_BUILTIN_VEC_DOUBLEO, VSX_BUILTIN_DOUBLEO_V4SF,
-    RS6000_BTI_V2DF, RS6000_BTI_V4SF, 0, 0 },
-
-  { VSX_BUILTIN_VEC_DOUBLEH, VSX_BUILTIN_DOUBLEH_V4SI,
-    RS6000_BTI_V2DF, RS6000_BTI_V4SI, 0, 0 },
-  { VSX_BUILTIN_VEC_DOUBLEH, VSX_BUILTIN_UNS_DOUBLEH_V4SI,
-    RS6000_BTI_V2DF, RS6000_BTI_unsigned_V4SI, 0, 0 },
-  { VSX_BUILTIN_VEC_DOUBLEH, VSX_BUILTIN_DOUBLEH_V4SF,
-    RS6000_BTI_V2DF, RS6000_BTI_V4SF, 0, 0 },
-
-  { VSX_BUILTIN_VEC_DOUBLEL, VSX_BUILTIN_DOUBLEL_V4SI,
-    RS6000_BTI_V2DF, RS6000_BTI_V4SI, 0, 0 },
-  { VSX_BUILTIN_VEC_DOUBLEL, VSX_BUILTIN_UNS_DOUBLEL_V4SI,
-    RS6000_BTI_V2DF, RS6000_BTI_unsigned_V4SI, 0, 0 },
-  { VSX_BUILTIN_VEC_DOUBLEL, VSX_BUILTIN_DOUBLEL_V4SF,
-    RS6000_BTI_V2DF, RS6000_BTI_V4SF, 0, 0 },
-
-  { VSX_BUILTIN_VEC_FLOAT, VSX_BUILTIN_XVCVSXWSP_V4SF,
-    RS6000_BTI_V4SF, RS6000_BTI_V4SI, 0, 0 },
-  { VSX_BUILTIN_VEC_FLOAT, VSX_BUILTIN_XVCVUXWSP_V4SF,
-    RS6000_BTI_V4SF, RS6000_BTI_unsigned_V4SI, 0, 0 },
-  { P8V_BUILTIN_VEC_FLOAT2, P8V_BUILTIN_FLOAT2_V2DF,
-    RS6000_BTI_V4SF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 },
-  { P8V_BUILTIN_VEC_FLOAT2, P8V_BUILTIN_FLOAT2_V2DI,
-    RS6000_BTI_V4SF, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 },
-  { P8V_BUILTIN_VEC_FLOAT2, P8V_BUILTIN_UNS_FLOAT2_V2DI,
-    RS6000_BTI_V4SF, RS6000_BTI_unsigned_V2DI,
-    RS6000_BTI_unsigned_V2DI, 0 },
-  { VSX_BUILTIN_VEC_FLOATE, VSX_BUILTIN_FLOATE_V2DF,
-    RS6000_BTI_V4SF, RS6000_BTI_V2DF, 0, 0 },
-  { VSX_BUILTIN_VEC_FLOATE, VSX_BUILTIN_FLOATE_V2DI,
-    RS6000_BTI_V4SF, RS6000_BTI_V2DI, 0, 0 },
-  { VSX_BUILTIN_VEC_FLOATE, VSX_BUILTIN_UNS_FLOATE_V2DI,
-    RS6000_BTI_V4SF, RS6000_BTI_unsigned_V2DI, 0, 0 },
-  { VSX_BUILTIN_VEC_FLOATO, VSX_BUILTIN_FLOATO_V2DF,
-    RS6000_BTI_V4SF, RS6000_BTI_V2DF, 0, 0 },
-  { VSX_BUILTIN_VEC_FLOATO, VSX_BUILTIN_FLOATO_V2DI,
-    RS6000_BTI_V4SF, RS6000_BTI_V2DI, 0, 0 },
-  { VSX_BUILTIN_VEC_FLOATO, VSX_BUILTIN_UNS_FLOATO_V2DI,
-    RS6000_BTI_V4SF, RS6000_BTI_unsigned_V2DI, 0, 0 },
-
-  { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V1TI,
-    RS6000_BTI_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_V1TI, 0 },
-  { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V1TI,
-    RS6000_BTI_unsigned_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V1TI, 0 },
-  { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V1TI,
-    RS6000_BTI_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_INTTI, 0 },
-  { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V1TI,
-    RS6000_BTI_unsigned_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTTI, 0 },
-
-  { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V2DF,
-    RS6000_BTI_V2DF, RS6000_BTI_INTSI, ~RS6000_BTI_V2DF, 0 },
-  { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V2DF,
-    RS6000_BTI_V2DF, RS6000_BTI_INTSI, ~RS6000_BTI_double, 0 },
-  { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V2DI,
-    RS6000_BTI_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_V2DI, 0 },
-  { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V2DI,
-    RS6000_BTI_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_long_long, 0 },
-  { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V2DI,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_INTSI,
-    ~RS6000_BTI_unsigned_V2DI, 0 },
-  { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V2DI,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_INTSI,
-    ~RS6000_BTI_unsigned_long_long, 0 },
-  { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V2DI,
-    RS6000_BTI_bool_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V2DI, 0 },
-  { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V4SF,
-    RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_V4SF, 0 },
-  { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V4SF,
-    RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float, 0 },
-  { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V4SI,
-    RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V4SI,
-    RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V4SI,
-    RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI, 0 },
-  { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V4SI,
-    RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_long, 0 },
-  { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V4SI,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V4SI,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI, 0 },
-  { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V4SI,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_long, 0 },
-  { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V8HI,
-    RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V8HI,
-    RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_pixel_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V8HI,
-    RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V8HI,
-    RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI, 0 },
-  { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V8HI,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V8HI,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI, 0 },
-  { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V16QI,
-    RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V16QI,
-    RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V16QI,
-    RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI, 0 },
-  { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V16QI,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V16QI,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI, 0 },
-  { ALTIVEC_BUILTIN_VEC_LDE, ALTIVEC_BUILTIN_LVEBX,
-    RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI, 0 },
-  { ALTIVEC_BUILTIN_VEC_LDE, ALTIVEC_BUILTIN_LVEBX,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI, 0 },
-  { ALTIVEC_BUILTIN_VEC_LDE, ALTIVEC_BUILTIN_LVEHX,
-    RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI, 0 },
-  { ALTIVEC_BUILTIN_VEC_LDE, ALTIVEC_BUILTIN_LVEHX,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI, 0 },
-  { ALTIVEC_BUILTIN_VEC_LDE, ALTIVEC_BUILTIN_LVEWX,
-    RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float, 0 },
-  { ALTIVEC_BUILTIN_VEC_LDE, ALTIVEC_BUILTIN_LVEWX,
-    RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI, 0 },
-  { ALTIVEC_BUILTIN_VEC_LDE, ALTIVEC_BUILTIN_LVEWX,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI, 0 },
-  { ALTIVEC_BUILTIN_VEC_LDE, ALTIVEC_BUILTIN_LVEWX,
-    RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_long, 0 },
-  { ALTIVEC_BUILTIN_VEC_LDE, ALTIVEC_BUILTIN_LVEWX,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_long, 0 },
-  { ALTIVEC_BUILTIN_VEC_LVEWX, ALTIVEC_BUILTIN_LVEWX,
-    RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float, 0 },
-  { ALTIVEC_BUILTIN_VEC_LVEWX, ALTIVEC_BUILTIN_LVEWX,
-    RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI, 0 },
-  { ALTIVEC_BUILTIN_VEC_LVEWX, ALTIVEC_BUILTIN_LVEWX,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI, 0 },
-  { ALTIVEC_BUILTIN_VEC_LVEWX, ALTIVEC_BUILTIN_LVEWX,
-    RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_long, 0 },
-  { ALTIVEC_BUILTIN_VEC_LVEWX, ALTIVEC_BUILTIN_LVEWX,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_long, 0 },
-  { ALTIVEC_BUILTIN_VEC_LVEHX, ALTIVEC_BUILTIN_LVEHX,
-    RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI, 0 },
-  { ALTIVEC_BUILTIN_VEC_LVEHX, ALTIVEC_BUILTIN_LVEHX,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI, 0 },
-  { ALTIVEC_BUILTIN_VEC_LVEBX, ALTIVEC_BUILTIN_LVEBX,
-    RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI, 0 },
-  { ALTIVEC_BUILTIN_VEC_LVEBX, ALTIVEC_BUILTIN_LVEBX,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI, 0 },
-
-  /* vector signed__int128 vec_xl_sext (signed long long, signed char *);
-     vector signed__int128 vec_xl_sext (signed long long, signed short *);
-     vector signed__int128 vec_xl_sext (signed long long, signed int *);
-     vector signed__int128 vec_xl_sext (signed long long, signed longlong *); */
-  { P10_BUILTIN_VEC_SE_LXVRX, P10_BUILTIN_SE_LXVRBX,
-    RS6000_BTI_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI, 0 },
-  { P10_BUILTIN_VEC_SE_LXVRX, P10_BUILTIN_SE_LXVRHX,
-    RS6000_BTI_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI, 0 },
-  { P10_BUILTIN_VEC_SE_LXVRX, P10_BUILTIN_SE_LXVRWX,
-    RS6000_BTI_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI, 0 },
-  { P10_BUILTIN_VEC_SE_LXVRX, P10_BUILTIN_SE_LXVRDX,
-    RS6000_BTI_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_INTDI, 0 },
-  { P10_BUILTIN_VEC_SE_LXVRX, P10_BUILTIN_SE_LXVRDX,
-    RS6000_BTI_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_long_long, 0 },
-
-  /* vector unsigned__int128 vec_xl_zext (signed long long, unsigned char *);
-     vector unsigned__int128 vec_xl_zext (signed long long, unsigned short *);
-     vector unsigned__int128 vec_xl_zext (signed long long, unsigned int *);
-     vector unsigned__int128 vec_xl_zext (signed long long, unsigned longlong *); */
-  { P10_BUILTIN_VEC_ZE_LXVRX, P10_BUILTIN_ZE_LXVRBX,
-    RS6000_BTI_unsigned_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI, 0 },
-  { P10_BUILTIN_VEC_ZE_LXVRX, P10_BUILTIN_ZE_LXVRHX,
-    RS6000_BTI_unsigned_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI, 0 },
-  { P10_BUILTIN_VEC_ZE_LXVRX, P10_BUILTIN_ZE_LXVRWX,
-    RS6000_BTI_unsigned_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI, 0 },
-  { P10_BUILTIN_VEC_ZE_LXVRX, P10_BUILTIN_ZE_LXVRDX,
-    RS6000_BTI_unsigned_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTDI, 0 },
-  { P10_BUILTIN_VEC_ZE_LXVRX, P10_BUILTIN_ZE_LXVRDX,
-    RS6000_BTI_unsigned_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_long_long, 0 },
-
-  /* void vec_xst_trunc (vector signed __int128, signed long long, signed char *);
-     void vec_xst_trunc (vector unsigned __int128, signed long long, unsigned char *);
-     void vec_xst_trunc (vector signed __int128, signed long long, signed char *);
-     void vec_xst_trunc (vector unsigned __int128, signed long long, unsigned char *);
-     void vec_xst_trunc (vector signed __int128, signed long long, signed char *);
-     void vec_xst_trunc (vector unsigned __int128, signed long long, unsigned char *);
-     void vec_xst_trunc (vector signed __int128, signed long long, signed char *);
-     void vec_xst_trunc (vector unsigned __int128, signed long long, unsigned char *); */
-  { P10_BUILTIN_VEC_TR_STXVRX, P10_BUILTIN_TR_STXVRBX, RS6000_BTI_void,
-    RS6000_BTI_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI },
-  { P10_BUILTIN_VEC_TR_STXVRX, P10_BUILTIN_TR_STXVRBX, RS6000_BTI_void,
-    RS6000_BTI_unsigned_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI },
-  { P10_BUILTIN_VEC_TR_STXVRX, P10_BUILTIN_TR_STXVRHX, RS6000_BTI_void,
-    RS6000_BTI_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI },
-  { P10_BUILTIN_VEC_TR_STXVRX, P10_BUILTIN_TR_STXVRHX, RS6000_BTI_void,
-    RS6000_BTI_unsigned_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI },
-  { P10_BUILTIN_VEC_TR_STXVRX, P10_BUILTIN_TR_STXVRWX, RS6000_BTI_void,
-    RS6000_BTI_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI },
-  { P10_BUILTIN_VEC_TR_STXVRX, P10_BUILTIN_TR_STXVRWX, RS6000_BTI_void,
-    RS6000_BTI_unsigned_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI },
-  { P10_BUILTIN_VEC_TR_STXVRX, P10_BUILTIN_TR_STXVRDX, RS6000_BTI_void,
-    RS6000_BTI_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_long_long },
-  { P10_BUILTIN_VEC_TR_STXVRX, P10_BUILTIN_TR_STXVRDX, RS6000_BTI_void,
-    RS6000_BTI_unsigned_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_long_long },
-  { P10_BUILTIN_VEC_TR_STXVRX, P10_BUILTIN_TR_STXVRDX, RS6000_BTI_void,
-    RS6000_BTI_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_INTDI },
-  { P10_BUILTIN_VEC_TR_STXVRX, P10_BUILTIN_TR_STXVRDX, RS6000_BTI_void,
-    RS6000_BTI_unsigned_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTDI },
-
-  /*     vector float vec_ldl (int, vector float *);
-         vector float vec_ldl (int, float *); */
-  { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V4SF,
-    RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_V4SF, 0 },
-  { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V4SF,
-    RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float, 0 },
-
-  /*     vector bool int vec_ldl (int, vector bool int *);
-         vector bool int vec_ldl (int, bool int *);
-              vector int vec_ldl (int, vector int *);
-              vector int vec_ldl (int, int *);
-     vector unsigned int vec_ldl (int, vector unsigned int *);
-     vector unsigned int vec_ldl (int, unsigned int *); */
-  { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V4SI,
-    RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V4SI,
-    RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_int, 0 },
-  { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V4SI,
-    RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V4SI,
-    RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI, 0 },
-  { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V4SI,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V4SI,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI, 0 },
-
-  /*     vector bool short vec_ldl (int, vector bool short *);
-         vector bool short vec_ldl (int, bool short *);
-              vector pixel vec_ldl (int, vector pixel *);
-              vector short vec_ldl (int, vector short *);
-              vector short vec_ldl (int, short *);
-     vector unsigned short vec_ldl (int, vector unsigned short *);
-     vector unsigned short vec_ldl (int, unsigned short *); */
-  { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V8HI,
-    RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V8HI,
-    RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_short, 0 },
-  { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V8HI,
-    RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_pixel_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V8HI,
-    RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V8HI,
-    RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI, 0 },
-  { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V8HI,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V8HI,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI, 0 },
-
-  /*     vector bool char vec_ldl (int, vector bool char *);
-         vector bool char vec_ldl (int, bool char *);
-              vector char vec_ldl (int, vector char *);
-              vector char vec_ldl (int, char *);
-     vector unsigned char vec_ldl (int, vector unsigned char *);
-     vector unsigned char vec_ldl (int, unsigned char *); */
-  { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V16QI,
-    RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V16QI,
-    RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_char, 0 },
-  { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V16QI,
-    RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V16QI,
-    RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI, 0 },
-  { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V16QI,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI,
-    ~RS6000_BTI_unsigned_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V16QI,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI, 0 },
-
-  /*     vector double vec_ldl (int, vector double *);
-         vector double vec_ldl (int, double *); */
-  { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V2DF,
-    RS6000_BTI_V2DF, RS6000_BTI_INTSI, ~RS6000_BTI_V2DF, 0 },
-  { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V2DF,
-    RS6000_BTI_V2DF, RS6000_BTI_INTSI, ~RS6000_BTI_double, 0 },
-
-  /*          vector long long vec_ldl (int, vector long long *);
-              vector long long vec_ldl (int, long long *);
-     vector unsigned long long vec_ldl (int, vector unsigned long long *);
-     vector unsigned long long vec_ldl (int, unsigned long long *);
-         vector bool long long vec_ldl (int, vector bool long long *);
-         vector bool long long vec_ldl (int, bool long long *); */
-  { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V2DI,
-    RS6000_BTI_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_V2DI, 0 },
-  { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V2DI,
-    RS6000_BTI_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_long_long, 0 },
-  { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V2DI,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_INTSI,
-    ~RS6000_BTI_unsigned_V2DI, 0 },
-  { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V2DI,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_INTSI,
-    ~RS6000_BTI_unsigned_long_long, 0 },
-  { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V2DI,
-    RS6000_BTI_bool_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V2DI, 0 },
-  { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V2DI,
-    RS6000_BTI_bool_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_long_long, 0 },
-
-  { ALTIVEC_BUILTIN_VEC_LVSL, ALTIVEC_BUILTIN_LVSL,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI, 0 },
-  { ALTIVEC_BUILTIN_VEC_LVSL, ALTIVEC_BUILTIN_LVSL,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI, 0 },
-  { ALTIVEC_BUILTIN_VEC_LVSL, ALTIVEC_BUILTIN_LVSL,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI, 0 },
-  { ALTIVEC_BUILTIN_VEC_LVSL, ALTIVEC_BUILTIN_LVSL,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI, 0 },
-  { ALTIVEC_BUILTIN_VEC_LVSL, ALTIVEC_BUILTIN_LVSL,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI, 0 },
-  { ALTIVEC_BUILTIN_VEC_LVSL, ALTIVEC_BUILTIN_LVSL,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI, 0 },
-  { ALTIVEC_BUILTIN_VEC_LVSL, ALTIVEC_BUILTIN_LVSL,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_long, 0 },
-  { ALTIVEC_BUILTIN_VEC_LVSL, ALTIVEC_BUILTIN_LVSL,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_long, 0 },
-  { ALTIVEC_BUILTIN_VEC_LVSL, ALTIVEC_BUILTIN_LVSL,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_float, 0 },
-  { ALTIVEC_BUILTIN_VEC_LVSL, ALTIVEC_BUILTIN_LVSL,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_double, 0 },
-  { ALTIVEC_BUILTIN_VEC_LVSL, ALTIVEC_BUILTIN_LVSL,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTDI, 0 },
-  { ALTIVEC_BUILTIN_VEC_LVSL, ALTIVEC_BUILTIN_LVSL,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTDI, 0 },
-  { ALTIVEC_BUILTIN_VEC_LVSL, ALTIVEC_BUILTIN_LVSL,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_long_long, 0 },
-  { ALTIVEC_BUILTIN_VEC_LVSL, ALTIVEC_BUILTIN_LVSL,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI,
-    ~RS6000_BTI_unsigned_long_long, 0 },
-  { ALTIVEC_BUILTIN_VEC_LVSR, ALTIVEC_BUILTIN_LVSR,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI, 0 },
-  { ALTIVEC_BUILTIN_VEC_LVSR, ALTIVEC_BUILTIN_LVSR,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI, 0 },
-  { ALTIVEC_BUILTIN_VEC_LVSR, ALTIVEC_BUILTIN_LVSR,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI, 0 },
-  { ALTIVEC_BUILTIN_VEC_LVSR, ALTIVEC_BUILTIN_LVSR,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI, 0 },
-  { ALTIVEC_BUILTIN_VEC_LVSR, ALTIVEC_BUILTIN_LVSR,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI, 0 },
-  { ALTIVEC_BUILTIN_VEC_LVSR, ALTIVEC_BUILTIN_LVSR,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI, 0 },
-  { ALTIVEC_BUILTIN_VEC_LVSR, ALTIVEC_BUILTIN_LVSR,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_long, 0 },
-  { ALTIVEC_BUILTIN_VEC_LVSR, ALTIVEC_BUILTIN_LVSR,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_long, 0 },
-  { ALTIVEC_BUILTIN_VEC_LVSR, ALTIVEC_BUILTIN_LVSR,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_float, 0 },
-  { ALTIVEC_BUILTIN_VEC_LVSR, ALTIVEC_BUILTIN_LVSR,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_double, 0 },
-  { ALTIVEC_BUILTIN_VEC_LVSR, ALTIVEC_BUILTIN_LVSR,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTDI, 0 },
-  { ALTIVEC_BUILTIN_VEC_LVSR, ALTIVEC_BUILTIN_LVSR,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTDI, 0 },
-  { ALTIVEC_BUILTIN_VEC_LVSR, ALTIVEC_BUILTIN_LVSR,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_long_long, 0 },
-  { ALTIVEC_BUILTIN_VEC_LVSR, ALTIVEC_BUILTIN_LVSR,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI,
-    ~RS6000_BTI_unsigned_long_long, 0 },
-  { ALTIVEC_BUILTIN_VEC_LVLX, ALTIVEC_BUILTIN_LVLX,
-    RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_V4SF, 0 },
-  { ALTIVEC_BUILTIN_VEC_LVLX, ALTIVEC_BUILTIN_LVLX,
-    RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float, 0 },
-  { ALTIVEC_BUILTIN_VEC_LVLX, ALTIVEC_BUILTIN_LVLX,
-    RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_LVLX, ALTIVEC_BUILTIN_LVLX,
-    RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_LVLX, ALTIVEC_BUILTIN_LVLX,
-    RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI, 0 },
-  { ALTIVEC_BUILTIN_VEC_LVLX, ALTIVEC_BUILTIN_LVLX,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_LVLX, ALTIVEC_BUILTIN_LVLX,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI, 0 },
-  { ALTIVEC_BUILTIN_VEC_LVLX, ALTIVEC_BUILTIN_LVLX,
-    RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_LVLX, ALTIVEC_BUILTIN_LVLX,
-    RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_pixel_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_LVLX, ALTIVEC_BUILTIN_LVLX,
-    RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_LVLX, ALTIVEC_BUILTIN_LVLX,
-    RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI, 0 },
-  { ALTIVEC_BUILTIN_VEC_LVLX, ALTIVEC_BUILTIN_LVLX,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_LVLX, ALTIVEC_BUILTIN_LVLX,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI, 0 },
-  { ALTIVEC_BUILTIN_VEC_LVLX, ALTIVEC_BUILTIN_LVLX,
-    RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_LVLX, ALTIVEC_BUILTIN_LVLX,
-    RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_LVLX, ALTIVEC_BUILTIN_LVLX,
-    RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI, 0 },
-  { ALTIVEC_BUILTIN_VEC_LVLX, ALTIVEC_BUILTIN_LVLX,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_LVLX, ALTIVEC_BUILTIN_LVLX,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI, 0 },
-  { ALTIVEC_BUILTIN_VEC_LVLXL, ALTIVEC_BUILTIN_LVLXL,
-    RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_V4SF, 0 },
-  { ALTIVEC_BUILTIN_VEC_LVLXL, ALTIVEC_BUILTIN_LVLXL,
-    RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float, 0 },
-  { ALTIVEC_BUILTIN_VEC_LVLXL, ALTIVEC_BUILTIN_LVLXL,
-    RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_LVLXL, ALTIVEC_BUILTIN_LVLXL,
-    RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_LVLXL, ALTIVEC_BUILTIN_LVLXL,
-    RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI, 0 },
-  { ALTIVEC_BUILTIN_VEC_LVLXL, ALTIVEC_BUILTIN_LVLXL,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_LVLXL, ALTIVEC_BUILTIN_LVLXL,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI, 0 },
-  { ALTIVEC_BUILTIN_VEC_LVLXL, ALTIVEC_BUILTIN_LVLXL,
-    RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_LVLXL, ALTIVEC_BUILTIN_LVLXL,
-    RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_pixel_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_LVLXL, ALTIVEC_BUILTIN_LVLXL,
-    RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_LVLXL, ALTIVEC_BUILTIN_LVLXL,
-    RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI, 0 },
-  { ALTIVEC_BUILTIN_VEC_LVLXL, ALTIVEC_BUILTIN_LVLXL,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_LVLXL, ALTIVEC_BUILTIN_LVLXL,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI, 0 },
-  { ALTIVEC_BUILTIN_VEC_LVLXL, ALTIVEC_BUILTIN_LVLXL,
-    RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_LVLXL, ALTIVEC_BUILTIN_LVLXL,
-    RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_LVLXL, ALTIVEC_BUILTIN_LVLXL,
-    RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI, 0 },
-  { ALTIVEC_BUILTIN_VEC_LVLXL, ALTIVEC_BUILTIN_LVLXL,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_LVLXL, ALTIVEC_BUILTIN_LVLXL,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI, 0 },
-  { ALTIVEC_BUILTIN_VEC_LVRX, ALTIVEC_BUILTIN_LVRX,
-    RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_V4SF, 0 },
-  { ALTIVEC_BUILTIN_VEC_LVRX, ALTIVEC_BUILTIN_LVRX,
-    RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float, 0 },
-  { ALTIVEC_BUILTIN_VEC_LVRX, ALTIVEC_BUILTIN_LVRX,
-    RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_LVRX, ALTIVEC_BUILTIN_LVRX,
-    RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_LVRX, ALTIVEC_BUILTIN_LVRX,
-    RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI, 0 },
-  { ALTIVEC_BUILTIN_VEC_LVRX, ALTIVEC_BUILTIN_LVRX,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_LVRX, ALTIVEC_BUILTIN_LVRX,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI, 0 },
-  { ALTIVEC_BUILTIN_VEC_LVRX, ALTIVEC_BUILTIN_LVRX,
-    RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_LVRX, ALTIVEC_BUILTIN_LVRX,
-    RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_pixel_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_LVRX, ALTIVEC_BUILTIN_LVRX,
-    RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_LVRX, ALTIVEC_BUILTIN_LVRX,
-    RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI, 0 },
-  { ALTIVEC_BUILTIN_VEC_LVRX, ALTIVEC_BUILTIN_LVRX,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_LVRX, ALTIVEC_BUILTIN_LVRX,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI, 0 },
-  { ALTIVEC_BUILTIN_VEC_LVRX, ALTIVEC_BUILTIN_LVRX,
-    RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_LVRX, ALTIVEC_BUILTIN_LVRX,
-    RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_LVRX, ALTIVEC_BUILTIN_LVRX,
-    RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI, 0 },
-  { ALTIVEC_BUILTIN_VEC_LVRX, ALTIVEC_BUILTIN_LVRX,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_LVRX, ALTIVEC_BUILTIN_LVRX,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI, 0 },
-  { ALTIVEC_BUILTIN_VEC_LVRXL, ALTIVEC_BUILTIN_LVRXL,
-    RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_V4SF, 0 },
-  { ALTIVEC_BUILTIN_VEC_LVRXL, ALTIVEC_BUILTIN_LVRXL,
-    RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float, 0 },
-  { ALTIVEC_BUILTIN_VEC_LVRXL, ALTIVEC_BUILTIN_LVRXL,
-    RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_LVRXL, ALTIVEC_BUILTIN_LVRXL,
-    RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_LVRXL, ALTIVEC_BUILTIN_LVRXL,
-    RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI, 0 },
-  { ALTIVEC_BUILTIN_VEC_LVRXL, ALTIVEC_BUILTIN_LVRXL,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_LVRXL, ALTIVEC_BUILTIN_LVRXL,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI, 0 },
-  { ALTIVEC_BUILTIN_VEC_LVRXL, ALTIVEC_BUILTIN_LVRXL,
-    RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_LVRXL, ALTIVEC_BUILTIN_LVRXL,
-    RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_pixel_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_LVRXL, ALTIVEC_BUILTIN_LVRXL,
-    RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_LVRXL, ALTIVEC_BUILTIN_LVRXL,
-    RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI, 0 },
-  { ALTIVEC_BUILTIN_VEC_LVRXL, ALTIVEC_BUILTIN_LVRXL,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_LVRXL, ALTIVEC_BUILTIN_LVRXL,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI, 0 },
-  { ALTIVEC_BUILTIN_VEC_LVRXL, ALTIVEC_BUILTIN_LVRXL,
-    RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_LVRXL, ALTIVEC_BUILTIN_LVRXL,
-    RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_LVRXL, ALTIVEC_BUILTIN_LVRXL,
-    RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI, 0 },
-  { ALTIVEC_BUILTIN_VEC_LVRXL, ALTIVEC_BUILTIN_LVRXL,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_LVRXL, ALTIVEC_BUILTIN_LVRXL,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI, 0 },
-  { ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXUB,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXUB,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXUB,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXSB,
-    RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXSB,
-    RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXSB,
-    RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXUH,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXUH,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXUH,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXSH,
-    RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXSH,
-    RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXSH,
-    RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXUW,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXUW,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXUW,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXSW,
-    RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXSW,
-    RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXSW,
-    RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_MAX, P8V_BUILTIN_VMAXUD,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI, 0 },
-  { ALTIVEC_BUILTIN_VEC_MAX, P8V_BUILTIN_VMAXUD,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, 0 },
-  { ALTIVEC_BUILTIN_VEC_MAX, P8V_BUILTIN_VMAXUD,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 },
-  { ALTIVEC_BUILTIN_VEC_MAX, P8V_BUILTIN_VMAXSD,
-    RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, 0 },
-  { ALTIVEC_BUILTIN_VEC_MAX, P8V_BUILTIN_VMAXSD,
-    RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, 0 },
-  { ALTIVEC_BUILTIN_VEC_MAX, P8V_BUILTIN_VMAXSD,
-    RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 },
-  { ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXFP,
-    RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 },
-  { ALTIVEC_BUILTIN_VEC_MAX, VSX_BUILTIN_XVMAXDP,
-    RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 },
-  { ALTIVEC_BUILTIN_VEC_VMAXFP, ALTIVEC_BUILTIN_VMAXFP,
-    RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 },
-  { ALTIVEC_BUILTIN_VEC_VMAXSW, ALTIVEC_BUILTIN_VMAXSW,
-    RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VMAXSW, ALTIVEC_BUILTIN_VMAXSW,
-    RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VMAXSW, ALTIVEC_BUILTIN_VMAXSW,
-    RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VMAXUW, ALTIVEC_BUILTIN_VMAXUW,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VMAXUW, ALTIVEC_BUILTIN_VMAXUW,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VMAXUW, ALTIVEC_BUILTIN_VMAXUW,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VMAXUW, ALTIVEC_BUILTIN_VMAXUW,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VMAXUW, ALTIVEC_BUILTIN_VMAXUW,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VMAXSH, ALTIVEC_BUILTIN_VMAXSH,
-    RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VMAXSH, ALTIVEC_BUILTIN_VMAXSH,
-    RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VMAXSH, ALTIVEC_BUILTIN_VMAXSH,
-    RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VMAXUH, ALTIVEC_BUILTIN_VMAXUH,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VMAXUH, ALTIVEC_BUILTIN_VMAXUH,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VMAXUH, ALTIVEC_BUILTIN_VMAXUH,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VMAXUH, ALTIVEC_BUILTIN_VMAXUH,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VMAXUH, ALTIVEC_BUILTIN_VMAXUH,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VMAXSB, ALTIVEC_BUILTIN_VMAXSB,
-    RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VMAXSB, ALTIVEC_BUILTIN_VMAXSB,
-    RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VMAXSB, ALTIVEC_BUILTIN_VMAXSB,
-    RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VMAXUB, ALTIVEC_BUILTIN_VMAXUB,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VMAXUB, ALTIVEC_BUILTIN_VMAXUB,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VMAXUB, ALTIVEC_BUILTIN_VMAXUB,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VMAXUB, ALTIVEC_BUILTIN_VMAXUB,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VMAXUB, ALTIVEC_BUILTIN_VMAXUB,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_MERGEH, ALTIVEC_BUILTIN_VMRGHB,
-    RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_MERGEH, ALTIVEC_BUILTIN_VMRGHB,
-    RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_MERGEH, ALTIVEC_BUILTIN_VMRGHB,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_MERGEH, ALTIVEC_BUILTIN_VMRGHH,
-    RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_MERGEH, ALTIVEC_BUILTIN_VMRGHH,
-    RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_MERGEH, ALTIVEC_BUILTIN_VMRGHH,
-    RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_MERGEH, ALTIVEC_BUILTIN_VMRGHH,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_MERGEH, ALTIVEC_BUILTIN_VMRGHW,
-    RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 },
-  { ALTIVEC_BUILTIN_VEC_MERGEH, ALTIVEC_BUILTIN_VMRGHW,
-    RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_MERGEH, ALTIVEC_BUILTIN_VMRGHW,
-    RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_MERGEH, ALTIVEC_BUILTIN_VMRGHW,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_MERGEH, VSX_BUILTIN_VEC_MERGEH_V2DF,
-    RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 },
-  { ALTIVEC_BUILTIN_VEC_MERGEH, VSX_BUILTIN_VEC_MERGEH_V2DI,
-    RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 },
-  { ALTIVEC_BUILTIN_VEC_MERGEH, VSX_BUILTIN_VEC_MERGEH_V2DI,
-    RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, 0 },
-  { ALTIVEC_BUILTIN_VEC_MERGEH, VSX_BUILTIN_VEC_MERGEH_V2DI,
-    RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, 0 },
-  { ALTIVEC_BUILTIN_VEC_MERGEH, VSX_BUILTIN_VEC_MERGEH_V2DI,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 },
-  { ALTIVEC_BUILTIN_VEC_MERGEH, VSX_BUILTIN_VEC_MERGEH_V2DI,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, 0 },
-  { ALTIVEC_BUILTIN_VEC_MERGEH, VSX_BUILTIN_VEC_MERGEH_V2DI,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI, 0 },
-  { ALTIVEC_BUILTIN_VEC_MERGEH, VSX_BUILTIN_VEC_MERGEH_V2DI,
-    RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VMRGHW, ALTIVEC_BUILTIN_VMRGHW,
-    RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 },
-  { ALTIVEC_BUILTIN_VEC_VMRGHW, ALTIVEC_BUILTIN_VMRGHW,
-    RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VMRGHW, ALTIVEC_BUILTIN_VMRGHW,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VMRGHW, ALTIVEC_BUILTIN_VMRGHW,
-    RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VMRGHH, ALTIVEC_BUILTIN_VMRGHH,
-    RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VMRGHH, ALTIVEC_BUILTIN_VMRGHH,
-    RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VMRGHH, ALTIVEC_BUILTIN_VMRGHH,
-    RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VMRGHH, ALTIVEC_BUILTIN_VMRGHH,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VMRGHB, ALTIVEC_BUILTIN_VMRGHB,
-    RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VMRGHB, ALTIVEC_BUILTIN_VMRGHB,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VMRGHB, ALTIVEC_BUILTIN_VMRGHB,
-    RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_MERGEL, ALTIVEC_BUILTIN_VMRGLB,
-    RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_MERGEL, ALTIVEC_BUILTIN_VMRGLB,
-    RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_MERGEL, ALTIVEC_BUILTIN_VMRGLB,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_MERGEL, ALTIVEC_BUILTIN_VMRGLH,
-    RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_MERGEL, ALTIVEC_BUILTIN_VMRGLH,
-    RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_MERGEL, ALTIVEC_BUILTIN_VMRGLH,
-    RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_MERGEL, ALTIVEC_BUILTIN_VMRGLH,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_MERGEL, ALTIVEC_BUILTIN_VMRGLW,
-    RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 },
-  { ALTIVEC_BUILTIN_VEC_MERGEL, ALTIVEC_BUILTIN_VMRGLW,
-    RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_MERGEL, ALTIVEC_BUILTIN_VMRGLW,
-    RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_MERGEL, ALTIVEC_BUILTIN_VMRGLW,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_MERGEL, VSX_BUILTIN_VEC_MERGEL_V2DF,
-    RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 },
-  { ALTIVEC_BUILTIN_VEC_MERGEL, VSX_BUILTIN_VEC_MERGEL_V2DI,
-    RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 },
-  { ALTIVEC_BUILTIN_VEC_MERGEL, VSX_BUILTIN_VEC_MERGEL_V2DI,
-    RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, 0 },
-  { ALTIVEC_BUILTIN_VEC_MERGEL, VSX_BUILTIN_VEC_MERGEL_V2DI,
-    RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, 0 },
-  { ALTIVEC_BUILTIN_VEC_MERGEL, VSX_BUILTIN_VEC_MERGEL_V2DI,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 },
-  { ALTIVEC_BUILTIN_VEC_MERGEL, VSX_BUILTIN_VEC_MERGEL_V2DI,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, 0 },
-  { ALTIVEC_BUILTIN_VEC_MERGEL, VSX_BUILTIN_VEC_MERGEL_V2DI,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI, 0 },
-  { ALTIVEC_BUILTIN_VEC_MERGEL, VSX_BUILTIN_VEC_MERGEL_V2DI,
-    RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VMRGLW, ALTIVEC_BUILTIN_VMRGLW,
-    RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 },
-  { ALTIVEC_BUILTIN_VEC_VMRGLW, ALTIVEC_BUILTIN_VMRGLW,
-    RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VMRGLW, ALTIVEC_BUILTIN_VMRGLW,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VMRGLW, ALTIVEC_BUILTIN_VMRGLW,
-    RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VMRGLH, ALTIVEC_BUILTIN_VMRGLH,
-    RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VMRGLH, ALTIVEC_BUILTIN_VMRGLH,
-    RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VMRGLH, ALTIVEC_BUILTIN_VMRGLH,
-    RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VMRGLH, ALTIVEC_BUILTIN_VMRGLH,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VMRGLB, ALTIVEC_BUILTIN_VMRGLB,
-    RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VMRGLB, ALTIVEC_BUILTIN_VMRGLB,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VMRGLB, ALTIVEC_BUILTIN_VMRGLB,
-    RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINUB,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINUB,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINUB,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINSB,
-    RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINSB,
-    RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINSB,
-    RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINUH,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINUH,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINUH,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINSH,
-    RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINSH,
-    RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINSH,
-    RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINUW,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINUW,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINUW,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINSW,
-    RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINSW,
-    RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINSW,
-    RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_MIN, P8V_BUILTIN_VMINUD,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI, 0 },
-  { ALTIVEC_BUILTIN_VEC_MIN, P8V_BUILTIN_VMINUD,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, 0 },
-  { ALTIVEC_BUILTIN_VEC_MIN, P8V_BUILTIN_VMINUD,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 },
-  { ALTIVEC_BUILTIN_VEC_MIN, P8V_BUILTIN_VMINSD,
-    RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, 0 },
-  { ALTIVEC_BUILTIN_VEC_MIN, P8V_BUILTIN_VMINSD,
-    RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, 0 },
-  { ALTIVEC_BUILTIN_VEC_MIN, P8V_BUILTIN_VMINSD,
-    RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 },
-  { ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINFP,
-    RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 },
-  { ALTIVEC_BUILTIN_VEC_MIN, VSX_BUILTIN_XVMINDP,
-    RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 },
-  { ALTIVEC_BUILTIN_VEC_VMINFP, ALTIVEC_BUILTIN_VMINFP,
-    RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 },
-  { ALTIVEC_BUILTIN_VEC_VMINSW, ALTIVEC_BUILTIN_VMINSW,
-    RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VMINSW, ALTIVEC_BUILTIN_VMINSW,
-    RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VMINSW, ALTIVEC_BUILTIN_VMINSW,
-    RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VMINUW, ALTIVEC_BUILTIN_VMINUW,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VMINUW, ALTIVEC_BUILTIN_VMINUW,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VMINUW, ALTIVEC_BUILTIN_VMINUW,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VMINUW, ALTIVEC_BUILTIN_VMINUW,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VMINUW, ALTIVEC_BUILTIN_VMINUW,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VMINSH, ALTIVEC_BUILTIN_VMINSH,
-    RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VMINSH, ALTIVEC_BUILTIN_VMINSH,
-    RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VMINSH, ALTIVEC_BUILTIN_VMINSH,
-    RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VMINSB, ALTIVEC_BUILTIN_VMINSB,
-    RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VMINSB, ALTIVEC_BUILTIN_VMINSB,
-    RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VMINSB, ALTIVEC_BUILTIN_VMINSB,
-    RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VMINUH, ALTIVEC_BUILTIN_VMINUH,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VMINUH, ALTIVEC_BUILTIN_VMINUH,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VMINUH, ALTIVEC_BUILTIN_VMINUH,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VMINUH, ALTIVEC_BUILTIN_VMINUH,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VMINUH, ALTIVEC_BUILTIN_VMINUH,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VMINUB, ALTIVEC_BUILTIN_VMINUB,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VMINUB, ALTIVEC_BUILTIN_VMINUB,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VMINUB, ALTIVEC_BUILTIN_VMINUB,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VMINUB, ALTIVEC_BUILTIN_VMINUB,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VMINUB, ALTIVEC_BUILTIN_VMINUB,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, 0 },
-  { P10_BUILTIN_VEC_MULH, P10V_BUILTIN_MULHS_V4SI,
-    RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },
-  { P10_BUILTIN_VEC_MULH, P10V_BUILTIN_MULHU_V4SI,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI,
-    RS6000_BTI_unsigned_V4SI, 0 },
-  { P10_BUILTIN_VEC_MULH, P10V_BUILTIN_MULHS_V2DI,
-    RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 },
-  { P10_BUILTIN_VEC_MULH, P10V_BUILTIN_MULHU_V2DI,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI,
-    RS6000_BTI_unsigned_V2DI, 0 },
-
-  { ALTIVEC_BUILTIN_VEC_MULE, ALTIVEC_BUILTIN_VMULEUB,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_MULE, ALTIVEC_BUILTIN_VMULESB,
-    RS6000_BTI_V8HI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_MULE, ALTIVEC_BUILTIN_VMULEUH,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_MULE, ALTIVEC_BUILTIN_VMULESH,
-    RS6000_BTI_V4SI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_MULE, P8V_BUILTIN_VMULESW,
-    RS6000_BTI_V2DI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_MULE, P8V_BUILTIN_VMULEUW,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V4SI,
-    RS6000_BTI_unsigned_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_MULE, P10V_BUILTIN_VMULESD,
-    RS6000_BTI_V1TI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 },
-  { ALTIVEC_BUILTIN_VEC_MULE, P10V_BUILTIN_VMULEUD,
-    RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V2DI,
-    RS6000_BTI_unsigned_V2DI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VMULEUB, ALTIVEC_BUILTIN_VMULEUB,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VMULESB, ALTIVEC_BUILTIN_VMULESB,
-    RS6000_BTI_V8HI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VMULEUH, ALTIVEC_BUILTIN_VMULEUH,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VMULESH, ALTIVEC_BUILTIN_VMULESH,
-    RS6000_BTI_V4SI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VMULEUW, P8V_BUILTIN_VMULEUW,
-    RS6000_BTI_V2DI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VMULESW, P8V_BUILTIN_VMULESW,
-    RS6000_BTI_V2DI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_MULO, ALTIVEC_BUILTIN_VMULOUB,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_MULO, ALTIVEC_BUILTIN_VMULOSB,
-    RS6000_BTI_V8HI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_MULO, ALTIVEC_BUILTIN_VMULOUH,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_MULO, P8V_BUILTIN_VMULOSW,
-    RS6000_BTI_V2DI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_MULO, P8V_BUILTIN_VMULOUW,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V4SI,
-    RS6000_BTI_unsigned_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_MULO, P10V_BUILTIN_VMULOSD,
-    RS6000_BTI_V1TI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 },
-  { ALTIVEC_BUILTIN_VEC_MULO, P10V_BUILTIN_VMULOUD,
-    RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V2DI,
-    RS6000_BTI_unsigned_V2DI, 0 },
-  { ALTIVEC_BUILTIN_VEC_MULO, ALTIVEC_BUILTIN_VMULOSH,
-    RS6000_BTI_V4SI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VMULOSH, ALTIVEC_BUILTIN_VMULOSH,
-    RS6000_BTI_V4SI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VMULOUH, ALTIVEC_BUILTIN_VMULOUH,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VMULOSB, ALTIVEC_BUILTIN_VMULOSB,
-    RS6000_BTI_V8HI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VMULOUB, ALTIVEC_BUILTIN_VMULOUB,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VMULOUW, P8V_BUILTIN_VMULOUW,
-    RS6000_BTI_V2DI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VMULOSW, P8V_BUILTIN_VMULOSW,
-    RS6000_BTI_V2DI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },
-
-  { ALTIVEC_BUILTIN_VEC_NABS, ALTIVEC_BUILTIN_NABS_V16QI,
-    RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0, 0 },
-  { ALTIVEC_BUILTIN_VEC_NABS, ALTIVEC_BUILTIN_NABS_V8HI,
-    RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0, 0 },
-  { ALTIVEC_BUILTIN_VEC_NABS, ALTIVEC_BUILTIN_NABS_V4SI,
-    RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0, 0 },
-  { ALTIVEC_BUILTIN_VEC_NABS, ALTIVEC_BUILTIN_NABS_V2DI,
-    RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0, 0 },
-  { ALTIVEC_BUILTIN_VEC_NABS, ALTIVEC_BUILTIN_NABS_V4SF,
-    RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0, 0 },
-  { ALTIVEC_BUILTIN_VEC_NABS, VSX_BUILTIN_XVNABSDP,
-    RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0, 0 },
-  { ALTIVEC_BUILTIN_VEC_NEARBYINT, VSX_BUILTIN_XVRDPI,
-    RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0, 0 },
-  { ALTIVEC_BUILTIN_VEC_NEARBYINT, VSX_BUILTIN_XVRSPI,
-    RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0, 0 },
-
-  { ALTIVEC_BUILTIN_VEC_NOR, ALTIVEC_BUILTIN_VNOR_V4SF,
-    RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 },
-  { ALTIVEC_BUILTIN_VEC_NOR, ALTIVEC_BUILTIN_VNOR_V2DF,
-    RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 },
-  { ALTIVEC_BUILTIN_VEC_NOR, ALTIVEC_BUILTIN_VNOR_V2DI,
-    RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 },
-  { ALTIVEC_BUILTIN_VEC_NOR, ALTIVEC_BUILTIN_VNOR_V2DI,
-    RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, 0 },
-  { ALTIVEC_BUILTIN_VEC_NOR, ALTIVEC_BUILTIN_VNOR_V2DI,
-    RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, 0 },
-  { ALTIVEC_BUILTIN_VEC_NOR, P10V_BUILTIN_VNOR_V1TI,
-    RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_bool_V1TI, 0 },
-  { ALTIVEC_BUILTIN_VEC_NOR, P10V_BUILTIN_VNOR_V1TI,
-    RS6000_BTI_V1TI, RS6000_BTI_bool_V1TI, RS6000_BTI_V1TI, 0 },
-  { ALTIVEC_BUILTIN_VEC_NOR, P10V_BUILTIN_VNOR_V1TI_UNS,
-    RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, 0 },
-  { ALTIVEC_BUILTIN_VEC_NOR, P10V_BUILTIN_VNOR_V1TI_UNS,
-    RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, RS6000_BTI_bool_V1TI, 0 },
-  { ALTIVEC_BUILTIN_VEC_NOR, P10V_BUILTIN_VNOR_V1TI_UNS,
-    RS6000_BTI_unsigned_V1TI, RS6000_BTI_bool_V1TI, RS6000_BTI_unsigned_V1TI, 0 },
-  { ALTIVEC_BUILTIN_VEC_NOR, ALTIVEC_BUILTIN_VNOR_V2DI_UNS,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 },
-  { ALTIVEC_BUILTIN_VEC_NOR, ALTIVEC_BUILTIN_VNOR_V2DI_UNS,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, 0 },
-  { ALTIVEC_BUILTIN_VEC_NOR, ALTIVEC_BUILTIN_VNOR_V2DI_UNS,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI, 0 },
-  { ALTIVEC_BUILTIN_VEC_NOR, ALTIVEC_BUILTIN_VNOR_V2DI_UNS,
-    RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, 0 },
-  { ALTIVEC_BUILTIN_VEC_NOR, ALTIVEC_BUILTIN_VNOR_V4SI,
-    RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_NOR, ALTIVEC_BUILTIN_VNOR_V4SI_UNS,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_NOR, ALTIVEC_BUILTIN_VNOR_V4SI_UNS,
-    RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_NOR, ALTIVEC_BUILTIN_VNOR_V8HI,
-    RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_NOR, ALTIVEC_BUILTIN_VNOR_V8HI_UNS,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_NOR, ALTIVEC_BUILTIN_VNOR_V8HI_UNS,
-    RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_NOR, ALTIVEC_BUILTIN_VNOR_V16QI,
-    RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_NOR, ALTIVEC_BUILTIN_VNOR_V16QI_UNS,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_NOR, ALTIVEC_BUILTIN_VNOR_V16QI_UNS,
-    RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, 0 },
-
-  { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V4SF,
-    RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 },
-  { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V4SF,
-    RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_bool_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V4SF,
-    RS6000_BTI_V4SF, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SF, 0 },
-  { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V2DF,
-    RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 },
-  { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V2DF,
-    RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_bool_V2DI, 0 },
-  { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V2DF,
-    RS6000_BTI_V2DF, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DF, 0 },
-  { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V2DI,
-    RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 },
-  { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V2DI,
-    RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, 0 },
-  { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V2DI,
-    RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, 0 },
-  { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V2DI_UNS,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 },
-  { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V2DI_UNS,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, 0 },
-  { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V2DI_UNS,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI, 0 },
-  { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V2DI_UNS,
-    RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, 0 },
-  { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V4SI_UNS,
-    RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V4SI,
-    RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V4SI,
-    RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V4SI,
-    RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V4SI_UNS,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V4SI_UNS,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V4SI_UNS,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V8HI_UNS,
-    RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V8HI,
-    RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V8HI,
-    RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V8HI,
-    RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V8HI_UNS,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V8HI_UNS,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V8HI_UNS,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V16QI,
-    RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V16QI_UNS,
-    RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V16QI,
-    RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V16QI,
-    RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V16QI_UNS,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V16QI_UNS,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V16QI_UNS,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
-
-  { ALTIVEC_BUILTIN_VEC_PACK, ALTIVEC_BUILTIN_VPKUHUM,
-    RS6000_BTI_V16QI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_PACK, ALTIVEC_BUILTIN_VPKUHUM,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_PACK, ALTIVEC_BUILTIN_VPKUHUM,
-    RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_PACK, ALTIVEC_BUILTIN_VPKUWUM,
-    RS6000_BTI_V8HI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_PACK, ALTIVEC_BUILTIN_VPKUWUM,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_PACK, ALTIVEC_BUILTIN_VPKUWUM,
-    RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_PACK, P8V_BUILTIN_VPKUDUM,
-    RS6000_BTI_V4SI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 },
-  { ALTIVEC_BUILTIN_VEC_PACK, P8V_BUILTIN_VPKUDUM,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 },
-  { ALTIVEC_BUILTIN_VEC_PACK, P8V_BUILTIN_VPKUDUM,
-    RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, 0 },
-  { ALTIVEC_BUILTIN_VEC_PACK, P8V_BUILTIN_FLOAT2_V2DF,
-    RS6000_BTI_V4SF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 },
-
-  { P8V_BUILTIN_VEC_NEG, P8V_BUILTIN_NEG_V16QI,
-    RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0, 0 },
-  { P8V_BUILTIN_VEC_NEG, P8V_BUILTIN_NEG_V8HI,
-    RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0, 0 },
-  { P8V_BUILTIN_VEC_NEG, P8V_BUILTIN_NEG_V4SI,
-    RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0, 0 },
-  { P8V_BUILTIN_VEC_NEG, P8V_BUILTIN_NEG_V2DI,
-    RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0, 0 },
-  { P8V_BUILTIN_VEC_NEG, P8V_BUILTIN_NEG_V4SF,
-    RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0, 0 },
-  { P8V_BUILTIN_VEC_NEG, P8V_BUILTIN_NEG_V2DF,
-    RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0, 0 },
-
-  { P9V_BUILTIN_VEC_CONVERT_4F32_8I16, P9V_BUILTIN_CONVERT_4F32_8I16,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 },
-  { P9V_BUILTIN_VEC_CONVERT_4F32_8F16, P9V_BUILTIN_CONVERT_4F32_8F16,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 },
-
-  { P9V_BUILTIN_VEC_VFIRSTMATCHINDEX, P9V_BUILTIN_VFIRSTMATCHINDEX_V16QI,
-    RS6000_BTI_UINTSI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 },
-  { P9V_BUILTIN_VEC_VFIRSTMATCHINDEX, P9V_BUILTIN_VFIRSTMATCHINDEX_V16QI,
-    RS6000_BTI_UINTSI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
-  { P9V_BUILTIN_VEC_VFIRSTMATCHINDEX, P9V_BUILTIN_VFIRSTMATCHINDEX_V8HI,
-    RS6000_BTI_UINTSI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 },
-  { P9V_BUILTIN_VEC_VFIRSTMATCHINDEX, P9V_BUILTIN_VFIRSTMATCHINDEX_V8HI,
-    RS6000_BTI_UINTSI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
-  { P9V_BUILTIN_VEC_VFIRSTMATCHINDEX, P9V_BUILTIN_VFIRSTMATCHINDEX_V4SI,
-    RS6000_BTI_UINTSI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },
-  { P9V_BUILTIN_VEC_VFIRSTMATCHINDEX, P9V_BUILTIN_VFIRSTMATCHINDEX_V4SI,
-    RS6000_BTI_UINTSI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
-  { P9V_BUILTIN_VEC_VFIRSTMATCHOREOSINDEX, P9V_BUILTIN_VFIRSTMATCHOREOSINDEX_V16QI,
-    RS6000_BTI_UINTSI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 },
-  { P9V_BUILTIN_VEC_VFIRSTMATCHOREOSINDEX, P9V_BUILTIN_VFIRSTMATCHOREOSINDEX_V16QI,
-    RS6000_BTI_UINTSI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
-  { P9V_BUILTIN_VEC_VFIRSTMATCHOREOSINDEX, P9V_BUILTIN_VFIRSTMATCHOREOSINDEX_V8HI,
-    RS6000_BTI_UINTSI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 },
-  { P9V_BUILTIN_VEC_VFIRSTMATCHOREOSINDEX, P9V_BUILTIN_VFIRSTMATCHOREOSINDEX_V8HI,
-    RS6000_BTI_UINTSI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
-  { P9V_BUILTIN_VEC_VFIRSTMATCHOREOSINDEX, P9V_BUILTIN_VFIRSTMATCHOREOSINDEX_V4SI,
-    RS6000_BTI_UINTSI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },
-  { P9V_BUILTIN_VEC_VFIRSTMATCHOREOSINDEX, P9V_BUILTIN_VFIRSTMATCHOREOSINDEX_V4SI,
-    RS6000_BTI_UINTSI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
-  { P9V_BUILTIN_VEC_VFIRSTMISMATCHINDEX, P9V_BUILTIN_VFIRSTMISMATCHINDEX_V16QI,
-    RS6000_BTI_UINTSI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 },
-  { P9V_BUILTIN_VEC_VFIRSTMISMATCHINDEX, P9V_BUILTIN_VFIRSTMISMATCHINDEX_V16QI,
-    RS6000_BTI_UINTSI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
-  { P9V_BUILTIN_VEC_VFIRSTMISMATCHINDEX, P9V_BUILTIN_VFIRSTMISMATCHINDEX_V8HI,
-    RS6000_BTI_UINTSI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 },
-  { P9V_BUILTIN_VEC_VFIRSTMISMATCHINDEX, P9V_BUILTIN_VFIRSTMISMATCHINDEX_V8HI,
-    RS6000_BTI_UINTSI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
-  { P9V_BUILTIN_VEC_VFIRSTMISMATCHINDEX, P9V_BUILTIN_VFIRSTMISMATCHINDEX_V4SI,
-    RS6000_BTI_UINTSI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },
-  { P9V_BUILTIN_VEC_VFIRSTMISMATCHINDEX, P9V_BUILTIN_VFIRSTMISMATCHINDEX_V4SI,
-    RS6000_BTI_UINTSI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
-
-  { P9V_BUILTIN_VEC_VFIRSTMISMATCHOREOSINDEX,
-    P9V_BUILTIN_VFIRSTMISMATCHOREOSINDEX_V16QI,
-    RS6000_BTI_UINTSI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 },
-  { P9V_BUILTIN_VEC_VFIRSTMISMATCHOREOSINDEX,
-    P9V_BUILTIN_VFIRSTMISMATCHOREOSINDEX_V16QI, RS6000_BTI_UINTSI,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
-  { P9V_BUILTIN_VEC_VFIRSTMISMATCHOREOSINDEX,
-    P9V_BUILTIN_VFIRSTMISMATCHOREOSINDEX_V8HI,
-    RS6000_BTI_UINTSI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 },
-  { P9V_BUILTIN_VEC_VFIRSTMISMATCHOREOSINDEX,
-    P9V_BUILTIN_VFIRSTMISMATCHOREOSINDEX_V8HI,
-    RS6000_BTI_UINTSI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
-  { P9V_BUILTIN_VEC_VFIRSTMISMATCHOREOSINDEX,
-    P9V_BUILTIN_VFIRSTMISMATCHOREOSINDEX_V4SI,
-    RS6000_BTI_UINTSI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },
-  { P9V_BUILTIN_VEC_VFIRSTMISMATCHOREOSINDEX,
-    P9V_BUILTIN_VFIRSTMISMATCHOREOSINDEX_V4SI,
-    RS6000_BTI_UINTSI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
-
-  { ALTIVEC_BUILTIN_VEC_VPKUWUM, ALTIVEC_BUILTIN_VPKUWUM,
-    RS6000_BTI_V8HI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VPKUWUM, ALTIVEC_BUILTIN_VPKUWUM,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VPKUWUM, ALTIVEC_BUILTIN_VPKUWUM,
-    RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VPKUHUM, ALTIVEC_BUILTIN_VPKUHUM,
-    RS6000_BTI_V16QI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VPKUHUM, ALTIVEC_BUILTIN_VPKUHUM,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VPKUHUM, ALTIVEC_BUILTIN_VPKUHUM,
-    RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_PACKPX, ALTIVEC_BUILTIN_VPKPX,
-    RS6000_BTI_pixel_V8HI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_PACKS, ALTIVEC_BUILTIN_VPKUHUS,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_PACKS, ALTIVEC_BUILTIN_VPKSHSS,
-    RS6000_BTI_V16QI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_PACKS, ALTIVEC_BUILTIN_VPKUWUS,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_PACKS, ALTIVEC_BUILTIN_VPKSWSS,
-    RS6000_BTI_V8HI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_PACKS, P8V_BUILTIN_VPKUDUS,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 },
-  { ALTIVEC_BUILTIN_VEC_PACKS, P8V_BUILTIN_VPKSDSS,
-    RS6000_BTI_V4SI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VPKSWSS, ALTIVEC_BUILTIN_VPKSWSS,
-    RS6000_BTI_V8HI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VPKUWUS, ALTIVEC_BUILTIN_VPKUWUS,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VPKSHSS, ALTIVEC_BUILTIN_VPKSHSS,
-    RS6000_BTI_V16QI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VPKUHUS, ALTIVEC_BUILTIN_VPKUHUS,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_PACKSU, ALTIVEC_BUILTIN_VPKUHUS,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_PACKSU, ALTIVEC_BUILTIN_VPKSHUS,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_PACKSU, ALTIVEC_BUILTIN_VPKUWUS,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_PACKSU, ALTIVEC_BUILTIN_VPKSWUS,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_PACKSU, P8V_BUILTIN_VPKSDUS,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 },
-  { ALTIVEC_BUILTIN_VEC_PACKSU, P8V_BUILTIN_VPKUDUS,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VPKSWUS, ALTIVEC_BUILTIN_VPKSWUS,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VPKSHUS, ALTIVEC_BUILTIN_VPKSHUS,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_RINT, VSX_BUILTIN_XVRDPIC,
-    RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0, 0 },
-  { ALTIVEC_BUILTIN_VEC_RINT, VSX_BUILTIN_XVRSPIC,
-    RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0, 0 },
-  { ALTIVEC_BUILTIN_VEC_RL, ALTIVEC_BUILTIN_VRLB,
-    RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_RL, ALTIVEC_BUILTIN_VRLB,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_RL, ALTIVEC_BUILTIN_VRLH,
-    RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_RL, ALTIVEC_BUILTIN_VRLH,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_RL, ALTIVEC_BUILTIN_VRLW,
-    RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_RL, ALTIVEC_BUILTIN_VRLW,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_RL, P8V_BUILTIN_VRLD,
-    RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_unsigned_V2DI, 0 },
-  { ALTIVEC_BUILTIN_VEC_RL, P8V_BUILTIN_VRLD,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 },
-  { ALTIVEC_BUILTIN_VEC_RL, P10V_BUILTIN_VRLQ,
-    RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_unsigned_V1TI, 0 },
-  { ALTIVEC_BUILTIN_VEC_RL, P10V_BUILTIN_VRLQ,
-    RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI,
-    RS6000_BTI_unsigned_V1TI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VRLW, ALTIVEC_BUILTIN_VRLW,
-    RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VRLW, ALTIVEC_BUILTIN_VRLW,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VRLH, ALTIVEC_BUILTIN_VRLH,
-    RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VRLH, ALTIVEC_BUILTIN_VRLH,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VRLB, ALTIVEC_BUILTIN_VRLB,
-    RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VRLB, ALTIVEC_BUILTIN_VRLB,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
-  { P9V_BUILTIN_VEC_RLMI, P9V_BUILTIN_VRLWMI,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI },
-  { P9V_BUILTIN_VEC_RLMI, P9V_BUILTIN_VRLDMI,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI },
-  { P9V_BUILTIN_VEC_RLMI, P10V_BUILTIN_VRLQMI,
-    RS6000_BTI_V1TI, RS6000_BTI_V1TI,
-    RS6000_BTI_V1TI, RS6000_BTI_unsigned_V1TI },
-  { P9V_BUILTIN_VEC_RLMI, P10V_BUILTIN_VRLQMI,
-    RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI,
-    RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI },
-  { P9V_BUILTIN_VEC_RLNM, P9V_BUILTIN_VRLWNM,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI,
-    RS6000_BTI_unsigned_V4SI, 0 },
-  { P9V_BUILTIN_VEC_RLNM, P9V_BUILTIN_VRLDNM,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI,
-    RS6000_BTI_unsigned_V2DI, 0 },
-  { P9V_BUILTIN_VEC_RLNM, P10V_BUILTIN_VRLQNM,
-    RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI,
-    RS6000_BTI_unsigned_V1TI, 0 },
-  { P9V_BUILTIN_VEC_RLNM, P10V_BUILTIN_VRLQNM,
-    RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_unsigned_V1TI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SL, ALTIVEC_BUILTIN_VSLB,
-    RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SL, ALTIVEC_BUILTIN_VSLB,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SL, ALTIVEC_BUILTIN_VSLH,
-    RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SL, ALTIVEC_BUILTIN_VSLH,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SL, ALTIVEC_BUILTIN_VSLW,
-    RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SL, ALTIVEC_BUILTIN_VSLW,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SL, P8V_BUILTIN_VSLD,
-    RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_unsigned_V2DI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SL, P8V_BUILTIN_VSLD,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SL, P10V_BUILTIN_VSLQ,
-    RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_unsigned_V1TI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SL, P10V_BUILTIN_VSLQ,
-    RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI,
-    RS6000_BTI_unsigned_V1TI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SQRT, VSX_BUILTIN_XVSQRTDP,
-    RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0, 0 },
-  { ALTIVEC_BUILTIN_VEC_SQRT, VSX_BUILTIN_XVSQRTSP,
-    RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0, 0 },
-  { ALTIVEC_BUILTIN_VEC_VSLW, ALTIVEC_BUILTIN_VSLW,
-    RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VSLW, ALTIVEC_BUILTIN_VSLW,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VSLH, ALTIVEC_BUILTIN_VSLH,
-    RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VSLH, ALTIVEC_BUILTIN_VSLH,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VSLB, ALTIVEC_BUILTIN_VSLB,
-    RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VSLB, ALTIVEC_BUILTIN_VSLB,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL,
-    RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL,
-    RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL,
-    RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL,
-    RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL,
-    RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL,
-    RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL,
-    RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL,
-    RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL,
-    RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL,
-    RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL,
-    RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL,
-    RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL,
-    RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, RS6000_BTI_unsigned_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL,
-    RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL,
-    RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, RS6000_BTI_unsigned_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL,
-    RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL,
-    RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL,
-    RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL,
-    RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL,
-    RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL,
-    RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
-
-  { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL,
-    RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_unsigned_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL,
-    RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL,
-    RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL,
-    RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V8HI, 0 },
-
-  { ALTIVEC_BUILTIN_VEC_SLO, ALTIVEC_BUILTIN_VSLO,
-    RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SLO, ALTIVEC_BUILTIN_VSLO,
-    RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_unsigned_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SLO, ALTIVEC_BUILTIN_VSLO,
-    RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SLO, ALTIVEC_BUILTIN_VSLO,
-    RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SLO, ALTIVEC_BUILTIN_VSLO,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SLO, ALTIVEC_BUILTIN_VSLO,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SLO, ALTIVEC_BUILTIN_VSLO,
-    RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SLO, ALTIVEC_BUILTIN_VSLO,
-    RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SLO, ALTIVEC_BUILTIN_VSLO,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SLO, ALTIVEC_BUILTIN_VSLO,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SLO, ALTIVEC_BUILTIN_VSLO,
-    RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, RS6000_BTI_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SLO, ALTIVEC_BUILTIN_VSLO,
-    RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, RS6000_BTI_unsigned_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SLO, ALTIVEC_BUILTIN_VSLO,
-    RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SLO, ALTIVEC_BUILTIN_VSLO,
-    RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SLO, ALTIVEC_BUILTIN_VSLO,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SLO, ALTIVEC_BUILTIN_VSLO,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SLO, ALTIVEC_BUILTIN_VSLO,
-    RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SLO, ALTIVEC_BUILTIN_VSLO,
-    RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_unsigned_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SLO, ALTIVEC_BUILTIN_VSLO,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SLO, ALTIVEC_BUILTIN_VSLO,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SPLAT, ALTIVEC_BUILTIN_VSPLTB,
-    RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_INTSI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SPLAT, ALTIVEC_BUILTIN_VSPLTB,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SPLAT, ALTIVEC_BUILTIN_VSPLTB,
-    RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SPLAT, ALTIVEC_BUILTIN_VSPLTH,
-    RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_INTSI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SPLAT, ALTIVEC_BUILTIN_VSPLTH,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SPLAT, ALTIVEC_BUILTIN_VSPLTH,
-    RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SPLAT, ALTIVEC_BUILTIN_VSPLTH,
-    RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SPLAT, ALTIVEC_BUILTIN_VSPLTW,
-    RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_INTSI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SPLAT, ALTIVEC_BUILTIN_VSPLTW,
-    RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_INTSI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SPLAT, ALTIVEC_BUILTIN_VSPLTW,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SPLAT, ALTIVEC_BUILTIN_VSPLTW,
-    RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SPLAT, VSX_BUILTIN_XXSPLTD_V2DF,
-    RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_INTSI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SPLAT, VSX_BUILTIN_XXSPLTD_V2DI,
-    RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_INTSI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SPLAT, VSX_BUILTIN_XXSPLTD_V2DI,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_INTSI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SPLAT, VSX_BUILTIN_XXSPLTD_V2DI,
-    RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_INTSI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VSPLTW, ALTIVEC_BUILTIN_VSPLTW,
-    RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_INTSI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VSPLTW, ALTIVEC_BUILTIN_VSPLTW,
-    RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_INTSI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VSPLTW, ALTIVEC_BUILTIN_VSPLTW,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VSPLTW, ALTIVEC_BUILTIN_VSPLTW,
-    RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VSPLTH, ALTIVEC_BUILTIN_VSPLTH,
-    RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_INTSI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VSPLTH, ALTIVEC_BUILTIN_VSPLTH,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VSPLTH, ALTIVEC_BUILTIN_VSPLTH,
-    RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VSPLTH, ALTIVEC_BUILTIN_VSPLTH,
-    RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VSPLTB, ALTIVEC_BUILTIN_VSPLTB,
-    RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_INTSI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VSPLTB, ALTIVEC_BUILTIN_VSPLTB,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VSPLTB, ALTIVEC_BUILTIN_VSPLTB,
-    RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SR, ALTIVEC_BUILTIN_VSRB,
-    RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SR, ALTIVEC_BUILTIN_VSRB,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SR, ALTIVEC_BUILTIN_VSRH,
-    RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SR, ALTIVEC_BUILTIN_VSRH,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SR, ALTIVEC_BUILTIN_VSRW,
-    RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SR, ALTIVEC_BUILTIN_VSRW,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SR, P8V_BUILTIN_VSRD,
-    RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_unsigned_V2DI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SR, P8V_BUILTIN_VSRD,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SR, P10V_BUILTIN_VSRQ,
-    RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_unsigned_V1TI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SR, P10V_BUILTIN_VSRQ,
-    RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI,
-    RS6000_BTI_unsigned_V1TI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VSRW, ALTIVEC_BUILTIN_VSRW,
-    RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VSRW, ALTIVEC_BUILTIN_VSRW,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VSRH, ALTIVEC_BUILTIN_VSRH,
-    RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VSRH, ALTIVEC_BUILTIN_VSRH,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VSRB, ALTIVEC_BUILTIN_VSRB,
-    RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VSRB, ALTIVEC_BUILTIN_VSRB,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SRA, ALTIVEC_BUILTIN_VSRAB,
-    RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SRA, ALTIVEC_BUILTIN_VSRAB,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SRA, ALTIVEC_BUILTIN_VSRAH,
-    RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SRA, ALTIVEC_BUILTIN_VSRAH,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SRA, ALTIVEC_BUILTIN_VSRAW,
-    RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SRA, ALTIVEC_BUILTIN_VSRAW,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SRA, P8V_BUILTIN_VSRAD,
-    RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_unsigned_V2DI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SRA, P8V_BUILTIN_VSRAD,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SRA, P10V_BUILTIN_VSRAQ,
-    RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_unsigned_V1TI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SRA, P10V_BUILTIN_VSRAQ,
-    RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI,
-    RS6000_BTI_unsigned_V1TI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VSRAW, ALTIVEC_BUILTIN_VSRAW,
-    RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VSRAW, ALTIVEC_BUILTIN_VSRAW,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VSRAH, ALTIVEC_BUILTIN_VSRAH,
-    RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VSRAH, ALTIVEC_BUILTIN_VSRAH,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VSRAB, ALTIVEC_BUILTIN_VSRAB,
-    RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VSRAB, ALTIVEC_BUILTIN_VSRAB,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR,
-    RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR,
-    RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR,
-    RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR,
-    RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR,
-    RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR,
-    RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR,
-    RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR,
-    RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR,
-    RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR,
-    RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR,
-    RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR,
-    RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR,
-    RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, RS6000_BTI_unsigned_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR,
-    RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR,
-    RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, RS6000_BTI_unsigned_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR,
-    RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR,
-    RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR,
-    RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR,
-    RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR,
-    RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR,
-    RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR,
-    RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_unsigned_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SRO, ALTIVEC_BUILTIN_VSRO,
-    RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SRO, ALTIVEC_BUILTIN_VSRO,
-    RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_unsigned_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SRO, ALTIVEC_BUILTIN_VSRO,
-    RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SRO, ALTIVEC_BUILTIN_VSRO,
-    RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SRO, ALTIVEC_BUILTIN_VSRO,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SRO, ALTIVEC_BUILTIN_VSRO,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SRO, ALTIVEC_BUILTIN_VSRO,
-    RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SRO, ALTIVEC_BUILTIN_VSRO,
-    RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SRO, ALTIVEC_BUILTIN_VSRO,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SRO, ALTIVEC_BUILTIN_VSRO,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SRO, ALTIVEC_BUILTIN_VSRO,
-    RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, RS6000_BTI_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SRO, ALTIVEC_BUILTIN_VSRO,
-    RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, RS6000_BTI_unsigned_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SRO, ALTIVEC_BUILTIN_VSRO,
-    RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SRO, ALTIVEC_BUILTIN_VSRO,
-    RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SRO, ALTIVEC_BUILTIN_VSRO,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SRO, ALTIVEC_BUILTIN_VSRO,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SRO, ALTIVEC_BUILTIN_VSRO,
-    RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SRO, ALTIVEC_BUILTIN_VSRO,
-    RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_unsigned_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SRO, ALTIVEC_BUILTIN_VSRO,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SRO, ALTIVEC_BUILTIN_VSRO,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V16QI, 0 },
-
-  { ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBUBM,
-    RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBUBM,
-    RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBUBM,
-    RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBUBM,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBUBM,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBUBM,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBUHM,
-    RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBUHM,
-    RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBUHM,
-    RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBUHM,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBUHM,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBUHM,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBUWM,
-    RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBUWM,
-    RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBUWM,
-    RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBUWM,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBUWM,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBUWM,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SUB, P8V_BUILTIN_VSUBUDM,
-    RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SUB, P8V_BUILTIN_VSUBUDM,
-    RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SUB, P8V_BUILTIN_VSUBUDM,
-    RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SUB, P8V_BUILTIN_VSUBUDM,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SUB, P8V_BUILTIN_VSUBUDM,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SUB, P8V_BUILTIN_VSUBUDM,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBFP,
-    RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 },
-  { ALTIVEC_BUILTIN_VEC_SUB, VSX_BUILTIN_XVSUBDP,
-    RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 },
-  { ALTIVEC_BUILTIN_VEC_SUB, P8V_BUILTIN_VSUBUQM,
-    RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SUB, P8V_BUILTIN_VSUBUQM,
-    RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI,
-    RS6000_BTI_unsigned_V1TI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VSUBFP, ALTIVEC_BUILTIN_VSUBFP,
-    RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 },
-  { ALTIVEC_BUILTIN_VEC_VSUBUWM, ALTIVEC_BUILTIN_VSUBUWM,
-    RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VSUBUWM, ALTIVEC_BUILTIN_VSUBUWM,
-    RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VSUBUWM, ALTIVEC_BUILTIN_VSUBUWM,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VSUBUWM, ALTIVEC_BUILTIN_VSUBUWM,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VSUBUWM, ALTIVEC_BUILTIN_VSUBUWM,
-    RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VSUBUWM, ALTIVEC_BUILTIN_VSUBUWM,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VSUBUWM, ALTIVEC_BUILTIN_VSUBUWM,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VSUBUWM, ALTIVEC_BUILTIN_VSUBUWM,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VSUBUHM, ALTIVEC_BUILTIN_VSUBUHM,
-    RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VSUBUHM, ALTIVEC_BUILTIN_VSUBUHM,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VSUBUHM, ALTIVEC_BUILTIN_VSUBUHM,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VSUBUHM, ALTIVEC_BUILTIN_VSUBUHM,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VSUBUHM, ALTIVEC_BUILTIN_VSUBUHM,
-    RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VSUBUHM, ALTIVEC_BUILTIN_VSUBUHM,
-    RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VSUBUHM, ALTIVEC_BUILTIN_VSUBUHM,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VSUBUHM, ALTIVEC_BUILTIN_VSUBUHM,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VSUBUBM, ALTIVEC_BUILTIN_VSUBUBM,
-    RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VSUBUBM, ALTIVEC_BUILTIN_VSUBUBM,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VSUBUBM, ALTIVEC_BUILTIN_VSUBUBM,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VSUBUBM, ALTIVEC_BUILTIN_VSUBUBM,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VSUBUBM, ALTIVEC_BUILTIN_VSUBUBM,
-    RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VSUBUBM, ALTIVEC_BUILTIN_VSUBUBM,
-    RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VSUBUBM, ALTIVEC_BUILTIN_VSUBUBM,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VSUBUBM, ALTIVEC_BUILTIN_VSUBUBM,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, 0 },
-
-  { ALTIVEC_BUILTIN_VEC_SUBC, ALTIVEC_BUILTIN_VSUBCUW,
-    RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SUBC, ALTIVEC_BUILTIN_VSUBCUW,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SUBC, P8V_BUILTIN_VSUBCUQ,
-    RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI,
-    RS6000_BTI_unsigned_V1TI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SUBC, P8V_BUILTIN_VSUBCUQ,
-    RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, 0 },
-
-  { ALTIVEC_BUILTIN_VEC_SUBS, ALTIVEC_BUILTIN_VSUBUBS,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SUBS, ALTIVEC_BUILTIN_VSUBUBS,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SUBS, ALTIVEC_BUILTIN_VSUBUBS,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SUBS, ALTIVEC_BUILTIN_VSUBSBS,
-    RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SUBS, ALTIVEC_BUILTIN_VSUBSBS,
-    RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SUBS, ALTIVEC_BUILTIN_VSUBSBS,
-    RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SUBS, ALTIVEC_BUILTIN_VSUBUHS,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SUBS, ALTIVEC_BUILTIN_VSUBUHS,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SUBS, ALTIVEC_BUILTIN_VSUBUHS,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SUBS, ALTIVEC_BUILTIN_VSUBSHS,
-    RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SUBS, ALTIVEC_BUILTIN_VSUBSHS,
-    RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SUBS, ALTIVEC_BUILTIN_VSUBSHS,
-    RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SUBS, ALTIVEC_BUILTIN_VSUBUWS,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SUBS, ALTIVEC_BUILTIN_VSUBUWS,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SUBS, ALTIVEC_BUILTIN_VSUBUWS,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SUBS, ALTIVEC_BUILTIN_VSUBSWS,
-    RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SUBS, ALTIVEC_BUILTIN_VSUBSWS,
-    RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SUBS, ALTIVEC_BUILTIN_VSUBSWS,
-    RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VSUBSWS, ALTIVEC_BUILTIN_VSUBSWS,
-    RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VSUBSWS, ALTIVEC_BUILTIN_VSUBSWS,
-    RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VSUBSWS, ALTIVEC_BUILTIN_VSUBSWS,
-    RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VSUBUWS, ALTIVEC_BUILTIN_VSUBUWS,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VSUBUWS, ALTIVEC_BUILTIN_VSUBUWS,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VSUBUWS, ALTIVEC_BUILTIN_VSUBUWS,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VSUBUWS, ALTIVEC_BUILTIN_VSUBUWS,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VSUBUWS, ALTIVEC_BUILTIN_VSUBUWS,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VSUBSHS, ALTIVEC_BUILTIN_VSUBSHS,
-    RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VSUBSHS, ALTIVEC_BUILTIN_VSUBSHS,
-    RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VSUBSHS, ALTIVEC_BUILTIN_VSUBSHS,
-    RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VSUBUHS, ALTIVEC_BUILTIN_VSUBUHS,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VSUBUHS, ALTIVEC_BUILTIN_VSUBUHS,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VSUBUHS, ALTIVEC_BUILTIN_VSUBUHS,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VSUBUHS, ALTIVEC_BUILTIN_VSUBUHS,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VSUBUHS, ALTIVEC_BUILTIN_VSUBUHS,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VSUBSBS, ALTIVEC_BUILTIN_VSUBSBS,
-    RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VSUBSBS, ALTIVEC_BUILTIN_VSUBSBS,
-    RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VSUBSBS, ALTIVEC_BUILTIN_VSUBSBS,
-    RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VSUBUBS, ALTIVEC_BUILTIN_VSUBUBS,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VSUBUBS, ALTIVEC_BUILTIN_VSUBUBS,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VSUBUBS, ALTIVEC_BUILTIN_VSUBUBS,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VSUBUBS, ALTIVEC_BUILTIN_VSUBUBS,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VSUBUBS, ALTIVEC_BUILTIN_VSUBUBS,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SUM4S, ALTIVEC_BUILTIN_VSUM4UBS,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SUM4S, ALTIVEC_BUILTIN_VSUM4SBS,
-    RS6000_BTI_V4SI, RS6000_BTI_V16QI, RS6000_BTI_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SUM4S, ALTIVEC_BUILTIN_VSUM4SHS,
-    RS6000_BTI_V4SI, RS6000_BTI_V8HI, RS6000_BTI_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VSUM4SHS, ALTIVEC_BUILTIN_VSUM4SHS,
-    RS6000_BTI_V4SI, RS6000_BTI_V8HI, RS6000_BTI_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VSUM4SBS, ALTIVEC_BUILTIN_VSUM4SBS,
-    RS6000_BTI_V4SI, RS6000_BTI_V16QI, RS6000_BTI_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_VSUM4UBS, ALTIVEC_BUILTIN_VSUM4UBS,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SUM2S, ALTIVEC_BUILTIN_VSUM2SWS,
-    RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SUMS, ALTIVEC_BUILTIN_VSUMSWS,
-    RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },
-
-  { VSX_BUILTIN_VEC_XL, VSX_BUILTIN_LXVD2X_V2DF,
-    RS6000_BTI_V2DF, RS6000_BTI_INTSI, ~RS6000_BTI_V2DF, 0 },
-  { VSX_BUILTIN_VEC_XL, VSX_BUILTIN_LXVD2X_V2DF,
-    RS6000_BTI_V2DF, RS6000_BTI_INTSI, ~RS6000_BTI_double, 0 },
-  { VSX_BUILTIN_VEC_XL, VSX_BUILTIN_LXVD2X_V1TI,
-    RS6000_BTI_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_INTTI, 0 },
-  { VSX_BUILTIN_VEC_XL, VSX_BUILTIN_LXVD2X_V1TI,
-    RS6000_BTI_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_V1TI, 0 },
-  { VSX_BUILTIN_VEC_XL, VSX_BUILTIN_LXVD2X_V1TI,
-    RS6000_BTI_unsigned_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTTI, 0 },
-  { VSX_BUILTIN_VEC_XL, VSX_BUILTIN_LXVD2X_V2DI,
-    RS6000_BTI_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_V2DI, 0 },
-  { VSX_BUILTIN_VEC_XL, VSX_BUILTIN_LXVD2X_V2DI,
-    RS6000_BTI_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_long_long, 0 },
-  { VSX_BUILTIN_VEC_XL, VSX_BUILTIN_LXVD2X_V2DI,
-    RS6000_BTI_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_INTDI, 0 },
-  { VSX_BUILTIN_VEC_XL, VSX_BUILTIN_LXVD2X_V2DI,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_INTSI,
-    ~RS6000_BTI_unsigned_V2DI, 0 },
-  { VSX_BUILTIN_VEC_XL, VSX_BUILTIN_LXVD2X_V2DI,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_INTSI,
-    ~RS6000_BTI_unsigned_long_long, 0 },
-  { VSX_BUILTIN_VEC_XL, VSX_BUILTIN_LXVD2X_V2DI,
-    RS6000_BTI_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTDI, 0 },
-
-  { VSX_BUILTIN_VEC_XL, VSX_BUILTIN_LXVW4X_V4SF,
-    RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_V4SF, 0 },
-  { VSX_BUILTIN_VEC_XL, VSX_BUILTIN_LXVW4X_V4SF,
-    RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float, 0 },
-  { VSX_BUILTIN_VEC_XL, VSX_BUILTIN_LXVW4X_V4SI,
-    RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_V4SI, 0 },
-  { VSX_BUILTIN_VEC_XL, VSX_BUILTIN_LXVW4X_V4SI,
-    RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI, 0 },
-  { VSX_BUILTIN_VEC_XL, VSX_BUILTIN_LXVW4X_V4SI,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V4SI, 0 },
-  { VSX_BUILTIN_VEC_XL, VSX_BUILTIN_LXVW4X_V4SI,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI, 0 },
-  { VSX_BUILTIN_VEC_XL, VSX_BUILTIN_LXVW4X_V8HI,
-    RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_V8HI, 0 },
-  { VSX_BUILTIN_VEC_XL, VSX_BUILTIN_LXVW4X_V8HI,
-    RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI, 0 },
-  { VSX_BUILTIN_VEC_XL, VSX_BUILTIN_LXVW4X_V8HI,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V8HI, 0 },
-  { VSX_BUILTIN_VEC_XL, VSX_BUILTIN_LXVW4X_V8HI,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI, 0 },
-  { VSX_BUILTIN_VEC_XL, VSX_BUILTIN_LXVW4X_V16QI,
-    RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_V16QI, 0 },
-  { VSX_BUILTIN_VEC_XL, VSX_BUILTIN_LXVW4X_V16QI,
-    RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI, 0 },
-  { VSX_BUILTIN_VEC_XL, VSX_BUILTIN_LXVW4X_V16QI,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI,
-    ~RS6000_BTI_unsigned_V16QI, 0 },
-  { VSX_BUILTIN_VEC_XL, VSX_BUILTIN_LXVW4X_V16QI,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI, 0 },
-
-  { VSX_BUILTIN_VEC_XL_BE, VSX_BUILTIN_LD_ELEMREV_V2DF,
-    RS6000_BTI_V2DF, RS6000_BTI_INTSI, ~RS6000_BTI_V2DF, 0 },
-  { VSX_BUILTIN_VEC_XL_BE, VSX_BUILTIN_LD_ELEMREV_V2DF,
-    RS6000_BTI_V2DF, RS6000_BTI_INTSI, ~RS6000_BTI_double, 0 },
-  { VSX_BUILTIN_VEC_XL_BE, VSX_BUILTIN_LD_ELEMREV_V1TI,
-    RS6000_BTI_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_INTTI, 0 },
-  { VSX_BUILTIN_VEC_XL_BE, VSX_BUILTIN_LD_ELEMREV_V1TI,
-    RS6000_BTI_unsigned_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTTI, 0 },
-  { VSX_BUILTIN_VEC_XL_BE, VSX_BUILTIN_LD_ELEMREV_V2DI,
-    RS6000_BTI_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_V2DI, 0 },
-  { VSX_BUILTIN_VEC_XL_BE, VSX_BUILTIN_LD_ELEMREV_V2DI,
-    RS6000_BTI_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_long_long, 0 },
-  { VSX_BUILTIN_VEC_XL_BE, VSX_BUILTIN_LD_ELEMREV_V2DI,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_INTSI,
-    ~RS6000_BTI_unsigned_V2DI, 0 },
-  { VSX_BUILTIN_VEC_XL_BE, VSX_BUILTIN_LD_ELEMREV_V2DI,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_INTSI,
-    ~RS6000_BTI_unsigned_long_long, 0 },
-  { VSX_BUILTIN_VEC_XL_BE, VSX_BUILTIN_LD_ELEMREV_V4SF,
-    RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_V4SF, 0 },
-  { VSX_BUILTIN_VEC_XL_BE, VSX_BUILTIN_LD_ELEMREV_V4SF,
-    RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float, 0 },
-  { VSX_BUILTIN_VEC_XL_BE, VSX_BUILTIN_LD_ELEMREV_V4SI,
-    RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_V4SI, 0 },
-  { VSX_BUILTIN_VEC_XL_BE, VSX_BUILTIN_LD_ELEMREV_V4SI,
-    RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI, 0 },
-  { VSX_BUILTIN_VEC_XL_BE, VSX_BUILTIN_LD_ELEMREV_V4SI,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V4SI, 0 },
-  { VSX_BUILTIN_VEC_XL_BE, VSX_BUILTIN_LD_ELEMREV_V4SI,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI, 0 },
-  { VSX_BUILTIN_VEC_XL_BE, VSX_BUILTIN_LD_ELEMREV_V8HI,
-    RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_V8HI, 0 },
-  { VSX_BUILTIN_VEC_XL_BE, VSX_BUILTIN_LD_ELEMREV_V8HI,
-    RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI, 0 },
-  { VSX_BUILTIN_VEC_XL_BE, VSX_BUILTIN_LD_ELEMREV_V8HI,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V8HI, 0 },
-  { VSX_BUILTIN_VEC_XL_BE, VSX_BUILTIN_LD_ELEMREV_V8HI,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI, 0 },
-  { VSX_BUILTIN_VEC_XL_BE, VSX_BUILTIN_LD_ELEMREV_V16QI,
-    RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_V16QI, 0 },
-  { VSX_BUILTIN_VEC_XL_BE, VSX_BUILTIN_LD_ELEMREV_V16QI,
-    RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI, 0 },
-  { VSX_BUILTIN_VEC_XL_BE, VSX_BUILTIN_LD_ELEMREV_V16QI,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI,
-    ~RS6000_BTI_unsigned_V16QI, 0 },
-  { VSX_BUILTIN_VEC_XL_BE, VSX_BUILTIN_LD_ELEMREV_V16QI,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI, 0 },
-
-  { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V4SF,
-    RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 },
-  { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V4SI,
-    RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_bool_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V4SF,
-    RS6000_BTI_V4SF, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SF, 0 },
-  { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V2DF,
-    RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 },
-  { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V2DI,
-    RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_bool_V2DI, 0 },
-  { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V2DF,
-    RS6000_BTI_V2DF, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DF, 0 },
-  { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V2DI,
-    RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 },
-  { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V2DI,
-    RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, 0 },
-  { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V2DI,
-    RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, 0 },
-  { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V2DI_UNS,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 },
-  { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V2DI_UNS,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, 0 },
-  { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V2DI_UNS,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI, 0 },
-  { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V2DI_UNS,
-    RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, 0 },
-  { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V4SI_UNS,
-    RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V4SI,
-    RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V4SI,
-    RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V4SI,
-    RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V4SI_UNS,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V4SI_UNS,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V4SI_UNS,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V8HI_UNS,
-    RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V8HI,
-    RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V8HI,
-    RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V8HI,
-    RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V8HI_UNS,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V8HI_UNS,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V8HI_UNS,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
-
-  { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V16QI,
-    RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V16QI,
-    RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V16QI,
-    RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V16QI_UNS,
-    RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V16QI_UNS,
-    RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V16QI_UNS,
-    RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V16QI_UNS,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V16QI_UNS,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V16QI_UNS,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
-
-  /* Ternary AltiVec/VSX builtins.  */
-  { ALTIVEC_BUILTIN_VEC_DST, ALTIVEC_BUILTIN_DST,
-    RS6000_BTI_void, ~RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
-  { ALTIVEC_BUILTIN_VEC_DST, ALTIVEC_BUILTIN_DST,
-    RS6000_BTI_void, ~RS6000_BTI_V16QI, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
-  { ALTIVEC_BUILTIN_VEC_DST, ALTIVEC_BUILTIN_DST,
-    RS6000_BTI_void, ~RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
-  { ALTIVEC_BUILTIN_VEC_DST, ALTIVEC_BUILTIN_DST,
-    RS6000_BTI_void, ~RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
-  { ALTIVEC_BUILTIN_VEC_DST, ALTIVEC_BUILTIN_DST,
-    RS6000_BTI_void, ~RS6000_BTI_V8HI, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
-  { ALTIVEC_BUILTIN_VEC_DST, ALTIVEC_BUILTIN_DST,
-    RS6000_BTI_void, ~RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
-  { ALTIVEC_BUILTIN_VEC_DST, ALTIVEC_BUILTIN_DST,
-    RS6000_BTI_void, ~RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
-  { ALTIVEC_BUILTIN_VEC_DST, ALTIVEC_BUILTIN_DST,
-    RS6000_BTI_void, ~RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
-  { ALTIVEC_BUILTIN_VEC_DST, ALTIVEC_BUILTIN_DST,
-    RS6000_BTI_void, ~RS6000_BTI_V4SI, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
-  { ALTIVEC_BUILTIN_VEC_DST, ALTIVEC_BUILTIN_DST,
-    RS6000_BTI_void, ~RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
-  { ALTIVEC_BUILTIN_VEC_DST, ALTIVEC_BUILTIN_DST,
-    RS6000_BTI_void, ~RS6000_BTI_V4SF, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
-  { ALTIVEC_BUILTIN_VEC_DST, ALTIVEC_BUILTIN_DST,
-    RS6000_BTI_void, ~RS6000_BTI_UINTQI, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
-  { ALTIVEC_BUILTIN_VEC_DST, ALTIVEC_BUILTIN_DST,
-    RS6000_BTI_void, ~RS6000_BTI_INTQI, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
-  { ALTIVEC_BUILTIN_VEC_DST, ALTIVEC_BUILTIN_DST,
-    RS6000_BTI_void, ~RS6000_BTI_UINTHI, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
-  { ALTIVEC_BUILTIN_VEC_DST, ALTIVEC_BUILTIN_DST,
-    RS6000_BTI_void, ~RS6000_BTI_INTHI, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
-  { ALTIVEC_BUILTIN_VEC_DST, ALTIVEC_BUILTIN_DST,
-    RS6000_BTI_void, ~RS6000_BTI_UINTSI, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
-  { ALTIVEC_BUILTIN_VEC_DST, ALTIVEC_BUILTIN_DST,
-    RS6000_BTI_void, ~RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
-  { ALTIVEC_BUILTIN_VEC_DST, ALTIVEC_BUILTIN_DST,
-    RS6000_BTI_void, ~RS6000_BTI_unsigned_long, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
-  { ALTIVEC_BUILTIN_VEC_DST, ALTIVEC_BUILTIN_DST,
-    RS6000_BTI_void, ~RS6000_BTI_long, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
-  { ALTIVEC_BUILTIN_VEC_DST, ALTIVEC_BUILTIN_DST,
-    RS6000_BTI_void, ~RS6000_BTI_float, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
-  { ALTIVEC_BUILTIN_VEC_DSTST, ALTIVEC_BUILTIN_DSTST,
-    RS6000_BTI_void, ~RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
-  { ALTIVEC_BUILTIN_VEC_DSTST, ALTIVEC_BUILTIN_DSTST,
-    RS6000_BTI_void, ~RS6000_BTI_V16QI, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
-  { ALTIVEC_BUILTIN_VEC_DSTST, ALTIVEC_BUILTIN_DSTST,
-    RS6000_BTI_void, ~RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
-  { ALTIVEC_BUILTIN_VEC_DSTST, ALTIVEC_BUILTIN_DSTST,
-    RS6000_BTI_void, ~RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
-  { ALTIVEC_BUILTIN_VEC_DSTST, ALTIVEC_BUILTIN_DSTST,
-    RS6000_BTI_void, ~RS6000_BTI_V8HI, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
-  { ALTIVEC_BUILTIN_VEC_DSTST, ALTIVEC_BUILTIN_DSTST,
-    RS6000_BTI_void, ~RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
-  { ALTIVEC_BUILTIN_VEC_DSTST, ALTIVEC_BUILTIN_DSTST,
-    RS6000_BTI_void, ~RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
-  { ALTIVEC_BUILTIN_VEC_DSTST, ALTIVEC_BUILTIN_DSTST,
-    RS6000_BTI_void, ~RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
-  { ALTIVEC_BUILTIN_VEC_DSTST, ALTIVEC_BUILTIN_DSTST,
-    RS6000_BTI_void, ~RS6000_BTI_V4SI, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
-  { ALTIVEC_BUILTIN_VEC_DSTST, ALTIVEC_BUILTIN_DSTST,
-    RS6000_BTI_void, ~RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
-  { ALTIVEC_BUILTIN_VEC_DSTST, ALTIVEC_BUILTIN_DSTST,
-    RS6000_BTI_void, ~RS6000_BTI_V4SF, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
-  { ALTIVEC_BUILTIN_VEC_DSTST, ALTIVEC_BUILTIN_DSTST,
-    RS6000_BTI_void, ~RS6000_BTI_UINTQI, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
-  { ALTIVEC_BUILTIN_VEC_DSTST, ALTIVEC_BUILTIN_DSTST,
-    RS6000_BTI_void, ~RS6000_BTI_INTQI, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
-  { ALTIVEC_BUILTIN_VEC_DSTST, ALTIVEC_BUILTIN_DSTST,
-    RS6000_BTI_void, ~RS6000_BTI_UINTHI, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
-  { ALTIVEC_BUILTIN_VEC_DSTST, ALTIVEC_BUILTIN_DSTST,
-    RS6000_BTI_void, ~RS6000_BTI_INTHI, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
-  { ALTIVEC_BUILTIN_VEC_DSTST, ALTIVEC_BUILTIN_DSTST,
-    RS6000_BTI_void, ~RS6000_BTI_UINTSI, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
-  { ALTIVEC_BUILTIN_VEC_DSTST, ALTIVEC_BUILTIN_DSTST,
-    RS6000_BTI_void, ~RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
-  { ALTIVEC_BUILTIN_VEC_DSTST, ALTIVEC_BUILTIN_DSTST,
-    RS6000_BTI_void, ~RS6000_BTI_unsigned_long, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
-  { ALTIVEC_BUILTIN_VEC_DSTST, ALTIVEC_BUILTIN_DSTST,
-    RS6000_BTI_void, ~RS6000_BTI_long, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
-  { ALTIVEC_BUILTIN_VEC_DSTST, ALTIVEC_BUILTIN_DSTST,
-    RS6000_BTI_void, ~RS6000_BTI_float, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
-  { ALTIVEC_BUILTIN_VEC_DSTSTT, ALTIVEC_BUILTIN_DSTSTT,
-    RS6000_BTI_void, ~RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
-  { ALTIVEC_BUILTIN_VEC_DSTSTT, ALTIVEC_BUILTIN_DSTSTT,
-    RS6000_BTI_void, ~RS6000_BTI_V16QI, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
-  { ALTIVEC_BUILTIN_VEC_DSTSTT, ALTIVEC_BUILTIN_DSTSTT,
-    RS6000_BTI_void, ~RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
-  { ALTIVEC_BUILTIN_VEC_DSTSTT, ALTIVEC_BUILTIN_DSTSTT,
-    RS6000_BTI_void, ~RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
-  { ALTIVEC_BUILTIN_VEC_DSTSTT, ALTIVEC_BUILTIN_DSTSTT,
-    RS6000_BTI_void, ~RS6000_BTI_V8HI, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
-  { ALTIVEC_BUILTIN_VEC_DSTSTT, ALTIVEC_BUILTIN_DSTSTT,
-    RS6000_BTI_void, ~RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
-  { ALTIVEC_BUILTIN_VEC_DSTSTT, ALTIVEC_BUILTIN_DSTSTT,
-    RS6000_BTI_void, ~RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
-  { ALTIVEC_BUILTIN_VEC_DSTSTT, ALTIVEC_BUILTIN_DSTSTT,
-    RS6000_BTI_void, ~RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
-  { ALTIVEC_BUILTIN_VEC_DSTSTT, ALTIVEC_BUILTIN_DSTSTT,
-    RS6000_BTI_void, ~RS6000_BTI_V4SI, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
-  { ALTIVEC_BUILTIN_VEC_DSTSTT, ALTIVEC_BUILTIN_DSTSTT,
-    RS6000_BTI_void, ~RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
-  { ALTIVEC_BUILTIN_VEC_DSTSTT, ALTIVEC_BUILTIN_DSTSTT,
-    RS6000_BTI_void, ~RS6000_BTI_V4SF, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
-  { ALTIVEC_BUILTIN_VEC_DSTSTT, ALTIVEC_BUILTIN_DSTSTT,
-    RS6000_BTI_void, ~RS6000_BTI_UINTQI, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
-  { ALTIVEC_BUILTIN_VEC_DSTSTT, ALTIVEC_BUILTIN_DSTSTT,
-    RS6000_BTI_void, ~RS6000_BTI_INTQI, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
-  { ALTIVEC_BUILTIN_VEC_DSTSTT, ALTIVEC_BUILTIN_DSTSTT,
-    RS6000_BTI_void, ~RS6000_BTI_UINTHI, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
-  { ALTIVEC_BUILTIN_VEC_DSTSTT, ALTIVEC_BUILTIN_DSTSTT,
-    RS6000_BTI_void, ~RS6000_BTI_INTHI, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
-  { ALTIVEC_BUILTIN_VEC_DSTSTT, ALTIVEC_BUILTIN_DSTSTT,
-    RS6000_BTI_void, ~RS6000_BTI_UINTSI, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
-  { ALTIVEC_BUILTIN_VEC_DSTSTT, ALTIVEC_BUILTIN_DSTSTT,
-    RS6000_BTI_void, ~RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
-  { ALTIVEC_BUILTIN_VEC_DSTSTT, ALTIVEC_BUILTIN_DSTSTT,
-    RS6000_BTI_void, ~RS6000_BTI_unsigned_long, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
-  { ALTIVEC_BUILTIN_VEC_DSTSTT, ALTIVEC_BUILTIN_DSTSTT,
-    RS6000_BTI_void, ~RS6000_BTI_long, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
-  { ALTIVEC_BUILTIN_VEC_DSTSTT, ALTIVEC_BUILTIN_DSTSTT,
-    RS6000_BTI_void, ~RS6000_BTI_float, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
-  { ALTIVEC_BUILTIN_VEC_DSTT, ALTIVEC_BUILTIN_DSTT,
-    RS6000_BTI_void, ~RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
-  { ALTIVEC_BUILTIN_VEC_DSTT, ALTIVEC_BUILTIN_DSTT,
-    RS6000_BTI_void, ~RS6000_BTI_V16QI, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
-  { ALTIVEC_BUILTIN_VEC_DSTT, ALTIVEC_BUILTIN_DSTT,
-    RS6000_BTI_void, ~RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
-  { ALTIVEC_BUILTIN_VEC_DSTT, ALTIVEC_BUILTIN_DSTT,
-    RS6000_BTI_void, ~RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
-  { ALTIVEC_BUILTIN_VEC_DSTT, ALTIVEC_BUILTIN_DSTT,
-    RS6000_BTI_void, ~RS6000_BTI_V8HI, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
-  { ALTIVEC_BUILTIN_VEC_DSTT, ALTIVEC_BUILTIN_DSTT,
-    RS6000_BTI_void, ~RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
-  { ALTIVEC_BUILTIN_VEC_DSTT, ALTIVEC_BUILTIN_DSTT,
-    RS6000_BTI_void, ~RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
-  { ALTIVEC_BUILTIN_VEC_DSTT, ALTIVEC_BUILTIN_DSTT,
-    RS6000_BTI_void, ~RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
-  { ALTIVEC_BUILTIN_VEC_DSTT, ALTIVEC_BUILTIN_DSTT,
-    RS6000_BTI_void, ~RS6000_BTI_V4SI, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
-  { ALTIVEC_BUILTIN_VEC_DSTT, ALTIVEC_BUILTIN_DSTT,
-    RS6000_BTI_void, ~RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
-  { ALTIVEC_BUILTIN_VEC_DSTT, ALTIVEC_BUILTIN_DSTT,
-    RS6000_BTI_void, ~RS6000_BTI_V4SF, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
-  { ALTIVEC_BUILTIN_VEC_DSTT, ALTIVEC_BUILTIN_DSTT,
-    RS6000_BTI_void, ~RS6000_BTI_UINTQI, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
-  { ALTIVEC_BUILTIN_VEC_DSTT, ALTIVEC_BUILTIN_DSTT,
-    RS6000_BTI_void, ~RS6000_BTI_INTQI, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
-  { ALTIVEC_BUILTIN_VEC_DSTT, ALTIVEC_BUILTIN_DSTT,
-    RS6000_BTI_void, ~RS6000_BTI_UINTHI, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
-  { ALTIVEC_BUILTIN_VEC_DSTT, ALTIVEC_BUILTIN_DSTT,
-    RS6000_BTI_void, ~RS6000_BTI_INTHI, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
-  { ALTIVEC_BUILTIN_VEC_DSTT, ALTIVEC_BUILTIN_DSTT,
-    RS6000_BTI_void, ~RS6000_BTI_UINTSI, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
-  { ALTIVEC_BUILTIN_VEC_DSTT, ALTIVEC_BUILTIN_DSTT,
-    RS6000_BTI_void, ~RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
-  { ALTIVEC_BUILTIN_VEC_DSTT, ALTIVEC_BUILTIN_DSTT,
-    RS6000_BTI_void, ~RS6000_BTI_unsigned_long, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
-  { ALTIVEC_BUILTIN_VEC_DSTT, ALTIVEC_BUILTIN_DSTT,
-    RS6000_BTI_void, ~RS6000_BTI_long, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
-  { ALTIVEC_BUILTIN_VEC_DSTT, ALTIVEC_BUILTIN_DSTT,
-    RS6000_BTI_void, ~RS6000_BTI_float, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
-  { ALTIVEC_BUILTIN_VEC_MADD, ALTIVEC_BUILTIN_VMADDFP,
-    RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF },
-  { ALTIVEC_BUILTIN_VEC_MADD, VSX_BUILTIN_XVMADDDP,
-    RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF },
-  { ALTIVEC_BUILTIN_VEC_MADD, ALTIVEC_BUILTIN_VMLADDUHM,
-    RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI },
-  { ALTIVEC_BUILTIN_VEC_MADD, ALTIVEC_BUILTIN_VMLADDUHM,
-    RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI },
-  { ALTIVEC_BUILTIN_VEC_MADD, ALTIVEC_BUILTIN_VMLADDUHM,
-    RS6000_BTI_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI },
-  { ALTIVEC_BUILTIN_VEC_MADD, ALTIVEC_BUILTIN_VMLADDUHM,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI },
-  { ALTIVEC_BUILTIN_VEC_MADDS, ALTIVEC_BUILTIN_VMHADDSHS,
-    RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI },
-  { ALTIVEC_BUILTIN_VEC_MLADD, ALTIVEC_BUILTIN_VMLADDUHM,
-    RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI },
-  { ALTIVEC_BUILTIN_VEC_MLADD, ALTIVEC_BUILTIN_VMLADDUHM,
-    RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI },
-  { ALTIVEC_BUILTIN_VEC_MLADD, ALTIVEC_BUILTIN_VMLADDUHM,
-    RS6000_BTI_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI },
-  { ALTIVEC_BUILTIN_VEC_MLADD, ALTIVEC_BUILTIN_VMLADDUHM,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI },
-  { ALTIVEC_BUILTIN_VEC_MRADDS, ALTIVEC_BUILTIN_VMHRADDSHS,
-    RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI },
-  { VSX_BUILTIN_VEC_MSUB, VSX_BUILTIN_XVMSUBSP,
-    RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF },
-  { VSX_BUILTIN_VEC_MSUB, VSX_BUILTIN_XVMSUBDP,
-    RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF },
-  { ALTIVEC_BUILTIN_VEC_MSUM, ALTIVEC_BUILTIN_VMSUMUBM,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V4SI },
-  { ALTIVEC_BUILTIN_VEC_MSUM, ALTIVEC_BUILTIN_VMSUMMBM,
-    RS6000_BTI_V4SI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_V4SI },
-  { ALTIVEC_BUILTIN_VEC_MSUM, ALTIVEC_BUILTIN_VMSUMUHM,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V4SI },
-  { ALTIVEC_BUILTIN_VEC_MSUM, ALTIVEC_BUILTIN_VMSUMSHM,
-    RS6000_BTI_V4SI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V4SI },
-
-  { ALTIVEC_BUILTIN_VEC_MSUM, ALTIVEC_BUILTIN_VMSUMUDM,
-    RS6000_BTI_V1TI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V1TI },
-  { ALTIVEC_BUILTIN_VEC_MSUM, ALTIVEC_BUILTIN_VMSUMUDM,
-    RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V1TI },
-
-  { ALTIVEC_BUILTIN_VEC_VMSUMSHM, ALTIVEC_BUILTIN_VMSUMSHM,
-    RS6000_BTI_V4SI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V4SI },
-  { ALTIVEC_BUILTIN_VEC_VMSUMUHM, ALTIVEC_BUILTIN_VMSUMUHM,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V4SI },
-  { ALTIVEC_BUILTIN_VEC_VMSUMMBM, ALTIVEC_BUILTIN_VMSUMMBM,
-    RS6000_BTI_V4SI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_V4SI },
-  { ALTIVEC_BUILTIN_VEC_VMSUMUBM, ALTIVEC_BUILTIN_VMSUMUBM,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V4SI },
-  { ALTIVEC_BUILTIN_VEC_MSUMS, ALTIVEC_BUILTIN_VMSUMUHS,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V4SI },
-  { ALTIVEC_BUILTIN_VEC_MSUMS, ALTIVEC_BUILTIN_VMSUMSHS,
-    RS6000_BTI_V4SI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V4SI },
-  { ALTIVEC_BUILTIN_VEC_VMSUMSHS, ALTIVEC_BUILTIN_VMSUMSHS,
-    RS6000_BTI_V4SI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V4SI },
-  { ALTIVEC_BUILTIN_VEC_VMSUMUHS, ALTIVEC_BUILTIN_VMSUMUHS,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V4SI },
-  { VSX_BUILTIN_VEC_NMADD, VSX_BUILTIN_XVNMADDSP,
-    RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF },
-  { VSX_BUILTIN_VEC_NMADD, VSX_BUILTIN_XVNMADDDP,
-    RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF },
-  { ALTIVEC_BUILTIN_VEC_NMSUB, ALTIVEC_BUILTIN_VNMSUBFP,
-    RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF },
-  { ALTIVEC_BUILTIN_VEC_NMSUB, VSX_BUILTIN_XVNMSUBDP,
-    RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF },
-  { ALTIVEC_BUILTIN_VEC_PERM, ALTIVEC_BUILTIN_VPERM_2DF,
-    RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_unsigned_V16QI },
-  { ALTIVEC_BUILTIN_VEC_PERM, ALTIVEC_BUILTIN_VPERM_2DI,
-    RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_unsigned_V16QI },
-  { ALTIVEC_BUILTIN_VEC_PERM, ALTIVEC_BUILTIN_VPERM_2DI,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V16QI },
-  { ALTIVEC_BUILTIN_VEC_PERM, ALTIVEC_BUILTIN_VPERM_2DI,
-    RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI,
-    RS6000_BTI_unsigned_V16QI },
-  { ALTIVEC_BUILTIN_VEC_PERM, ALTIVEC_BUILTIN_VPERM_4SF,
-    RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_unsigned_V16QI },
-  { ALTIVEC_BUILTIN_VEC_PERM, ALTIVEC_BUILTIN_VPERM_4SI,
-    RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V16QI },
-  { ALTIVEC_BUILTIN_VEC_PERM, ALTIVEC_BUILTIN_VPERM_4SI,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V16QI },
-  { ALTIVEC_BUILTIN_VEC_PERM, ALTIVEC_BUILTIN_VPERM_4SI,
-    RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V16QI },
-  { ALTIVEC_BUILTIN_VEC_PERM, ALTIVEC_BUILTIN_VPERM_8HI,
-    RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V16QI },
-  { ALTIVEC_BUILTIN_VEC_PERM, ALTIVEC_BUILTIN_VPERM_8HI,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V16QI },
-  { ALTIVEC_BUILTIN_VEC_PERM, ALTIVEC_BUILTIN_VPERM_8HI,
-    RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V16QI },
-  { ALTIVEC_BUILTIN_VEC_PERM, ALTIVEC_BUILTIN_VPERM_8HI,
-    RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, RS6000_BTI_unsigned_V16QI },
-  { ALTIVEC_BUILTIN_VEC_PERM, ALTIVEC_BUILTIN_VPERM_16QI,
-    RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI },
-  { ALTIVEC_BUILTIN_VEC_PERM, ALTIVEC_BUILTIN_VPERM_16QI,
-    RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI },
-  { ALTIVEC_BUILTIN_VEC_PERM, ALTIVEC_BUILTIN_VPERM_16QI,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI },
-  { ALTIVEC_BUILTIN_VEC_PERM, ALTIVEC_BUILTIN_VPERM_16QI,
-    RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI },
-  { ALTIVEC_BUILTIN_VEC_PERM, ALTIVEC_BUILTIN_VPERM_16QI,
-    RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI },
-
-  { P8V_BUILTIN_VEC_VPERMXOR, P8V_BUILTIN_VPERMXOR,
-    RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI,
-    RS6000_BTI_bool_V16QI },
-  { P8V_BUILTIN_VEC_VPERMXOR, P8V_BUILTIN_VPERMXOR,
-    RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI },
-  { P8V_BUILTIN_VEC_VPERMXOR, P8V_BUILTIN_VPERMXOR,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI },
-
-  { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_2DF,
-    RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_bool_V2DI },
-  { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_2DF,
-    RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_unsigned_V2DI },
-  { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_2DF,
-    RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DI },
-  { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_2DF,
-    RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF },
-  { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_2DI,
-    RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI },
-  { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_2DI,
-    RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_unsigned_V2DI },
-  { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_2DI,
-    RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI },
-  { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_2DI,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI },
-  { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_2DI,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI },
-  { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_2DI,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_V2DI },
-  { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_2DI,
-    RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI,
-    RS6000_BTI_bool_V2DI },
-  { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_2DI,
-    RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI,
-    RS6000_BTI_unsigned_V2DI },
-  { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_4SF,
-    RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_bool_V4SI },
-  { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_4SF,
-    RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_unsigned_V4SI },
-  { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_4SI,
-    RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF },
-  { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_4SI,
-    RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SI },
-  { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_4SI,
-    RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI },
-  { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_4SI,
-    RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V4SI },
-  { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_4SI,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI },
-  { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_4SI,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI },
-  { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_4SI,
-    RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI },
-  { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_4SI,
-    RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI },
-  { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_8HI,
-    RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI },
-  { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_8HI,
-    RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V8HI },
-  { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_8HI,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI },
-  { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_8HI,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI },
-  { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_8HI,
-    RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI },
-  { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_8HI,
-    RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI },
-  { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_16QI,
-    RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI },
-  { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_16QI,
-    RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI },
-  { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_16QI,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI },
-  { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_16QI,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI },
-  { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_16QI,
-    RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI },
-  { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_16QI,
-    RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI },
-  { ALTIVEC_BUILTIN_VEC_SLD, ALTIVEC_BUILTIN_VSLDOI_4SF,
-    RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_INTSI },
-  { ALTIVEC_BUILTIN_VEC_SLD, ALTIVEC_BUILTIN_VSLDOI_4SI,
-    RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_INTSI },
-  { ALTIVEC_BUILTIN_VEC_SLD, ALTIVEC_BUILTIN_VSLDOI_4SI,
-    RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI },
-  { ALTIVEC_BUILTIN_VEC_SLD, ALTIVEC_BUILTIN_VSLDOI_4SI,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI },
-  { ALTIVEC_BUILTIN_VEC_SLD, ALTIVEC_BUILTIN_VSLDOI_8HI,
-    RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_INTSI },
-  { ALTIVEC_BUILTIN_VEC_SLD, ALTIVEC_BUILTIN_VSLDOI_8HI,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI },
-  { ALTIVEC_BUILTIN_VEC_SLD, ALTIVEC_BUILTIN_VSLDOI_8HI,
-    RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI },
-  { ALTIVEC_BUILTIN_VEC_SLD, ALTIVEC_BUILTIN_VSLDOI_8HI,
-    RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI },
-  { ALTIVEC_BUILTIN_VEC_SLD, ALTIVEC_BUILTIN_VSLDOI_16QI,
-    RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_INTSI },
-  { ALTIVEC_BUILTIN_VEC_SLD, ALTIVEC_BUILTIN_VSLDOI_16QI,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI },
-  { ALTIVEC_BUILTIN_VEC_SLD, ALTIVEC_BUILTIN_VSLDOI_16QI,
-    RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI },
-  { ALTIVEC_BUILTIN_VEC_SLD, ALTIVEC_BUILTIN_VSLDOI_2DF,
-    RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_INTSI },
-  { ALTIVEC_BUILTIN_VEC_SLD, ALTIVEC_BUILTIN_VSLDOI_2DI,
-    RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_INTSI },
-  { ALTIVEC_BUILTIN_VEC_SLD, ALTIVEC_BUILTIN_VSLDOI_2DI,
-    RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_INTSI },
-  { ALTIVEC_BUILTIN_VEC_SLD, ALTIVEC_BUILTIN_VSLDOI_2DI,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_INTSI },
-
-  { ALTIVEC_BUILTIN_VEC_SLDW, VSX_BUILTIN_XXSLDWI_16QI,
-    RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI,
-    RS6000_BTI_INTSI },
-  { ALTIVEC_BUILTIN_VEC_SLDW, VSX_BUILTIN_XXSLDWI_16QI,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI },
-  { ALTIVEC_BUILTIN_VEC_SLDW, VSX_BUILTIN_XXSLDWI_8HI,
-    RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI,
-    RS6000_BTI_INTSI },
-  { ALTIVEC_BUILTIN_VEC_SLDW, VSX_BUILTIN_XXSLDWI_8HI,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI },
-  { ALTIVEC_BUILTIN_VEC_SLDW, VSX_BUILTIN_XXSLDWI_4SI,
-    RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI,
-    RS6000_BTI_INTSI },
-  { ALTIVEC_BUILTIN_VEC_SLDW, VSX_BUILTIN_XXSLDWI_4SI,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI },
-  { ALTIVEC_BUILTIN_VEC_SLDW, VSX_BUILTIN_XXSLDWI_2DI,
-    RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI,
-    RS6000_BTI_INTSI },
-  { ALTIVEC_BUILTIN_VEC_SLDW, VSX_BUILTIN_XXSLDWI_2DI,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_INTSI },
-
-  { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V2DF,
-    RS6000_BTI_void, RS6000_BTI_V2DF, RS6000_BTI_INTSI, ~RS6000_BTI_V2DF },
-  { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V2DF,
-    RS6000_BTI_void, RS6000_BTI_V2DF, RS6000_BTI_INTSI, ~RS6000_BTI_double },
-  { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V2DI,
-    RS6000_BTI_void, RS6000_BTI_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_V2DI },
-  { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V2DI,
-    RS6000_BTI_void, RS6000_BTI_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_long_long },
-  { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V2DI,
-    RS6000_BTI_void, RS6000_BTI_unsigned_V2DI, RS6000_BTI_INTSI,
-    ~RS6000_BTI_unsigned_V2DI },
-  { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V2DI,
-    RS6000_BTI_void, RS6000_BTI_unsigned_V2DI, RS6000_BTI_INTSI,
-    ~RS6000_BTI_unsigned_long_long },
-  { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V2DI,
-    RS6000_BTI_void, RS6000_BTI_bool_V2DI, RS6000_BTI_INTSI,
-    ~RS6000_BTI_bool_V2DI },
-  { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V2DI,
-    RS6000_BTI_void, RS6000_BTI_bool_V2DI, RS6000_BTI_INTSI,
-    ~RS6000_BTI_long_long },
-  { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V2DI,
-    RS6000_BTI_void, RS6000_BTI_bool_V2DI, RS6000_BTI_INTSI,
-    ~RS6000_BTI_unsigned_long_long },
-  { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V4SF,
-    RS6000_BTI_void, RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_V4SF },
-  { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V4SF,
-    RS6000_BTI_void, RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float },
-  { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V4SI,
-    RS6000_BTI_void, RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_V4SI },
-  { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V4SI,
-    RS6000_BTI_void, RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI },
-  { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V4SI,
-    RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V4SI },
-  { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V4SI,
-    RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI },
-  { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V4SI,
-    RS6000_BTI_void, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V4SI },
-  { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V4SI,
-    RS6000_BTI_void, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI },
-  { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V4SI,
-    RS6000_BTI_void, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI },
-  { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V8HI,
-    RS6000_BTI_void, RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_V8HI },
-  { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V8HI,
-    RS6000_BTI_void, RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI },
-  { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V8HI,
-    RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V8HI },
-  { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V8HI,
-    RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI },
-  { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V8HI,
-    RS6000_BTI_void, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V8HI },
-  { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V8HI,
-    RS6000_BTI_void, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI },
-  { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V8HI,
-    RS6000_BTI_void, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI },
-  { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V16QI,
-    RS6000_BTI_void, RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_V16QI },
-  { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V16QI,
-    RS6000_BTI_void, RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI },
-  { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V16QI,
-    RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V16QI },
-  { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V16QI,
-    RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI },
-  { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V16QI,
-    RS6000_BTI_void, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V16QI },
-  { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V16QI,
-    RS6000_BTI_void, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI },
-  { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V16QI,
-    RS6000_BTI_void, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI },
-  { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V8HI,
-    RS6000_BTI_void, RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_pixel_V8HI },
-  { ALTIVEC_BUILTIN_VEC_STE, ALTIVEC_BUILTIN_STVEBX,
-    RS6000_BTI_void, RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI },
-  { ALTIVEC_BUILTIN_VEC_STE, ALTIVEC_BUILTIN_STVEBX,
-    RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI },
-  { ALTIVEC_BUILTIN_VEC_STE, ALTIVEC_BUILTIN_STVEBX,
-    RS6000_BTI_void, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI },
-  { ALTIVEC_BUILTIN_VEC_STE, ALTIVEC_BUILTIN_STVEBX,
-    RS6000_BTI_void, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI },
-  { ALTIVEC_BUILTIN_VEC_STE, ALTIVEC_BUILTIN_STVEHX,
-    RS6000_BTI_void, RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI },
-  { ALTIVEC_BUILTIN_VEC_STE, ALTIVEC_BUILTIN_STVEHX,
-    RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI },
-  { ALTIVEC_BUILTIN_VEC_STE, ALTIVEC_BUILTIN_STVEHX,
-    RS6000_BTI_void, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI },
-  { ALTIVEC_BUILTIN_VEC_STE, ALTIVEC_BUILTIN_STVEHX,
-    RS6000_BTI_void, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI },
-  { ALTIVEC_BUILTIN_VEC_STE, ALTIVEC_BUILTIN_STVEHX,
-    RS6000_BTI_void, RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI },
-  { ALTIVEC_BUILTIN_VEC_STE, ALTIVEC_BUILTIN_STVEHX,
-    RS6000_BTI_void, RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI },
-  { ALTIVEC_BUILTIN_VEC_STE, ALTIVEC_BUILTIN_STVEWX,
-    RS6000_BTI_void, RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float },
-  { ALTIVEC_BUILTIN_VEC_STE, ALTIVEC_BUILTIN_STVEWX,
-    RS6000_BTI_void, RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI },
-  { ALTIVEC_BUILTIN_VEC_STE, ALTIVEC_BUILTIN_STVEWX,
-    RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI },
-  { ALTIVEC_BUILTIN_VEC_STE, ALTIVEC_BUILTIN_STVEWX,
-    RS6000_BTI_void, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI },
-  { ALTIVEC_BUILTIN_VEC_STE, ALTIVEC_BUILTIN_STVEWX,
-    RS6000_BTI_void, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI },
-  { ALTIVEC_BUILTIN_VEC_STVEWX, ALTIVEC_BUILTIN_STVEWX,
-    RS6000_BTI_void, RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float },
-  { ALTIVEC_BUILTIN_VEC_STVEWX, ALTIVEC_BUILTIN_STVEWX,
-    RS6000_BTI_void, RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI },
-  { ALTIVEC_BUILTIN_VEC_STVEWX, ALTIVEC_BUILTIN_STVEWX,
-    RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI },
-  { ALTIVEC_BUILTIN_VEC_STVEWX, ALTIVEC_BUILTIN_STVEWX,
-    RS6000_BTI_void, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI },
-  { ALTIVEC_BUILTIN_VEC_STVEWX, ALTIVEC_BUILTIN_STVEWX,
-    RS6000_BTI_void, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI },
-  { ALTIVEC_BUILTIN_VEC_STVEWX, ALTIVEC_BUILTIN_STVEWX,
-    RS6000_BTI_void, RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_void },
-  { ALTIVEC_BUILTIN_VEC_STVEWX, ALTIVEC_BUILTIN_STVEWX,
-    RS6000_BTI_void, RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_void },
-  { ALTIVEC_BUILTIN_VEC_STVEWX, ALTIVEC_BUILTIN_STVEWX,
-    RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_void },
-  { ALTIVEC_BUILTIN_VEC_STVEHX, ALTIVEC_BUILTIN_STVEHX,
-    RS6000_BTI_void, RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI },
-  { ALTIVEC_BUILTIN_VEC_STVEHX, ALTIVEC_BUILTIN_STVEHX,
-    RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI },
-  { ALTIVEC_BUILTIN_VEC_STVEHX, ALTIVEC_BUILTIN_STVEHX,
-    RS6000_BTI_void, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI },
-  { ALTIVEC_BUILTIN_VEC_STVEHX, ALTIVEC_BUILTIN_STVEHX,
-    RS6000_BTI_void, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI },
-  { ALTIVEC_BUILTIN_VEC_STVEHX, ALTIVEC_BUILTIN_STVEHX,
-    RS6000_BTI_void, RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_void },
-  { ALTIVEC_BUILTIN_VEC_STVEHX, ALTIVEC_BUILTIN_STVEHX,
-    RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_void },
-  { ALTIVEC_BUILTIN_VEC_STVEBX, ALTIVEC_BUILTIN_STVEBX,
-    RS6000_BTI_void, RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI },
-  { ALTIVEC_BUILTIN_VEC_STVEBX, ALTIVEC_BUILTIN_STVEBX,
-    RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI },
-  { ALTIVEC_BUILTIN_VEC_STVEBX, ALTIVEC_BUILTIN_STVEBX,
-    RS6000_BTI_void, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI },
-  { ALTIVEC_BUILTIN_VEC_STVEBX, ALTIVEC_BUILTIN_STVEBX,
-    RS6000_BTI_void, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI },
-  { ALTIVEC_BUILTIN_VEC_STVEBX, ALTIVEC_BUILTIN_STVEBX,
-    RS6000_BTI_void, RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_void },
-  { ALTIVEC_BUILTIN_VEC_STVEBX, ALTIVEC_BUILTIN_STVEBX,
-    RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_void },
-  { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V4SF,
-    RS6000_BTI_void, RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_V4SF },
-  { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V4SF,
-    RS6000_BTI_void, RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float },
-  { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V4SI,
-    RS6000_BTI_void, RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_V4SI },
-  { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V4SI,
-    RS6000_BTI_void, RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI },
-  { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V4SI,
-    RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V4SI },
-  { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V4SI,
-    RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI },
-  { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V4SI,
-    RS6000_BTI_void, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V4SI },
-  { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V4SI,
-    RS6000_BTI_void, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI },
-  { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V4SI,
-    RS6000_BTI_void, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI },
-  { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V8HI,
-    RS6000_BTI_void, RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_V8HI },
-  { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V8HI,
-    RS6000_BTI_void, RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI },
-  { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V8HI,
-    RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V8HI },
-  { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V8HI,
-    RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI },
-  { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V8HI,
-    RS6000_BTI_void, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V8HI },
-  { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V8HI,
-    RS6000_BTI_void, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI },
-  { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V8HI,
-    RS6000_BTI_void, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI },
-  { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V16QI,
-    RS6000_BTI_void, RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_V16QI },
-  { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V16QI,
-    RS6000_BTI_void, RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI },
-  { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V16QI,
-    RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V16QI },
-  { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V16QI,
-    RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI },
-  { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V16QI,
-    RS6000_BTI_void, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V16QI },
-  { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V16QI,
-    RS6000_BTI_void, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI },
-  { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V16QI,
-    RS6000_BTI_void, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI },
-  { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V8HI,
-    RS6000_BTI_void, RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_pixel_V8HI },
-  { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V2DF,
-    RS6000_BTI_void, RS6000_BTI_V2DF, RS6000_BTI_INTSI, ~RS6000_BTI_V2DF },
-  { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V2DF,
-    RS6000_BTI_void, RS6000_BTI_V2DF, RS6000_BTI_INTSI, ~RS6000_BTI_double },
-  { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V2DI,
-    RS6000_BTI_void, RS6000_BTI_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_V2DI },
-  { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V2DI,
-    RS6000_BTI_void, RS6000_BTI_unsigned_V2DI, RS6000_BTI_INTSI,
-    ~RS6000_BTI_unsigned_V2DI },
-  { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V2DI,
-    RS6000_BTI_void, RS6000_BTI_bool_V2DI, RS6000_BTI_INTSI,
-    ~RS6000_BTI_bool_V2DI },
-  { ALTIVEC_BUILTIN_VEC_STVLX, ALTIVEC_BUILTIN_STVLX,
-    RS6000_BTI_void, RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_V4SF },
-  { ALTIVEC_BUILTIN_VEC_STVLX, ALTIVEC_BUILTIN_STVLX,
-    RS6000_BTI_void, RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float },
-  { ALTIVEC_BUILTIN_VEC_STVLX, ALTIVEC_BUILTIN_STVLX,
-    RS6000_BTI_void, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V4SI },
-  { ALTIVEC_BUILTIN_VEC_STVLX, ALTIVEC_BUILTIN_STVLX,
-    RS6000_BTI_void, RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_V4SI },
-  { ALTIVEC_BUILTIN_VEC_STVLX, ALTIVEC_BUILTIN_STVLX,
-    RS6000_BTI_void, RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI },
-  { ALTIVEC_BUILTIN_VEC_STVLX, ALTIVEC_BUILTIN_STVLX,
-    RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V4SI },
-  { ALTIVEC_BUILTIN_VEC_STVLX, ALTIVEC_BUILTIN_STVLX,
-    RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI },
-  { ALTIVEC_BUILTIN_VEC_STVLX, ALTIVEC_BUILTIN_STVLX,
-    RS6000_BTI_void, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V8HI },
-  { ALTIVEC_BUILTIN_VEC_STVLX, ALTIVEC_BUILTIN_STVLX,
-    RS6000_BTI_void, RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_pixel_V8HI },
-  { ALTIVEC_BUILTIN_VEC_STVLX, ALTIVEC_BUILTIN_STVLX,
-    RS6000_BTI_void, RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_V8HI },
-  { ALTIVEC_BUILTIN_VEC_STVLX, ALTIVEC_BUILTIN_STVLX,
-    RS6000_BTI_void, RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI },
-  { ALTIVEC_BUILTIN_VEC_STVLX, ALTIVEC_BUILTIN_STVLX,
-    RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V8HI },
-  { ALTIVEC_BUILTIN_VEC_STVLX, ALTIVEC_BUILTIN_STVLX,
-    RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI },
-  { ALTIVEC_BUILTIN_VEC_STVLX, ALTIVEC_BUILTIN_STVLX,
-    RS6000_BTI_void, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V16QI },
-  { ALTIVEC_BUILTIN_VEC_STVLX, ALTIVEC_BUILTIN_STVLX,
-    RS6000_BTI_void, RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_V16QI },
-  { ALTIVEC_BUILTIN_VEC_STVLX, ALTIVEC_BUILTIN_STVLX,
-    RS6000_BTI_void, RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI },
-  { ALTIVEC_BUILTIN_VEC_STVLX, ALTIVEC_BUILTIN_STVLX,
-    RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V16QI },
-  { ALTIVEC_BUILTIN_VEC_STVLX, ALTIVEC_BUILTIN_STVLX,
-    RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI },
-  { ALTIVEC_BUILTIN_VEC_STVLXL, ALTIVEC_BUILTIN_STVLXL,
-    RS6000_BTI_void, RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_V4SF },
-  { ALTIVEC_BUILTIN_VEC_STVLXL, ALTIVEC_BUILTIN_STVLXL,
-    RS6000_BTI_void, RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float },
-  { ALTIVEC_BUILTIN_VEC_STVLXL, ALTIVEC_BUILTIN_STVLXL,
-    RS6000_BTI_void, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V4SI },
-  { ALTIVEC_BUILTIN_VEC_STVLXL, ALTIVEC_BUILTIN_STVLXL,
-    RS6000_BTI_void, RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_V4SI },
-  { ALTIVEC_BUILTIN_VEC_STVLXL, ALTIVEC_BUILTIN_STVLXL,
-    RS6000_BTI_void, RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI },
-  { ALTIVEC_BUILTIN_VEC_STVLXL, ALTIVEC_BUILTIN_STVLXL,
-    RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V4SI },
-  { ALTIVEC_BUILTIN_VEC_STVLXL, ALTIVEC_BUILTIN_STVLXL,
-    RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI },
-  { ALTIVEC_BUILTIN_VEC_STVLXL, ALTIVEC_BUILTIN_STVLXL,
-    RS6000_BTI_void, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V8HI },
-  { ALTIVEC_BUILTIN_VEC_STVLXL, ALTIVEC_BUILTIN_STVLXL,
-    RS6000_BTI_void, RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_pixel_V8HI },
-  { ALTIVEC_BUILTIN_VEC_STVLXL, ALTIVEC_BUILTIN_STVLXL,
-    RS6000_BTI_void, RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_V8HI },
-  { ALTIVEC_BUILTIN_VEC_STVLXL, ALTIVEC_BUILTIN_STVLXL,
-    RS6000_BTI_void, RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI },
-  { ALTIVEC_BUILTIN_VEC_STVLXL, ALTIVEC_BUILTIN_STVLXL,
-    RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V8HI },
-  { ALTIVEC_BUILTIN_VEC_STVLXL, ALTIVEC_BUILTIN_STVLXL,
-    RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI },
-  { ALTIVEC_BUILTIN_VEC_STVLXL, ALTIVEC_BUILTIN_STVLXL,
-    RS6000_BTI_void, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V16QI },
-  { ALTIVEC_BUILTIN_VEC_STVLXL, ALTIVEC_BUILTIN_STVLXL,
-    RS6000_BTI_void, RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_V16QI },
-  { ALTIVEC_BUILTIN_VEC_STVLXL, ALTIVEC_BUILTIN_STVLXL,
-    RS6000_BTI_void, RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI },
-  { ALTIVEC_BUILTIN_VEC_STVLXL, ALTIVEC_BUILTIN_STVLXL,
-    RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V16QI },
-  { ALTIVEC_BUILTIN_VEC_STVLXL, ALTIVEC_BUILTIN_STVLXL,
-    RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI },
-  { ALTIVEC_BUILTIN_VEC_STVRX, ALTIVEC_BUILTIN_STVRX,
-    RS6000_BTI_void, RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_V4SF },
-  { ALTIVEC_BUILTIN_VEC_STVRX, ALTIVEC_BUILTIN_STVRX,
-    RS6000_BTI_void, RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float },
-  { ALTIVEC_BUILTIN_VEC_STVRX, ALTIVEC_BUILTIN_STVRX,
-    RS6000_BTI_void, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V4SI },
-  { ALTIVEC_BUILTIN_VEC_STVRX, ALTIVEC_BUILTIN_STVRX,
-    RS6000_BTI_void, RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_V4SI },
-  { ALTIVEC_BUILTIN_VEC_STVRX, ALTIVEC_BUILTIN_STVRX,
-    RS6000_BTI_void, RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI },
-  { ALTIVEC_BUILTIN_VEC_STVRX, ALTIVEC_BUILTIN_STVRX,
-    RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V4SI },
-  { ALTIVEC_BUILTIN_VEC_STVRX, ALTIVEC_BUILTIN_STVRX,
-    RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI },
-  { ALTIVEC_BUILTIN_VEC_STVRX, ALTIVEC_BUILTIN_STVRX,
-    RS6000_BTI_void, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V8HI },
-  { ALTIVEC_BUILTIN_VEC_STVRX, ALTIVEC_BUILTIN_STVRX,
-    RS6000_BTI_void, RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_pixel_V8HI },
-  { ALTIVEC_BUILTIN_VEC_STVRX, ALTIVEC_BUILTIN_STVRX,
-    RS6000_BTI_void, RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_V8HI },
-  { ALTIVEC_BUILTIN_VEC_STVRX, ALTIVEC_BUILTIN_STVRX,
-    RS6000_BTI_void, RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI },
-  { ALTIVEC_BUILTIN_VEC_STVRX, ALTIVEC_BUILTIN_STVRX,
-    RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V8HI },
-  { ALTIVEC_BUILTIN_VEC_STVRX, ALTIVEC_BUILTIN_STVRX,
-    RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI },
-  { ALTIVEC_BUILTIN_VEC_STVRX, ALTIVEC_BUILTIN_STVRX,
-    RS6000_BTI_void, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V16QI },
-  { ALTIVEC_BUILTIN_VEC_STVRX, ALTIVEC_BUILTIN_STVRX,
-    RS6000_BTI_void, RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_V16QI },
-  { ALTIVEC_BUILTIN_VEC_STVRX, ALTIVEC_BUILTIN_STVRX,
-    RS6000_BTI_void, RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI },
-  { ALTIVEC_BUILTIN_VEC_STVRX, ALTIVEC_BUILTIN_STVRX,
-    RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V16QI },
-  { ALTIVEC_BUILTIN_VEC_STVRX, ALTIVEC_BUILTIN_STVRX,
-    RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI },
-  { ALTIVEC_BUILTIN_VEC_STVRXL, ALTIVEC_BUILTIN_STVRXL,
-    RS6000_BTI_void, RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_V4SF },
-  { ALTIVEC_BUILTIN_VEC_STVRXL, ALTIVEC_BUILTIN_STVRXL,
-    RS6000_BTI_void, RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float },
-  { ALTIVEC_BUILTIN_VEC_STVRXL, ALTIVEC_BUILTIN_STVRXL,
-    RS6000_BTI_void, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V4SI },
-  { ALTIVEC_BUILTIN_VEC_STVRXL, ALTIVEC_BUILTIN_STVRXL,
-    RS6000_BTI_void, RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_V4SI },
-  { ALTIVEC_BUILTIN_VEC_STVRXL, ALTIVEC_BUILTIN_STVRXL,
-    RS6000_BTI_void, RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI },
-  { ALTIVEC_BUILTIN_VEC_STVRXL, ALTIVEC_BUILTIN_STVRXL,
-    RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V4SI },
-  { ALTIVEC_BUILTIN_VEC_STVRXL, ALTIVEC_BUILTIN_STVRXL,
-    RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI },
-  { ALTIVEC_BUILTIN_VEC_STVRXL, ALTIVEC_BUILTIN_STVRXL,
-    RS6000_BTI_void, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V8HI },
-  { ALTIVEC_BUILTIN_VEC_STVRXL, ALTIVEC_BUILTIN_STVRXL,
-    RS6000_BTI_void, RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_pixel_V8HI },
-  { ALTIVEC_BUILTIN_VEC_STVRXL, ALTIVEC_BUILTIN_STVRXL,
-    RS6000_BTI_void, RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_V8HI },
-  { ALTIVEC_BUILTIN_VEC_STVRXL, ALTIVEC_BUILTIN_STVRXL,
-    RS6000_BTI_void, RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI },
-  { ALTIVEC_BUILTIN_VEC_STVRXL, ALTIVEC_BUILTIN_STVRXL,
-    RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V8HI },
-  { ALTIVEC_BUILTIN_VEC_STVRXL, ALTIVEC_BUILTIN_STVRXL,
-    RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI },
-  { ALTIVEC_BUILTIN_VEC_STVRXL, ALTIVEC_BUILTIN_STVRXL,
-    RS6000_BTI_void, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V16QI },
-  { ALTIVEC_BUILTIN_VEC_STVRXL, ALTIVEC_BUILTIN_STVRXL,
-    RS6000_BTI_void, RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_V16QI },
-  { ALTIVEC_BUILTIN_VEC_STVRXL, ALTIVEC_BUILTIN_STVRXL,
-    RS6000_BTI_void, RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI },
-  { ALTIVEC_BUILTIN_VEC_STVRXL, ALTIVEC_BUILTIN_STVRXL,
-    RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V16QI },
-  { ALTIVEC_BUILTIN_VEC_STVRXL, ALTIVEC_BUILTIN_STVRXL,
-    RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI },
-  { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_STXVD2X_V2DF,
-    RS6000_BTI_void, RS6000_BTI_V2DF, RS6000_BTI_INTSI, ~RS6000_BTI_V2DF },
-  { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_STXVD2X_V2DF,
-    RS6000_BTI_void, RS6000_BTI_V2DF, RS6000_BTI_INTSI, ~RS6000_BTI_double },
-  { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_STXVD2X_V2DI,
-    RS6000_BTI_void, RS6000_BTI_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_V2DI },
-  { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_STXVD2X_V2DI,
-    RS6000_BTI_void, RS6000_BTI_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_long_long },
-  { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_STXVD2X_V2DI, RS6000_BTI_void,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_long_long },
-  { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_STXVD2X_V2DI,
-    RS6000_BTI_void, RS6000_BTI_unsigned_V2DI, RS6000_BTI_INTSI,
-    ~RS6000_BTI_unsigned_V2DI },
-  { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_STXVD2X_V2DI,
-    RS6000_BTI_void, RS6000_BTI_bool_V2DI, RS6000_BTI_INTSI,
-    ~RS6000_BTI_bool_V2DI },
-  { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_STXVW4X_V4SF,
-    RS6000_BTI_void, RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_V4SF },
-  { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_STXVW4X_V4SF,
-    RS6000_BTI_void, RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float },
-  { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_STXVW4X_V4SI,
-    RS6000_BTI_void, RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_V4SI },
-  { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_STXVW4X_V4SI,
-    RS6000_BTI_void, RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI },
-  { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_STXVW4X_V4SI,
-    RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V4SI },
-  { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_STXVW4X_V4SI,
-    RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI },
-  { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_STXVW4X_V4SI,
-    RS6000_BTI_void, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V4SI },
-  { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_STXVW4X_V4SI,
-    RS6000_BTI_void, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI },
-  { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_STXVW4X_V4SI,
-    RS6000_BTI_void, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI },
-  { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_STXVW4X_V8HI,
-    RS6000_BTI_void, RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_V8HI },
-  { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_STXVW4X_V8HI,
-    RS6000_BTI_void, RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI },
-  { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_STXVW4X_V8HI,
-    RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V8HI },
-  { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_STXVW4X_V8HI,
-    RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI },
-  { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_STXVW4X_V8HI,
-    RS6000_BTI_void, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V8HI },
-  { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_STXVW4X_V8HI,
-    RS6000_BTI_void, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI },
-  { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_STXVW4X_V8HI,
-    RS6000_BTI_void, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI },
-  { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_STXVW4X_V16QI,
-    RS6000_BTI_void, RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_V16QI },
-  { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_STXVW4X_V16QI,
-    RS6000_BTI_void, RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI },
-  { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_STXVW4X_V16QI,
-    RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V16QI },
-  { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_STXVW4X_V16QI,
-    RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI },
-  { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_STXVW4X_V16QI,
-    RS6000_BTI_void, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V16QI },
-  { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_STXVW4X_V16QI,
-    RS6000_BTI_void, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI },
-  { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_STXVW4X_V16QI,
-    RS6000_BTI_void, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI },
-  { VSX_BUILTIN_VEC_XST, VSX_BUILTIN_STXVW4X_V8HI,
-    RS6000_BTI_void, RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_pixel_V8HI },
-  { VSX_BUILTIN_VEC_XST_BE, VSX_BUILTIN_ST_ELEMREV_V2DF,
-    RS6000_BTI_void, RS6000_BTI_V2DF, RS6000_BTI_INTSI, ~RS6000_BTI_V2DF },
-  { VSX_BUILTIN_VEC_XST_BE, VSX_BUILTIN_ST_ELEMREV_V2DF,
-    RS6000_BTI_void, RS6000_BTI_V2DF, RS6000_BTI_INTSI, ~RS6000_BTI_double },
-  { VSX_BUILTIN_VEC_XST_BE, VSX_BUILTIN_ST_ELEMREV_V1TI,
-    RS6000_BTI_void, RS6000_BTI_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_INTTI },
-  { VSX_BUILTIN_VEC_XST_BE, VSX_BUILTIN_ST_ELEMREV_V1TI,
-    RS6000_BTI_void, RS6000_BTI_unsigned_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTTI },
-  { VSX_BUILTIN_VEC_XST_BE, VSX_BUILTIN_ST_ELEMREV_V2DI,
-    RS6000_BTI_void, RS6000_BTI_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_V2DI },
-  { VSX_BUILTIN_VEC_XST_BE, VSX_BUILTIN_ST_ELEMREV_V2DI,
-    RS6000_BTI_void, RS6000_BTI_V2DI, RS6000_BTI_INTSI,
-    ~RS6000_BTI_long_long },
-  { VSX_BUILTIN_VEC_XST_BE, VSX_BUILTIN_ST_ELEMREV_V2DI,
-    RS6000_BTI_void, RS6000_BTI_unsigned_V2DI, RS6000_BTI_INTSI,
-    ~RS6000_BTI_unsigned_V2DI },
-  { VSX_BUILTIN_VEC_XST_BE, VSX_BUILTIN_ST_ELEMREV_V2DI,
-    RS6000_BTI_void, RS6000_BTI_unsigned_V2DI, RS6000_BTI_INTSI,
-    ~RS6000_BTI_unsigned_long_long },
-  { VSX_BUILTIN_VEC_XST_BE, VSX_BUILTIN_ST_ELEMREV_V4SF,
-    RS6000_BTI_void, RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_V4SF },
-  { VSX_BUILTIN_VEC_XST_BE, VSX_BUILTIN_ST_ELEMREV_V4SF,
-    RS6000_BTI_void, RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float },
-  { VSX_BUILTIN_VEC_XST_BE, VSX_BUILTIN_ST_ELEMREV_V4SI,
-    RS6000_BTI_void, RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_V4SI },
-  { VSX_BUILTIN_VEC_XST_BE, VSX_BUILTIN_ST_ELEMREV_V4SI,
-    RS6000_BTI_void, RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI },
-  { VSX_BUILTIN_VEC_XST_BE, VSX_BUILTIN_ST_ELEMREV_V4SI,
-    RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI,
-    ~RS6000_BTI_unsigned_V4SI },
-  { VSX_BUILTIN_VEC_XST_BE, VSX_BUILTIN_ST_ELEMREV_V4SI,
-    RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI,
-    ~RS6000_BTI_UINTSI },
-  { VSX_BUILTIN_VEC_XST_BE, VSX_BUILTIN_ST_ELEMREV_V8HI,
-    RS6000_BTI_void, RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_V8HI },
-  { VSX_BUILTIN_VEC_XST_BE, VSX_BUILTIN_ST_ELEMREV_V8HI,
-    RS6000_BTI_void, RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI },
-  { VSX_BUILTIN_VEC_XST_BE, VSX_BUILTIN_ST_ELEMREV_V8HI,
-    RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI,
-    ~RS6000_BTI_unsigned_V8HI },
-  { VSX_BUILTIN_VEC_XST_BE, VSX_BUILTIN_ST_ELEMREV_V8HI,
-    RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI,
-    ~RS6000_BTI_UINTHI },
-  { VSX_BUILTIN_VEC_XST_BE, VSX_BUILTIN_ST_ELEMREV_V16QI,
-    RS6000_BTI_void, RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_V16QI },
-  { VSX_BUILTIN_VEC_XST_BE, VSX_BUILTIN_ST_ELEMREV_V16QI,
-    RS6000_BTI_void, RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI },
-  { VSX_BUILTIN_VEC_XST_BE, VSX_BUILTIN_ST_ELEMREV_V16QI,
-    RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI,
-    ~RS6000_BTI_unsigned_V16QI },
-  { VSX_BUILTIN_VEC_XST_BE, VSX_BUILTIN_ST_ELEMREV_V16QI,
-    RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI,
-    ~RS6000_BTI_UINTQI },
-  { VSX_BUILTIN_VEC_XXSLDWI, VSX_BUILTIN_XXSLDWI_16QI,
-    RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_INTSI },
-  { VSX_BUILTIN_VEC_XXSLDWI, VSX_BUILTIN_XXSLDWI_16QI,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI,
-    RS6000_BTI_INTSI },
-  { VSX_BUILTIN_VEC_XXSLDWI, VSX_BUILTIN_XXSLDWI_8HI,
-    RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_INTSI },
-  { VSX_BUILTIN_VEC_XXSLDWI, VSX_BUILTIN_XXSLDWI_8HI,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI,
-    RS6000_BTI_INTSI },
-  { VSX_BUILTIN_VEC_XXSLDWI, VSX_BUILTIN_XXSLDWI_4SI,
-    RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_INTSI },
-  { VSX_BUILTIN_VEC_XXSLDWI, VSX_BUILTIN_XXSLDWI_4SI,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI,
-    RS6000_BTI_INTSI },
-  { VSX_BUILTIN_VEC_XXSLDWI, VSX_BUILTIN_XXSLDWI_2DI,
-    RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_INTSI },
-  { VSX_BUILTIN_VEC_XXSLDWI, VSX_BUILTIN_XXSLDWI_2DI,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI,
-    RS6000_BTI_INTSI },
-  { VSX_BUILTIN_VEC_XXSLDWI, VSX_BUILTIN_XXSLDWI_4SF,
-    RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_INTSI },
-  { VSX_BUILTIN_VEC_XXSLDWI, VSX_BUILTIN_XXSLDWI_2DF,
-    RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_INTSI },
-
-  { VSX_BUILTIN_VEC_XXPERMDI, VSX_BUILTIN_XXPERMDI_2DF,
-    RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_INTSI },
-  { VSX_BUILTIN_VEC_XXPERMDI, VSX_BUILTIN_XXPERMDI_2DI,
-    RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_INTSI },
-  { VSX_BUILTIN_VEC_XXPERMDI, VSX_BUILTIN_XXPERMDI_2DI,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI,
-    RS6000_BTI_INTSI },
-  { VSX_BUILTIN_VEC_XXPERMDI, VSX_BUILTIN_XXPERMDI_4SF,
-    RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_INTSI },
-  { VSX_BUILTIN_VEC_XXPERMDI, VSX_BUILTIN_XXPERMDI_4SI,
-    RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_INTSI },
-  { VSX_BUILTIN_VEC_XXPERMDI, VSX_BUILTIN_XXPERMDI_4SI,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI,
-    RS6000_BTI_INTSI },
-  { VSX_BUILTIN_VEC_XXPERMDI, VSX_BUILTIN_XXPERMDI_8HI,
-    RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_INTSI },
-  { VSX_BUILTIN_VEC_XXPERMDI, VSX_BUILTIN_XXPERMDI_8HI,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI,
-    RS6000_BTI_INTSI },
-  { VSX_BUILTIN_VEC_XXPERMDI, VSX_BUILTIN_XXPERMDI_16QI,
-    RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_INTSI },
-  { VSX_BUILTIN_VEC_XXPERMDI, VSX_BUILTIN_XXPERMDI_16QI,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI,
-    RS6000_BTI_INTSI },
-
-  { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVD2X_V2DF,
-    RS6000_BTI_V2DF, RS6000_BTI_INTSI, ~RS6000_BTI_V2DF, 0 },
-  { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVD2X_V2DF,
-    RS6000_BTI_V2DF, RS6000_BTI_INTSI, ~RS6000_BTI_double, 0 },
-  { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVD2X_V2DI,
-    RS6000_BTI_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_V2DI, 0 },
-  { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVD2X_V2DI,
-    RS6000_BTI_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_INTTI, 0 },
-  { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVD2X_V2DI,
-    RS6000_BTI_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_long_long, 0 },
-  { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVD2X_V2DI,
-    RS6000_BTI_unsigned_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTTI, 0 },
-  { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVD2X_V2DI,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_INTSI,
-    ~RS6000_BTI_unsigned_V2DI, 0 },
-  { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVD2X_V2DI,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_long_long, 0 },
-  { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVD2X_V2DI,
-    RS6000_BTI_bool_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V2DI, 0 },
-  { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVW4X_V4SF,
-    RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_V4SF, 0 },
-  { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVW4X_V4SF,
-    RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float, 0 },
-  { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVW4X_V4SI,
-    RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V4SI, 0 },
-  { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVW4X_V4SI,
-    RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_V4SI, 0 },
-  { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVW4X_V4SI,
-    RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI, 0 },
-  { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVW4X_V4SI,
-    RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_long, 0 },
-  { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVW4X_V4SI,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI,
-    ~RS6000_BTI_unsigned_V4SI, 0 },
-  { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVW4X_V4SI,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI, 0 },
-  { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVW4X_V4SI,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI,
-    ~RS6000_BTI_unsigned_long, 0 },
-  { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVW4X_V8HI,
-    RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V8HI, 0 },
-  { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVW4X_V8HI,
-    RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_pixel_V8HI, 0 },
-  { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVW4X_V8HI,
-    RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_V8HI, 0 },
-  { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVW4X_V8HI,
-    RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI, 0 },
-  { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVW4X_V8HI,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI,
-    ~RS6000_BTI_unsigned_V8HI, 0 },
-  { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVW4X_V8HI,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI, 0 },
-  { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVW4X_V16QI,
-    RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V16QI, 0 },
-  { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVW4X_V16QI,
-    RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_V16QI, 0 },
-  { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVW4X_V16QI,
-    RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI, 0 },
-  { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVW4X_V16QI,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI,
-    ~RS6000_BTI_unsigned_V16QI, 0 },
-  { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVW4X_V16QI,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI, 0 },
-
-  { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVD2X_V2DF,
-    RS6000_BTI_void, RS6000_BTI_V2DF, RS6000_BTI_INTSI, ~RS6000_BTI_V2DF },
-  { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVD2X_V2DF,
-    RS6000_BTI_void, RS6000_BTI_V2DF, RS6000_BTI_INTSI, ~RS6000_BTI_double },
-  { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVD2X_V2DI,
-    RS6000_BTI_void, RS6000_BTI_V2DI, RS6000_BTI_INTDI,
-    ~RS6000_BTI_long_long },
-  { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVD2X_V2DI,
-    RS6000_BTI_void, RS6000_BTI_unsigned_V2DI, RS6000_BTI_INTDI,
-    ~RS6000_BTI_unsigned_long_long },
-  { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVD2X_V1TI,
-    RS6000_BTI_void, RS6000_BTI_V1TI, RS6000_BTI_INTDI, ~RS6000_BTI_INTTI },
-  { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVD2X_V1TI,
-    RS6000_BTI_void, RS6000_BTI_unsigned_V1TI, RS6000_BTI_INTDI, ~RS6000_BTI_UINTTI },
-  { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVD2X_V2DI,
-    RS6000_BTI_void, RS6000_BTI_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_V2DI },
-  { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVD2X_V2DI,
-    RS6000_BTI_void, RS6000_BTI_unsigned_V2DI, RS6000_BTI_INTSI,
-    ~RS6000_BTI_unsigned_V2DI },
-  { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVD2X_V2DI,
-    RS6000_BTI_void, RS6000_BTI_bool_V2DI, RS6000_BTI_INTSI,
-    ~RS6000_BTI_bool_V2DI },
-  { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V4SF,
-    RS6000_BTI_void, RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_V4SF },
-  { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V4SF,
-    RS6000_BTI_void, RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float },
-  { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V4SI,
-    RS6000_BTI_void, RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_V4SI },
-  { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V4SI,
-    RS6000_BTI_void, RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI },
-  { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V4SI,
-    RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI,
-    ~RS6000_BTI_unsigned_V4SI },
-  { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V4SI,
-    RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI,
-    ~RS6000_BTI_UINTSI },
-  { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V4SI,
-    RS6000_BTI_void, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI,
-    ~RS6000_BTI_bool_V4SI },
-  { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V4SI,
-    RS6000_BTI_void, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI,
-    ~RS6000_BTI_UINTSI },
-  { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V4SI,
-    RS6000_BTI_void, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI,
-    ~RS6000_BTI_INTSI },
-  { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V8HI,
-    RS6000_BTI_void, RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_V8HI },
-  { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V8HI,
-    RS6000_BTI_void, RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI },
-  { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V8HI,
-    RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI,
-    ~RS6000_BTI_unsigned_V8HI },
-  { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V8HI,
-    RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI,
-    ~RS6000_BTI_UINTHI },
-  { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V8HI,
-    RS6000_BTI_void, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI,
-    ~RS6000_BTI_bool_V8HI },
-  { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V8HI,
-    RS6000_BTI_void, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI,
-    ~RS6000_BTI_UINTHI },
-  { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V8HI,
-    RS6000_BTI_void, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI,
-    ~RS6000_BTI_INTHI },
-  { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V16QI,
-    RS6000_BTI_void, RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_V16QI },
-  { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V16QI,
-    RS6000_BTI_void, RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI },
-  { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V16QI,
-    RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI,
-    ~RS6000_BTI_unsigned_V16QI },
-  { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V16QI,
-    RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI,
-    ~RS6000_BTI_UINTQI },
-  { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V16QI,
-    RS6000_BTI_void, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI,
-    ~RS6000_BTI_bool_V16QI },
-  { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V16QI,
-    RS6000_BTI_void, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI,
-    ~RS6000_BTI_UINTQI },
-  { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V16QI,
-    RS6000_BTI_void, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI,
-    ~RS6000_BTI_INTQI },
-  { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V16QI,
-    RS6000_BTI_void, RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI,
-    ~RS6000_BTI_pixel_V8HI },
-
-  /* Predicates.  */
-  { ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTUB_P,
-    RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI },
-  { ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTUB_P,
-    RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI },
-  { ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTUB_P,
-    RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI },
-  { ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTSB_P,
-    RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI },
-  { ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTSB_P,
-    RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI },
-  { ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTSB_P,
-    RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V16QI, RS6000_BTI_V16QI },
-  { ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTUH_P,
-    RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI },
-  { ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTUH_P,
-    RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI },
-  { ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTUH_P,
-    RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI },
-  { ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTSH_P,
-    RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V8HI, RS6000_BTI_V8HI },
-  { ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTSH_P,
-    RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI },
-  { ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTSH_P,
-    RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI },
-  { ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTUW_P,
-    RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI },
-  { ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTUW_P,
-    RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI },
-  { ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTUW_P,
-    RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI },
-  { ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTSW_P,
-    RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI },
-  { ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTSW_P,
-    RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI },
-  { ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTSW_P,
-    RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V4SI, RS6000_BTI_V4SI },
-  { ALTIVEC_BUILTIN_VEC_VCMPGT_P, P8V_BUILTIN_VCMPGTUD_P,
-    RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI },
-  { ALTIVEC_BUILTIN_VEC_VCMPGT_P, P8V_BUILTIN_VCMPGTUD_P,
-    RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI },
-  { ALTIVEC_BUILTIN_VEC_VCMPGT_P, P8V_BUILTIN_VCMPGTUD_P,
-    RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI },
-  { ALTIVEC_BUILTIN_VEC_VCMPGT_P, P10V_BUILTIN_VCMPGTUT_P,
-    RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI },
-  { ALTIVEC_BUILTIN_VEC_VCMPGT_P, P8V_BUILTIN_VCMPGTSD_P,
-    RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI },
-  { ALTIVEC_BUILTIN_VEC_VCMPGT_P, P8V_BUILTIN_VCMPGTSD_P,
-    RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI },
-  { ALTIVEC_BUILTIN_VEC_VCMPGT_P, P8V_BUILTIN_VCMPGTSD_P,
-    RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V2DI, RS6000_BTI_V2DI },
-  { ALTIVEC_BUILTIN_VEC_VCMPGT_P, P10V_BUILTIN_VCMPGTST_P,
-    RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V1TI, RS6000_BTI_V1TI },
-  { ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTFP_P,
-    RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V4SF, RS6000_BTI_V4SF },
-  { ALTIVEC_BUILTIN_VEC_VCMPGT_P, VSX_BUILTIN_XVCMPGTDP_P,
-    RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V2DF, RS6000_BTI_V2DF },
-
-
-  { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUB_P,
-    RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI },
-  { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUB_P,
-    RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI },
-  { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUB_P,
-    RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI },
-  { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUB_P,
-    RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI },
-  { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUB_P,
-    RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI },
-  { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUB_P,
-    RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V16QI, RS6000_BTI_V16QI },
-  { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUB_P,
-    RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI },
-  { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUH_P,
-    RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI },
-  { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUH_P,
-    RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI },
-  { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUH_P,
-    RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI },
-  { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUH_P,
-    RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V8HI, RS6000_BTI_V8HI },
-  { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUH_P,
-    RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI },
-  { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUH_P,
-    RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI },
-  { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUH_P,
-    RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI },
-  { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUH_P,
-    RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI },
-  { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUW_P,
-    RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI },
-  { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUW_P,
-    RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI },
-  { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUW_P,
-    RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI },
-  { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUW_P,
-    RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI },
-  { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUW_P,
-    RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI },
-  { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUW_P,
-    RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V4SI, RS6000_BTI_V4SI },
-  { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUW_P,
-    RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI },
-  { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, P8V_BUILTIN_VCMPEQUD_P,
-    RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI },
-  { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, P8V_BUILTIN_VCMPEQUD_P,
-    RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI },
-  { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, P8V_BUILTIN_VCMPEQUD_P,
-    RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI },
-  { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, P8V_BUILTIN_VCMPEQUD_P,
-    RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI },
-  { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, P8V_BUILTIN_VCMPEQUD_P,
-    RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI },
-  { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, P8V_BUILTIN_VCMPEQUD_P,
-    RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V2DI, RS6000_BTI_V2DI },
-  { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, P8V_BUILTIN_VCMPEQUD_P,
-    RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI },
-  { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, P10V_BUILTIN_VCMPEQUT_P,
-    RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V1TI, RS6000_BTI_V1TI },
-  { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, P10V_BUILTIN_VCMPEQUT_P,
-    RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI },
-  { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQFP_P,
-    RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V4SF, RS6000_BTI_V4SF },
-  { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, VSX_BUILTIN_XVCMPEQDP_P,
-    RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V2DF, RS6000_BTI_V2DF },
-
-
-  /* cmpge is the same as cmpgt for all cases except floating point.
-     There is further code to deal with this special case in
-     altivec_build_resolved_builtin.  */
-  { ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTUB_P,
-    RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI },
-  { ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTUB_P,
-    RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI },
-  { ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTUB_P,
-    RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI },
-  { ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTSB_P,
-    RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI },
-  { ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTSB_P,
-    RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI },
-  { ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTSB_P,
-    RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V16QI, RS6000_BTI_V16QI },
-  { ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTUH_P,
-    RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI },
-  { ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTUH_P,
-    RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI },
-  { ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTUH_P,
-    RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI },
-  { ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTSH_P,
-    RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V8HI, RS6000_BTI_V8HI },
-  { ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTSH_P,
-    RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI },
-  { ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTSH_P,
-    RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI },
-  { ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTUW_P,
-    RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI },
-  { ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTUW_P,
-    RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI },
-  { ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTUW_P,
-    RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI },
-  { ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTSW_P,
-    RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI },
-  { ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTSW_P,
-    RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI },
-  { ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTSW_P,
-    RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V4SI, RS6000_BTI_V4SI },
-  { ALTIVEC_BUILTIN_VEC_VCMPGE_P, P8V_BUILTIN_VCMPGTUD_P,
-    RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI },
-  { ALTIVEC_BUILTIN_VEC_VCMPGE_P, P8V_BUILTIN_VCMPGTUD_P,
-    RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI },
-  { ALTIVEC_BUILTIN_VEC_VCMPGE_P, P8V_BUILTIN_VCMPGTUD_P,
-    RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI },
-  { ALTIVEC_BUILTIN_VEC_VCMPGE_P, P10V_BUILTIN_VCMPGTUT_P,
-    RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI },
-  { ALTIVEC_BUILTIN_VEC_VCMPGE_P, P8V_BUILTIN_VCMPGTSD_P,
-    RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI },
-  { ALTIVEC_BUILTIN_VEC_VCMPGE_P, P8V_BUILTIN_VCMPGTSD_P,
-    RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI },
-  { ALTIVEC_BUILTIN_VEC_VCMPGE_P, P8V_BUILTIN_VCMPGTSD_P,
-    RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V2DI, RS6000_BTI_V2DI },
-  { ALTIVEC_BUILTIN_VEC_VCMPGE_P, P10V_BUILTIN_VCMPGTST_P,
-    RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V1TI, RS6000_BTI_V1TI },
-  { ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGEFP_P,
-    RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V4SF, RS6000_BTI_V4SF },
-  { ALTIVEC_BUILTIN_VEC_VCMPGE_P, VSX_BUILTIN_XVCMPGEDP_P,
-    RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V2DF, RS6000_BTI_V2DF },
-
-  /* Power8 vector overloaded functions.  */
-  { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V16QI,
-    RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 },
-  { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V16QI,
-    RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, 0 },
-  { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V16QI,
-    RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 },
-  { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V16QI_UNS,
-    RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, 0 },
-  { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V16QI_UNS,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI,
-    RS6000_BTI_unsigned_V16QI, 0 },
-  { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V16QI_UNS,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI,
-    RS6000_BTI_bool_V16QI, 0 },
-  { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V16QI_UNS,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI,
-    RS6000_BTI_unsigned_V16QI, 0 },
-  { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V8HI,
-    RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, 0 },
-  { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V8HI,
-    RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, 0 },
-  { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V8HI,
-    RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 },
-  { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V8HI_UNS,
-    RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, 0 },
-  { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V8HI_UNS,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI,
-    RS6000_BTI_unsigned_V8HI, 0 },
-  { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V8HI_UNS,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI,
-    RS6000_BTI_bool_V8HI, 0 },
-  { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V8HI_UNS,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI,
-    RS6000_BTI_unsigned_V8HI, 0 },
-  { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V4SI,
-    RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, 0 },
-  { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V4SI,
-    RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, 0 },
-  { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V4SI,
-    RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },
-  { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V4SI_UNS,
-    RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, 0 },
-  { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V4SI_UNS,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI,
-    RS6000_BTI_unsigned_V4SI, 0 },
-  { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V4SI_UNS,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI,
-    RS6000_BTI_bool_V4SI, 0 },
-  { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V4SI_UNS,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI,
-    RS6000_BTI_unsigned_V4SI, 0 },
-  { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V2DI,
-    RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, 0 },
-  { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V2DI,
-    RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, 0 },
-  { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V2DI,
-    RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 },
-  { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V2DI_UNS,
-    RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, 0 },
-  { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V2DI_UNS,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI,
-    RS6000_BTI_unsigned_V2DI, 0 },
-  { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V2DI_UNS,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI,
-    RS6000_BTI_bool_V2DI, 0 },
-  { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V2DI_UNS,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI,
-    RS6000_BTI_unsigned_V2DI, 0 },
-  { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V4SF,
-    RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 },
-  { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V2DF,
-    RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 },
-
-  { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V16QI,
-    RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 },
-  { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V16QI,
-    RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, 0 },
-  { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V16QI,
-    RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 },
-  { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V16QI_UNS,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI,
-    RS6000_BTI_unsigned_V16QI, 0 },
-  { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V16QI_UNS,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI,
-    RS6000_BTI_bool_V16QI, 0 },
-  { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V16QI_UNS,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI,
-    RS6000_BTI_unsigned_V16QI, 0 },
-  { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V16QI_UNS,
-    RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, 0 },
-  { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V8HI,
-    RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, 0 },
-  { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V8HI,
-    RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, 0 },
-  { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V8HI,
-    RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 },
-  { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V8HI_UNS,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI,
-    RS6000_BTI_unsigned_V8HI, 0 },
-  { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V8HI_UNS,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI,
-    RS6000_BTI_bool_V8HI, 0 },
-  { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V8HI_UNS,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI,
-    RS6000_BTI_unsigned_V8HI, 0 },
-  { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V8HI_UNS,
-    RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, 0 },
-  { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V4SI,
-    RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, 0 },
-  { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V4SI,
-    RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, 0 },
-  { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V4SI,
-    RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },
-  { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V4SI_UNS,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI,
-    RS6000_BTI_unsigned_V4SI, 0 },
-  { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V4SI_UNS,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI,
-    RS6000_BTI_bool_V4SI, 0 },
-  { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V4SI_UNS,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI,
-    RS6000_BTI_unsigned_V4SI, 0 },
-  { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V4SI_UNS,
-    RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, 0 },
-  { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V2DI,
-    RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, 0 },
-  { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V2DI,
-    RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, 0 },
-  { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V2DI,
-    RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 },
-  { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V2DI_UNS,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI,
-    RS6000_BTI_unsigned_V2DI, 0 },
-  { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V2DI_UNS,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI,
-    RS6000_BTI_bool_V2DI, 0 },
-  { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V2DI_UNS,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI,
-    RS6000_BTI_unsigned_V2DI, 0 },
-  { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V2DI_UNS,
-    RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, 0 },
-  { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V4SF,
-    RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 },
-  { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V2DF,
-    RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 },
-
-  { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V16QI,
-    RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 },
-  { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V16QI,
-    RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, 0 },
-  { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V16QI,
-    RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 },
-  { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V16QI_UNS,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI,
-    RS6000_BTI_unsigned_V16QI, 0 },
-  { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V16QI_UNS,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI,
-    RS6000_BTI_bool_V16QI, 0 },
-  { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V16QI_UNS,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI,
-    RS6000_BTI_unsigned_V16QI, 0 },
-  { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V16QI_UNS,
-    RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, 0 },
-  { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V8HI,
-    RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, 0 },
-  { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V8HI,
-    RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, 0 },
-  { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V8HI,
-    RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 },
-  { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V8HI_UNS,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI,
-    RS6000_BTI_unsigned_V8HI, 0 },
-  { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V8HI_UNS,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI,
-    RS6000_BTI_bool_V8HI, 0 },
-  { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V8HI_UNS,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI,
-    RS6000_BTI_unsigned_V8HI, 0 },
-  { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V8HI_UNS,
-    RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, 0 },
-  { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V4SI,
-    RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, 0 },
-  { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V4SI,
-    RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, 0 },
-  { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V4SI,
-    RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },
-  { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V4SI_UNS,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI,
-    RS6000_BTI_unsigned_V4SI, 0 },
-  { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V4SI_UNS,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI,
-    RS6000_BTI_bool_V4SI, 0 },
-  { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V4SI_UNS,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI,
-    RS6000_BTI_unsigned_V4SI, 0 },
-  { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V4SI_UNS,
-    RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, 0 },
-  { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V2DI,
-    RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, 0 },
-  { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V2DI,
-    RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, 0 },
-  { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V2DI,
-    RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 },
-  { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V2DI_UNS,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI,
-    RS6000_BTI_unsigned_V2DI, 0 },
-  { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V2DI_UNS,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI,
-    RS6000_BTI_bool_V2DI, 0 },
-  { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V2DI_UNS,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI,
-    RS6000_BTI_unsigned_V2DI, 0 },
-  { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V2DI_UNS,
-    RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, 0 },
-  { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V4SF,
-    RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 },
-  { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V2DF,
-    RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 },
-
-  { P8V_BUILTIN_VEC_VADDCUQ, P8V_BUILTIN_VADDCUQ,
-    RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, 0 },
-  { P8V_BUILTIN_VEC_VADDCUQ, P8V_BUILTIN_VADDCUQ,
-    RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI,
-    RS6000_BTI_unsigned_V1TI, 0 },
-
-  { P8V_BUILTIN_VEC_VADDUDM, P8V_BUILTIN_VADDUDM,
-    RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, 0 },
-  { P8V_BUILTIN_VEC_VADDUDM, P8V_BUILTIN_VADDUDM,
-    RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, 0 },
-  { P8V_BUILTIN_VEC_VADDUDM, P8V_BUILTIN_VADDUDM,
-    RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 },
-  { P8V_BUILTIN_VEC_VADDUDM, P8V_BUILTIN_VADDUDM,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI, 0 },
-  { P8V_BUILTIN_VEC_VADDUDM, P8V_BUILTIN_VADDUDM,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, 0 },
-  { P8V_BUILTIN_VEC_VADDUDM, P8V_BUILTIN_VADDUDM,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 },
-
-  { P8V_BUILTIN_VEC_VADDUQM, P8V_BUILTIN_VADDUQM,
-    RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, 0 },
-  { P8V_BUILTIN_VEC_VADDUQM, P8V_BUILTIN_VADDUQM,
-    RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI,
-    RS6000_BTI_unsigned_V1TI, 0 },
-
-  { P9V_BUILTIN_VEC_VBPERM, P9V_BUILTIN_VBPERMD,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI,
-    RS6000_BTI_unsigned_V16QI, 0 },
-  { P9V_BUILTIN_VEC_VBPERM, P8V_BUILTIN_VBPERMQ,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V1TI,
-    RS6000_BTI_unsigned_V16QI, 0 },
-  { P9V_BUILTIN_VEC_VBPERM, P8V_BUILTIN_VBPERMQ2,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI,
-    RS6000_BTI_unsigned_V16QI, 0 },
-
-  { P8V_BUILTIN_VEC_VBPERMQ, P8V_BUILTIN_VBPERMQ,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI,
-    RS6000_BTI_unsigned_V16QI, 0 },
-  { P8V_BUILTIN_VEC_VBPERMQ, P8V_BUILTIN_VBPERMQ,
-    RS6000_BTI_V2DI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 },
-  { P8V_BUILTIN_VEC_VBPERMQ, P8V_BUILTIN_VBPERMQ,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V16QI,
-    RS6000_BTI_unsigned_V16QI, 0 },
-  { P8V_BUILTIN_VEC_VBPERMQ, P8V_BUILTIN_VBPERMQ,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V1TI,
-    RS6000_BTI_unsigned_V16QI, 0 },
-
-  { P8V_BUILTIN_VEC_VCLZ, P8V_BUILTIN_VCLZB,
-    RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0, 0 },
-  { P8V_BUILTIN_VEC_VCLZ, P8V_BUILTIN_VCLZB,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0, 0 },
-  { P8V_BUILTIN_VEC_VCLZ, P8V_BUILTIN_VCLZH,
-    RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0, 0 },
-  { P8V_BUILTIN_VEC_VCLZ, P8V_BUILTIN_VCLZH,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0, 0 },
-  { P8V_BUILTIN_VEC_VCLZ, P8V_BUILTIN_VCLZW,
-    RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0, 0 },
-  { P8V_BUILTIN_VEC_VCLZ, P8V_BUILTIN_VCLZW,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0, 0 },
-  { P8V_BUILTIN_VEC_VCLZ, P8V_BUILTIN_VCLZD,
-    RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0, 0 },
-  { P8V_BUILTIN_VEC_VCLZ, P8V_BUILTIN_VCLZD,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0, 0 },
-
-  { P8V_BUILTIN_VEC_VCLZB, P8V_BUILTIN_VCLZB,
-    RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0, 0 },
-  { P8V_BUILTIN_VEC_VCLZB, P8V_BUILTIN_VCLZB,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0, 0 },
-
-  { P8V_BUILTIN_VEC_VCLZH, P8V_BUILTIN_VCLZH,
-    RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0, 0 },
-  { P8V_BUILTIN_VEC_VCLZH, P8V_BUILTIN_VCLZH,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0, 0 },
-
-  { P8V_BUILTIN_VEC_VCLZW, P8V_BUILTIN_VCLZW,
-    RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0, 0 },
-  { P8V_BUILTIN_VEC_VCLZW, P8V_BUILTIN_VCLZW,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0, 0 },
-
-  { P8V_BUILTIN_VEC_VCLZD, P8V_BUILTIN_VCLZD,
-    RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0, 0 },
-  { P8V_BUILTIN_VEC_VCLZD, P8V_BUILTIN_VCLZD,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0, 0 },
-
-  { P9_BUILTIN_DFP_TSTSFI_LT, MISC_BUILTIN_TSTSFI_LT_TD,
-    RS6000_BTI_INTSI, RS6000_BTI_UINTSI, RS6000_BTI_dfloat128, 0 },
-  { P9_BUILTIN_DFP_TSTSFI_LT, MISC_BUILTIN_TSTSFI_LT_DD,
-    RS6000_BTI_INTSI, RS6000_BTI_UINTSI, RS6000_BTI_dfloat64, 0 },
-
-  { P9_BUILTIN_DFP_TSTSFI_LT_TD, MISC_BUILTIN_TSTSFI_LT_TD,
-    RS6000_BTI_INTSI, RS6000_BTI_UINTSI, RS6000_BTI_dfloat128, 0 },
-  { P9_BUILTIN_DFP_TSTSFI_LT_DD, MISC_BUILTIN_TSTSFI_LT_DD,
-    RS6000_BTI_INTSI, RS6000_BTI_UINTSI, RS6000_BTI_dfloat64, 0 },
-
-  { P9_BUILTIN_DFP_TSTSFI_EQ, MISC_BUILTIN_TSTSFI_EQ_TD,
-    RS6000_BTI_INTSI, RS6000_BTI_UINTSI, RS6000_BTI_dfloat128, 0 },
-  { P9_BUILTIN_DFP_TSTSFI_EQ, MISC_BUILTIN_TSTSFI_EQ_DD,
-    RS6000_BTI_INTSI, RS6000_BTI_UINTSI, RS6000_BTI_dfloat64, 0 },
-
-  { P9_BUILTIN_DFP_TSTSFI_EQ_TD, MISC_BUILTIN_TSTSFI_EQ_TD,
-    RS6000_BTI_INTSI, RS6000_BTI_UINTSI, RS6000_BTI_dfloat128, 0 },
-  { P9_BUILTIN_DFP_TSTSFI_EQ_DD, MISC_BUILTIN_TSTSFI_EQ_DD,
-    RS6000_BTI_INTSI, RS6000_BTI_UINTSI, RS6000_BTI_dfloat64, 0 },
-
-  { P9_BUILTIN_DFP_TSTSFI_GT, MISC_BUILTIN_TSTSFI_GT_TD,
-    RS6000_BTI_INTSI, RS6000_BTI_UINTSI, RS6000_BTI_dfloat128, 0 },
-  { P9_BUILTIN_DFP_TSTSFI_GT, MISC_BUILTIN_TSTSFI_GT_DD,
-    RS6000_BTI_INTSI, RS6000_BTI_UINTSI, RS6000_BTI_dfloat64, 0 },
-
-  { P9_BUILTIN_DFP_TSTSFI_GT_TD, MISC_BUILTIN_TSTSFI_GT_TD,
-    RS6000_BTI_INTSI, RS6000_BTI_UINTSI, RS6000_BTI_dfloat128, 0 },
-  { P9_BUILTIN_DFP_TSTSFI_GT_DD, MISC_BUILTIN_TSTSFI_GT_DD,
-    RS6000_BTI_INTSI, RS6000_BTI_UINTSI, RS6000_BTI_dfloat64, 0 },
-
-  { P9_BUILTIN_DFP_TSTSFI_OV, MISC_BUILTIN_TSTSFI_OV_TD,
-    RS6000_BTI_INTSI, RS6000_BTI_UINTSI, RS6000_BTI_dfloat128, 0 },
-  { P9_BUILTIN_DFP_TSTSFI_OV, MISC_BUILTIN_TSTSFI_OV_DD,
-    RS6000_BTI_INTSI, RS6000_BTI_UINTSI, RS6000_BTI_dfloat64, 0 },
-
-  { P9_BUILTIN_DFP_TSTSFI_OV_TD, MISC_BUILTIN_TSTSFI_OV_TD,
-    RS6000_BTI_INTSI, RS6000_BTI_UINTSI, RS6000_BTI_dfloat128, 0 },
-  { P9_BUILTIN_DFP_TSTSFI_OV_DD, MISC_BUILTIN_TSTSFI_OV_DD,
-    RS6000_BTI_INTSI, RS6000_BTI_UINTSI, RS6000_BTI_dfloat64, 0 },
-
-  { P9V_BUILTIN_VEC_VCTZ, P9V_BUILTIN_VCTZB,
-    RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0, 0 },
-  { P9V_BUILTIN_VEC_VCTZ, P9V_BUILTIN_VCTZB,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0, 0 },
-  { P9V_BUILTIN_VEC_VCTZ, P9V_BUILTIN_VCTZH,
-    RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0, 0 },
-  { P9V_BUILTIN_VEC_VCTZ, P9V_BUILTIN_VCTZH,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0, 0 },
-  { P9V_BUILTIN_VEC_VCTZ, P9V_BUILTIN_VCTZW,
-    RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0, 0 },
-  { P9V_BUILTIN_VEC_VCTZ, P9V_BUILTIN_VCTZW,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0, 0 },
-  { P9V_BUILTIN_VEC_VCTZ, P9V_BUILTIN_VCTZD,
-    RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0, 0 },
-  { P9V_BUILTIN_VEC_VCTZ, P9V_BUILTIN_VCTZD,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0, 0 },
-
-  { P9V_BUILTIN_VEC_VCTZB, P9V_BUILTIN_VCTZB,
-    RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0, 0 },
-  { P9V_BUILTIN_VEC_VCTZB, P9V_BUILTIN_VCTZB,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0, 0 },
-
-  { P9V_BUILTIN_VEC_VCTZH, P9V_BUILTIN_VCTZH,
-    RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0, 0 },
-  { P9V_BUILTIN_VEC_VCTZH, P9V_BUILTIN_VCTZH,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0, 0 },
-
-  { P9V_BUILTIN_VEC_VCTZW, P9V_BUILTIN_VCTZW,
-    RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0, 0 },
-  { P9V_BUILTIN_VEC_VCTZW, P9V_BUILTIN_VCTZW,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0, 0 },
-
-  { P9V_BUILTIN_VEC_VCTZD, P9V_BUILTIN_VCTZD,
-    RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0, 0 },
-  { P9V_BUILTIN_VEC_VCTZD, P9V_BUILTIN_VCTZD,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0, 0 },
-
-  { P9V_BUILTIN_VEC_VADU, P9V_BUILTIN_VADUB,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI,
-    RS6000_BTI_unsigned_V16QI, 0 },
-  { P9V_BUILTIN_VEC_VADU, P9V_BUILTIN_VADUH,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI,
-    RS6000_BTI_unsigned_V8HI, 0 },
-  { P9V_BUILTIN_VEC_VADU, P9V_BUILTIN_VADUW,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI,
-    RS6000_BTI_unsigned_V4SI, 0 },
-
-  { P9V_BUILTIN_VEC_VADUB, P9V_BUILTIN_VADUB,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI,
-    RS6000_BTI_unsigned_V16QI, 0 },
-
-  { P9V_BUILTIN_VEC_VADUH, P9V_BUILTIN_VADUH,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI,
-    RS6000_BTI_unsigned_V8HI, 0 },
-
-  { P9V_BUILTIN_VEC_VADUW, P9V_BUILTIN_VADUW,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI,
-    RS6000_BTI_unsigned_V4SI, 0 },
-
-  { P9V_BUILTIN_VEC_VES, P9V_BUILTIN_VESSP,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_V4SF, 0, 0 },
-  { P9V_BUILTIN_VEC_VES, P9V_BUILTIN_VESDP,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_V2DF, 0, 0 },
-
-  { P9V_BUILTIN_VEC_VESSP, P9V_BUILTIN_VESSP,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_V4SF, 0, 0 },
-  { P9V_BUILTIN_VEC_VESDP, P9V_BUILTIN_VESDP,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_V2DF, 0, 0 },
-
-  { P9V_BUILTIN_VEC_VEE, P9V_BUILTIN_VEESP,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_V4SF, 0, 0 },
-  { P9V_BUILTIN_VEC_VEE, P9V_BUILTIN_VEEDP,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_V2DF, 0, 0 },
-
-  { P9V_BUILTIN_VEC_VEESP, P9V_BUILTIN_VEESP,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_V4SF, 0, 0 },
-  { P9V_BUILTIN_VEC_VEEDP, P9V_BUILTIN_VEEDP,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_V2DF, 0, 0 },
-
-  { P9V_BUILTIN_VEC_VTDC, P9V_BUILTIN_VTDCSP,
-    RS6000_BTI_bool_V4SI, RS6000_BTI_V4SF, RS6000_BTI_INTSI, 0 },
-  { P9V_BUILTIN_VEC_VTDC, P9V_BUILTIN_VTDCDP,
-    RS6000_BTI_bool_V2DI, RS6000_BTI_V2DF, RS6000_BTI_INTSI, 0 },
-
-  { P9V_BUILTIN_VEC_VTDCSP, P9V_BUILTIN_VTDCSP,
-    RS6000_BTI_bool_V4SI, RS6000_BTI_V4SF, RS6000_BTI_INTSI, 0 },
-  { P9V_BUILTIN_VEC_VTDCDP, P9V_BUILTIN_VTDCDP,
-    RS6000_BTI_bool_V2DI, RS6000_BTI_V2DF, RS6000_BTI_INTSI, 0 },
-
-  { P9V_BUILTIN_VEC_VIE, P9V_BUILTIN_VIESP,
-    RS6000_BTI_V4SF, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
-  { P9V_BUILTIN_VEC_VIE, P9V_BUILTIN_VIESP,
-    RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_unsigned_V4SI, 0 },
-
-  { P9V_BUILTIN_VEC_VIE, P9V_BUILTIN_VIEDP,
-    RS6000_BTI_V2DF, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 },
-  { P9V_BUILTIN_VEC_VIE, P9V_BUILTIN_VIEDP,
-    RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_unsigned_V2DI, 0 },
-
-  { P9V_BUILTIN_VEC_VIESP, P9V_BUILTIN_VIESP,
-    RS6000_BTI_V4SF, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
-  { P9V_BUILTIN_VEC_VIESP, P9V_BUILTIN_VIESP,
-    RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_unsigned_V4SI, 0 },
-
-  { P9V_BUILTIN_VEC_VIEDP, P9V_BUILTIN_VIEDP,
-    RS6000_BTI_V2DF, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 },
-  { P9V_BUILTIN_VEC_VIEDP, P9V_BUILTIN_VIEDP,
-    RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_unsigned_V2DI, 0 },
-
-  { P9V_BUILTIN_VEC_VSTDC, P9V_BUILTIN_VSTDCSP,
-    RS6000_BTI_bool_int, RS6000_BTI_float, RS6000_BTI_INTSI, 0 },
-  { P9V_BUILTIN_VEC_VSTDC, P9V_BUILTIN_VSTDCDP,
-    RS6000_BTI_bool_int, RS6000_BTI_double, RS6000_BTI_INTSI, 0 },
-  { P9V_BUILTIN_VEC_VSTDC, P9V_BUILTIN_VSTDCQP,
-    RS6000_BTI_bool_int, RS6000_BTI_ieee128_float, RS6000_BTI_INTSI, 0 },
-
-  { P9V_BUILTIN_VEC_VSTDCSP, P9V_BUILTIN_VSTDCSP,
-    RS6000_BTI_bool_int, RS6000_BTI_float, RS6000_BTI_INTSI, 0 },
-  { P9V_BUILTIN_VEC_VSTDCDP, P9V_BUILTIN_VSTDCDP,
-    RS6000_BTI_bool_int, RS6000_BTI_double, RS6000_BTI_INTSI, 0 },
-  { P9V_BUILTIN_VEC_VSTDCQP, P9V_BUILTIN_VSTDCQP,
-    RS6000_BTI_bool_int, RS6000_BTI_ieee128_float, RS6000_BTI_INTSI, 0 },
-
-  { P9V_BUILTIN_VEC_VSTDCN, P9V_BUILTIN_VSTDCNSP,
-    RS6000_BTI_bool_int, RS6000_BTI_float, 0, 0 },
-  { P9V_BUILTIN_VEC_VSTDCN, P9V_BUILTIN_VSTDCNDP,
-    RS6000_BTI_bool_int, RS6000_BTI_double, 0, 0 },
-  { P9V_BUILTIN_VEC_VSTDCN, P9V_BUILTIN_VSTDCNQP,
-    RS6000_BTI_bool_int, RS6000_BTI_ieee128_float, 0, 0 },
-
-  { P9V_BUILTIN_VEC_VSTDCNSP, P9V_BUILTIN_VSTDCNSP,
-    RS6000_BTI_bool_int, RS6000_BTI_float, 0, 0 },
-  { P9V_BUILTIN_VEC_VSTDCNDP, P9V_BUILTIN_VSTDCNDP,
-    RS6000_BTI_bool_int, RS6000_BTI_double, 0, 0 },
-  { P9V_BUILTIN_VEC_VSTDCNQP, P9V_BUILTIN_VSTDCNQP,
-    RS6000_BTI_bool_int, RS6000_BTI_ieee128_float, 0, 0 },
-
-  { P9V_BUILTIN_VEC_VSEEDP, P9V_BUILTIN_VSEEDP,
-    RS6000_BTI_UINTSI, RS6000_BTI_double, 0, 0 },
-  { P9V_BUILTIN_VEC_VSEEDP, P9V_BUILTIN_VSEEQP,
-    RS6000_BTI_UINTDI, RS6000_BTI_ieee128_float, 0, 0 },
-
-  { P9V_BUILTIN_VEC_VSESDP, P9V_BUILTIN_VSESDP,
-    RS6000_BTI_UINTDI, RS6000_BTI_double, 0, 0 },
-  { P9V_BUILTIN_VEC_VSESDP, P9V_BUILTIN_VSESQP,
-    RS6000_BTI_UINTTI, RS6000_BTI_ieee128_float, 0, 0 },
-
-  { P9V_BUILTIN_VEC_VSIEDP, P9V_BUILTIN_VSIEDP,
-    RS6000_BTI_double, RS6000_BTI_UINTDI, RS6000_BTI_UINTDI, 0 },
-  { P9V_BUILTIN_VEC_VSIEDP, P9V_BUILTIN_VSIEDPF,
-    RS6000_BTI_double, RS6000_BTI_double, RS6000_BTI_UINTDI, 0 },
-
-  { P9V_BUILTIN_VEC_VSIEDP, P9V_BUILTIN_VSIEQP,
-    RS6000_BTI_ieee128_float, RS6000_BTI_UINTTI, RS6000_BTI_UINTDI, 0 },
-  { P9V_BUILTIN_VEC_VSIEDP, P9V_BUILTIN_VSIEQPF,
-    RS6000_BTI_ieee128_float, RS6000_BTI_ieee128_float, RS6000_BTI_UINTDI, 0 },
-
-  { P9V_BUILTIN_VEC_VSCEGT, P9V_BUILTIN_VSCEDPGT,
-    RS6000_BTI_INTSI, RS6000_BTI_double, RS6000_BTI_double, 0 },
-  { P9V_BUILTIN_VEC_VSCEGT, P9V_BUILTIN_VSCEQPGT,
-    RS6000_BTI_INTSI, RS6000_BTI_ieee128_float, RS6000_BTI_ieee128_float, 0 },
-  { P9V_BUILTIN_VEC_VSCELT, P9V_BUILTIN_VSCEDPLT,
-    RS6000_BTI_INTSI, RS6000_BTI_double, RS6000_BTI_double, 0 },
-  { P9V_BUILTIN_VEC_VSCELT, P9V_BUILTIN_VSCEQPLT,
-    RS6000_BTI_INTSI, RS6000_BTI_ieee128_float, RS6000_BTI_ieee128_float, 0 },
-  { P9V_BUILTIN_VEC_VSCEEQ, P9V_BUILTIN_VSCEDPEQ,
-    RS6000_BTI_INTSI, RS6000_BTI_double, RS6000_BTI_double, 0 },
-  { P9V_BUILTIN_VEC_VSCEEQ, P9V_BUILTIN_VSCEQPEQ,
-    RS6000_BTI_INTSI, RS6000_BTI_ieee128_float, RS6000_BTI_ieee128_float, 0 },
-  { P9V_BUILTIN_VEC_VSCEUO, P9V_BUILTIN_VSCEDPUO,
-    RS6000_BTI_INTSI, RS6000_BTI_double, RS6000_BTI_double, 0 },
-  { P9V_BUILTIN_VEC_VSCEUO, P9V_BUILTIN_VSCEQPUO,
-    RS6000_BTI_INTSI, RS6000_BTI_ieee128_float, RS6000_BTI_ieee128_float, 0 },
-
-  { P9V_BUILTIN_VEC_XL_LEN_R, P9V_BUILTIN_XL_LEN_R,
-    RS6000_BTI_unsigned_V16QI, ~RS6000_BTI_UINTQI,
-    RS6000_BTI_unsigned_long_long, 0 },
-
-  { P9V_BUILTIN_VEC_LXVL, P9V_BUILTIN_LXVL,
-    RS6000_BTI_V16QI, ~RS6000_BTI_INTQI,
-    RS6000_BTI_unsigned_long_long, 0 },
-  { P9V_BUILTIN_VEC_LXVL, P9V_BUILTIN_LXVL,
-    RS6000_BTI_unsigned_V16QI, ~RS6000_BTI_UINTQI,
-    RS6000_BTI_unsigned_long_long, 0 },
-
-  { P9V_BUILTIN_VEC_LXVL, P9V_BUILTIN_LXVL,
-    RS6000_BTI_V4SI, ~RS6000_BTI_INTSI,
-    RS6000_BTI_unsigned_long_long, 0 },
-  { P9V_BUILTIN_VEC_LXVL, P9V_BUILTIN_LXVL,
-    RS6000_BTI_unsigned_V4SI, ~RS6000_BTI_UINTSI,
-    RS6000_BTI_unsigned_long_long, 0 },
-
-  { P9V_BUILTIN_VEC_LXVL, P9V_BUILTIN_LXVL,
-    RS6000_BTI_V1TI, ~RS6000_BTI_INTTI,
-    RS6000_BTI_unsigned_long_long, 0 },
-  { P9V_BUILTIN_VEC_LXVL, P9V_BUILTIN_LXVL,
-    RS6000_BTI_unsigned_V1TI, ~RS6000_BTI_UINTTI,
-    RS6000_BTI_unsigned_long_long, 0 },
-
-  { P9V_BUILTIN_VEC_LXVL, P9V_BUILTIN_LXVL,
-    RS6000_BTI_V2DI, ~RS6000_BTI_long_long,
-    RS6000_BTI_unsigned_long_long, 0 },
-  { P9V_BUILTIN_VEC_LXVL, P9V_BUILTIN_LXVL,
-    RS6000_BTI_unsigned_V2DI, ~RS6000_BTI_unsigned_long_long,
-    RS6000_BTI_unsigned_long_long, 0 },
-
-  { P9V_BUILTIN_VEC_LXVL, P9V_BUILTIN_LXVL,
-    RS6000_BTI_V8HI, ~RS6000_BTI_INTHI,
-    RS6000_BTI_unsigned_long_long, 0 },
-  { P9V_BUILTIN_VEC_LXVL, P9V_BUILTIN_LXVL,
-    RS6000_BTI_unsigned_V8HI, ~RS6000_BTI_UINTHI,
-    RS6000_BTI_unsigned_long_long, 0 },
-
-  { P9V_BUILTIN_VEC_LXVL, P9V_BUILTIN_LXVL,
-    RS6000_BTI_V2DF, ~RS6000_BTI_double,
-    RS6000_BTI_unsigned_long_long, 0 },
-  { P9V_BUILTIN_VEC_LXVL, P9V_BUILTIN_LXVL,
-    RS6000_BTI_V4SF, ~RS6000_BTI_float,
-    RS6000_BTI_unsigned_long_long, 0 },
-  /* At an appropriate future time, add support for the
-     RS6000_BTI_Float16 (exact name to be determined) type here.  */
-
-  { P9V_BUILTIN_VEC_XST_LEN_R, P9V_BUILTIN_XST_LEN_R,
-    RS6000_BTI_void, RS6000_BTI_unsigned_V16QI,
-    ~RS6000_BTI_UINTQI, RS6000_BTI_unsigned_long_long},
-
-  { P9V_BUILTIN_VEC_STXVL, P9V_BUILTIN_STXVL,
-    RS6000_BTI_void, RS6000_BTI_V16QI, ~RS6000_BTI_INTQI,
-    RS6000_BTI_unsigned_long_long },
-  { P9V_BUILTIN_VEC_STXVL, P9V_BUILTIN_STXVL,
-    RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, ~RS6000_BTI_UINTQI,
-    RS6000_BTI_unsigned_long_long },
-
-  { P9V_BUILTIN_VEC_STXVL, P9V_BUILTIN_STXVL,
-    RS6000_BTI_void, RS6000_BTI_V4SI, ~RS6000_BTI_INTSI,
-    RS6000_BTI_unsigned_long_long },
-  { P9V_BUILTIN_VEC_STXVL, P9V_BUILTIN_STXVL,
-    RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, ~RS6000_BTI_UINTSI,
-    RS6000_BTI_unsigned_long_long },
-
-  { P9V_BUILTIN_VEC_STXVL, P9V_BUILTIN_STXVL,
-    RS6000_BTI_void, RS6000_BTI_V1TI, ~RS6000_BTI_INTTI,
-    RS6000_BTI_unsigned_long_long },
-  { P9V_BUILTIN_VEC_STXVL, P9V_BUILTIN_STXVL,
-    RS6000_BTI_void, RS6000_BTI_unsigned_V1TI, ~RS6000_BTI_UINTTI,
-    RS6000_BTI_unsigned_long_long },
-
-  { P9V_BUILTIN_VEC_STXVL, P9V_BUILTIN_STXVL,
-    RS6000_BTI_void, RS6000_BTI_V2DI, ~RS6000_BTI_long_long,
-    RS6000_BTI_unsigned_long_long },
-  { P9V_BUILTIN_VEC_STXVL, P9V_BUILTIN_STXVL,
-    RS6000_BTI_void, RS6000_BTI_unsigned_V2DI, ~RS6000_BTI_unsigned_long_long,
-    RS6000_BTI_unsigned_long_long },
-
-  { P9V_BUILTIN_VEC_STXVL, P9V_BUILTIN_STXVL,
-    RS6000_BTI_void, RS6000_BTI_V8HI, ~RS6000_BTI_INTHI,
-    RS6000_BTI_unsigned_long_long },
-  { P9V_BUILTIN_VEC_STXVL, P9V_BUILTIN_STXVL,
-    RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, ~RS6000_BTI_UINTHI,
-    RS6000_BTI_unsigned_long_long },
-
-  { P9V_BUILTIN_VEC_STXVL, P9V_BUILTIN_STXVL,
-    RS6000_BTI_void, RS6000_BTI_V2DF, ~RS6000_BTI_double,
-    RS6000_BTI_unsigned_long_long },
-  { P9V_BUILTIN_VEC_STXVL, P9V_BUILTIN_STXVL,
-    RS6000_BTI_void, RS6000_BTI_V4SF, ~RS6000_BTI_float,
-    RS6000_BTI_unsigned_long_long },
-  /* At an appropriate future time, add support for the
-     RS6000_BTI_Float16 (exact name to be determined) type here.  */
-
-  { ALTIVEC_BUILTIN_VEC_CMPNE, P9V_BUILTIN_CMPNEB,
-    RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI,
-    RS6000_BTI_bool_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_CMPNE, P9V_BUILTIN_CMPNEB,
-    RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI,
-    RS6000_BTI_V16QI, 0 },
-  { ALTIVEC_BUILTIN_VEC_CMPNE, P9V_BUILTIN_CMPNEB,
-    RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI,
-    RS6000_BTI_unsigned_V16QI, 0 },
-
-  { ALTIVEC_BUILTIN_VEC_CMPNE, P9V_BUILTIN_CMPNEH,
-    RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI,
-    RS6000_BTI_bool_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_CMPNE, P9V_BUILTIN_CMPNEH,
-    RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI,
-    RS6000_BTI_V8HI, 0 },
-  { ALTIVEC_BUILTIN_VEC_CMPNE, P9V_BUILTIN_CMPNEH,
-    RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI,
-    RS6000_BTI_unsigned_V8HI, 0 },
-
-  { ALTIVEC_BUILTIN_VEC_CMPNE, P9V_BUILTIN_CMPNEW,
-    RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI,
-    RS6000_BTI_bool_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_CMPNE, P9V_BUILTIN_CMPNEW,
-    RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI,
-    RS6000_BTI_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_CMPNE, P9V_BUILTIN_CMPNEW,
-    RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI,
-    RS6000_BTI_unsigned_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_CMPNE, P10V_BUILTIN_CMPNET,
-    RS6000_BTI_bool_V1TI, RS6000_BTI_V1TI,
-    RS6000_BTI_V1TI, 0 },
-  { ALTIVEC_BUILTIN_VEC_CMPNE, P10V_BUILTIN_CMPNET,
-    RS6000_BTI_bool_V1TI, RS6000_BTI_unsigned_V1TI,
-    RS6000_BTI_unsigned_V1TI, 0 },
-
-  /* The following 2 entries have been deprecated.  */
-  { P9V_BUILTIN_VEC_VCMPNE_P, P9V_BUILTIN_VCMPNEB_P,
-    RS6000_BTI_INTSI, RS6000_BTI_bool_V16QI,
-    RS6000_BTI_unsigned_V16QI, 0 },
-  { P9V_BUILTIN_VEC_VCMPNE_P, P9V_BUILTIN_VCMPNEB_P,
-    RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI,
-    RS6000_BTI_bool_V16QI, 0 },
-  { P9V_BUILTIN_VEC_VCMPNE_P, P9V_BUILTIN_VCMPNEB_P,
-    RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI,
-    RS6000_BTI_unsigned_V16QI, 0 },
-
-  /* The following 2 entries have been deprecated.  */
-  { P9V_BUILTIN_VEC_VCMPNE_P, P9V_BUILTIN_VCMPNEB_P,
-    RS6000_BTI_INTSI, RS6000_BTI_bool_V16QI,
-    RS6000_BTI_V16QI, 0 },
-  { P9V_BUILTIN_VEC_VCMPNE_P, P9V_BUILTIN_VCMPNEB_P,
-    RS6000_BTI_INTSI, RS6000_BTI_V16QI,
-    RS6000_BTI_bool_V16QI, 0 },
-  { P9V_BUILTIN_VEC_VCMPNE_P, P9V_BUILTIN_VCMPNEB_P,
-    RS6000_BTI_INTSI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 },
-  { P9V_BUILTIN_VEC_VCMPNE_P, P9V_BUILTIN_VCMPNEB_P,
-    RS6000_BTI_INTSI, RS6000_BTI_bool_V16QI,
-    RS6000_BTI_bool_V16QI, 0 },
-
-  /* The following 2 entries have been deprecated.  */
-  { P9V_BUILTIN_VEC_VCMPNE_P, P9V_BUILTIN_VCMPNEH_P,
-    RS6000_BTI_INTSI, RS6000_BTI_bool_V8HI,
-    RS6000_BTI_unsigned_V8HI, 0 },
-  { P9V_BUILTIN_VEC_VCMPNE_P, P9V_BUILTIN_VCMPNEH_P,
-    RS6000_BTI_INTSI, RS6000_BTI_unsigned_V8HI,
-    RS6000_BTI_bool_V8HI, 0 },
-  { P9V_BUILTIN_VEC_VCMPNE_P, P9V_BUILTIN_VCMPNEH_P,
-    RS6000_BTI_INTSI, RS6000_BTI_unsigned_V8HI,
-    RS6000_BTI_unsigned_V8HI, 0 },
-  { P9V_BUILTIN_VEC_VCMPNE_P, P9V_BUILTIN_VCMPNEH_P,
-    RS6000_BTI_INTSI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 },
-
-  /* The following 2 entries have been deprecated.  */
-  { P9V_BUILTIN_VEC_VCMPNE_P, P9V_BUILTIN_VCMPNEH_P,
-    RS6000_BTI_INTSI, RS6000_BTI_bool_V8HI,
-    RS6000_BTI_V8HI, 0 },
-  { P9V_BUILTIN_VEC_VCMPNE_P, P9V_BUILTIN_VCMPNEH_P,
-    RS6000_BTI_INTSI, RS6000_BTI_V8HI,
-    RS6000_BTI_bool_V8HI, 0 },
-  { P9V_BUILTIN_VEC_VCMPNE_P, P9V_BUILTIN_VCMPNEH_P,
-    RS6000_BTI_INTSI, RS6000_BTI_bool_V8HI,
-    RS6000_BTI_bool_V8HI, 0 },
-  { P9V_BUILTIN_VEC_VCMPNE_P, P9V_BUILTIN_VCMPNEH_P,
-    RS6000_BTI_INTSI, RS6000_BTI_pixel_V8HI,
-    RS6000_BTI_pixel_V8HI, 0 },
-
-  /* The following 2 entries have been deprecated.  */
-  { P9V_BUILTIN_VEC_VCMPNE_P, P9V_BUILTIN_VCMPNEW_P,
-    RS6000_BTI_INTSI, RS6000_BTI_bool_V4SI,
-    RS6000_BTI_unsigned_V4SI, 0 },
-  { P9V_BUILTIN_VEC_VCMPNE_P, P9V_BUILTIN_VCMPNEW_P,
-    RS6000_BTI_INTSI, RS6000_BTI_unsigned_V4SI,
-    RS6000_BTI_bool_V4SI, 0 },
-  { P9V_BUILTIN_VEC_VCMPNE_P, P9V_BUILTIN_VCMPNEW_P,
-    RS6000_BTI_INTSI, RS6000_BTI_unsigned_V4SI,
-    RS6000_BTI_unsigned_V4SI, 0 },
-
-  /* The following 2 entries have been deprecated.  */
-  { P9V_BUILTIN_VEC_VCMPNE_P, P9V_BUILTIN_VCMPNEW_P,
-    RS6000_BTI_INTSI, RS6000_BTI_bool_V4SI,
-    RS6000_BTI_V4SI, 0 },
-  { P9V_BUILTIN_VEC_VCMPNE_P, P9V_BUILTIN_VCMPNEW_P,
-    RS6000_BTI_INTSI, RS6000_BTI_V4SI,
-    RS6000_BTI_bool_V4SI, 0 },
-  { P9V_BUILTIN_VEC_VCMPNE_P, P9V_BUILTIN_VCMPNEW_P,
-    RS6000_BTI_INTSI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },
-  { P9V_BUILTIN_VEC_VCMPNE_P, P9V_BUILTIN_VCMPNEW_P,
-    RS6000_BTI_INTSI, RS6000_BTI_bool_V4SI,
-    RS6000_BTI_bool_V4SI, 0 },
-
-  /* The following 2 entries have been deprecated.  */
-  { P9V_BUILTIN_VEC_VCMPNE_P, P9V_BUILTIN_VCMPNED_P,
-    RS6000_BTI_INTSI, RS6000_BTI_bool_V2DI,
-    RS6000_BTI_unsigned_V2DI, 0 },
-  { P9V_BUILTIN_VEC_VCMPNE_P, P9V_BUILTIN_VCMPNED_P,
-    RS6000_BTI_INTSI, RS6000_BTI_unsigned_V2DI,
-    RS6000_BTI_bool_V2DI, 0 },
-  { P9V_BUILTIN_VEC_VCMPNE_P, P9V_BUILTIN_VCMPNED_P,
-    RS6000_BTI_INTSI, RS6000_BTI_unsigned_V2DI,
-    RS6000_BTI_unsigned_V2DI, 0
-  },
-
-  /* The following 2 entries have been deprecated.  */
-  { P9V_BUILTIN_VEC_VCMPNE_P, P9V_BUILTIN_VCMPNED_P,
-    RS6000_BTI_INTSI, RS6000_BTI_bool_V2DI,
-    RS6000_BTI_V2DI, 0 },
-  { P9V_BUILTIN_VEC_VCMPNE_P, P9V_BUILTIN_VCMPNED_P,
-    RS6000_BTI_INTSI, RS6000_BTI_V2DI,
-    RS6000_BTI_bool_V2DI, 0 },
-  { P9V_BUILTIN_VEC_VCMPNE_P, P9V_BUILTIN_VCMPNED_P,
-    RS6000_BTI_INTSI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 },
-  { P9V_BUILTIN_VEC_VCMPNE_P, P9V_BUILTIN_VCMPNED_P,
-    RS6000_BTI_INTSI, RS6000_BTI_bool_V2DI,
-    RS6000_BTI_bool_V2DI, 0 },
-  { P9V_BUILTIN_VEC_VCMPNE_P, P10V_BUILTIN_VCMPNET_P,
-    RS6000_BTI_INTSI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, 0 },
-  { P9V_BUILTIN_VEC_VCMPNE_P, P10V_BUILTIN_VCMPNET_P,
-    RS6000_BTI_INTSI, RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, 0 },
-
-  { P9V_BUILTIN_VEC_VCMPNE_P, P9V_BUILTIN_VCMPNEFP_P,
-    RS6000_BTI_INTSI, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 },
-  { P9V_BUILTIN_VEC_VCMPNE_P, P9V_BUILTIN_VCMPNEDP_P,
-    RS6000_BTI_INTSI, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 },
-
-  /* The following 2 entries have been deprecated.  */
-  { P9V_BUILTIN_VEC_VCMPAE_P, P9V_BUILTIN_VCMPAEB_P,
-    RS6000_BTI_INTSI, RS6000_BTI_bool_V16QI,
-    RS6000_BTI_unsigned_V16QI, 0 },
-  { P9V_BUILTIN_VEC_VCMPAE_P, P9V_BUILTIN_VCMPAEB_P,
-    RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI,
-    RS6000_BTI_bool_V16QI, 0 },
-  { P9V_BUILTIN_VEC_VCMPAE_P, P9V_BUILTIN_VCMPAEB_P,
-    RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI,
-    RS6000_BTI_unsigned_V16QI, 0 },
-
-  /* The following 2 entries have been deprecated.  */
-  { P9V_BUILTIN_VEC_VCMPAE_P, P9V_BUILTIN_VCMPAEB_P,
-    RS6000_BTI_INTSI, RS6000_BTI_bool_V16QI,
-    RS6000_BTI_V16QI, 0 },
-  { P9V_BUILTIN_VEC_VCMPAE_P, P9V_BUILTIN_VCMPAEB_P,
-    RS6000_BTI_INTSI, RS6000_BTI_V16QI,
-    RS6000_BTI_bool_V16QI, 0 },
-  { P9V_BUILTIN_VEC_VCMPAE_P, P9V_BUILTIN_VCMPAEB_P,
-    RS6000_BTI_INTSI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 },
-  { P9V_BUILTIN_VEC_VCMPAE_P, P9V_BUILTIN_VCMPAEB_P,
-    RS6000_BTI_INTSI, RS6000_BTI_bool_V16QI,
-    RS6000_BTI_bool_V16QI, 0 },
-
-  /* The following 2 entries have been deprecated.  */
-  { P9V_BUILTIN_VEC_VCMPAE_P, P9V_BUILTIN_VCMPAEH_P,
-    RS6000_BTI_INTSI, RS6000_BTI_bool_V8HI,
-    RS6000_BTI_unsigned_V8HI, 0 },
-  { P9V_BUILTIN_VEC_VCMPAE_P, P9V_BUILTIN_VCMPAEH_P,
-    RS6000_BTI_INTSI, RS6000_BTI_unsigned_V8HI,
-    RS6000_BTI_bool_V8HI, 0 },
-  { P9V_BUILTIN_VEC_VCMPAE_P, P9V_BUILTIN_VCMPAEH_P,
-    RS6000_BTI_INTSI, RS6000_BTI_unsigned_V8HI,
-    RS6000_BTI_unsigned_V8HI, 0 },
-  { P9V_BUILTIN_VEC_VCMPAE_P, P9V_BUILTIN_VCMPAEH_P,
-    RS6000_BTI_INTSI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 },
-
-  /* The following 2 entries have been deprecated.  */
-  { P9V_BUILTIN_VEC_VCMPAE_P, P9V_BUILTIN_VCMPAEH_P,
-    RS6000_BTI_INTSI, RS6000_BTI_bool_V8HI,
-    RS6000_BTI_V8HI, 0 },
-  { P9V_BUILTIN_VEC_VCMPAE_P, P9V_BUILTIN_VCMPAEH_P,
-    RS6000_BTI_INTSI, RS6000_BTI_V8HI,
-    RS6000_BTI_bool_V8HI, 0 },
-  { P9V_BUILTIN_VEC_VCMPAE_P, P9V_BUILTIN_VCMPAEH_P,
-    RS6000_BTI_INTSI, RS6000_BTI_bool_V8HI,
-    RS6000_BTI_bool_V8HI, 0 },
-  { P9V_BUILTIN_VEC_VCMPAE_P, P9V_BUILTIN_VCMPAEH_P,
-    RS6000_BTI_INTSI, RS6000_BTI_pixel_V8HI,
-    RS6000_BTI_pixel_V8HI, 0 },
-
-  /* The following 2 entries have been deprecated.  */
-  { P9V_BUILTIN_VEC_VCMPAE_P, P9V_BUILTIN_VCMPAEW_P,
-    RS6000_BTI_INTSI, RS6000_BTI_bool_V4SI,
-    RS6000_BTI_unsigned_V4SI, 0 },
-  { P9V_BUILTIN_VEC_VCMPAE_P, P9V_BUILTIN_VCMPAEW_P,
-    RS6000_BTI_INTSI, RS6000_BTI_unsigned_V4SI,
-    RS6000_BTI_bool_V4SI, 0 },
-  { P9V_BUILTIN_VEC_VCMPAE_P, P9V_BUILTIN_VCMPAEW_P,
-    RS6000_BTI_INTSI, RS6000_BTI_unsigned_V4SI,
-    RS6000_BTI_unsigned_V4SI, 0 },
-
-  /* The following 2 entries have been deprecated.  */
-  { P9V_BUILTIN_VEC_VCMPAE_P, P9V_BUILTIN_VCMPAEW_P,
-    RS6000_BTI_INTSI, RS6000_BTI_bool_V4SI,
-    RS6000_BTI_V4SI, 0 },
-  { P9V_BUILTIN_VEC_VCMPAE_P, P9V_BUILTIN_VCMPAEW_P,
-    RS6000_BTI_INTSI, RS6000_BTI_V4SI,
-    RS6000_BTI_bool_V4SI, 0 },
-  { P9V_BUILTIN_VEC_VCMPAE_P, P9V_BUILTIN_VCMPAEW_P,
-    RS6000_BTI_INTSI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },
-  { P9V_BUILTIN_VEC_VCMPAE_P, P9V_BUILTIN_VCMPAEW_P,
-    RS6000_BTI_INTSI, RS6000_BTI_bool_V4SI,
-    RS6000_BTI_bool_V4SI, 0 },
-
-  /* The following 2 entries have been deprecated.  */
-  { P9V_BUILTIN_VEC_VCMPAE_P, P9V_BUILTIN_VCMPAED_P,
-    RS6000_BTI_INTSI, RS6000_BTI_bool_V2DI,
-    RS6000_BTI_unsigned_V2DI, 0 },
-  { P9V_BUILTIN_VEC_VCMPAE_P, P9V_BUILTIN_VCMPAED_P,
-    RS6000_BTI_INTSI, RS6000_BTI_unsigned_V2DI,
-    RS6000_BTI_bool_V2DI, 0 },
-  { P9V_BUILTIN_VEC_VCMPAE_P, P9V_BUILTIN_VCMPAED_P,
-    RS6000_BTI_INTSI, RS6000_BTI_unsigned_V2DI,
-    RS6000_BTI_unsigned_V2DI, 0
-  },
-
-  /* The following 2 entries have been deprecated.  */
-  { P9V_BUILTIN_VEC_VCMPAE_P, P9V_BUILTIN_VCMPAED_P,
-    RS6000_BTI_INTSI, RS6000_BTI_bool_V2DI,
-    RS6000_BTI_V2DI, 0 },
-  { P9V_BUILTIN_VEC_VCMPAE_P, P9V_BUILTIN_VCMPAED_P,
-    RS6000_BTI_INTSI, RS6000_BTI_V2DI,
-    RS6000_BTI_bool_V2DI, 0 },
-  { P9V_BUILTIN_VEC_VCMPAE_P, P9V_BUILTIN_VCMPAED_P,
-    RS6000_BTI_INTSI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 },
-  { P9V_BUILTIN_VEC_VCMPAE_P, P9V_BUILTIN_VCMPAED_P,
-    RS6000_BTI_INTSI, RS6000_BTI_bool_V2DI,
-    RS6000_BTI_bool_V2DI, 0 },
-  { P9V_BUILTIN_VEC_VCMPAE_P, P10V_BUILTIN_VCMPAET_P,
-    RS6000_BTI_INTSI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, 0 },
-  { P9V_BUILTIN_VEC_VCMPAE_P, P10V_BUILTIN_VCMPAET_P,
-    RS6000_BTI_INTSI, RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, 0 },
-  { P9V_BUILTIN_VEC_VCMPAE_P, P9V_BUILTIN_VCMPAEFP_P,
-    RS6000_BTI_INTSI, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 },
-  { P9V_BUILTIN_VEC_VCMPAE_P, P9V_BUILTIN_VCMPAEDP_P,
-    RS6000_BTI_INTSI, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 },
-
-  { P9V_BUILTIN_VEC_VCMPNEZ_P, P9V_BUILTIN_VCMPNEZB_P,
-    RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI,
-    RS6000_BTI_unsigned_V16QI },
-  { P9V_BUILTIN_VEC_VCMPNEZ_P, P9V_BUILTIN_VCMPNEZB_P,
-    RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V16QI, RS6000_BTI_V16QI },
-
-  { P9V_BUILTIN_VEC_VCMPNEZ_P, P9V_BUILTIN_VCMPNEZH_P,
-    RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V8HI,
-    RS6000_BTI_unsigned_V8HI },
-  { P9V_BUILTIN_VEC_VCMPNEZ_P, P9V_BUILTIN_VCMPNEZH_P,
-    RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V8HI, RS6000_BTI_V8HI },
-
-  { P9V_BUILTIN_VEC_VCMPNEZ_P, P9V_BUILTIN_VCMPNEZW_P,
-    RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V4SI,
-    RS6000_BTI_unsigned_V4SI },
-  { P9V_BUILTIN_VEC_VCMPNEZ_P, P9V_BUILTIN_VCMPNEZW_P,
-    RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V4SI, RS6000_BTI_V4SI },
-
-  { P9V_BUILTIN_VEC_CMPNEZ, P9V_BUILTIN_CMPNEZB,
-    RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI,
-    RS6000_BTI_V16QI, 0 },
-  { P9V_BUILTIN_VEC_CMPNEZ, P9V_BUILTIN_CMPNEZB,
-    RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI,
-    RS6000_BTI_unsigned_V16QI, 0 },
-
-  { P9V_BUILTIN_VEC_CMPNEZ, P9V_BUILTIN_CMPNEZH,
-    RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI,
-    RS6000_BTI_V8HI, 0 },
-  { P9V_BUILTIN_VEC_CMPNEZ, P9V_BUILTIN_CMPNEZH,
-    RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI,
-    RS6000_BTI_unsigned_V8HI, 0 },
-
-  { P9V_BUILTIN_VEC_CMPNEZ, P9V_BUILTIN_CMPNEZW,
-    RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI,
-    RS6000_BTI_V4SI, 0 },
-  { P9V_BUILTIN_VEC_CMPNEZ, P9V_BUILTIN_CMPNEZW,
-    RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI,
-    RS6000_BTI_unsigned_V4SI, 0 },
-
-  { P9V_BUILTIN_VEC_VCLZLSBB, P9V_BUILTIN_VCLZLSBB_V16QI,
-    RS6000_BTI_INTSI, RS6000_BTI_V16QI, 0, 0 },
-  { P9V_BUILTIN_VEC_VCLZLSBB, P9V_BUILTIN_VCLZLSBB_V16QI,
-    RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI, 0, 0 },
-
-  { P9V_BUILTIN_VEC_VCTZLSBB, P9V_BUILTIN_VCTZLSBB_V16QI,
-    RS6000_BTI_INTSI, RS6000_BTI_V16QI, 0, 0 },
-  { P9V_BUILTIN_VEC_VCTZLSBB, P9V_BUILTIN_VCTZLSBB_V16QI,
-    RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI, 0, 0 },
-  { P9V_BUILTIN_VEC_VCTZLSBB, P9V_BUILTIN_VCTZLSBB_V8HI,
-    RS6000_BTI_INTSI, RS6000_BTI_V8HI, 0, 0 },
-  { P9V_BUILTIN_VEC_VCTZLSBB, P9V_BUILTIN_VCTZLSBB_V4SI,
-    RS6000_BTI_INTSI, RS6000_BTI_V4SI, 0, 0 },
-
-  { P9V_BUILTIN_VEC_EXTRACT4B, P9V_BUILTIN_EXTRACT4B,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, 0 },
-
-  { P9V_BUILTIN_VEC_VEXTRACT_FP_FROM_SHORTH, P9V_BUILTIN_VEXTRACT_FP_FROM_SHORTH,
-    RS6000_BTI_V4SF, RS6000_BTI_unsigned_V8HI, 0, 0 },
-  { P9V_BUILTIN_VEC_VEXTRACT_FP_FROM_SHORTL, P9V_BUILTIN_VEXTRACT_FP_FROM_SHORTL,
-    RS6000_BTI_V4SF, RS6000_BTI_unsigned_V8HI, 0, 0 },
-
-  { P9V_BUILTIN_VEC_VEXTULX, P9V_BUILTIN_VEXTUBLX,
-    RS6000_BTI_INTQI, RS6000_BTI_UINTSI,
-    RS6000_BTI_V16QI, 0 },
-  { P9V_BUILTIN_VEC_VEXTULX, P9V_BUILTIN_VEXTUBLX,
-    RS6000_BTI_UINTQI, RS6000_BTI_UINTSI,
-    RS6000_BTI_unsigned_V16QI, 0 },
-
-  { P9V_BUILTIN_VEC_VEXTULX, P9V_BUILTIN_VEXTUHLX,
-    RS6000_BTI_INTHI, RS6000_BTI_UINTSI,
-    RS6000_BTI_V8HI, 0 },
-  { P9V_BUILTIN_VEC_VEXTULX, P9V_BUILTIN_VEXTUHLX,
-    RS6000_BTI_UINTHI, RS6000_BTI_UINTSI,
-    RS6000_BTI_unsigned_V8HI, 0 },
-
-  { P9V_BUILTIN_VEC_VEXTULX, P9V_BUILTIN_VEXTUWLX,
-    RS6000_BTI_INTSI, RS6000_BTI_UINTSI,
-    RS6000_BTI_V4SI, 0 },
-  { P9V_BUILTIN_VEC_VEXTULX, P9V_BUILTIN_VEXTUWLX,
-    RS6000_BTI_UINTSI, RS6000_BTI_UINTSI,
-    RS6000_BTI_unsigned_V4SI, 0 },
-  { P9V_BUILTIN_VEC_VEXTULX, P9V_BUILTIN_VEXTUWLX,
-    RS6000_BTI_float, RS6000_BTI_UINTSI,
-    RS6000_BTI_V4SF, 0 },
-
-  { P9V_BUILTIN_VEC_VEXTURX, P9V_BUILTIN_VEXTUBRX,
-    RS6000_BTI_INTQI, RS6000_BTI_UINTSI,
-    RS6000_BTI_V16QI, 0 },
-  { P9V_BUILTIN_VEC_VEXTURX, P9V_BUILTIN_VEXTUBRX,
-    RS6000_BTI_UINTQI, RS6000_BTI_UINTSI,
-    RS6000_BTI_unsigned_V16QI, 0 },
-
-  { P9V_BUILTIN_VEC_VEXTURX, P9V_BUILTIN_VEXTUHRX,
-    RS6000_BTI_INTHI, RS6000_BTI_UINTSI,
-    RS6000_BTI_V8HI, 0 },
-  { P9V_BUILTIN_VEC_VEXTURX, P9V_BUILTIN_VEXTUHRX,
-    RS6000_BTI_UINTHI, RS6000_BTI_UINTSI,
-    RS6000_BTI_unsigned_V8HI, 0 },
-
-  { P9V_BUILTIN_VEC_VEXTURX, P9V_BUILTIN_VEXTUWRX,
-    RS6000_BTI_INTSI, RS6000_BTI_UINTSI,
-    RS6000_BTI_V4SI, 0 },
-  { P9V_BUILTIN_VEC_VEXTURX, P9V_BUILTIN_VEXTUWRX,
-    RS6000_BTI_UINTSI, RS6000_BTI_UINTSI,
-    RS6000_BTI_unsigned_V4SI, 0 },
-  { P9V_BUILTIN_VEC_VEXTURX, P9V_BUILTIN_VEXTUWRX,
-    RS6000_BTI_float, RS6000_BTI_UINTSI,
-    RS6000_BTI_V4SF, 0 },
-
-  { P8V_BUILTIN_VEC_VGBBD, P8V_BUILTIN_VGBBD,
-    RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0, 0 },
-  { P8V_BUILTIN_VEC_VGBBD, P8V_BUILTIN_VGBBD,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0, 0 },
-
-  { P9V_BUILTIN_VEC_INSERT4B, P9V_BUILTIN_INSERT4B,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_V4SI,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI },
-  { P9V_BUILTIN_VEC_INSERT4B, P9V_BUILTIN_INSERT4B,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V4SI,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI },
-
-  { P8V_BUILTIN_VEC_VADDECUQ, P8V_BUILTIN_VADDECUQ,
-    RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI },
-  { P8V_BUILTIN_VEC_VADDECUQ, P8V_BUILTIN_VADDECUQ,
-    RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI,
-    RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI },
-
-  { P8V_BUILTIN_VEC_VADDEUQM, P8V_BUILTIN_VADDEUQM,
-    RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI },
-  { P8V_BUILTIN_VEC_VADDEUQM, P8V_BUILTIN_VADDEUQM,
-    RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI,
-    RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI },
-
-  { P8V_BUILTIN_VEC_VSUBECUQ, P8V_BUILTIN_VSUBECUQ,
-    RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI },
-  { P8V_BUILTIN_VEC_VSUBECUQ, P8V_BUILTIN_VSUBECUQ,
-    RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI,
-    RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI },
-
-  { P8V_BUILTIN_VEC_VSUBEUQM, P8V_BUILTIN_VSUBEUQM,
-    RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI },
-  { P8V_BUILTIN_VEC_VSUBEUQM, P8V_BUILTIN_VSUBEUQM,
-    RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI,
-    RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI },
-
-  { P8V_BUILTIN_VEC_VMINSD, P8V_BUILTIN_VMINSD,
-    RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, 0 },
-  { P8V_BUILTIN_VEC_VMINSD, P8V_BUILTIN_VMINSD,
-    RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, 0 },
-  { P8V_BUILTIN_VEC_VMINSD, P8V_BUILTIN_VMINSD,
-    RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 },
-
-  { P8V_BUILTIN_VEC_VMAXSD, P8V_BUILTIN_VMAXSD,
-    RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, 0 },
-  { P8V_BUILTIN_VEC_VMAXSD, P8V_BUILTIN_VMAXSD,
-    RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, 0 },
-  { P8V_BUILTIN_VEC_VMAXSD, P8V_BUILTIN_VMAXSD,
-    RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 },
-
-  { P8V_BUILTIN_VEC_VMINUD, P8V_BUILTIN_VMINUD,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI,
-    RS6000_BTI_unsigned_V2DI, 0 },
-  { P8V_BUILTIN_VEC_VMINUD, P8V_BUILTIN_VMINUD,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI,
-    RS6000_BTI_bool_V2DI, 0 },
-  { P8V_BUILTIN_VEC_VMINUD, P8V_BUILTIN_VMINUD,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI,
-    RS6000_BTI_unsigned_V2DI, 0 },
-
-  { P8V_BUILTIN_VEC_VMAXUD, P8V_BUILTIN_VMAXUD,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI,
-    RS6000_BTI_unsigned_V2DI, 0 },
-  { P8V_BUILTIN_VEC_VMAXUD, P8V_BUILTIN_VMAXUD,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI,
-    RS6000_BTI_bool_V2DI, 0 },
-  { P8V_BUILTIN_VEC_VMAXUD, P8V_BUILTIN_VMAXUD,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI,
-    RS6000_BTI_unsigned_V2DI, 0 },
-
-  { P8V_BUILTIN_VEC_VMRGEW, P8V_BUILTIN_VMRGEW_V2DI,
-    RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 },
-  { P8V_BUILTIN_VEC_VMRGEW, P8V_BUILTIN_VMRGEW_V2DI,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI,
-    RS6000_BTI_unsigned_V2DI, 0 },
-  { P8V_BUILTIN_VEC_VMRGEW, P8V_BUILTIN_VMRGEW_V2DI,
-    RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, 0 },
-  { P8V_BUILTIN_VEC_VMRGEW, P8V_BUILTIN_VMRGEW_V4SF,
-    RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 },
-  { P8V_BUILTIN_VEC_VMRGEW, P8V_BUILTIN_VMRGEW_V2DF,
-    RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 },
-  { P8V_BUILTIN_VEC_VMRGEW, P8V_BUILTIN_VMRGEW_V4SI,
-    RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },
-  { P8V_BUILTIN_VEC_VMRGEW, P8V_BUILTIN_VMRGEW_V4SI,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI,
-    RS6000_BTI_unsigned_V4SI, 0 },
-  { P8V_BUILTIN_VEC_VMRGEW, P8V_BUILTIN_VMRGEW_V4SI,
-    RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, 0 },
-
-  { P8V_BUILTIN_VEC_VMRGOW, P8V_BUILTIN_VMRGOW_V4SI,
-    RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },
-  { P8V_BUILTIN_VEC_VMRGOW, P8V_BUILTIN_VMRGOW_V4SI,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI,
-    RS6000_BTI_unsigned_V4SI, 0 },
-  { P8V_BUILTIN_VEC_VMRGOW, P8V_BUILTIN_VMRGOW_V4SI,
-    RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, 0 },
-  { P8V_BUILTIN_VEC_VMRGOW, P8V_BUILTIN_VMRGOW_V2DI,
-    RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 },
-  { P8V_BUILTIN_VEC_VMRGOW, P8V_BUILTIN_VMRGOW_V2DI,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI,
-    RS6000_BTI_unsigned_V2DI, 0 },
-  { P8V_BUILTIN_VEC_VMRGOW, P8V_BUILTIN_VMRGOW_V2DI,
-    RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, 0 },
-  { P8V_BUILTIN_VEC_VMRGOW, P8V_BUILTIN_VMRGOW_V2DF,
-    RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 },
-  { P8V_BUILTIN_VEC_VMRGOW, P8V_BUILTIN_VMRGOW_V4SF,
-    RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 },
-
-  { P8V_BUILTIN_VEC_VPMSUM, P8V_BUILTIN_VPMSUMB,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V16QI,
-    RS6000_BTI_unsigned_V16QI, 0 },
-  { P8V_BUILTIN_VEC_VPMSUM, P8V_BUILTIN_VPMSUMH,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V8HI,
-    RS6000_BTI_unsigned_V8HI, 0 },
-  { P8V_BUILTIN_VEC_VPMSUM, P8V_BUILTIN_VPMSUMW,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V4SI,
-    RS6000_BTI_unsigned_V4SI, 0 },
-  { P8V_BUILTIN_VEC_VPMSUM, P8V_BUILTIN_VPMSUMD,
-    RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V2DI,
-    RS6000_BTI_unsigned_V2DI, 0 },
-
-  { P8V_BUILTIN_VEC_VPOPCNT, P8V_BUILTIN_VPOPCNTB,
-    RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0, 0 },
-  { P8V_BUILTIN_VEC_VPOPCNT, P8V_BUILTIN_VPOPCNTB,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0, 0 },
-  { P8V_BUILTIN_VEC_VPOPCNT, P8V_BUILTIN_VPOPCNTH,
-    RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0, 0 },
-  { P8V_BUILTIN_VEC_VPOPCNT, P8V_BUILTIN_VPOPCNTH,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0, 0 },
-  { P8V_BUILTIN_VEC_VPOPCNT, P8V_BUILTIN_VPOPCNTW,
-    RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0, 0 },
-  { P8V_BUILTIN_VEC_VPOPCNT, P8V_BUILTIN_VPOPCNTW,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0, 0 },
-  { P8V_BUILTIN_VEC_VPOPCNT, P8V_BUILTIN_VPOPCNTD,
-    RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0, 0 },
-  { P8V_BUILTIN_VEC_VPOPCNT, P8V_BUILTIN_VPOPCNTD,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0, 0 },
-
-  { P8V_BUILTIN_VEC_VPOPCNTB, P8V_BUILTIN_VPOPCNTB,
-    RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0, 0 },
-  { P8V_BUILTIN_VEC_VPOPCNTB, P8V_BUILTIN_VPOPCNTB,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0, 0 },
-
-  { P8V_BUILTIN_VEC_VPOPCNTU, P8V_BUILTIN_VPOPCNTUB,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_V16QI, 0, 0 },
-  { P8V_BUILTIN_VEC_VPOPCNTU, P8V_BUILTIN_VPOPCNTUB,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0, 0 },
-
-  { P8V_BUILTIN_VEC_VPOPCNTU, P8V_BUILTIN_VPOPCNTUH,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_V8HI, 0, 0 },
-  { P8V_BUILTIN_VEC_VPOPCNTU, P8V_BUILTIN_VPOPCNTUH,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0, 0 },
-
-  { P8V_BUILTIN_VEC_VPOPCNTU, P8V_BUILTIN_VPOPCNTUW,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_V4SI, 0, 0 },
-  { P8V_BUILTIN_VEC_VPOPCNTU, P8V_BUILTIN_VPOPCNTUW,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0, 0 },
-
-  { P8V_BUILTIN_VEC_VPOPCNTU, P8V_BUILTIN_VPOPCNTUD,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_V2DI, 0, 0 },
-  { P8V_BUILTIN_VEC_VPOPCNTU, P8V_BUILTIN_VPOPCNTUD,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0, 0 },
-
-  { P8V_BUILTIN_VEC_VPOPCNTH, P8V_BUILTIN_VPOPCNTH,
-    RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0, 0 },
-  { P8V_BUILTIN_VEC_VPOPCNTH, P8V_BUILTIN_VPOPCNTH,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0, 0 },
-
-  { P8V_BUILTIN_VEC_VPOPCNTW, P8V_BUILTIN_VPOPCNTW,
-    RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0, 0 },
-  { P8V_BUILTIN_VEC_VPOPCNTW, P8V_BUILTIN_VPOPCNTW,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0, 0 },
-
-  { P8V_BUILTIN_VEC_VPOPCNTD, P8V_BUILTIN_VPOPCNTD,
-    RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0, 0 },
-  { P8V_BUILTIN_VEC_VPOPCNTD, P8V_BUILTIN_VPOPCNTD,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0, 0 },
-
-  { P9V_BUILTIN_VEC_VPRTYB, P9V_BUILTIN_VPRTYBW,
-    RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0, 0 },
-  { P9V_BUILTIN_VEC_VPRTYB, P9V_BUILTIN_VPRTYBW,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0, 0 },
-  { P9V_BUILTIN_VEC_VPRTYB, P9V_BUILTIN_VPRTYBD,
-    RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0, 0 },
-  { P9V_BUILTIN_VEC_VPRTYB, P9V_BUILTIN_VPRTYBD,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0, 0 },
-  { P9V_BUILTIN_VEC_VPRTYB, P9V_BUILTIN_VPRTYBQ,
-    RS6000_BTI_V1TI, RS6000_BTI_V1TI, 0, 0 },
-  { P9V_BUILTIN_VEC_VPRTYB, P9V_BUILTIN_VPRTYBQ,
-    RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, 0, 0 },
-  { P9V_BUILTIN_VEC_VPRTYB, P9V_BUILTIN_VPRTYBQ,
-    RS6000_BTI_INTTI, RS6000_BTI_INTTI, 0, 0 },
-  { P9V_BUILTIN_VEC_VPRTYB, P9V_BUILTIN_VPRTYBQ,
-    RS6000_BTI_UINTTI, RS6000_BTI_UINTTI, 0, 0 },
-
-  { P9V_BUILTIN_VEC_VPRTYBW, P9V_BUILTIN_VPRTYBW,
-    RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0, 0 },
-  { P9V_BUILTIN_VEC_VPRTYBW, P9V_BUILTIN_VPRTYBW,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0, 0 },
-
-  { P9V_BUILTIN_VEC_VPRTYBD, P9V_BUILTIN_VPRTYBD,
-    RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0, 0 },
-  { P9V_BUILTIN_VEC_VPRTYBD, P9V_BUILTIN_VPRTYBD,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0, 0 },
-
-  { P9V_BUILTIN_VEC_VPRTYBQ, P9V_BUILTIN_VPRTYBQ,
-    RS6000_BTI_V1TI, RS6000_BTI_V1TI, 0, 0 },
-  { P9V_BUILTIN_VEC_VPRTYBQ, P9V_BUILTIN_VPRTYBQ,
-    RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, 0, 0 },
-  { P9V_BUILTIN_VEC_VPRTYBQ, P9V_BUILTIN_VPRTYBQ,
-    RS6000_BTI_INTTI, RS6000_BTI_INTTI, 0, 0 },
-  { P9V_BUILTIN_VEC_VPRTYBQ, P9V_BUILTIN_VPRTYBQ,
-    RS6000_BTI_UINTTI, RS6000_BTI_UINTTI, 0, 0 },
-
-  { P9V_BUILTIN_VEC_VPARITY_LSBB, P9V_BUILTIN_VPRTYBW,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_V4SI, 0, 0 },
-  { P9V_BUILTIN_VEC_VPARITY_LSBB, P9V_BUILTIN_VPRTYBW,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0, 0 },
-  { P9V_BUILTIN_VEC_VPARITY_LSBB, P9V_BUILTIN_VPRTYBD,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_V2DI, 0, 0 },
-  { P9V_BUILTIN_VEC_VPARITY_LSBB, P9V_BUILTIN_VPRTYBD,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0, 0 },
-  { P9V_BUILTIN_VEC_VPARITY_LSBB, P9V_BUILTIN_VPRTYBQ,
-    RS6000_BTI_unsigned_V1TI, RS6000_BTI_V1TI, 0, 0 },
-  { P9V_BUILTIN_VEC_VPARITY_LSBB, P9V_BUILTIN_VPRTYBQ,
-    RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, 0, 0 },
-
-  { P9_BUILTIN_CMPRB, P9_BUILTIN_SCALAR_CMPRB,
-    RS6000_BTI_INTSI, RS6000_BTI_UINTQI, RS6000_BTI_UINTSI, 0 },
-  { P9_BUILTIN_CMPRB2, P9_BUILTIN_SCALAR_CMPRB2,
-    RS6000_BTI_INTSI, RS6000_BTI_UINTQI, RS6000_BTI_UINTSI, 0 },
-  { P9_BUILTIN_CMPEQB, P9_BUILTIN_SCALAR_CMPEQB,
-    RS6000_BTI_INTSI, RS6000_BTI_UINTQI, RS6000_BTI_UINTDI, 0 },
-
-  { P8V_BUILTIN_VEC_VPKUDUM, P8V_BUILTIN_VPKUDUM,
-    RS6000_BTI_V4SI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 },
-  { P8V_BUILTIN_VEC_VPKUDUM, P8V_BUILTIN_VPKUDUM,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 },
-  { P8V_BUILTIN_VEC_VPKUDUM, P8V_BUILTIN_VPKUDUM,
-    RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, 0 },
-
-  { P8V_BUILTIN_VEC_VPKSDSS, P8V_BUILTIN_VPKSDSS,
-    RS6000_BTI_V4SI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 },
-
-  { P8V_BUILTIN_VEC_VPKUDUS, P8V_BUILTIN_VPKUDUS,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 },
-
-  { P8V_BUILTIN_VEC_VPKSDUS, P8V_BUILTIN_VPKSDUS,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 },
-
-  { P8V_BUILTIN_VEC_VRLD, P8V_BUILTIN_VRLD,
-    RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_unsigned_V2DI, 0 },
-  { P8V_BUILTIN_VEC_VRLD, P8V_BUILTIN_VRLD,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 },
-
-  { P8V_BUILTIN_VEC_VSLD, P8V_BUILTIN_VSLD,
-    RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_unsigned_V2DI, 0 },
-  { P8V_BUILTIN_VEC_VSLD, P8V_BUILTIN_VSLD,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 },
-
-  { P8V_BUILTIN_VEC_VSRD, P8V_BUILTIN_VSRD,
-    RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_unsigned_V2DI, 0 },
-  { P8V_BUILTIN_VEC_VSRD, P8V_BUILTIN_VSRD,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 },
-
-  { P8V_BUILTIN_VEC_VSRAD, P8V_BUILTIN_VSRAD,
-    RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_unsigned_V2DI, 0 },
-  { P8V_BUILTIN_VEC_VSRAD, P8V_BUILTIN_VSRAD,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 },
-
-  { P8V_BUILTIN_VEC_VSUBCUQ, P8V_BUILTIN_VSUBCUQ,
-    RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, 0 },
-  { P8V_BUILTIN_VEC_VSUBCUQ, P8V_BUILTIN_VSUBCUQ,
-    RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI,
-    RS6000_BTI_unsigned_V1TI, 0 },
-
-  { P8V_BUILTIN_VEC_VSUBUDM, P8V_BUILTIN_VSUBUDM,
-    RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, 0 },
-  { P8V_BUILTIN_VEC_VSUBUDM, P8V_BUILTIN_VSUBUDM,
-    RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, 0 },
-  { P8V_BUILTIN_VEC_VSUBUDM, P8V_BUILTIN_VSUBUDM,
-    RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 },
-  { P8V_BUILTIN_VEC_VSUBUDM, P8V_BUILTIN_VSUBUDM,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI, 0 },
-  { P8V_BUILTIN_VEC_VSUBUDM, P8V_BUILTIN_VSUBUDM,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, 0 },
-  { P8V_BUILTIN_VEC_VSUBUDM, P8V_BUILTIN_VSUBUDM,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 },
-
-  { P8V_BUILTIN_VEC_VSUBUQM, P8V_BUILTIN_VSUBUQM,
-    RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, 0 },
-  { P8V_BUILTIN_VEC_VSUBUQM, P8V_BUILTIN_VSUBUQM,
-    RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI,
-    RS6000_BTI_unsigned_V1TI, 0 },
-
-  { P6_OV_BUILTIN_CMPB, P6_BUILTIN_CMPB_32,
-    RS6000_BTI_UINTSI, RS6000_BTI_UINTSI, RS6000_BTI_UINTSI, 0 },
-  { P6_OV_BUILTIN_CMPB, P6_BUILTIN_CMPB,
-    RS6000_BTI_UINTDI, RS6000_BTI_UINTDI, RS6000_BTI_UINTDI, 0 },
-
-  { P8V_BUILTIN_VEC_VUPKHSW, P8V_BUILTIN_VUPKHSW,
-    RS6000_BTI_V2DI, RS6000_BTI_V4SI, 0, 0 },
-  { P8V_BUILTIN_VEC_VUPKHSW, P8V_BUILTIN_VUPKHSW,
-    RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V4SI, 0, 0 },
-
-  { P8V_BUILTIN_VEC_VUPKLSW, P8V_BUILTIN_VUPKLSW,
-    RS6000_BTI_V2DI, RS6000_BTI_V4SI, 0, 0 },
-  { P8V_BUILTIN_VEC_VUPKLSW, P8V_BUILTIN_VUPKLSW,
-    RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V4SI, 0, 0 },
-
-  { P9V_BUILTIN_VEC_VSLV, P9V_BUILTIN_VSLV,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI,
-    RS6000_BTI_unsigned_V16QI, 0 },
-  { P9V_BUILTIN_VEC_VSRV, P9V_BUILTIN_VSRV,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI,
-    RS6000_BTI_unsigned_V16QI, 0 },
-
-  { P8V_BUILTIN_VEC_REVB, P8V_BUILTIN_REVB_V1TI,
-    RS6000_BTI_V1TI, RS6000_BTI_V1TI, 0, 0 },
-  { P8V_BUILTIN_VEC_REVB, P8V_BUILTIN_REVB_V1TI,
-    RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, 0, 0 },
-  { P8V_BUILTIN_VEC_REVB, P8V_BUILTIN_REVB_V2DI,
-    RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, 0, 0 },
-  { P8V_BUILTIN_VEC_REVB, P8V_BUILTIN_REVB_V2DI,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0, 0 },
-  { P8V_BUILTIN_VEC_REVB, P8V_BUILTIN_REVB_V2DI,
-    RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0, 0 },
-  { P8V_BUILTIN_VEC_REVB, P8V_BUILTIN_REVB_V4SI,
-    RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, 0, 0 },
-  { P8V_BUILTIN_VEC_REVB, P8V_BUILTIN_REVB_V4SI,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0, 0 },
-  { P8V_BUILTIN_VEC_REVB, P8V_BUILTIN_REVB_V4SI,
-    RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0, 0 },
-  { P8V_BUILTIN_VEC_REVB, P8V_BUILTIN_REVB_V8HI,
-    RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, 0, 0 },
-  { P8V_BUILTIN_VEC_REVB, P8V_BUILTIN_REVB_V8HI,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0, 0 },
-  { P8V_BUILTIN_VEC_REVB, P8V_BUILTIN_REVB_V8HI,
-    RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0, 0 },
-  { P8V_BUILTIN_VEC_REVB, P8V_BUILTIN_REVB_V16QI,
-    RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, 0, 0 },
-  { P8V_BUILTIN_VEC_REVB, P8V_BUILTIN_REVB_V16QI,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0, 0 },
-  { P8V_BUILTIN_VEC_REVB, P8V_BUILTIN_REVB_V16QI,
-    RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0, 0 },
-  { P8V_BUILTIN_VEC_REVB, P8V_BUILTIN_REVB_V2DF,
-    RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0, 0 },
-  { P8V_BUILTIN_VEC_REVB, P8V_BUILTIN_REVB_V4SF,
-    RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0, 0 },
-
-  { ALTIVEC_BUILTIN_VEC_VREVE, ALTIVEC_BUILTIN_VREVE_V2DI,
-    RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0, 0 },
-  { ALTIVEC_BUILTIN_VEC_VREVE, ALTIVEC_BUILTIN_VREVE_V4SI,
-    RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0, 0 },
-  { ALTIVEC_BUILTIN_VEC_VREVE, ALTIVEC_BUILTIN_VREVE_V8HI,
-    RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0, 0 },
-  { ALTIVEC_BUILTIN_VEC_VREVE, ALTIVEC_BUILTIN_VREVE_V16QI,
-    RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0, 0 },
-  { ALTIVEC_BUILTIN_VEC_VREVE, ALTIVEC_BUILTIN_VREVE_V2DI,
-    RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, 0, 0 },
-  { ALTIVEC_BUILTIN_VEC_VREVE, ALTIVEC_BUILTIN_VREVE_V4SI,
-    RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, 0, 0 },
-  { ALTIVEC_BUILTIN_VEC_VREVE, ALTIVEC_BUILTIN_VREVE_V8HI,
-    RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, 0, 0 },
-  { ALTIVEC_BUILTIN_VEC_VREVE, ALTIVEC_BUILTIN_VREVE_V16QI,
-    RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, 0, 0 },
-  { ALTIVEC_BUILTIN_VEC_VREVE, ALTIVEC_BUILTIN_VREVE_V2DF,
-    RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0, 0 },
-  { ALTIVEC_BUILTIN_VEC_VREVE, ALTIVEC_BUILTIN_VREVE_V4SF,
-    RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0, 0 },
-  { ALTIVEC_BUILTIN_VEC_VREVE, ALTIVEC_BUILTIN_VREVE_V2DI,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0, 0 },
-  { ALTIVEC_BUILTIN_VEC_VREVE, ALTIVEC_BUILTIN_VREVE_V4SI,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0, 0 },
-  { ALTIVEC_BUILTIN_VEC_VREVE, ALTIVEC_BUILTIN_VREVE_V8HI,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0, 0 },
-  { ALTIVEC_BUILTIN_VEC_VREVE, ALTIVEC_BUILTIN_VREVE_V16QI,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0, 0 },
-
-  { VSX_BUILTIN_VEC_VSIGNED, VSX_BUILTIN_VEC_VSIGNED_V4SF,
-    RS6000_BTI_V4SI, RS6000_BTI_V4SF, 0, 0 },
-  { VSX_BUILTIN_VEC_VSIGNED, VSX_BUILTIN_VEC_VSIGNED_V2DF,
-    RS6000_BTI_V2DI, RS6000_BTI_V2DF, 0, 0 },
-  { VSX_BUILTIN_VEC_VSIGNEDE, VSX_BUILTIN_VEC_VSIGNEDE_V2DF,
-    RS6000_BTI_V4SI, RS6000_BTI_V2DF, 0, 0 },
-  { VSX_BUILTIN_VEC_VSIGNEDO, VSX_BUILTIN_VEC_VSIGNEDO_V2DF,
-    RS6000_BTI_V4SI, RS6000_BTI_V2DF, 0, 0 },
-  { P8V_BUILTIN_VEC_VSIGNED2, P8V_BUILTIN_VEC_VSIGNED2_V2DF,
-    RS6000_BTI_V4SI, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 },
-
-  { VSX_BUILTIN_VEC_VUNSIGNED, VSX_BUILTIN_VEC_VUNSIGNED_V4SF,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_V4SF, 0, 0 },
-  { VSX_BUILTIN_VEC_VUNSIGNED, VSX_BUILTIN_VEC_VUNSIGNED_V2DF,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_V2DF, 0, 0 },
-  { VSX_BUILTIN_VEC_VUNSIGNEDE, VSX_BUILTIN_VEC_VUNSIGNEDE_V2DF,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_V2DF, 0, 0 },
-  { VSX_BUILTIN_VEC_VUNSIGNEDO, VSX_BUILTIN_VEC_VUNSIGNEDO_V2DF,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_V2DF, 0, 0 },
-  { P8V_BUILTIN_VEC_VUNSIGNED2, P8V_BUILTIN_VEC_VUNSIGNED2_V2DF,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_V2DF,
-    RS6000_BTI_V2DF, 0 },
-
-  /* Crypto builtins.  */
-  { CRYPTO_BUILTIN_VPERMXOR, CRYPTO_BUILTIN_VPERMXOR_V16QI,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI },
-  { CRYPTO_BUILTIN_VPERMXOR, CRYPTO_BUILTIN_VPERMXOR_V8HI,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI },
-  { CRYPTO_BUILTIN_VPERMXOR, CRYPTO_BUILTIN_VPERMXOR_V4SI,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI },
-  { CRYPTO_BUILTIN_VPERMXOR, CRYPTO_BUILTIN_VPERMXOR_V2DI,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI },
-
-  { CRYPTO_BUILTIN_VPMSUM, CRYPTO_BUILTIN_VPMSUMB,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI,
-    RS6000_BTI_unsigned_V16QI, 0 },
-  { CRYPTO_BUILTIN_VPMSUM, CRYPTO_BUILTIN_VPMSUMH,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI,
-    RS6000_BTI_unsigned_V8HI, 0 },
-  { CRYPTO_BUILTIN_VPMSUM, CRYPTO_BUILTIN_VPMSUMW,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI,
-    RS6000_BTI_unsigned_V4SI, 0 },
-  { CRYPTO_BUILTIN_VPMSUM, CRYPTO_BUILTIN_VPMSUMD,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI,
-    RS6000_BTI_unsigned_V2DI, 0 },
-
-  { CRYPTO_BUILTIN_VSHASIGMA, CRYPTO_BUILTIN_VSHASIGMAW,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI,
-    RS6000_BTI_INTSI, RS6000_BTI_INTSI },
-  { CRYPTO_BUILTIN_VSHASIGMA, CRYPTO_BUILTIN_VSHASIGMAD,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI,
-    RS6000_BTI_INTSI, RS6000_BTI_INTSI },
-
-  /* Sign extend builtins that work work on ISA 3.0, not added until ISA 3.1 */
-  { P9V_BUILTIN_VEC_VSIGNEXTI, P9V_BUILTIN_VSIGNEXTSB2W,
-    RS6000_BTI_V4SI, RS6000_BTI_V16QI, 0, 0 },
-  { P9V_BUILTIN_VEC_VSIGNEXTI, P9V_BUILTIN_VSIGNEXTSH2W,
-    RS6000_BTI_V4SI, RS6000_BTI_V8HI, 0, 0 },
-
-  { P9V_BUILTIN_VEC_VSIGNEXTLL, P9V_BUILTIN_VSIGNEXTSB2D,
-    RS6000_BTI_V2DI, RS6000_BTI_V16QI, 0, 0 },
-  { P9V_BUILTIN_VEC_VSIGNEXTLL, P9V_BUILTIN_VSIGNEXTSH2D,
-    RS6000_BTI_V2DI, RS6000_BTI_V8HI, 0, 0 },
-  { P9V_BUILTIN_VEC_VSIGNEXTLL, P9V_BUILTIN_VSIGNEXTSW2D,
-    RS6000_BTI_V2DI, RS6000_BTI_V4SI, 0, 0 },
-
-  /* Overloaded built-in functions for ISA3.1 (power10). */
-  { P10_BUILTIN_VEC_CLRL, P10V_BUILTIN_VCLRLB,
-    RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_UINTSI, 0 },
-  { P10_BUILTIN_VEC_CLRL, P10V_BUILTIN_VCLRLB,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI,
-    RS6000_BTI_UINTSI, 0 },
-  { P10_BUILTIN_VEC_CLRR, P10V_BUILTIN_VCLRRB,
-    RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_UINTSI, 0 },
-  { P10_BUILTIN_VEC_CLRR, P10V_BUILTIN_VCLRRB,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI,
-    RS6000_BTI_UINTSI, 0 },
-
-  { P10_BUILTIN_VEC_GNB, P10V_BUILTIN_VGNB, RS6000_BTI_unsigned_long_long,
-    RS6000_BTI_unsigned_V1TI, RS6000_BTI_UINTQI, 0 },
-  { P10_BUILTIN_VEC_XXGENPCVM, P10V_BUILTIN_XXGENPCVM_V2DI,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_INTSI, 0 },
-  { P10_BUILTIN_VEC_XXGENPCVM, P10V_BUILTIN_XXGENPCVM_V4SI,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, 0 },
-  { P10_BUILTIN_VEC_XXGENPCVM, P10V_BUILTIN_XXGENPCVM_V8HI,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, 0 },
-  { P10_BUILTIN_VEC_XXGENPCVM, P10V_BUILTIN_XXGENPCVM_V16QI,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI,
-    RS6000_BTI_INTSI, 0 },
-
-  /* The overloaded XXEVAL definitions are handled specially because the
-     fourth unsigned char operand is not encoded in this table.  */
-  { P10_BUILTIN_VEC_XXEVAL, P10V_BUILTIN_XXEVAL,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI },
-  { P10_BUILTIN_VEC_XXEVAL, P10V_BUILTIN_XXEVAL,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI },
-  { P10_BUILTIN_VEC_XXEVAL, P10V_BUILTIN_XXEVAL,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI },
-  { P10_BUILTIN_VEC_XXEVAL, P10V_BUILTIN_XXEVAL,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI },
-  { P10_BUILTIN_VEC_XXEVAL, P10V_BUILTIN_XXEVAL,
-    RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI,
-    RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI },
-
-  /* The overloaded XXPERMX definitions are handled specially because the
-     fourth unsigned char operand is not encoded in this table.  */
-  {  P10_BUILTIN_VEC_XXPERMX, P10V_BUILTIN_VXXPERMX,
-     RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI,
-     RS6000_BTI_unsigned_V16QI },
-  {  P10_BUILTIN_VEC_XXPERMX, P10V_BUILTIN_VXXPERMX,
-     RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI,
-     RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI },
-  {  P10_BUILTIN_VEC_XXPERMX, P10V_BUILTIN_VXXPERMX,
-     RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI,
-     RS6000_BTI_unsigned_V16QI },
-  {  P10_BUILTIN_VEC_XXPERMX, P10V_BUILTIN_VXXPERMX,
-     RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI,
-     RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V16QI },
-  {  P10_BUILTIN_VEC_XXPERMX, P10V_BUILTIN_VXXPERMX,
-     RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI,
-     RS6000_BTI_unsigned_V16QI },
-  {  P10_BUILTIN_VEC_XXPERMX, P10V_BUILTIN_VXXPERMX,
-     RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI,
-     RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V16QI },
-  {  P10_BUILTIN_VEC_XXPERMX, P10V_BUILTIN_VXXPERMX,
-     RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI,
-     RS6000_BTI_unsigned_V16QI },
-  {  P10_BUILTIN_VEC_XXPERMX, P10V_BUILTIN_VXXPERMX,
-     RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI,
-     RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V16QI },
-  {  P10_BUILTIN_VEC_XXPERMX, P10V_BUILTIN_VXXPERMX,
-     RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF,
-     RS6000_BTI_unsigned_V16QI },
-  {  P10_BUILTIN_VEC_XXPERMX, P10V_BUILTIN_VXXPERMX,
-     RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF,
-     RS6000_BTI_unsigned_V16QI },
-
-  { P10_BUILTIN_VEC_EXTRACTL, P10V_BUILTIN_VEXTRACTBL,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V16QI,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_UINTQI },
-  { P10_BUILTIN_VEC_EXTRACTL, P10V_BUILTIN_VEXTRACTHL,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V8HI,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_UINTQI },
-  { P10_BUILTIN_VEC_EXTRACTL, P10V_BUILTIN_VEXTRACTWL,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V4SI,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_UINTQI },
-  { P10_BUILTIN_VEC_EXTRACTL, P10V_BUILTIN_VEXTRACTDL,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_UINTQI },
-
-  { P10_BUILTIN_VEC_INSERTL, P10V_BUILTIN_VINSERTGPRBL,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_UINTQI,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_UINTSI },
-  { P10_BUILTIN_VEC_INSERTL, P10V_BUILTIN_VINSERTGPRHL,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_UINTHI,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_UINTSI },
-  { P10_BUILTIN_VEC_INSERTL, P10V_BUILTIN_VINSERTGPRWL,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_UINTSI,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_UINTSI },
-  { P10_BUILTIN_VEC_INSERTL, P10V_BUILTIN_VINSERTGPRDL,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_UINTDI,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_UINTSI },
- { P10_BUILTIN_VEC_INSERTL, P10V_BUILTIN_VINSERTVPRBL,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_UINTQI },
-  { P10_BUILTIN_VEC_INSERTL, P10V_BUILTIN_VINSERTVPRHL,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_UINTQI },
-  { P10_BUILTIN_VEC_INSERTL, P10V_BUILTIN_VINSERTVPRWL,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_UINTQI },
-
-  { P10_BUILTIN_VEC_EXTRACTH, P10V_BUILTIN_VEXTRACTBR,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V16QI,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_UINTQI },
-  { P10_BUILTIN_VEC_EXTRACTH, P10V_BUILTIN_VEXTRACTHR,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V8HI,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_UINTQI },
-  { P10_BUILTIN_VEC_EXTRACTH, P10V_BUILTIN_VEXTRACTWR,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V4SI,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_UINTQI },
-  { P10_BUILTIN_VEC_EXTRACTH, P10V_BUILTIN_VEXTRACTDR,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_UINTQI },
-
-  { P10_BUILTIN_VEC_INSERTH, P10V_BUILTIN_VINSERTGPRBR,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_UINTQI,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_UINTSI },
-  { P10_BUILTIN_VEC_INSERTH, P10V_BUILTIN_VINSERTGPRHR,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_UINTHI,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_UINTSI },
-  { P10_BUILTIN_VEC_INSERTH, P10V_BUILTIN_VINSERTGPRWR,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_UINTSI,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_UINTSI },
-  { P10_BUILTIN_VEC_INSERTH, P10V_BUILTIN_VINSERTGPRDR,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_UINTDI,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_UINTSI },
-  { P10_BUILTIN_VEC_INSERTH, P10V_BUILTIN_VINSERTVPRBR,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_UINTQI },
-  { P10_BUILTIN_VEC_INSERTH, P10V_BUILTIN_VINSERTVPRHR,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_UINTQI },
-  { P10_BUILTIN_VEC_INSERTH, P10V_BUILTIN_VINSERTVPRWR,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_UINTQI },
-
-  { P10_BUILTIN_VEC_REPLACE_ELT, P10V_BUILTIN_VREPLACE_ELT_UV4SI,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI,
-    RS6000_BTI_UINTSI, RS6000_BTI_UINTQI },
-  { P10_BUILTIN_VEC_REPLACE_ELT, P10V_BUILTIN_VREPLACE_ELT_V4SI,
-    RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_INTSI, RS6000_BTI_INTQI },
-  { P10_BUILTIN_VEC_REPLACE_ELT, P10V_BUILTIN_VREPLACE_ELT_V4SF,
-    RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_float, RS6000_BTI_INTQI },
-  { P10_BUILTIN_VEC_REPLACE_ELT, P10V_BUILTIN_VREPLACE_ELT_UV2DI,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI,
-    RS6000_BTI_UINTDI, RS6000_BTI_UINTQI },
-  { P10_BUILTIN_VEC_REPLACE_ELT, P10V_BUILTIN_VREPLACE_ELT_V2DI,
-    RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_INTDI, RS6000_BTI_INTQI },
-  { P10_BUILTIN_VEC_REPLACE_ELT, P10V_BUILTIN_VREPLACE_ELT_V2DF,
-    RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_double, RS6000_BTI_INTQI },
-
-  { P10_BUILTIN_VEC_REPLACE_UN, P10V_BUILTIN_VREPLACE_UN_UV4SI,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI,
-    RS6000_BTI_UINTSI, RS6000_BTI_UINTQI },
-  { P10_BUILTIN_VEC_REPLACE_UN, P10V_BUILTIN_VREPLACE_UN_V4SI,
-    RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_INTSI, RS6000_BTI_INTQI },
-  { P10_BUILTIN_VEC_REPLACE_UN, P10V_BUILTIN_VREPLACE_UN_V4SF,
-    RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_float, RS6000_BTI_INTQI },
-  { P10_BUILTIN_VEC_REPLACE_UN, P10V_BUILTIN_VREPLACE_UN_UV2DI,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI,
-    RS6000_BTI_UINTDI, RS6000_BTI_UINTQI },
-  { P10_BUILTIN_VEC_REPLACE_UN, P10V_BUILTIN_VREPLACE_UN_V2DI,
-    RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_INTDI, RS6000_BTI_INTQI },
-  { P10_BUILTIN_VEC_REPLACE_UN, P10V_BUILTIN_VREPLACE_UN_V2DF,
-    RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_double, RS6000_BTI_INTQI },
-
-  { P10_BUILTIN_VEC_SLDB, P10V_BUILTIN_VSLDB_V16QI,
-    RS6000_BTI_V16QI, RS6000_BTI_V16QI,
-    RS6000_BTI_V16QI, RS6000_BTI_UINTQI },
-  { P10_BUILTIN_VEC_SLDB, P10V_BUILTIN_VSLDB_V16QI,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_UINTQI },
-  { P10_BUILTIN_VEC_SLDB, P10V_BUILTIN_VSLDB_V8HI,
-    RS6000_BTI_V8HI, RS6000_BTI_V8HI,
-    RS6000_BTI_V8HI, RS6000_BTI_UINTQI },
-  { P10_BUILTIN_VEC_SLDB, P10V_BUILTIN_VSLDB_V8HI,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_UINTQI },
-  { P10_BUILTIN_VEC_SLDB, P10V_BUILTIN_VSLDB_V4SI,
-    RS6000_BTI_V4SI, RS6000_BTI_V4SI,
-    RS6000_BTI_V4SI, RS6000_BTI_UINTQI },
-  { P10_BUILTIN_VEC_SLDB, P10V_BUILTIN_VSLDB_V4SI,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_UINTQI },
-  { P10_BUILTIN_VEC_SLDB, P10V_BUILTIN_VSLDB_V2DI,
-    RS6000_BTI_V2DI, RS6000_BTI_V2DI,
-    RS6000_BTI_V2DI, RS6000_BTI_UINTQI },
-  { P10_BUILTIN_VEC_SLDB, P10V_BUILTIN_VSLDB_V2DI,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_UINTQI },
-
-  { P10_BUILTIN_VEC_XXSPLTIW, P10V_BUILTIN_VXXSPLTIW_V4SI,
-    RS6000_BTI_V4SI, RS6000_BTI_INTSI, 0, 0 },
-  { P10_BUILTIN_VEC_XXSPLTIW, P10V_BUILTIN_VXXSPLTIW_V4SF,
-    RS6000_BTI_V4SF, RS6000_BTI_float, 0, 0 },
-
-  { P10_BUILTIN_VEC_XXSPLTID, P10V_BUILTIN_VXXSPLTID,
-    RS6000_BTI_V2DF, RS6000_BTI_float, 0, 0 },
-
-  { P10_BUILTIN_VEC_XXSPLTI32DX, P10V_BUILTIN_VXXSPLTI32DX_V4SI,
-    RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_UINTQI, RS6000_BTI_INTSI },
-  { P10_BUILTIN_VEC_XXSPLTI32DX, P10V_BUILTIN_VXXSPLTI32DX_V4SI,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_UINTQI,
-    RS6000_BTI_UINTSI },
-  { P10_BUILTIN_VEC_XXSPLTI32DX, P10V_BUILTIN_VXXSPLTI32DX_V4SF,
-    RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_UINTQI, RS6000_BTI_float },
-
-  {  P10_BUILTIN_VEC_XXBLEND, P10V_BUILTIN_VXXBLEND_V16QI,
-     RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI,
-     RS6000_BTI_unsigned_V16QI },
-  {  P10_BUILTIN_VEC_XXBLEND, P10V_BUILTIN_VXXBLEND_V16QI,
-     RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI,
-     RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI },
-  {  P10_BUILTIN_VEC_XXBLEND, P10V_BUILTIN_VXXBLEND_V8HI,
-     RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI,
-     RS6000_BTI_unsigned_V8HI },
-  {  P10_BUILTIN_VEC_XXBLEND, P10V_BUILTIN_VXXBLEND_V8HI,
-     RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI,
-     RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI },
-  {  P10_BUILTIN_VEC_XXBLEND, P10V_BUILTIN_VXXBLEND_V4SI,
-     RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI,
-     RS6000_BTI_unsigned_V4SI },
-  {  P10_BUILTIN_VEC_XXBLEND, P10V_BUILTIN_VXXBLEND_V4SI,
-     RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI,
-     RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI },
-  {  P10_BUILTIN_VEC_XXBLEND, P10V_BUILTIN_VXXBLEND_V2DI,
-     RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI,
-     RS6000_BTI_unsigned_V2DI },
-  {  P10_BUILTIN_VEC_XXBLEND, P10V_BUILTIN_VXXBLEND_V2DI,
-     RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI,
-     RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI },
-  {  P10_BUILTIN_VEC_XXBLEND, P10V_BUILTIN_VXXBLEND_V4SF,
-     RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF,
-     RS6000_BTI_unsigned_V4SI },
-  {  P10_BUILTIN_VEC_XXBLEND, P10V_BUILTIN_VXXBLEND_V2DF,
-     RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF,
-     RS6000_BTI_unsigned_V2DI },
-
-  { P10_BUILTIN_VEC_SRDB, P10V_BUILTIN_VSRDB_V16QI,
-    RS6000_BTI_V16QI, RS6000_BTI_V16QI,
-    RS6000_BTI_V16QI, RS6000_BTI_UINTQI },
-  { P10_BUILTIN_VEC_SRDB, P10V_BUILTIN_VSRDB_V16QI,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_UINTQI },
-  { P10_BUILTIN_VEC_SRDB, P10V_BUILTIN_VSRDB_V8HI,
-    RS6000_BTI_V8HI, RS6000_BTI_V8HI,
-    RS6000_BTI_V8HI, RS6000_BTI_UINTQI },
-  { P10_BUILTIN_VEC_SRDB, P10V_BUILTIN_VSRDB_V8HI,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_UINTQI },
-  { P10_BUILTIN_VEC_SRDB, P10V_BUILTIN_VSRDB_V4SI,
-    RS6000_BTI_V4SI, RS6000_BTI_V4SI,
-    RS6000_BTI_V4SI, RS6000_BTI_UINTQI },
-  { P10_BUILTIN_VEC_SRDB, P10V_BUILTIN_VSRDB_V4SI,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_UINTQI },
-  { P10_BUILTIN_VEC_SRDB, P10V_BUILTIN_VSRDB_V2DI,
-    RS6000_BTI_V2DI, RS6000_BTI_V2DI,
-    RS6000_BTI_V2DI, RS6000_BTI_UINTQI },
-  { P10_BUILTIN_VEC_SRDB, P10V_BUILTIN_VSRDB_V2DI,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_UINTQI },
-
-  { P10_BUILTIN_VEC_VSTRIL, P10V_BUILTIN_VSTRIBL,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0, 0 },
-  { P10_BUILTIN_VEC_VSTRIL, P10V_BUILTIN_VSTRIBL,
-    RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0, 0 },
-
-  { P10_BUILTIN_VEC_VSTRIL, P10V_BUILTIN_VSTRIHL,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0, 0 },
-  { P10_BUILTIN_VEC_VSTRIL, P10V_BUILTIN_VSTRIHL,
-    RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0, 0 },
-
-  { P10_BUILTIN_VEC_VSTRIL_P, P10V_BUILTIN_VSTRIBL_P,
-    RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI, 0, 0 },
-  { P10_BUILTIN_VEC_VSTRIL_P, P10V_BUILTIN_VSTRIBL_P,
-    RS6000_BTI_INTSI, RS6000_BTI_V16QI, 0, 0 },
-
-  { P10_BUILTIN_VEC_VSTRIL_P, P10V_BUILTIN_VSTRIHL_P,
-    RS6000_BTI_INTSI, RS6000_BTI_unsigned_V8HI, 0, 0 },
-  { P10_BUILTIN_VEC_VSTRIL_P, P10V_BUILTIN_VSTRIHL_P,
-    RS6000_BTI_INTSI, RS6000_BTI_V8HI, 0, 0 },
-
-  { P10_BUILTIN_VEC_VSTRIR, P10V_BUILTIN_VSTRIBR,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0, 0 },
-  { P10_BUILTIN_VEC_VSTRIR, P10V_BUILTIN_VSTRIBR,
-    RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0, 0 },
-
-  { P10_BUILTIN_VEC_VSTRIR, P10V_BUILTIN_VSTRIHR,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0, 0 },
-  { P10_BUILTIN_VEC_VSTRIR, P10V_BUILTIN_VSTRIHR,
-    RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0, 0 },
-
-  { P10_BUILTIN_VEC_VSTRIR_P, P10V_BUILTIN_VSTRIBR_P,
-    RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI, 0, 0 },
-  { P10_BUILTIN_VEC_VSTRIR_P, P10V_BUILTIN_VSTRIBR_P,
-    RS6000_BTI_INTSI, RS6000_BTI_V16QI, 0, 0 },
-
-  { P10_BUILTIN_VEC_VSTRIR_P, P10V_BUILTIN_VSTRIHR_P,
-    RS6000_BTI_INTSI, RS6000_BTI_unsigned_V8HI, 0, 0 },
-  { P10_BUILTIN_VEC_VSTRIR_P, P10V_BUILTIN_VSTRIHR_P,
-    RS6000_BTI_INTSI, RS6000_BTI_V8HI, 0, 0 },
-
-  { P10_BUILTIN_VEC_MTVSRBM, P10V_BUILTIN_MTVSRBM,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_UINTDI, 0, 0 },
-  { P10_BUILTIN_VEC_MTVSRHM, P10V_BUILTIN_MTVSRHM,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_UINTDI, 0, 0 },
-  { P10_BUILTIN_VEC_MTVSRWM, P10V_BUILTIN_MTVSRWM,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_UINTDI, 0, 0 },
-  { P10_BUILTIN_VEC_MTVSRDM, P10V_BUILTIN_MTVSRDM,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_UINTDI, 0, 0 },
-  { P10_BUILTIN_VEC_MTVSRQM, P10V_BUILTIN_MTVSRQM,
-    RS6000_BTI_unsigned_V1TI, RS6000_BTI_UINTDI, 0, 0 },
-
-  { P10_BUILTIN_VEC_VCNTM, P10V_BUILTIN_VCNTMBB,
-    RS6000_BTI_unsigned_long_long,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_UINTQI, 0 },
-  { P10_BUILTIN_VEC_VCNTM, P10V_BUILTIN_VCNTMBH,
-    RS6000_BTI_unsigned_long_long,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_UINTQI, 0 },
-  { P10_BUILTIN_VEC_VCNTM, P10V_BUILTIN_VCNTMBW,
-    RS6000_BTI_unsigned_long_long,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_UINTQI, 0 },
-  { P10_BUILTIN_VEC_VCNTM, P10V_BUILTIN_VCNTMBD,
-    RS6000_BTI_unsigned_long_long,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_UINTQI, 0 },
-
-  { P10_BUILTIN_VEC_VEXPANDM, P10V_BUILTIN_VEXPANDMB,
-    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0, 0 },
-  { P10_BUILTIN_VEC_VEXPANDM, P10V_BUILTIN_VEXPANDMH,
-    RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0, 0 },
-  { P10_BUILTIN_VEC_VEXPANDM, P10V_BUILTIN_VEXPANDMW,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0, 0 },
-  { P10_BUILTIN_VEC_VEXPANDM, P10V_BUILTIN_VEXPANDMD,
-    RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0, 0 },
-  { P10_BUILTIN_VEC_VEXPANDM, P10V_BUILTIN_VEXPANDMQ,
-    RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, 0, 0 },
-
-  { P10_BUILTIN_VEC_VEXTRACTM, P10V_BUILTIN_VEXTRACTMB,
-    RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI, 0, 0 },
-  { P10_BUILTIN_VEC_VEXTRACTM, P10V_BUILTIN_VEXTRACTMH,
-    RS6000_BTI_INTSI, RS6000_BTI_unsigned_V8HI, 0, 0 },
-  { P10_BUILTIN_VEC_VEXTRACTM, P10V_BUILTIN_VEXTRACTMW,
-    RS6000_BTI_INTSI, RS6000_BTI_unsigned_V4SI, 0, 0 },
-  { P10_BUILTIN_VEC_VEXTRACTM, P10V_BUILTIN_VEXTRACTMD,
-    RS6000_BTI_INTSI, RS6000_BTI_unsigned_V2DI, 0, 0 },
-  { P10_BUILTIN_VEC_VEXTRACTM, P10V_BUILTIN_VEXTRACTMQ,
-    RS6000_BTI_INTSI, RS6000_BTI_unsigned_V1TI, 0, 0 },
-
- { P10_BUILTIN_VEC_XVTLSBB_ZEROS, P10V_BUILTIN_XVTLSBB_ZEROS,
-    RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI, 0, 0 },
- { P10_BUILTIN_VEC_XVTLSBB_ONES, P10V_BUILTIN_XVTLSBB_ONES,
-    RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI, 0, 0 },
-
-  { P10_BUILTIN_VEC_SIGNEXT, P10V_BUILTIN_VSIGNEXTSD2Q,
-     RS6000_BTI_V1TI, RS6000_BTI_V2DI, 0, 0 },
-
-  { RS6000_BUILTIN_NONE, RS6000_BUILTIN_NONE, 0, 0, 0, 0 }
-};
 \f
 /* Nonzero if we can use a floating-point register to pass this arg.  */
 #define USE_FP_FOR_ARG_P(CUM,MODE)		\
diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h
index 3eba1c072cf..b12ee8bfe5b 100644
--- a/gcc/config/rs6000/rs6000.h
+++ b/gcc/config/rs6000/rs6000.h
@@ -2399,7 +2399,6 @@ struct altivec_builtin_types
   signed char op2;
   signed char op3;
 };
-extern const struct altivec_builtin_types altivec_overloaded_builtins[];
 
 enum rs6000_builtin_type_index
 {
-- 
2.27.0

[PATCH 3/6] rs6000: Rename rs6000-builtin-new.def to rs6000-builtins.def

[Bill Schmidt]

From: Bill Schmidt <wschmidt@linux.ibm.com>

Hi!

This patch just renames a file and updates the build machinery accordingly.

Bootstrapped and tested on powerpc64le-linux-gnu with no regressions.  Is this
okay for trunk?

Thanks!
Bill

2021-12-02  Bill Schmidt  <wschmidt@linux.ibm.com>

gcc/
	* config/rs6000/rs6000-builtin-new.def: Rename to...
	* config/rs6000/rs6000-builtins.def: ...this.
	* config/rs6000/rs6000-gen-builtins.c: Adjust header commentary.
	* config/rs6000/t-rs6000 (EXTRA_GTYPE_DEPS): Rename
	rs6000-builtin-new.def to rs6000-builtins.def.
	(rs6000-builtins.c): Likewise.
---
 .../rs6000/{rs6000-builtin-new.def => rs6000-builtins.def}  | 0
 gcc/config/rs6000/rs6000-gen-builtins.c                     | 4 ++--
 gcc/config/rs6000/t-rs6000                                  | 6 +++---
 3 files changed, 5 insertions(+), 5 deletions(-)
 rename gcc/config/rs6000/{rs6000-builtin-new.def => rs6000-builtins.def} (100%)

diff --git a/gcc/config/rs6000/rs6000-builtin-new.def b/gcc/config/rs6000/rs6000-builtins.def
similarity index 100%
rename from gcc/config/rs6000/rs6000-builtin-new.def
rename to gcc/config/rs6000/rs6000-builtins.def
diff --git a/gcc/config/rs6000/rs6000-gen-builtins.c b/gcc/config/rs6000/rs6000-gen-builtins.c
index 78b2486aafc..9c61b7d9fe6 100644
--- a/gcc/config/rs6000/rs6000-gen-builtins.c
+++ b/gcc/config/rs6000/rs6000-gen-builtins.c
@@ -22,7 +22,7 @@ along with GCC; see the file COPYING3.  If not see
    recognition code for Power targets, based on text files that
    describe the built-in functions and vector overloads:
 
-     rs6000-builtin-new.def     Table of built-in functions
+     rs6000-builtins.def        Table of built-in functions
      rs6000-overload.def        Table of overload functions
 
    Both files group similar functions together in "stanzas," as
@@ -125,7 +125,7 @@ along with GCC; see the file COPYING3.  If not see
 
    The second line contains the <bif-id> that this particular instance of
    the overloaded function maps to.  It must match a token that appears in
-   rs6000-builtin-new.def.  Optionally, a second token may appear.  If only
+   rs6000-builtins.def.  Optionally, a second token may appear.  If only
    one token is on the line, it is also used to build the unique identifier
    for the overloaded function.  If a second token is present, the second
    token is used instead for this purpose.  This is necessary in cases
diff --git a/gcc/config/rs6000/t-rs6000 b/gcc/config/rs6000/t-rs6000
index d48a4b1be6c..3d3143a171d 100644
--- a/gcc/config/rs6000/t-rs6000
+++ b/gcc/config/rs6000/t-rs6000
@@ -22,7 +22,7 @@ TM_H += $(srcdir)/config/rs6000/rs6000-builtin.def
 TM_H += $(srcdir)/config/rs6000/rs6000-cpus.def
 TM_H += $(srcdir)/config/rs6000/rs6000-modes.h
 PASSES_EXTRA += $(srcdir)/config/rs6000/rs6000-passes.def
-EXTRA_GTYPE_DEPS += $(srcdir)/config/rs6000/rs6000-builtin-new.def
+EXTRA_GTYPE_DEPS += $(srcdir)/config/rs6000/rs6000-builtins.def
 
 rs6000-pcrel-opt.o: $(srcdir)/config/rs6000/rs6000-pcrel-opt.c
 	$(COMPILE) $<
@@ -59,10 +59,10 @@ build/rs6000-gen-builtins$(build_exeext): build/rs6000-gen-builtins.o \
 # For now, the header files depend on rs6000-builtins.c, which avoids
 # races because the .c file is closed last in rs6000-gen-builtins.c.
 rs6000-builtins.c: build/rs6000-gen-builtins$(build_exeext) \
-		   $(srcdir)/config/rs6000/rs6000-builtin-new.def \
+		   $(srcdir)/config/rs6000/rs6000-builtins.def \
 		   $(srcdir)/config/rs6000/rs6000-overload.def
 	$(RUN_GEN) ./build/rs6000-gen-builtins$(build_exeext) \
-		$(srcdir)/config/rs6000/rs6000-builtin-new.def \
+		$(srcdir)/config/rs6000/rs6000-builtins.def \
 		$(srcdir)/config/rs6000/rs6000-overload.def rs6000-builtins.h \
 		rs6000-builtins.c rs6000-vecdefines.h
 
-- 
2.27.0

[PATCH 4/6] rs6000: Remove rs6000-builtin.def and associated data and functions

[Bill Schmidt]

From: Bill Schmidt <wschmidt@linux.ibm.com>

Hi!

The old rs6000-builtin.def file is no longer needed.  Remove it and the code
that depends on it.

Bootstrapped and tested on powerpc64le-linux-gnu with no regressions.  Is this
okay for trunk?

Thanks!
Bill

2021-12-02  Bill Schmidt  <wschmidt@linux.ibm.com>

gcc/
	* config/rs6000/rs6000-builtin.def: Delete.
	* config/rs6000/rs6000-call.c (builtin_compatibility): Delete.
	(builtin_description): Delete.
	(builtin_hash_struct): Delete.
	(builtin_hasher): Delete.
	(builtin_hash_table): Delete.
	(builtin_hasher::hash): Delete.
	(builtin_hasher::equal): Delete.
	(rs6000_builtin_info_type): Delete.
	(rs6000_builtin_info): Delete.
	(bdesc_compat): Delete.
	(bdesc_3arg): Delete.
	(bdesc_4arg): Delete.
	(bdesc_dst): Delete.
	(bdesc_2arg): Delete.
	(bdesc_altivec_preds): Delete.
	(bdesc_abs): Delete.
	(bdesc_1arg): Delete.
	(bdesc_0arg): Delete.
	(bdesc_htm): Delete.
	(bdesc_mma): Delete.
	(rs6000_overloaded_builtin_p): Delete.
	(rs6000_overloaded_builtin_name): Delete.
	(htm_spr_num): Delete.
	(rs6000_builtin_is_supported_p): Delete.
	(rs6000_gimple_fold_mma_builtin): Delete.
	(gt-rs6000-call.h): Remove include directive.
	* config/rs6000/rs6000-protos.h (rs6000_overloaded_builtin_p): Delete.
	(rs6000_builtin_is_supported_p): Delete.
	(rs6000_overloaded_builtin_name): Delete.
	* config/rs6000/rs6000.c (rs6000_builtin_decls): Delete.
	(rs6000_debug_reg_global): Remove reference to RS6000_BUILTIN_COUNT.
	* config/rs6000/rs6000.h (rs6000_builtins): Delete.
	(altivec_builtin_types): Delete.
	(rs6000_builtin_decls): Delete.
	* config/rs6000/t-rs6000 (TM_H): Don't add rs6000-builtin.def.
---
 gcc/config/rs6000/rs6000-builtin.def | 3350 --------------------------
 gcc/config/rs6000/rs6000-call.c      |  712 ------
 gcc/config/rs6000/rs6000-protos.h    |    3 -
 gcc/config/rs6000/rs6000.c           |    3 -
 gcc/config/rs6000/rs6000.h           |   57 -
 gcc/config/rs6000/t-rs6000           |    1 -
 6 files changed, 4126 deletions(-)
 delete mode 100644 gcc/config/rs6000/rs6000-builtin.def

diff --git a/gcc/config/rs6000/rs6000-builtin.def b/gcc/config/rs6000/rs6000-builtin.def
deleted file mode 100644
index 9dbf16f48c4..00000000000
--- a/gcc/config/rs6000/rs6000-builtin.def
+++ /dev/null
@@ -1,3350 +0,0 @@
-/* Builtin functions for rs6000/powerpc.
-   Copyright (C) 2009-2021 Free Software Foundation, Inc.
-   Contributed by Michael Meissner (meissner@linux.vnet.ibm.com)
-
-   This file is part of GCC.
-
-   GCC is free software; you can redistribute it and/or modify it
-   under the terms of the GNU General Public License as published
-   by the Free Software Foundation; either version 3, or (at your
-   option) any later version.
-
-   GCC is distributed in the hope that it will be useful, but WITHOUT
-   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
-   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
-   License for more details.
-
-   Under Section 7 of GPL version 3, you are granted additional
-   permissions described in the GCC Runtime Library Exception, version
-   3.1, as published by the Free Software Foundation.
-
-   You should have received a copy of the GNU General Public License and
-   a copy of the GCC Runtime Library Exception along with this program;
-   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
-   <http://www.gnu.org/licenses/>.  */
-
-/* Before including this file, some macros must be defined:
-   RS6000_BUILTIN_0 -- 0 arg builtins
-   RS6000_BUILTIN_1 -- 1 arg builtins
-   RS6000_BUILTIN_2 -- 2 arg builtins
-   RS6000_BUILTIN_3 -- 3 arg builtins
-   RS6000_BUILTIN_4 -- 4 arg builtins
-   RS6000_BUILTIN_A -- ABS builtins
-   RS6000_BUILTIN_D -- DST builtins
-   RS6000_BUILTIN_H -- HTM builtins
-   RS6000_BUILTIN_M -- MMA builtins
-   RS6000_BUILTIN_P -- Altivec, VSX, ISA 2.07 vector predicate builtins
-   RS6000_BUILTIN_X -- special builtins
-
-   Each of the above macros takes 4 arguments:
-	ENUM	Enumeration name
-	NAME	String literal for the name
-	MASK	Mask of bits that indicate which options enables the builtin
-	ATTR	builtin attribute information.
-	ICODE	Insn code of the function that implements the builtin.  */
-
-#ifndef RS6000_BUILTIN_COMPAT
-  #undef BU_COMPAT
-  #define BU_COMPAT(ENUM, COMPAT_NAME)
-
-#ifndef RS6000_BUILTIN_0
-  #error "RS6000_BUILTIN_0 is not defined."
-#endif
-
-#ifndef RS6000_BUILTIN_1
-  #error "RS6000_BUILTIN_1 is not defined."
-#endif
-
-#ifndef RS6000_BUILTIN_2
-  #error "RS6000_BUILTIN_2 is not defined."
-#endif
-
-#ifndef RS6000_BUILTIN_3
-  #error "RS6000_BUILTIN_3 is not defined."
-#endif
-
-#ifndef RS6000_BUILTIN_4
-  #error "RS6000_BUILTIN_4 is not defined."
-#endif
-
-#ifndef RS6000_BUILTIN_A
-  #error "RS6000_BUILTIN_A is not defined."
-#endif
-
-#ifndef RS6000_BUILTIN_D
-  #error "RS6000_BUILTIN_D is not defined."
-#endif
-
-#ifndef RS6000_BUILTIN_H
-  #error "RS6000_BUILTIN_H is not defined."
-#endif
-
-#ifndef RS6000_BUILTIN_M
-  #error "RS6000_BUILTIN_M is not defined."
-#endif
-
-#ifndef RS6000_BUILTIN_P
-  #error "RS6000_BUILTIN_P is not defined."
-#endif
-
-#ifndef RS6000_BUILTIN_X
-  #error "RS6000_BUILTIN_X is not defined."
-#endif
-
-#else
-  /* Compatibility builtins.  These builtins are simply mapped into
-     their compatible builtin function identified by ENUM.  */
-  #undef BU_COMPAT
-  #define BU_COMPAT(ENUM, COMPAT_NAME) { ENUM, "__builtin_" COMPAT_NAME },
-
-  #undef RS6000_BUILTIN_0
-  #undef RS6000_BUILTIN_1
-  #undef RS6000_BUILTIN_2
-  #undef RS6000_BUILTIN_3
-  #undef RS6000_BUILTIN_4
-  #undef RS6000_BUILTIN_A
-  #undef RS6000_BUILTIN_D
-  #undef RS6000_BUILTIN_H
-  #undef RS6000_BUILTIN_M
-  #undef RS6000_BUILTIN_P
-  #undef RS6000_BUILTIN_X
-  #define RS6000_BUILTIN_0(ENUM, NAME, MASK, ATTR, ICODE)
-  #define RS6000_BUILTIN_1(ENUM, NAME, MASK, ATTR, ICODE)
-  #define RS6000_BUILTIN_2(ENUM, NAME, MASK, ATTR, ICODE)
-  #define RS6000_BUILTIN_3(ENUM, NAME, MASK, ATTR, ICODE)
-  #define RS6000_BUILTIN_4(ENUM, NAME, MASK, ATTR, ICODE)
-  #define RS6000_BUILTIN_A(ENUM, NAME, MASK, ATTR, ICODE)
-  #define RS6000_BUILTIN_D(ENUM, NAME, MASK, ATTR, ICODE)
-  #define RS6000_BUILTIN_H(ENUM, NAME, MASK, ATTR, ICODE)
-  #define RS6000_BUILTIN_M(ENUM, NAME, MASK, ATTR, ICODE)
-  #define RS6000_BUILTIN_P(ENUM, NAME, MASK, ATTR, ICODE)
-  #define RS6000_BUILTIN_X(ENUM, NAME, MASK, ATTR, ICODE)
-#endif
-
-#ifndef BU_AV_1
-/* Define convenience macros using token pasting to allow fitting everything in
-   one line.  */
-
-/* Altivec convenience macros.  */
-#define BU_ALTIVEC_1(ENUM, NAME, ATTR, ICODE)				\
-  RS6000_BUILTIN_1 (ALTIVEC_BUILTIN_ ## ENUM,		/* ENUM */	\
-		    "__builtin_altivec_" NAME,		/* NAME */	\
-		    RS6000_BTM_ALTIVEC,			/* MASK */	\
-		    (RS6000_BTC_ ## ATTR		/* ATTR */	\
-		     | RS6000_BTC_UNARY),				\
-		    CODE_FOR_ ## ICODE)			/* ICODE */
-
-#define BU_ALTIVEC_2(ENUM, NAME, ATTR, ICODE)				\
-  RS6000_BUILTIN_2 (ALTIVEC_BUILTIN_ ## ENUM,		/* ENUM */	\
-		    "__builtin_altivec_" NAME,		/* NAME */	\
-		    RS6000_BTM_ALTIVEC,			/* MASK */	\
-		    (RS6000_BTC_ ## ATTR		/* ATTR */	\
-		     | RS6000_BTC_BINARY),				\
-		    CODE_FOR_ ## ICODE)			/* ICODE */
-
-#define BU_ALTIVEC_3(ENUM, NAME, ATTR, ICODE)				\
-  RS6000_BUILTIN_3 (ALTIVEC_BUILTIN_ ## ENUM,		/* ENUM */	\
-		    "__builtin_altivec_" NAME,		/* NAME */	\
-		    RS6000_BTM_ALTIVEC,			/* MASK */	\
-		    (RS6000_BTC_ ## ATTR		/* ATTR */	\
-		     | RS6000_BTC_TERNARY),				\
-		    CODE_FOR_ ## ICODE)			/* ICODE */
-
-#define BU_ALTIVEC_A(ENUM, NAME, ATTR, ICODE)				\
-  RS6000_BUILTIN_A (ALTIVEC_BUILTIN_ ## ENUM,		/* ENUM */	\
-		    "__builtin_altivec_" NAME,		/* NAME */	\
-		    RS6000_BTM_ALTIVEC,			/* MASK */	\
-		    (RS6000_BTC_ ## ATTR		/* ATTR */	\
-		     | RS6000_BTC_ABS),					\
-		    CODE_FOR_ ## ICODE)			/* ICODE */
-
-#define BU_ALTIVEC_D(ENUM, NAME, ATTR, ICODE)				\
-  RS6000_BUILTIN_D (ALTIVEC_BUILTIN_ ## ENUM,		/* ENUM */	\
-		    "__builtin_altivec_" NAME,		/* NAME */	\
-		    RS6000_BTM_ALTIVEC,			/* MASK */	\
-		    (RS6000_BTC_ ## ATTR		/* ATTR */	\
-		     | RS6000_BTC_DST),					\
-		    CODE_FOR_ ## ICODE)			/* ICODE */
-
-/* All builtins defined with the RS6000_BUILTIN_P macro expect three
-   arguments, the first of which is an integer constant that clarifies
-   the implementation's use of CR6 flags.  The integer constant
-   argument may have four values: __CR6_EQ (0) means the predicate is
-   considered true if the equality-test flag of the CR6 condition
-   register is true following execution of the code identified by the
-   ICODE pattern, __CR_EQ_REV (1) means the predicate is considered
-   true if the equality-test flag is false, __CR6_LT (2) means the
-   predicate is considered true if the less-than-test flag is true, and
-   __CR6_LT_REV (3) means the predicate is considered true if the
-   less-than-test flag is false.  For all builtins defined by this
-   macro, the pattern selected by ICODE expects three operands, a
-   target and two inputs and is presumed to overwrite the flags of
-   condition register CR6 as a side effect of computing a result into
-   the target register.  However, the built-in invocation provides
-   four operands, a target, an integer constant mode, and two inputs.
-   The second and third operands of the built-in function's invocation
-   are automatically mapped into operands 1 and 2 of the pattern
-   identifed by the ICODE argument and additional code is emitted,
-   depending on the value of the constant integer first argument.
-   This special processing happens within the implementation of
-   altivec_expand_predicate_builtin(), which is defined within
-   rs6000.c.  The implementation of altivec_expand_predicate_builtin()
-   allocates a scratch register having the same mode as operand 0 to hold
-   the result produced by evaluating ICODE.  */
-
-#define BU_ALTIVEC_P(ENUM, NAME, ATTR, ICODE)				\
-  RS6000_BUILTIN_P (ALTIVEC_BUILTIN_ ## ENUM,		/* ENUM */	\
-		    "__builtin_altivec_" NAME,		/* NAME */	\
-		    RS6000_BTM_ALTIVEC,			/* MASK */	\
-		    (RS6000_BTC_ ## ATTR		/* ATTR */	\
-		     | RS6000_BTC_PREDICATE),				\
-		    CODE_FOR_ ## ICODE)			/* ICODE */
-
-#define BU_ALTIVEC_X(ENUM, NAME, ATTR)					\
-  RS6000_BUILTIN_X (ALTIVEC_BUILTIN_ ## ENUM,		/* ENUM */	\
-		    "__builtin_altivec_" NAME,		/* NAME */	\
-		    RS6000_BTM_ALTIVEC,			/* MASK */	\
-		    (RS6000_BTC_ ## ATTR		/* ATTR */	\
-		     | RS6000_BTC_SPECIAL),				\
-		    CODE_FOR_nothing)			/* ICODE */
-
-#define BU_ALTIVEC_C(ENUM, NAME, ATTR)					\
-  RS6000_BUILTIN_X (ALTIVEC_BUILTIN_ ## ENUM,		/* ENUM */	\
-		    "__builtin_altivec_" NAME,		/* NAME */	\
-		    (RS6000_BTM_ALTIVEC			/* MASK */	\
-		     | RS6000_BTM_CELL),				\
-		    (RS6000_BTC_ ## ATTR		/* ATTR */	\
-		     | RS6000_BTC_SPECIAL),				\
-		    CODE_FOR_nothing)			/* ICODE */
-
-/* Altivec overloaded builtin function macros.  */
-#define BU_ALTIVEC_OVERLOAD_1(ENUM, NAME)				\
-  RS6000_BUILTIN_1 (ALTIVEC_BUILTIN_VEC_ ## ENUM,	/* ENUM */	\
-		    "__builtin_vec_" NAME,		/* NAME */	\
-		    RS6000_BTM_ALTIVEC,			/* MASK */	\
-		    (RS6000_BTC_OVERLOADED		/* ATTR */	\
-		     | RS6000_BTC_UNARY),				\
-		    CODE_FOR_nothing)			/* ICODE */
-
-#define BU_ALTIVEC_OVERLOAD_2(ENUM, NAME)				\
-  RS6000_BUILTIN_2 (ALTIVEC_BUILTIN_VEC_ ## ENUM,	/* ENUM */	\
-		    "__builtin_vec_" NAME,		/* NAME */	\
-		    RS6000_BTM_ALTIVEC,			/* MASK */	\
-		    (RS6000_BTC_OVERLOADED		/* ATTR */	\
-		     | RS6000_BTC_BINARY),				\
-		    CODE_FOR_nothing)			/* ICODE */
-
-#define BU_ALTIVEC_OVERLOAD_3(ENUM, NAME)				\
-  RS6000_BUILTIN_3 (ALTIVEC_BUILTIN_VEC_ ## ENUM,	/* ENUM */	\
-		    "__builtin_vec_" NAME,		/* NAME */	\
-		    RS6000_BTM_ALTIVEC,			/* MASK */	\
-		    (RS6000_BTC_OVERLOADED		/* ATTR */	\
-		     | RS6000_BTC_TERNARY),				\
-		    CODE_FOR_nothing)			/* ICODE */
-
-#define BU_ALTIVEC_OVERLOAD_A(ENUM, NAME)				\
-  RS6000_BUILTIN_A (ALTIVEC_BUILTIN_VEC_ ## ENUM,	/* ENUM */	\
-		    "__builtin_vec_" NAME,		/* NAME */	\
-		    RS6000_BTM_ALTIVEC,			/* MASK */	\
-		    (RS6000_BTC_OVERLOADED		/* ATTR */	\
-		     | RS6000_BTC_ABS),					\
-		    CODE_FOR_nothing)			/* ICODE */
-
-#define BU_ALTIVEC_OVERLOAD_D(ENUM, NAME)				\
-  RS6000_BUILTIN_D (ALTIVEC_BUILTIN_VEC_ ## ENUM,	/* ENUM */	\
-		    "__builtin_vec_" NAME,		/* NAME */	\
-		    RS6000_BTM_ALTIVEC,			/* MASK */	\
-		    (RS6000_BTC_OVERLOADED		/* ATTR */	\
-		     | RS6000_BTC_DST),					\
-		    CODE_FOR_nothing)			/* ICODE */
-
-/* See the comment on BU_ALTIVEC_P.  */
-#define BU_ALTIVEC_OVERLOAD_P(ENUM, NAME)				\
-  RS6000_BUILTIN_P (ALTIVEC_BUILTIN_VEC_ ## ENUM,	/* ENUM */	\
-		    "__builtin_vec_" NAME,		/* NAME */	\
-		    RS6000_BTM_ALTIVEC,			/* MASK */	\
-		    (RS6000_BTC_OVERLOADED		/* ATTR */	\
-		     | RS6000_BTC_PREDICATE),				\
-		    CODE_FOR_nothing)			/* ICODE */
-
-#define BU_ALTIVEC_OVERLOAD_X(ENUM, NAME)				\
-  RS6000_BUILTIN_X (ALTIVEC_BUILTIN_VEC_ ## ENUM,	/* ENUM */	\
-		    "__builtin_vec_" NAME,		/* NAME */	\
-		    RS6000_BTM_ALTIVEC,			/* MASK */	\
-		    (RS6000_BTC_OVERLOADED		/* ATTR */	\
-		     | RS6000_BTC_SPECIAL),				\
-		    CODE_FOR_nothing)			/* ICODE */
-
-/* VSX convenience macros.  */
-#define BU_VSX_1(ENUM, NAME, ATTR, ICODE)				\
-  RS6000_BUILTIN_1 (VSX_BUILTIN_ ## ENUM,		/* ENUM */	\
-		    "__builtin_vsx_" NAME,		/* NAME */	\
-		    RS6000_BTM_VSX,			/* MASK */	\
-		    (RS6000_BTC_ ## ATTR		/* ATTR */	\
-		     | RS6000_BTC_UNARY),				\
-		    CODE_FOR_ ## ICODE)			/* ICODE */
-
-#define BU_VSX_2(ENUM, NAME, ATTR, ICODE)				\
-  RS6000_BUILTIN_2 (VSX_BUILTIN_ ## ENUM,		/* ENUM */	\
-		    "__builtin_vsx_" NAME,		/* NAME */	\
-		    RS6000_BTM_VSX,			/* MASK */	\
-		    (RS6000_BTC_ ## ATTR		/* ATTR */	\
-		     | RS6000_BTC_BINARY),				\
-		    CODE_FOR_ ## ICODE)			/* ICODE */
-
-#define BU_VSX_3(ENUM, NAME, ATTR, ICODE)				\
-  RS6000_BUILTIN_3 (VSX_BUILTIN_ ## ENUM,		/* ENUM */	\
-		    "__builtin_vsx_" NAME,		/* NAME */	\
-		    RS6000_BTM_VSX,			/* MASK */	\
-		    (RS6000_BTC_ ## ATTR		/* ATTR */	\
-		     | RS6000_BTC_TERNARY),				\
-		    CODE_FOR_ ## ICODE)			/* ICODE */
-
-#define BU_VSX_A(ENUM, NAME, ATTR, ICODE)				\
-  RS6000_BUILTIN_A (VSX_BUILTIN_ ## ENUM,		/* ENUM */	\
-		    "__builtin_vsx_" NAME,		/* NAME */	\
-		    RS6000_BTM_VSX,			/* MASK */	\
-		    (RS6000_BTC_ ## ATTR		/* ATTR */	\
-		     | RS6000_BTC_ABS),					\
-		    CODE_FOR_ ## ICODE)			/* ICODE */
-
-/* See the comment on BU_ALTIVEC_P.  */
-#define BU_VSX_P(ENUM, NAME, ATTR, ICODE)				\
-  RS6000_BUILTIN_P (VSX_BUILTIN_ ## ENUM,		/* ENUM */	\
-		    "__builtin_vsx_" NAME,		/* NAME */	\
-		    RS6000_BTM_VSX,			/* MASK */	\
-		    (RS6000_BTC_ ## ATTR		/* ATTR */	\
-		     | RS6000_BTC_PREDICATE),				\
-		    CODE_FOR_ ## ICODE)			/* ICODE */
-
-#define BU_VSX_X(ENUM, NAME, ATTR)					\
-  RS6000_BUILTIN_X (VSX_BUILTIN_ ## ENUM,		/* ENUM */	\
-		    "__builtin_vsx_" NAME,		/* NAME */	\
-		    RS6000_BTM_VSX,			/* MASK */	\
-		    (RS6000_BTC_ ## ATTR		/* ATTR */	\
-		     | RS6000_BTC_SPECIAL),				\
-		    CODE_FOR_nothing)			/* ICODE */
-
-/* VSX overloaded builtin function macros.  */
-#define BU_VSX_OVERLOAD_1(ENUM, NAME)					\
-  RS6000_BUILTIN_1 (VSX_BUILTIN_VEC_ ## ENUM,		/* ENUM */	\
-		    "__builtin_vec_" NAME,		/* NAME */	\
-		    RS6000_BTM_VSX,			/* MASK */	\
-		    (RS6000_BTC_OVERLOADED		/* ATTR */	\
-		     | RS6000_BTC_UNARY),				\
-		    CODE_FOR_nothing)			/* ICODE */
-
-#define BU_VSX_OVERLOAD_2(ENUM, NAME)					\
-  RS6000_BUILTIN_2 (VSX_BUILTIN_VEC_ ## ENUM,		/* ENUM */	\
-		    "__builtin_vec_" NAME,		/* NAME */	\
-		    RS6000_BTM_VSX,			/* MASK */	\
-		    (RS6000_BTC_OVERLOADED		/* ATTR */	\
-		     | RS6000_BTC_BINARY),				\
-		    CODE_FOR_nothing)			/* ICODE */
-
-#define BU_VSX_OVERLOAD_3(ENUM, NAME)					\
-  RS6000_BUILTIN_3 (VSX_BUILTIN_VEC_ ## ENUM,		/* ENUM */	\
-		    "__builtin_vec_" NAME,		/* NAME */	\
-		    RS6000_BTM_VSX,			/* MASK */	\
-		    (RS6000_BTC_OVERLOADED		/* ATTR */	\
-		     | RS6000_BTC_TERNARY),				\
-		    CODE_FOR_nothing)			/* ICODE */
-
-/* xxpermdi and xxsldwi are overloaded functions, but had __builtin_vsx names
-   instead of __builtin_vec.  */
-#define BU_VSX_OVERLOAD_3V(ENUM, NAME)					\
-  RS6000_BUILTIN_3 (VSX_BUILTIN_VEC_ ## ENUM,		/* ENUM */	\
-		    "__builtin_vsx_" NAME,		/* NAME */	\
-		    RS6000_BTM_VSX,			/* MASK */	\
-		    (RS6000_BTC_OVERLOADED		/* ATTR */	\
-		     | RS6000_BTC_TERNARY),				\
-		    CODE_FOR_nothing)			/* ICODE */
-
-#define BU_VSX_OVERLOAD_X(ENUM, NAME)					\
-  RS6000_BUILTIN_X (VSX_BUILTIN_VEC_ ## ENUM,		/* ENUM */	\
-		    "__builtin_vec_" NAME,		/* NAME */	\
-		    RS6000_BTM_VSX,			/* MASK */	\
-		    (RS6000_BTC_OVERLOADED		/* ATTR */	\
-		     | RS6000_BTC_SPECIAL),				\
-		    CODE_FOR_nothing)			/* ICODE */
-
-/* MMA convenience macros.  */
-
-#define BU_MMA_1(ENUM, NAME, ATTR, ICODE)				\
-  RS6000_BUILTIN_M (MMA_BUILTIN_ ## ENUM,		/* ENUM */	\
-		    "__builtin_mma_" NAME,		/* NAME */	\
-		    RS6000_BTM_MMA,			/* MASK */	\
-		    (RS6000_BTC_ ## ATTR		/* ATTR */	\
-		     | RS6000_BTC_UNARY					\
-		     | RS6000_BTC_VOID					\
-		     | RS6000_BTC_GIMPLE),				\
-		    CODE_FOR_nothing)			/* ICODE */	\
-  RS6000_BUILTIN_M (MMA_BUILTIN_ ## ENUM ## _INTERNAL,	/* ENUM */	\
-		    "__builtin_mma_" NAME "_internal",	/* NAME */	\
-		    RS6000_BTM_MMA,			/* MASK */	\
-		    (RS6000_BTC_ ## ATTR		/* ATTR */	\
-		     | RS6000_BTC_UNARY),				\
-		    CODE_FOR_ ## ICODE)			/* ICODE */
-
-#define BU_MMA_2(ENUM, NAME, ATTR, ICODE)				\
-  RS6000_BUILTIN_M (MMA_BUILTIN_ ## ENUM,		/* ENUM */	\
-		    "__builtin_mma_" NAME,		/* NAME */	\
-		    RS6000_BTM_MMA,			/* MASK */	\
-		    (RS6000_BTC_ ## ATTR		/* ATTR */	\
-		     | RS6000_BTC_BINARY				\
-		     | RS6000_BTC_VOID					\
-		     | RS6000_BTC_GIMPLE),				\
-		    CODE_FOR_nothing)			/* ICODE */	\
-  RS6000_BUILTIN_M (MMA_BUILTIN_ ## ENUM ## _INTERNAL,	/* ENUM */	\
-		    "__builtin_mma_" NAME "_internal",	/* NAME */	\
-		    RS6000_BTM_MMA,			/* MASK */	\
-		    (RS6000_BTC_ ## ATTR		/* ATTR */	\
-		     | RS6000_BTC_BINARY),				\
-		    CODE_FOR_ ## ICODE)			/* ICODE */
-
-/* Like BU_MMA_2, but uses "vsx" rather than "mma" naming.  */
-#define BU_MMA_V2(ENUM, NAME, ATTR, ICODE)				\
-  RS6000_BUILTIN_M (VSX_BUILTIN_ ## ENUM,		/* ENUM */	\
-		    "__builtin_vsx_" NAME,		/* NAME */	\
-		    RS6000_BTM_MMA,			/* MASK */	\
-		    (RS6000_BTC_ ## ATTR		/* ATTR */	\
-		     | RS6000_BTC_BINARY				\
-		     | RS6000_BTC_VOID					\
-		     | RS6000_BTC_GIMPLE),				\
-		    CODE_FOR_nothing)			/* ICODE */	\
-  RS6000_BUILTIN_M (VSX_BUILTIN_ ## ENUM ## _INTERNAL,	/* ENUM */	\
-		    "__builtin_vsx_" NAME "_internal",	/* NAME */	\
-		    RS6000_BTM_MMA,			/* MASK */	\
-		    (RS6000_BTC_ ## ATTR		/* ATTR */	\
-		     | RS6000_BTC_BINARY),				\
-		    CODE_FOR_ ## ICODE)			/* ICODE */
-
-#define BU_MMA_3(ENUM, NAME, ATTR, ICODE)				\
-  RS6000_BUILTIN_M (MMA_BUILTIN_ ## ENUM,		/* ENUM */	\
-		    "__builtin_mma_" NAME,		/* NAME */	\
-		    RS6000_BTM_MMA,			/* MASK */	\
-		    (RS6000_BTC_ ## ATTR		/* ATTR */	\
-		     | RS6000_BTC_TERNARY				\
-		     | RS6000_BTC_VOID					\
-		     | RS6000_BTC_GIMPLE),				\
-		    CODE_FOR_nothing)			/* ICODE */	\
-  RS6000_BUILTIN_M (MMA_BUILTIN_ ## ENUM ## _INTERNAL,	/* ENUM */	\
-		    "__builtin_mma_" NAME "_internal",	/* NAME */	\
-		    RS6000_BTM_MMA,			/* MASK */	\
-		    (RS6000_BTC_ ## ATTR		/* ATTR */	\
-		     | RS6000_BTC_TERNARY),				\
-		    CODE_FOR_ ## ICODE)			/* ICODE */
-
-/* Like BU_MMA_3, but uses "vsx" rather than "mma" naming.  */
-#define BU_MMA_V3(ENUM, NAME, ATTR, ICODE)				\
-  RS6000_BUILTIN_M (VSX_BUILTIN_ ## ENUM,		/* ENUM */	\
-		    "__builtin_vsx_" NAME,		/* NAME */	\
-		    RS6000_BTM_MMA,			/* MASK */	\
-		    (RS6000_BTC_ ## ATTR		/* ATTR */	\
-		     | RS6000_BTC_TERNARY				\
-		     | RS6000_BTC_VOID					\
-		     | RS6000_BTC_GIMPLE),				\
-		    CODE_FOR_nothing)			/* ICODE */	\
-  RS6000_BUILTIN_M (VSX_BUILTIN_ ## ENUM ## _INTERNAL,	/* ENUM */	\
-		    "__builtin_vsx_" NAME "_internal",	/* NAME */	\
-		    RS6000_BTM_MMA,			/* MASK */	\
-		    (RS6000_BTC_ ## ATTR		/* ATTR */	\
-		     | RS6000_BTC_TERNARY),				\
-		    CODE_FOR_ ## ICODE)			/* ICODE */
-
-#define BU_MMA_5(ENUM, NAME, ATTR, ICODE)				\
-  RS6000_BUILTIN_M (MMA_BUILTIN_ ## ENUM,		/* ENUM */	\
-		    "__builtin_mma_" NAME,		/* NAME */	\
-		    RS6000_BTM_MMA,			/* MASK */	\
-		    (RS6000_BTC_ ## ATTR		/* ATTR */	\
-		     | RS6000_BTC_QUINARY				\
-		     | RS6000_BTC_VOID					\
-		     | RS6000_BTC_GIMPLE),				\
-		    CODE_FOR_nothing)			/* ICODE */	\
-  RS6000_BUILTIN_M (MMA_BUILTIN_ ## ENUM ## _INTERNAL,	/* ENUM */	\
-		    "__builtin_mma_" NAME "_internal",	/* NAME */	\
-		    RS6000_BTM_MMA,			/* MASK */	\
-		    (RS6000_BTC_ ## ATTR		/* ATTR */	\
-		     | RS6000_BTC_QUINARY),				\
-		    CODE_FOR_ ## ICODE)			/* ICODE */
-
-#define BU_MMA_6(ENUM, NAME, ATTR, ICODE)				\
-  RS6000_BUILTIN_M (MMA_BUILTIN_ ## ENUM,		/* ENUM */	\
-		    "__builtin_mma_" NAME,		/* NAME */	\
-		    RS6000_BTM_MMA,			/* MASK */	\
-		    (RS6000_BTC_ ## ATTR		/* ATTR */	\
-		     | RS6000_BTC_SENARY				\
-		     | RS6000_BTC_VOID					\
-		     | RS6000_BTC_GIMPLE),				\
-		    CODE_FOR_nothing)			/* ICODE */	\
-  RS6000_BUILTIN_M (MMA_BUILTIN_ ## ENUM ## _INTERNAL,	/* ENUM */	\
-		    "__builtin_mma_" NAME "_internal",	/* NAME */	\
-		    RS6000_BTM_MMA,			/* MASK */	\
-		    (RS6000_BTC_ ## ATTR		/* ATTR */	\
-		     | RS6000_BTC_SENARY),				\
-		    CODE_FOR_ ## ICODE)			/* ICODE */
-
-#define BU_MMA_PAIR_LD(ENUM, NAME, ATTR)				\
-  RS6000_BUILTIN_M (VSX_BUILTIN_ ## ENUM,		/* ENUM */	\
-		    "__builtin_vsx_" NAME,		/* NAME */	\
-		    RS6000_BTM_MMA,			/* MASK */	\
-		    (RS6000_BTC_ ## ATTR		/* ATTR */	\
-		     | RS6000_BTC_BINARY				\
-		     | RS6000_BTC_GIMPLE),				\
-		    CODE_FOR_nothing)			/* ICODE */
-
-#define BU_MMA_PAIR_ST(ENUM, NAME, ATTR)				\
-  RS6000_BUILTIN_M (VSX_BUILTIN_ ## ENUM,		/* ENUM */	\
-		    "__builtin_vsx_" NAME,		/* NAME */	\
-		    RS6000_BTM_MMA,			/* MASK */	\
-		    (RS6000_BTC_ ## ATTR		/* ATTR */	\
-		     | RS6000_BTC_TERNARY				\
-		     | RS6000_BTC_VOID					\
-		     | RS6000_BTC_GIMPLE),				\
-		    CODE_FOR_nothing)			/* ICODE */
-
-/* ISA 2.05 (power6) convenience macros. */
-/* For functions that depend on the CMPB instruction */
-#define BU_P6_2(ENUM, NAME, ATTR, ICODE)				\
-  RS6000_BUILTIN_2 (P6_BUILTIN_ ## ENUM,		/* ENUM */	\
-		    "__builtin_p6_" NAME,		/* NAME */	\
-		    RS6000_BTM_CMPB,			/* MASK */	\
-		    (RS6000_BTC_ ## ATTR		/* ATTR */	\
-		     | RS6000_BTC_BINARY),				\
-		    CODE_FOR_ ## ICODE)			/* ICODE */
-
-/* For functions that depend on 64-BIT support and on the CMPB instruction */
-#define BU_P6_64BIT_2(ENUM, NAME, ATTR, ICODE)			\
-  RS6000_BUILTIN_2 (P6_BUILTIN_ ## ENUM,		/* ENUM */	\
-		    "__builtin_p6_" NAME,		/* NAME */	\
-		    RS6000_BTM_CMPB			   		\
-		      | RS6000_BTM_64BIT,		/* MASK */	\
-		    (RS6000_BTC_ ## ATTR		/* ATTR */	\
-		     | RS6000_BTC_BINARY),				\
-		    CODE_FOR_ ## ICODE)			/* ICODE */
-
-#define BU_P6_OVERLOAD_2(ENUM, NAME)					\
-  RS6000_BUILTIN_2 (P6_OV_BUILTIN_ ## ENUM,		/* ENUM */	\
-		    "__builtin_" NAME,			/* NAME */	\
-		    RS6000_BTM_CMPB,			/* MASK */	\
-		    (RS6000_BTC_OVERLOADED		/* ATTR */	\
-		     | RS6000_BTC_BINARY),				\
-		    CODE_FOR_nothing)			/* ICODE */
-
-/* ISA 2.07 (power8) vector convenience macros.  */
-/* For the instructions that are encoded as altivec instructions use
-   __builtin_altivec_ as the builtin name.  */
-#define BU_P8V_AV_1(ENUM, NAME, ATTR, ICODE)				\
-  RS6000_BUILTIN_1 (P8V_BUILTIN_ ## ENUM,		/* ENUM */	\
-		    "__builtin_altivec_" NAME,		/* NAME */	\
-		    RS6000_BTM_P8_VECTOR,		/* MASK */	\
-		    (RS6000_BTC_ ## ATTR		/* ATTR */	\
-		     | RS6000_BTC_UNARY),				\
-		    CODE_FOR_ ## ICODE)			/* ICODE */
-
-#define BU_P8V_AV_2(ENUM, NAME, ATTR, ICODE)				\
-  RS6000_BUILTIN_2 (P8V_BUILTIN_ ## ENUM,		/* ENUM */	\
-		    "__builtin_altivec_" NAME,		/* NAME */	\
-		    RS6000_BTM_P8_VECTOR,		/* MASK */	\
-		    (RS6000_BTC_ ## ATTR		/* ATTR */	\
-		     | RS6000_BTC_BINARY),				\
-		    CODE_FOR_ ## ICODE)			/* ICODE */
-
-#define BU_P8V_AV_3(ENUM, NAME, ATTR, ICODE)				\
-  RS6000_BUILTIN_3 (P8V_BUILTIN_ ## ENUM,		/* ENUM */	\
-		    "__builtin_altivec_" NAME,		/* NAME */	\
-		    RS6000_BTM_P8_VECTOR,		/* MASK */	\
-		    (RS6000_BTC_ ## ATTR		/* ATTR */	\
-		     | RS6000_BTC_TERNARY),				\
-		    CODE_FOR_ ## ICODE)			/* ICODE */
-
-/* See the comment on BU_ALTIVEC_P.  */
-#define BU_P8V_AV_P(ENUM, NAME, ATTR, ICODE)				\
-  RS6000_BUILTIN_P (P8V_BUILTIN_ ## ENUM,		/* ENUM */	\
-		    "__builtin_altivec_" NAME,		/* NAME */	\
-		    RS6000_BTM_P8_VECTOR,		/* MASK */	\
-		    (RS6000_BTC_ ## ATTR		/* ATTR */	\
-		     | RS6000_BTC_PREDICATE),				\
-		    CODE_FOR_ ## ICODE)			/* ICODE */
-
-/* For the instructions encoded as VSX instructions use __builtin_vsx as the
-   builtin name.  */
-#define BU_P8V_VSX_1(ENUM, NAME, ATTR, ICODE)				\
-  RS6000_BUILTIN_1 (P8V_BUILTIN_ ## ENUM,		/* ENUM */	\
-		    "__builtin_vsx_" NAME,		/* NAME */	\
-		    RS6000_BTM_P8_VECTOR,		/* MASK */	\
-		    (RS6000_BTC_ ## ATTR		/* ATTR */	\
-		     | RS6000_BTC_UNARY),				\
-		    CODE_FOR_ ## ICODE)			/* ICODE */
-
-#define BU_P8V_VSX_2(ENUM, NAME, ATTR, ICODE)				\
-  RS6000_BUILTIN_2 (P8V_BUILTIN_ ## ENUM,		/* ENUM */	\
-		    "__builtin_vsx_" NAME,		/* NAME */	\
-		    RS6000_BTM_P8_VECTOR,		/* MASK */	\
-		    (RS6000_BTC_ ## ATTR		/* ATTR */	\
-		     | RS6000_BTC_BINARY),				\
-		    CODE_FOR_ ## ICODE)			/* ICODE */
-
-#define BU_P8V_OVERLOAD_1(ENUM, NAME)					\
-  RS6000_BUILTIN_1 (P8V_BUILTIN_VEC_ ## ENUM,		/* ENUM */	\
-		    "__builtin_vec_" NAME,		/* NAME */	\
-		    RS6000_BTM_P8_VECTOR,		/* MASK */	\
-		    (RS6000_BTC_OVERLOADED		/* ATTR */	\
-		     | RS6000_BTC_UNARY),				\
-		    CODE_FOR_nothing)			/* ICODE */
-
-#define BU_P8V_OVERLOAD_2(ENUM, NAME)					\
-  RS6000_BUILTIN_2 (P8V_BUILTIN_VEC_ ## ENUM,		/* ENUM */	\
-		    "__builtin_vec_" NAME,		/* NAME */	\
-		    RS6000_BTM_P8_VECTOR,		/* MASK */	\
-		    (RS6000_BTC_OVERLOADED		/* ATTR */	\
-		     | RS6000_BTC_BINARY),				\
-		    CODE_FOR_nothing)			/* ICODE */
-
-#define BU_P8V_OVERLOAD_3(ENUM, NAME)					\
-  RS6000_BUILTIN_3 (P8V_BUILTIN_VEC_ ## ENUM,		/* ENUM */	\
-		    "__builtin_vec_" NAME,		/* NAME */	\
-		    RS6000_BTM_P8_VECTOR,		/* MASK */	\
-		    (RS6000_BTC_OVERLOADED		/* ATTR */	\
-		     | RS6000_BTC_TERNARY),				\
-		    CODE_FOR_nothing)			/* ICODE */
-
-/* Crypto convenience macros.  */
-#define BU_CRYPTO_1(ENUM, NAME, ATTR, ICODE)				\
-  RS6000_BUILTIN_1 (CRYPTO_BUILTIN_ ## ENUM,		/* ENUM */	\
-		    "__builtin_crypto_" NAME,		/* NAME */	\
-		    RS6000_BTM_CRYPTO,			/* MASK */	\
-		    (RS6000_BTC_ ## ATTR		/* ATTR */	\
-		     | RS6000_BTC_UNARY),				\
-		    CODE_FOR_ ## ICODE)			/* ICODE */
-
-#define BU_CRYPTO_2(ENUM, NAME, ATTR, ICODE)				\
-  RS6000_BUILTIN_2 (CRYPTO_BUILTIN_ ## ENUM,		/* ENUM */	\
-		    "__builtin_crypto_" NAME,		/* NAME */	\
-		    RS6000_BTM_CRYPTO,			/* MASK */	\
-		    (RS6000_BTC_ ## ATTR		/* ATTR */	\
-		     | RS6000_BTC_BINARY),				\
-		    CODE_FOR_ ## ICODE)			/* ICODE */
-
-#define BU_CRYPTO_2A(ENUM, NAME, ATTR, ICODE)				\
-  RS6000_BUILTIN_2 (CRYPTO_BUILTIN_ ## ENUM,		/* ENUM */	\
-		    "__builtin_crypto_" NAME,		/* NAME */	\
-		    RS6000_BTM_P8_VECTOR,		/* MASK */	\
-		    (RS6000_BTC_ ## ATTR		/* ATTR */	\
-		     | RS6000_BTC_BINARY),				\
-		    CODE_FOR_ ## ICODE)			/* ICODE */
-
-#define BU_CRYPTO_3(ENUM, NAME, ATTR, ICODE)				\
-  RS6000_BUILTIN_3 (CRYPTO_BUILTIN_ ## ENUM,		/* ENUM */	\
-		    "__builtin_crypto_" NAME,		/* NAME */	\
-		    RS6000_BTM_CRYPTO,			/* MASK */	\
-		    (RS6000_BTC_ ## ATTR		/* ATTR */	\
-		     | RS6000_BTC_TERNARY),				\
-		    CODE_FOR_ ## ICODE)			/* ICODE */
-
-#define BU_CRYPTO_3A(ENUM, NAME, ATTR, ICODE)				\
-  RS6000_BUILTIN_3 (CRYPTO_BUILTIN_ ## ENUM,		/* ENUM */	\
-		    "__builtin_crypto_" NAME,		/* NAME */	\
-		    RS6000_BTM_P8_VECTOR,		/* MASK */	\
-		    (RS6000_BTC_ ## ATTR		/* ATTR */	\
-		     | RS6000_BTC_TERNARY),				\
-		    CODE_FOR_ ## ICODE)			/* ICODE */
-
-#define BU_CRYPTO_OVERLOAD_1(ENUM, NAME)				\
-  RS6000_BUILTIN_1 (CRYPTO_BUILTIN_ ## ENUM,		/* ENUM */	\
-		    "__builtin_crypto_" NAME,		/* NAME */	\
-		    RS6000_BTM_CRYPTO,			/* MASK */	\
-		    (RS6000_BTC_OVERLOADED		/* ATTR */	\
-		     | RS6000_BTC_UNARY),				\
-		    CODE_FOR_nothing)			/* ICODE */
-
-#define BU_CRYPTO_OVERLOAD_2A(ENUM, NAME)				\
-  RS6000_BUILTIN_2 (CRYPTO_BUILTIN_ ## ENUM,		/* ENUM */	\
-		    "__builtin_crypto_" NAME,		/* NAME */	\
-		    RS6000_BTM_P8_VECTOR,		/* MASK */	\
-		    (RS6000_BTC_OVERLOADED		/* ATTR */	\
-		     | RS6000_BTC_BINARY),				\
-		    CODE_FOR_nothing)			/* ICODE */
-
-#define BU_CRYPTO_OVERLOAD_3(ENUM, NAME)				\
-  RS6000_BUILTIN_3 (CRYPTO_BUILTIN_ ## ENUM,		/* ENUM */	\
-		    "__builtin_crypto_" NAME,		/* NAME */	\
-		    RS6000_BTM_CRYPTO,			/* MASK */	\
-		    (RS6000_BTC_OVERLOADED		/* ATTR */	\
-		     | RS6000_BTC_TERNARY),				\
-		    CODE_FOR_nothing)			/* ICODE */
-
-#define BU_CRYPTO_OVERLOAD_3A(ENUM, NAME)				\
-  RS6000_BUILTIN_3 (CRYPTO_BUILTIN_ ## ENUM,		/* ENUM */	\
-		    "__builtin_crypto_" NAME,		/* NAME */	\
-		    RS6000_BTM_P8_VECTOR,		/* MASK */	\
-		    (RS6000_BTC_OVERLOADED		/* ATTR */	\
-		     | RS6000_BTC_TERNARY),				\
-		    CODE_FOR_nothing)			/* ICODE */
-
-/* HTM convenience macros.  */
-#define BU_HTM_0(ENUM, NAME, ATTR, ICODE)				\
-  RS6000_BUILTIN_H (HTM_BUILTIN_ ## ENUM,		/* ENUM */	\
-		    "__builtin_" NAME,			/* NAME */	\
-		    RS6000_BTM_HTM,			/* MASK */	\
-		    RS6000_BTC_ ## ATTR,		/* ATTR */	\
-		    CODE_FOR_ ## ICODE)			/* ICODE */
-
-#define BU_HTM_1(ENUM, NAME, ATTR, ICODE)				\
-  RS6000_BUILTIN_H (HTM_BUILTIN_ ## ENUM,		/* ENUM */	\
-		    "__builtin_" NAME,			/* NAME */	\
-		    RS6000_BTM_HTM,			/* MASK */	\
-		    (RS6000_BTC_ ## ATTR		/* ATTR */	\
-		     | RS6000_BTC_UNARY),				\
-		    CODE_FOR_ ## ICODE)			/* ICODE */
-
-#define BU_HTM_2(ENUM, NAME, ATTR, ICODE)				\
-  RS6000_BUILTIN_H (HTM_BUILTIN_ ## ENUM,		/* ENUM */	\
-		    "__builtin_" NAME,			/* NAME */	\
-		    RS6000_BTM_HTM,			/* MASK */	\
-		    (RS6000_BTC_ ## ATTR		/* ATTR */	\
-		     | RS6000_BTC_BINARY),				\
-		    CODE_FOR_ ## ICODE)			/* ICODE */
-
-#define BU_HTM_3(ENUM, NAME, ATTR, ICODE)				\
-  RS6000_BUILTIN_H (HTM_BUILTIN_ ## ENUM,		/* ENUM */	\
-		    "__builtin_" NAME,			/* NAME */	\
-		    RS6000_BTM_HTM,			/* MASK */	\
-		    (RS6000_BTC_ ## ATTR		/* ATTR */	\
-		     | RS6000_BTC_TERNARY),				\
-		    CODE_FOR_ ## ICODE)			/* ICODE */
-
-#define BU_HTM_V1(ENUM, NAME, ATTR, ICODE)				\
-  RS6000_BUILTIN_H (HTM_BUILTIN_ ## ENUM,		/* ENUM */	\
-		    "__builtin_" NAME,			/* NAME */	\
-		    RS6000_BTM_HTM,			/* MASK */	\
-		    (RS6000_BTC_ ## ATTR		/* ATTR */	\
-		     | RS6000_BTC_UNARY					\
-		     | RS6000_BTC_VOID),				\
-		    CODE_FOR_ ## ICODE)			/* ICODE */
-
-#define BU_SPECIAL_X(ENUM, NAME, MASK, ATTR)				\
-  RS6000_BUILTIN_X (ENUM,				/* ENUM */	\
-		    NAME,				/* NAME */	\
-		    MASK,				/* MASK */	\
-		    (ATTR | RS6000_BTC_SPECIAL),	/* ATTR */	\
-		    CODE_FOR_nothing)			/* ICODE */
-
-
-/* Decimal floating point builtins for instructions.  */
-#define BU_DFP_MISC_1(ENUM, NAME, ATTR, ICODE)				\
-  RS6000_BUILTIN_1 (MISC_BUILTIN_ ## ENUM,		/* ENUM */	\
-		    "__builtin_" NAME,			/* NAME */	\
-		    RS6000_BTM_DFP,			/* MASK */	\
-		    (RS6000_BTC_ ## ATTR		/* ATTR */	\
-		     | RS6000_BTC_UNARY),				\
-		    CODE_FOR_ ## ICODE)			/* ICODE */
-
-#define BU_DFP_MISC_2(ENUM, NAME, ATTR, ICODE)				\
-  RS6000_BUILTIN_2 (MISC_BUILTIN_ ## ENUM,		/* ENUM */	\
-		    "__builtin_" NAME,			/* NAME */	\
-		    RS6000_BTM_DFP,			/* MASK */	\
-		    (RS6000_BTC_ ## ATTR		/* ATTR */	\
-		     | RS6000_BTC_BINARY),				\
-		    CODE_FOR_ ## ICODE)			/* ICODE */
-
-/* Miscellaneous builtins for instructions added in ISA 2.06.  These
-   instructions don't require either the DFP or VSX options, just the basic ISA
-   2.06 (popcntd) enablement since they operate on general purpose
-   registers.  */
-#define BU_P7_MISC_1(ENUM, NAME, ATTR, ICODE)				\
-  RS6000_BUILTIN_1 (MISC_BUILTIN_ ## ENUM,		/* ENUM */	\
-		    "__builtin_" NAME,			/* NAME */	\
-		    RS6000_BTM_POPCNTD,			/* MASK */	\
-		    (RS6000_BTC_ ## ATTR		/* ATTR */	\
-		     | RS6000_BTC_UNARY),				\
-		    CODE_FOR_ ## ICODE)			/* ICODE */
-
-#define BU_P7_MISC_2(ENUM, NAME, ATTR, ICODE)				\
-  RS6000_BUILTIN_2 (MISC_BUILTIN_ ## ENUM,		/* ENUM */	\
-		    "__builtin_" NAME,			/* NAME */	\
-		    RS6000_BTM_POPCNTD,			/* MASK */	\
-		    (RS6000_BTC_ ## ATTR		/* ATTR */	\
-		     | RS6000_BTC_BINARY),				\
-		    CODE_FOR_ ## ICODE)			/* ICODE */
-
-#define BU_P7_POWERPC64_MISC_2(ENUM, NAME, ATTR, ICODE)			\
-  RS6000_BUILTIN_2 (MISC_BUILTIN_ ## ENUM,		/* ENUM */	\
-		    "__builtin_" NAME,			/* NAME */	\
-		    RS6000_BTM_POPCNTD					\
-		    | RS6000_BTM_POWERPC64,		/* MASK */	\
-		    (RS6000_BTC_ ## ATTR		/* ATTR */	\
-		     | RS6000_BTC_BINARY),				\
-		    CODE_FOR_ ## ICODE)			/* ICODE */
-
-#define BU_P7_MISC_X(ENUM, NAME, ATTR)					\
-  RS6000_BUILTIN_X (MISC_BUILTIN_ ## ENUM,		/* ENUM */	\
-		    "__builtin_" NAME,			/* NAME */	\
-		    RS6000_BTM_POPCNTD,			/* MASK */	\
-		    (RS6000_BTC_ ## ATTR		/* ATTR */	\
-		     | RS6000_BTC_SPECIAL),				\
-		    CODE_FOR_nothing)			/* ICODE */
-
-
-/* Miscellaneous builtins for instructions added in ISA 2.07.  These
-   instructions do require the ISA 2.07 vector support, but they aren't vector
-   instructions.  */
-#define BU_P8V_MISC_1(ENUM, NAME, ATTR, ICODE)				\
-  RS6000_BUILTIN_1 (MISC_BUILTIN_ ## ENUM,		/* ENUM */	\
-		    "__builtin_" NAME,			/* NAME */	\
-		    RS6000_BTM_P8_VECTOR,		/* MASK */	\
-		    (RS6000_BTC_ ## ATTR		/* ATTR */	\
-		     | RS6000_BTC_UNARY),				\
-		    CODE_FOR_ ## ICODE)			/* ICODE */
-
-#define BU_P8V_MISC_3(ENUM, NAME, ATTR, ICODE)				\
-  RS6000_BUILTIN_3 (MISC_BUILTIN_ ## ENUM,		/* ENUM */	\
-		    "__builtin_" NAME,			/* NAME */	\
-		    RS6000_BTM_P8_VECTOR,		/* MASK */	\
-		    (RS6000_BTC_ ## ATTR		/* ATTR */	\
-		     | RS6000_BTC_TERNARY),				\
-		    CODE_FOR_ ## ICODE)			/* ICODE */
-
-/* 128-bit long double floating point builtins.  */
-#define BU_LDBL128_2(ENUM, NAME, ATTR, ICODE)				\
-  RS6000_BUILTIN_2 (MISC_BUILTIN_ ## ENUM,		/* ENUM */	\
-		    "__builtin_" NAME,			/* NAME */	\
-		    (RS6000_BTM_HARD_FLOAT		/* MASK */	\
-		     | RS6000_BTM_LDBL128),				\
-		    (RS6000_BTC_ ## ATTR		/* ATTR */	\
-		     | RS6000_BTC_BINARY),				\
-		    CODE_FOR_ ## ICODE)			/* ICODE */
-
-/* 128-bit __ibm128 floating point builtins (use -mfloat128 to indicate that
-   __ibm128 is available).  */
-#define BU_IBM128_2(ENUM, NAME, ATTR, ICODE)				\
-  RS6000_BUILTIN_2 (MISC_BUILTIN_ ## ENUM,		/* ENUM */	\
-		    "__builtin_" NAME,			/* NAME */	\
-		    (RS6000_BTM_HARD_FLOAT		/* MASK */	\
-		     | RS6000_BTM_FLOAT128),				\
-		    (RS6000_BTC_ ## ATTR		/* ATTR */	\
-		     | RS6000_BTC_BINARY),				\
-		    CODE_FOR_ ## ICODE)			/* ICODE */
-
-/* Miscellaneous builtins for instructions added in ISA 3.0.  These
-   instructions don't require either the DFP or VSX options, just the basic
-   ISA 3.0 enablement since they operate on general purpose registers.  */
-#define BU_P9_MISC_0(ENUM, NAME, ATTR, ICODE)                      \
-  RS6000_BUILTIN_0 (MISC_BUILTIN_ ## ENUM,		/* ENUM */	\
-		    "__builtin_" NAME,			/* NAME */	\
-		    RS6000_BTM_P9_MISC,			/* MASK */	\
-		    (RS6000_BTC_ ## ATTR		/* ATTR */	\
-		     | RS6000_BTC_SPECIAL),				\
-		    CODE_FOR_ ## ICODE)			/* ICODE */
-
-#define BU_P9_MISC_1(ENUM, NAME, ATTR, ICODE)				\
-  RS6000_BUILTIN_1 (MISC_BUILTIN_ ## ENUM,		/* ENUM */	\
-		    "__builtin_" NAME,			/* NAME */	\
-		    RS6000_BTM_P9_MISC,			/* MASK */	\
-		    (RS6000_BTC_ ## ATTR		/* ATTR */	\
-		     | RS6000_BTC_UNARY),				\
-		    CODE_FOR_ ## ICODE)			/* ICODE */
-
-/* Miscellaneous builtins for instructions added in ISA 3.0.  These
-   instructions don't require either the DFP or VSX options, just the basic
-   ISA 3.0 enablement since they operate on general purpose registers,
-   and they require 64-bit addressing.  */
-#define BU_P9_64BIT_MISC_0(ENUM, NAME, ATTR, ICODE)			\
-  RS6000_BUILTIN_0 (MISC_BUILTIN_ ## ENUM,		/* ENUM */	\
-		    "__builtin_" NAME,			/* NAME */	\
-		    RS6000_BTM_P9_MISC					\
-                     | RS6000_BTM_64BIT,		/* MASK */	\
-		    (RS6000_BTC_ ## ATTR		/* ATTR */	\
-		     | RS6000_BTC_SPECIAL),				\
-		    CODE_FOR_ ## ICODE)			/* ICODE */
-
-/* Miscellaneous builtins for decimal floating point instructions
-   added in ISA 3.0.  These instructions don't require the VSX
-   options, just the basic ISA 3.0 enablement since they operate on
-   general purpose registers.  */
-#define BU_P9_DFP_MISC_0(ENUM, NAME, ATTR, ICODE)			\
-  RS6000_BUILTIN_0 (MISC_BUILTIN_ ## ENUM,		/* ENUM */	\
-		    "__builtin_" NAME,			/* NAME */	\
-		    RS6000_BTM_P9_MISC,			/* MASK */	\
-		    (RS6000_BTC_ ## ATTR		/* ATTR */	\
-		     | RS6000_BTC_SPECIAL),				\
-		    CODE_FOR_ ## ICODE)			/* ICODE */
-
-#define BU_P9_DFP_MISC_1(ENUM, NAME, ATTR, ICODE)			\
-  RS6000_BUILTIN_1 (MISC_BUILTIN_ ## ENUM,		/* ENUM */	\
-		    "__builtin_" NAME,			/* NAME */	\
-		    RS6000_BTM_P9_MISC,			/* MASK */	\
-		    (RS6000_BTC_ ## ATTR		/* ATTR */	\
-		     | RS6000_BTC_SPECIAL),				\
-		    CODE_FOR_ ## ICODE)			/* ICODE */
-
-#define BU_P9_DFP_MISC_2(ENUM, NAME, ATTR, ICODE)			\
-  RS6000_BUILTIN_2 (MISC_BUILTIN_ ## ENUM,		/* ENUM */	\
-		    "__builtin_" NAME,			/* NAME */	\
-		    RS6000_BTM_P9_MISC,			/* MASK */	\
-		    (RS6000_BTC_ ## ATTR		/* ATTR */	\
-		     | RS6000_BTC_SPECIAL),				\
-		    CODE_FOR_ ## ICODE)			/* ICODE */
-
-/* Decimal floating point overloaded functions added in ISA 3.0 */
-#define BU_P9_DFP_OVERLOAD_1(ENUM, NAME)				\
-  RS6000_BUILTIN_1 (P9_BUILTIN_DFP_ ## ENUM,		/* ENUM */	\
-		    "__builtin_dfp_" NAME,		/* NAME */	\
-		    RS6000_BTM_P9_MISC,			/* MASK */	\
-		    (RS6000_BTC_OVERLOADED		/* ATTR */	\
-		     | RS6000_BTC_UNARY),				\
-		    CODE_FOR_nothing)			/* ICODE */
-
-#define BU_P9_DFP_OVERLOAD_2(ENUM, NAME)				\
-  RS6000_BUILTIN_2 (P9_BUILTIN_DFP_ ## ENUM,		/* ENUM */	\
-		    "__builtin_dfp_" NAME,		/* NAME */	\
-		    RS6000_BTM_P9_MISC,			/* MASK */	\
-		    (RS6000_BTC_OVERLOADED		/* ATTR */	\
-		     | RS6000_BTC_BINARY),				\
-		    CODE_FOR_nothing)			/* ICODE */
-
-#define BU_P9_DFP_OVERLOAD_3(ENUM, NAME)				\
-  RS6000_BUILTIN_3 (P9_BUILTIN_DFP_ ## ENUM,		/* ENUM */	\
-		    "__builtin_dfp_" NAME,		/* NAME */	\
-		    RS6000_BTM_P9_MISC,			/* MASK */	\
-		    (RS6000_BTC_OVERLOADED		/* ATTR */	\
-		     | RS6000_BTC_TERNARY),				\
-		    CODE_FOR_nothing)			/* ICODE */
-
-/* ISA 3.0 (power9) vector convenience macros.  */
-/* For the instructions that are encoded as altivec instructions use
-   __builtin_altivec_ as the builtin name.  */
-#define BU_P9V_AV_1(ENUM, NAME, ATTR, ICODE)				\
-  RS6000_BUILTIN_1 (P9V_BUILTIN_ ## ENUM,		/* ENUM */	\
-		    "__builtin_altivec_" NAME,		/* NAME */	\
-		    RS6000_BTM_P9_VECTOR,		/* MASK */	\
-		    (RS6000_BTC_ ## ATTR		/* ATTR */	\
-		     | RS6000_BTC_UNARY),				\
-		    CODE_FOR_ ## ICODE)			/* ICODE */
-
-#define BU_P9V_AV_2(ENUM, NAME, ATTR, ICODE)				\
-  RS6000_BUILTIN_2 (P9V_BUILTIN_ ## ENUM,		/* ENUM */	\
-		    "__builtin_altivec_" NAME,		/* NAME */	\
-		    RS6000_BTM_P9_VECTOR,		/* MASK */	\
-		    (RS6000_BTC_ ## ATTR		/* ATTR */	\
-		     | RS6000_BTC_BINARY),				\
-		    CODE_FOR_ ## ICODE)			/* ICODE */
-
-#define BU_P9V_AV_3(ENUM, NAME, ATTR, ICODE)				\
-  RS6000_BUILTIN_3 (P9V_BUILTIN_ ## ENUM,		/* ENUM */	\
-		    "__builtin_altivec_" NAME,		/* NAME */	\
-		    RS6000_BTM_P9_VECTOR,		/* MASK */	\
-		    (RS6000_BTC_ ## ATTR		/* ATTR */	\
-		     | RS6000_BTC_TERNARY),				\
-		    CODE_FOR_ ## ICODE)			/* ICODE */
-
-/* See the comment on BU_ALTIVEC_P.  */
-#define BU_P9V_AV_P(ENUM, NAME, ATTR, ICODE)				\
-  RS6000_BUILTIN_P (P9V_BUILTIN_ ## ENUM,		/* ENUM */	\
-		    "__builtin_altivec_" NAME,		/* NAME */	\
-		    RS6000_BTM_P9_VECTOR,		/* MASK */	\
-		    (RS6000_BTC_ ## ATTR		/* ATTR */	\
-		     | RS6000_BTC_PREDICATE),				\
-		    CODE_FOR_ ## ICODE)			/* ICODE */
-
-#define BU_P9V_AV_X(ENUM, NAME, ATTR)					\
-  RS6000_BUILTIN_X (P9V_BUILTIN_ ## ENUM,		/* ENUM */	\
-		    "__builtin_altivec_" NAME,		/* NAME */	\
-		    RS6000_BTM_P9_VECTOR,		/* MASK */	\
-		    (RS6000_BTC_ ## ATTR		/* ATTR */	\
-		     | RS6000_BTC_SPECIAL),				\
-		    CODE_FOR_nothing)			/* ICODE */
-
-#define BU_P9V_64BIT_AV_X(ENUM, NAME, ATTR)				\
-  RS6000_BUILTIN_X (P9V_BUILTIN_ ## ENUM,		/* ENUM */	\
-		    "__builtin_altivec_" NAME,		/* NAME */	\
-		    (RS6000_BTM_P9_VECTOR				\
-		     | RS6000_BTM_64BIT),		/* MASK */	\
-		    (RS6000_BTC_ ## ATTR		/* ATTR */	\
-		     | RS6000_BTC_SPECIAL),				\
-		    CODE_FOR_nothing)			/* ICODE */
-
-/* For the instructions encoded as VSX instructions use __builtin_vsx as the
-   builtin name.  */
-#define BU_P9V_VSX_1(ENUM, NAME, ATTR, ICODE)				\
-  RS6000_BUILTIN_1 (P9V_BUILTIN_ ## ENUM,		/* ENUM */	\
-		    "__builtin_vsx_" NAME,		/* NAME */	\
-		    RS6000_BTM_P9_VECTOR,		/* MASK */	\
-		    (RS6000_BTC_ ## ATTR		/* ATTR */	\
-		     | RS6000_BTC_UNARY),				\
-		    CODE_FOR_ ## ICODE)			/* ICODE */
-
-#define BU_P9V_64BIT_VSX_1(ENUM, NAME, ATTR, ICODE)			\
-  RS6000_BUILTIN_1 (P9V_BUILTIN_ ## ENUM,		/* ENUM */	\
-		    "__builtin_vsx_" NAME,		/* NAME */	\
-		    (RS6000_BTM_64BIT					\
-		     | RS6000_BTM_P9_VECTOR),		/* MASK */	\
-		    (RS6000_BTC_ ## ATTR		/* ATTR */	\
-		     | RS6000_BTC_UNARY),				\
-		    CODE_FOR_ ## ICODE)			/* ICODE */
-
-#define BU_P9V_VSX_2(ENUM, NAME, ATTR, ICODE)				\
-  RS6000_BUILTIN_2 (P9V_BUILTIN_ ## ENUM,		/* ENUM */	\
-		    "__builtin_vsx_" NAME,		/* NAME */	\
-		    RS6000_BTM_P9_VECTOR,		/* MASK */	\
-		    (RS6000_BTC_ ## ATTR		/* ATTR */	\
-		     | RS6000_BTC_BINARY),				\
-		    CODE_FOR_ ## ICODE)			/* ICODE */
-
-#define BU_P9V_64BIT_VSX_2(ENUM, NAME, ATTR, ICODE)			\
-  RS6000_BUILTIN_2 (P9V_BUILTIN_ ## ENUM,		/* ENUM */	\
-		    "__builtin_vsx_" NAME,		/* NAME */	\
-		    (RS6000_BTM_64BIT					\
-		     | RS6000_BTM_P9_VECTOR),		/* MASK */	\
-		    (RS6000_BTC_ ## ATTR		/* ATTR */	\
-		     | RS6000_BTC_BINARY),				\
-		    CODE_FOR_ ## ICODE)			/* ICODE */
-
-#define BU_P9V_VSX_3(ENUM, NAME, ATTR, ICODE)				\
-  RS6000_BUILTIN_3 (P9V_BUILTIN_ ## ENUM,		/* ENUM */	\
-		    "__builtin_vsx_" NAME,		/* NAME */	\
-		    RS6000_BTM_P9_VECTOR,		/* MASK */	\
-		    (RS6000_BTC_ ## ATTR		/* ATTR */	\
-		     | RS6000_BTC_TERNARY),				\
-		    CODE_FOR_ ## ICODE)			/* ICODE */
-
-#define BU_P9V_64BIT_VSX_3(ENUM, NAME, ATTR, ICODE)			\
-  RS6000_BUILTIN_2 (P9V_BUILTIN_ ## ENUM,		/* ENUM */	\
-		    "__builtin_vsx_" NAME,		/* NAME */	\
-		    (RS6000_BTM_64BIT					\
-		     | RS6000_BTM_P9_VECTOR),		/* MASK */	\
-		    (RS6000_BTC_ ## ATTR		/* ATTR */	\
-		     | RS6000_BTC_TERNARY),				\
-		    CODE_FOR_ ## ICODE)			/* ICODE */
-
-/* See the comment on BU_ALTIVEC_P.  */
-#define BU_P9V_OVERLOAD_P(ENUM, NAME)					\
-  RS6000_BUILTIN_P (P9V_BUILTIN_VEC_ ## ENUM,		/* ENUM */	\
-		    "__builtin_vec_" NAME,		/* NAME */	\
-		    RS6000_BTM_ALTIVEC,			/* MASK */	\
-		    (RS6000_BTC_OVERLOADED		/* ATTR */	\
-		     | RS6000_BTC_PREDICATE),				\
-		    CODE_FOR_nothing)			/* ICODE */
-
-#define BU_P9_2(ENUM, NAME, ATTR, ICODE)				\
-  RS6000_BUILTIN_2 (P9_BUILTIN_SCALAR_ ## ENUM,		/* ENUM */	\
-		    "__builtin_scalar_" NAME,		/* NAME */	\
-		    RS6000_BTM_P9_VECTOR,		/* MASK */	\
-		    (RS6000_BTC_ ## ATTR		/* ATTR */	\
-		     | RS6000_BTC_BINARY),				\
-		    CODE_FOR_ ## ICODE)			/* ICODE */
-
-#define BU_P9_64BIT_2(ENUM, NAME, ATTR, ICODE)				\
-  RS6000_BUILTIN_2 (P9_BUILTIN_SCALAR_ ## ENUM,		/* ENUM */	\
-		    "__builtin_scalar_" NAME,		/* NAME */	\
-		    RS6000_BTM_P9_VECTOR				\
-		    | RS6000_BTM_64BIT,			/* MASK */	\
-		    (RS6000_BTC_ ## ATTR		/* ATTR */	\
-		     | RS6000_BTC_BINARY),				\
-		    CODE_FOR_ ## ICODE)			/* ICODE */
-
-#define BU_P9V_OVERLOAD_1(ENUM, NAME)					\
-  RS6000_BUILTIN_1 (P9V_BUILTIN_VEC_ ## ENUM,		/* ENUM */	\
-		    "__builtin_vec_" NAME,		/* NAME */	\
-		    RS6000_BTM_P9_VECTOR,		/* MASK */	\
-		    (RS6000_BTC_OVERLOADED		/* ATTR */	\
-		     | RS6000_BTC_UNARY),				\
-		    CODE_FOR_nothing)			/* ICODE */
-
-#define BU_P9V_OVERLOAD_2(ENUM, NAME)					\
-  RS6000_BUILTIN_2 (P9V_BUILTIN_VEC_ ## ENUM,		/* ENUM */	\
-		    "__builtin_vec_" NAME,		/* NAME */	\
-		    RS6000_BTM_P9_VECTOR,		/* MASK */	\
-		    (RS6000_BTC_OVERLOADED		/* ATTR */	\
-		     | RS6000_BTC_BINARY),				\
-		    CODE_FOR_nothing)			/* ICODE */
-
-#define BU_P9V_OVERLOAD_3(ENUM, NAME)					\
-  RS6000_BUILTIN_3 (P9V_BUILTIN_VEC_ ## ENUM,		/* ENUM */	\
-		    "__builtin_vec_" NAME,		/* NAME */	\
-		    RS6000_BTM_P9_VECTOR,		/* MASK */	\
-		    (RS6000_BTC_OVERLOADED		/* ATTR */	\
-		     | RS6000_BTC_TERNARY),				\
-		    CODE_FOR_nothing)			/* ICODE */
-
-#define BU_P9_OVERLOAD_2(ENUM, NAME)					\
-  RS6000_BUILTIN_2 (P9_BUILTIN_ ## ENUM,		/* ENUM */	\
-		    "__builtin_" NAME,			/* NAME */	\
-		    RS6000_BTM_P9_VECTOR,		/* MASK */	\
-		    (RS6000_BTC_OVERLOADED		/* ATTR */	\
-		     | RS6000_BTC_BINARY),				\
-		    CODE_FOR_nothing)			/* ICODE */
-
-/* Built-in functions for IEEE 128-bit hardware floating point.  IEEE 128-bit
-   hardware requires p9-vector and 64-bit operation.  These functions use just
-   __builtin_ as the prefix.  */
-#define BU_FLOAT128_HW_1(ENUM, NAME, ATTR, ICODE)			\
-  RS6000_BUILTIN_1 (FLOAT128_BUILTIN_ ## ENUM,		/* ENUM */	\
-		    "__builtin_" NAME,			/* NAME */	\
-		    RS6000_BTM_FLOAT128_HW,		/* MASK */	\
-		    (RS6000_BTC_ ## ATTR		/* ATTR */	\
-		     | RS6000_BTC_UNARY),				\
-		    CODE_FOR_ ## ICODE)			/* ICODE */
-
-#define BU_FLOAT128_HW_2(ENUM, NAME, ATTR, ICODE)			\
-  RS6000_BUILTIN_2 (FLOAT128_BUILTIN_ ## ENUM,		/* ENUM */	\
-		    "__builtin_" NAME,			/* NAME */	\
-		    RS6000_BTM_FLOAT128_HW,		/* MASK */	\
-		    (RS6000_BTC_ ## ATTR		/* ATTR */	\
-		     | RS6000_BTC_BINARY),				\
-		    CODE_FOR_ ## ICODE)			/* ICODE */
-
-#define BU_FLOAT128_HW_3(ENUM, NAME, ATTR, ICODE)			\
-  RS6000_BUILTIN_3 (FLOAT128_BUILTIN_ ## ENUM,		/* ENUM */	\
-		    "__builtin_" NAME,			/* NAME */	\
-		    RS6000_BTM_FLOAT128_HW,		/* MASK */	\
-		    (RS6000_BTC_ ## ATTR		/* ATTR */	\
-		     | RS6000_BTC_TERNARY),				\
-		    CODE_FOR_ ## ICODE)			/* ICODE */
-
-/* Built-in functions for IEEE 128-bit hardware floating point.  These
-   functions use __builtin_vsx_ as the prefix.  */
-#define BU_FLOAT128_HW_VSX_1(ENUM, NAME, ATTR, ICODE)			\
-  RS6000_BUILTIN_1 (P9V_BUILTIN_ ## ENUM,		/* ENUM */	\
-		    "__builtin_vsx_" NAME,		/* NAME */	\
-		    RS6000_BTM_FLOAT128_HW,		/* MASK */	\
-		    (RS6000_BTC_ ## ATTR		/* ATTR */	\
-		     | RS6000_BTC_UNARY),				\
-		    CODE_FOR_ ## ICODE)			/* ICODE */
-
-#define BU_FLOAT128_HW_VSX_2(ENUM, NAME, ATTR, ICODE)			\
-  RS6000_BUILTIN_2 (P9V_BUILTIN_ ## ENUM,		/* ENUM */	\
-		    "__builtin_vsx_" NAME,		/* NAME */	\
-		    RS6000_BTM_FLOAT128_HW,		/* MASK */	\
-		    (RS6000_BTC_ ## ATTR		/* ATTR */	\
-		     | RS6000_BTC_BINARY),				\
-		    CODE_FOR_ ## ICODE)			/* ICODE */
-
-/* Power 10 VSX builtins  */
-
-#define BU_P10V_VSX_0(ENUM, NAME, ATTR, ICODE)				\
-  RS6000_BUILTIN_0 (P10V_BUILTIN_ ## ENUM,		/* ENUM */	\
-		    "__builtin_vsx_" NAME,		/* NAME */	\
-		    RS6000_BTM_P10,			/* MASK */	\
-		    (RS6000_BTC_ ## ATTR		/* ATTR */	\
-		     | RS6000_BTC_SPECIAL),				\
-		    CODE_FOR_ ## ICODE)			/* ICODE */
-
-#define BU_P10V_VSX_1(ENUM, NAME, ATTR, ICODE)				\
-  RS6000_BUILTIN_1 (P10V_BUILTIN_ ## ENUM,		/* ENUM */	\
-		    "__builtin_vsx_" NAME,		/* NAME */	\
-		    RS6000_BTM_P10,			/* MASK */	\
-		    (RS6000_BTC_ ## ATTR		/* ATTR */	\
-		     | RS6000_BTC_UNARY),				\
-		    CODE_FOR_ ## ICODE)			/* ICODE */
-
-#define BU_P10V_VSX_2(ENUM, NAME, ATTR, ICODE)				\
-  RS6000_BUILTIN_2 (P10V_BUILTIN_ ## ENUM,		/* ENUM */	\
-		    "__builtin_vsx_" NAME,		/* NAME */	\
-		    RS6000_BTM_P10,			/* MASK */	\
-		    (RS6000_BTC_ ## ATTR		/* ATTR */	\
-		     | RS6000_BTC_BINARY),				\
-		    CODE_FOR_ ## ICODE)			/* ICODE */
-
-#define BU_P10V_VSX_3(ENUM, NAME, ATTR, ICODE)				\
-  RS6000_BUILTIN_3 (P10V_BUILTIN_ ## ENUM,		/* ENUM */	\
-		    "__builtin_vsx_" NAME,		/* NAME */	\
-		    RS6000_BTM_P10,			/* MASK */	\
-		    (RS6000_BTC_ ## ATTR		/* ATTR */	\
-		     | RS6000_BTC_TERNARY),				\
-		    CODE_FOR_ ## ICODE)			/* ICODE */
-
-#define BU_P10V_VSX_4(ENUM, NAME, ATTR, ICODE)				\
-  RS6000_BUILTIN_4 (P10V_BUILTIN_ ## ENUM,		/* ENUM */	\
-		    "__builtin_vsx_" NAME,		/* NAME */	\
-		    RS6000_BTM_P10,			/* MASK */	\
-		    (RS6000_BTC_ ## ATTR		/* ATTR */	\
-		     | RS6000_BTC_QUATERNARY),				\
-		    CODE_FOR_ ## ICODE)			/* ICODE */
-
-#define BU_P10_OVERLOAD_1(ENUM, NAME)					\
-  RS6000_BUILTIN_1 (P10_BUILTIN_VEC_ ## ENUM,		/* ENUM */	\
-		    "__builtin_vec_" NAME,		/* NAME */	\
-		    RS6000_BTM_P10,			/* MASK */	\
-		    (RS6000_BTC_OVERLOADED		/* ATTR */	\
-		     | RS6000_BTC_UNARY),				\
-		    CODE_FOR_nothing)			/* ICODE */
-
-#define BU_P10_OVERLOAD_2(ENUM, NAME)					\
-  RS6000_BUILTIN_2 (P10_BUILTIN_VEC_ ## ENUM,		/* ENUM */	\
-		    "__builtin_vec_" NAME,		/* NAME */	\
-		    RS6000_BTM_P10,			/* MASK */	\
-		    (RS6000_BTC_OVERLOADED		/* ATTR */	\
-		     | RS6000_BTC_BINARY),				\
-		    CODE_FOR_nothing)			/* ICODE */
-
-#define BU_P10_OVERLOAD_3(ENUM, NAME)					\
-  RS6000_BUILTIN_3 (P10_BUILTIN_VEC_ ## ENUM,		/* ENUM */	\
-		    "__builtin_vec_" NAME,		/* NAME */	\
-		    RS6000_BTM_P10,			/* MASK */	\
-		    (RS6000_BTC_OVERLOADED		/* ATTR */	\
-		     | RS6000_BTC_TERNARY),				\
-		    CODE_FOR_nothing)			/* ICODE */
-
-#define BU_P10_OVERLOAD_4(ENUM, NAME)					\
-  RS6000_BUILTIN_4 (P10_BUILTIN_VEC_ ## ENUM,		/* ENUM */	\
-		    "__builtin_vec_" NAME,		/* NAME */	\
-		    RS6000_BTM_P10,			/* MASK */	\
-		    (RS6000_BTC_OVERLOADED		/* ATTR */	\
-		     | RS6000_BTC_QUATERNARY),				\
-		    CODE_FOR_nothing)			/* ICODE */
-
-/* Miscellaneous (non-vector) builtins for power10 instructions.  */
-
-#define BU_P10_MISC_0(ENUM, NAME, ATTR, ICODE)				\
-  RS6000_BUILTIN_0 (P10_BUILTIN_ ## ENUM,		/* ENUM */	\
-		    "__builtin_" NAME,			/* NAME */	\
-		    RS6000_BTM_P10,			/* MASK */	\
-		    (RS6000_BTC_ ## ATTR		/* ATTR */	\
-		     | RS6000_BTC_SPECIAL),				\
-		    CODE_FOR_ ## ICODE)			/* ICODE */
-
-#define BU_P10_MISC_1(ENUM, NAME, ATTR, ICODE)				\
-  RS6000_BUILTIN_1 (P10_BUILTIN_ ## ENUM,		/* ENUM */	\
-		    "__builtin_" NAME,			/* NAME */	\
-		    RS6000_BTM_P10,			/* MASK */	\
-		    (RS6000_BTC_ ## ATTR		/* ATTR */	\
-		     | RS6000_BTC_UNARY),				\
-		    CODE_FOR_ ## ICODE)			/* ICODE */
-
-#define BU_P10_POWERPC64_MISC_2(ENUM, NAME, ATTR, ICODE)		\
-  RS6000_BUILTIN_2 (P10_BUILTIN_ ## ENUM,		/* ENUM */	\
-		    "__builtin_" NAME,			/* NAME */	\
-		    RS6000_BTM_P10					\
-		    | RS6000_BTM_POWERPC64,		/* MASK */	\
-		    (RS6000_BTC_ ## ATTR		/* ATTR */	\
-		     | RS6000_BTC_BINARY),				\
-		    CODE_FOR_ ## ICODE)			/* ICODE */
-
-#define BU_P10_MISC_3(ENUM, NAME, ATTR, ICODE)				\
-  RS6000_BUILTIN_3 (P10_BUILTIN_ ## ENUM,		/* ENUM */	\
-		    "__builtin_" NAME,			/* NAME */	\
-		    RS6000_BTM_P10,			/* MASK */	\
-		    (RS6000_BTC_ ## ATTR		/* ATTR */	\
-		     | RS6000_BTC_TERNARY),				\
-		    CODE_FOR_ ## ICODE)			/* ICODE */
-
-#define BU_P10_1(ENUM, NAME, ATTR, ICODE)			\
-  RS6000_BUILTIN_1 (P10_BUILTIN_ ## ENUM,		/* ENUM */	\
-		    "__builtin_vec" NAME,		/* NAME */	\
-		    RS6000_BTM_P10,			/* MASK */	\
-		    (RS6000_BTC_ ## ATTR		/* ATTR */	\
-		     | RS6000_BTC_UNARY),				\
-		    CODE_FOR_ ## ICODE)			/* ICODE */
-
-#define BU_P10_2(ENUM, NAME, ATTR, ICODE)			\
-  RS6000_BUILTIN_2 (P10_BUILTIN_ ## ENUM,		/* ENUM */	\
-		    "__builtin_vec" NAME,		/* NAME */	\
-		    RS6000_BTM_P10,			/* MASK */	\
-		    (RS6000_BTC_ ## ATTR		/* ATTR */	\
-		     | RS6000_BTC_BINARY),				\
-		    CODE_FOR_ ## ICODE)			/* ICODE */
-#endif
-
-#define BU_P10V_OVERLOAD_X(ENUM, NAME)				\
-  RS6000_BUILTIN_X (P10_BUILTIN_VEC_ ## ENUM,		/* ENUM */	\
-		    "__builtin_vec_" NAME,		/* NAME */	\
-		    RS6000_BTM_P10,			/* MASK */	\
-		    (RS6000_BTC_OVERLOADED		/* ATTR */	\
-		     | RS6000_BTC_SPECIAL),				\
-		    CODE_FOR_nothing)			/* ICODE */
-
-/* Power 10 Altivec builtins  */
-
-#define BU_P10V_AV_0(ENUM, NAME, ATTR, ICODE)				\
-  RS6000_BUILTIN_0 (P10V_BUILTIN_ ## ENUM,		/* ENUM */	\
-		    "__builtin_altivec_" NAME,		/* NAME */	\
-		    RS6000_BTM_P10,			/* MASK */	\
-		    (RS6000_BTC_ ## ATTR		/* ATTR */	\
-		     | RS6000_BTC_SPECIAL),				\
-		    CODE_FOR_ ## ICODE)			/* ICODE */
-
-#define BU_P10V_AV_1(ENUM, NAME, ATTR, ICODE)				\
-  RS6000_BUILTIN_1 (P10V_BUILTIN_ ## ENUM,		/* ENUM */	\
-		    "__builtin_altivec_" NAME,		/* NAME */	\
-		    RS6000_BTM_P10,			/* MASK */	\
-		    (RS6000_BTC_ ## ATTR		/* ATTR */	\
-		     | RS6000_BTC_UNARY),				\
-		    CODE_FOR_ ## ICODE)			/* ICODE */
-
-#define BU_P10V_AV_2(ENUM, NAME, ATTR, ICODE)				\
-  RS6000_BUILTIN_2 (P10V_BUILTIN_ ## ENUM,		/* ENUM */	\
-		    "__builtin_altivec_" NAME,		/* NAME */	\
-		    RS6000_BTM_P10,			/* MASK */	\
-		    (RS6000_BTC_ ## ATTR		/* ATTR */	\
-		     | RS6000_BTC_BINARY),				\
-		    CODE_FOR_ ## ICODE)			/* ICODE */
-
-#define BU_P10V_AV_3(ENUM, NAME, ATTR, ICODE)				\
-  RS6000_BUILTIN_3 (P10V_BUILTIN_ ## ENUM,		/* ENUM */	\
-		    "__builtin_altivec_" NAME,		/* NAME */	\
-		    RS6000_BTM_P10,			/* MASK */	\
-		    (RS6000_BTC_ ## ATTR		/* ATTR */	\
-		     | RS6000_BTC_TERNARY),				\
-		    CODE_FOR_ ## ICODE)			/* ICODE */
-
-/* See the comment on BU_ALTIVEC_P.  */
-#define BU_P10V_AV_P(ENUM, NAME, ATTR, ICODE)				\
-  RS6000_BUILTIN_P (P10V_BUILTIN_ ## ENUM,		/* ENUM */	\
-		    "__builtin_altivec_" NAME,		/* NAME */	\
-		    RS6000_BTM_P10,	 		/* MASK */	\
-		    (RS6000_BTC_ ## ATTR		/* ATTR */	\
-		     | RS6000_BTC_PREDICATE),				\
-		    CODE_FOR_ ## ICODE)			/* ICODE */
-
-#define BU_P10V_AV_X(ENUM, NAME, ATTR)					\
-  RS6000_BUILTIN_X (P10_BUILTIN_ ## ENUM,		/* ENUM */	\
-		    "__builtin_altivec_" NAME,		/* NAME */	\
-		    RS6000_BTM_P10,			/* MASK */	\
-		    (RS6000_BTC_ ## ATTR		/* ATTR */	\
-		     | RS6000_BTC_SPECIAL),				\
-		    CODE_FOR_nothing)			/* ICODE */
-
-
-\f
-/* Insure 0 is not a legitimate index.  */
-BU_SPECIAL_X (RS6000_BUILTIN_NONE, NULL, 0, RS6000_BTC_MISC)
-
-/* 3 argument Altivec builtins.  */
-BU_ALTIVEC_3 (VMADDFP,        "vmaddfp",        FP,    	fmav4sf4)
-BU_ALTIVEC_3 (VMHADDSHS,      "vmhaddshs",      SAT,   	altivec_vmhaddshs)
-BU_ALTIVEC_3 (VMHRADDSHS,     "vmhraddshs",     SAT,   	altivec_vmhraddshs)
-BU_ALTIVEC_3 (VMLADDUHM,      "vmladduhm",      CONST, 	fmav8hi4)
-BU_ALTIVEC_3 (VMSUMUBM,       "vmsumubm",       CONST, 	altivec_vmsumubm)
-BU_ALTIVEC_3 (VMSUMMBM,       "vmsummbm",       CONST, 	altivec_vmsummbm)
-BU_ALTIVEC_3 (VMSUMUHM,       "vmsumuhm",       CONST, 	altivec_vmsumuhm)
-BU_ALTIVEC_3 (VMSUMUDM,       "vmsumudm",       CONST, 	altivec_vmsumudm)
-BU_ALTIVEC_3 (VMSUMSHM,       "vmsumshm",       CONST, 	altivec_vmsumshm)
-BU_ALTIVEC_3 (VMSUMUHS,       "vmsumuhs",       SAT,   	altivec_vmsumuhs)
-BU_ALTIVEC_3 (VMSUMSHS,       "vmsumshs",       SAT,   	altivec_vmsumshs)
-BU_ALTIVEC_3 (VNMSUBFP,       "vnmsubfp",       FP,    	nfmsv4sf4)
-BU_ALTIVEC_3 (VPERM_1TI,      "vperm_1ti",      CONST, 	altivec_vperm_v1ti)
-BU_ALTIVEC_3 (VPERM_2DF,      "vperm_2df",      CONST, 	altivec_vperm_v2df)
-BU_ALTIVEC_3 (VPERM_2DI,      "vperm_2di",      CONST, 	altivec_vperm_v2di)
-BU_ALTIVEC_3 (VPERM_4SF,      "vperm_4sf",      CONST, 	altivec_vperm_v4sf)
-BU_ALTIVEC_3 (VPERM_4SI,      "vperm_4si",      CONST, 	altivec_vperm_v4si)
-BU_ALTIVEC_3 (VPERM_8HI,      "vperm_8hi",      CONST, 	altivec_vperm_v8hi)
-BU_ALTIVEC_3 (VPERM_16QI,     "vperm_16qi",     CONST, 	altivec_vperm_v16qi_uns)
-BU_ALTIVEC_3 (VPERM_1TI_UNS,  "vperm_1ti_uns",  CONST, 	altivec_vperm_v1ti_uns)
-BU_ALTIVEC_3 (VPERM_2DI_UNS,  "vperm_2di_uns",  CONST, 	altivec_vperm_v2di_uns)
-BU_ALTIVEC_3 (VPERM_4SI_UNS,  "vperm_4si_uns",  CONST, 	altivec_vperm_v4si_uns)
-BU_ALTIVEC_3 (VPERM_8HI_UNS,  "vperm_8hi_uns",  CONST, 	altivec_vperm_v8hi_uns)
-BU_ALTIVEC_3 (VPERM_16QI_UNS, "vperm_16qi_uns", CONST, 	altivec_vperm_v16qi_uns)
-BU_ALTIVEC_3 (VSEL_4SF,       "vsel_4sf",       CONST, 	vector_select_v4sf)
-BU_ALTIVEC_3 (VSEL_4SI,       "vsel_4si",       CONST, 	vector_select_v4si)
-BU_ALTIVEC_3 (VSEL_8HI,       "vsel_8hi",       CONST, 	vector_select_v8hi)
-BU_ALTIVEC_3 (VSEL_16QI,      "vsel_16qi",      CONST, 	vector_select_v16qi)
-BU_ALTIVEC_3 (VSEL_2DF,       "vsel_2df",       CONST, 	vector_select_v2df)
-BU_ALTIVEC_3 (VSEL_2DI,       "vsel_2di",       CONST, 	vector_select_v2di)
-BU_ALTIVEC_3 (VSEL_1TI,       "vsel_1ti",       CONST, 	vector_select_v1ti)
-BU_ALTIVEC_3 (VSEL_4SI_UNS,   "vsel_4si_uns",   CONST, 	vector_select_v4si_uns)
-BU_ALTIVEC_3 (VSEL_8HI_UNS,   "vsel_8hi_uns",   CONST, 	vector_select_v8hi_uns)
-BU_ALTIVEC_3 (VSEL_16QI_UNS,  "vsel_16qi_uns",  CONST, 	vector_select_v16qi_uns)
-BU_ALTIVEC_3 (VSEL_2DI_UNS,   "vsel_2di_uns",   CONST, 	vector_select_v2di_uns)
-BU_ALTIVEC_3 (VSEL_1TI_UNS,   "vsel_1ti_uns",   CONST, 	vector_select_v1ti_uns)
-BU_ALTIVEC_3 (VSLDOI_16QI,    "vsldoi_16qi",    CONST, 	altivec_vsldoi_v16qi)
-BU_ALTIVEC_3 (VSLDOI_8HI,     "vsldoi_8hi",     CONST, 	altivec_vsldoi_v8hi)
-BU_ALTIVEC_3 (VSLDOI_4SI,     "vsldoi_4si",     CONST, 	altivec_vsldoi_v4si)
-BU_ALTIVEC_3 (VSLDOI_2DI,     "vsldoi_2di",     CONST, 	altivec_vsldoi_v2di)
-BU_ALTIVEC_3 (VSLDOI_4SF,     "vsldoi_4sf",     CONST, 	altivec_vsldoi_v4sf)
-BU_ALTIVEC_3 (VSLDOI_2DF,     "vsldoi_2df",     CONST, 	altivec_vsldoi_v2df)
-
-/* Altivec DST builtins.  */
-BU_ALTIVEC_D (DST,	      "dst",		MISC,  	altivec_dst)
-BU_ALTIVEC_D (DSTT,	      "dstt",		MISC,  	altivec_dstt)
-BU_ALTIVEC_D (DSTST,	      "dstst",		MISC,  	altivec_dstst)
-BU_ALTIVEC_D (DSTSTT,	      "dststt",		MISC,  	altivec_dststt)
-
-/* Altivec 2 argument builtin functions.  */
-BU_ALTIVEC_2 (VADDUBM,        "vaddubm",	CONST,	addv16qi3)
-BU_ALTIVEC_2 (VADDUHM,	      "vadduhm",	CONST,	addv8hi3)
-BU_ALTIVEC_2 (VADDUWM,	      "vadduwm",	CONST,	addv4si3)
-BU_ALTIVEC_2 (VADDFP,	      "vaddfp",		CONST,	addv4sf3)
-BU_ALTIVEC_2 (VADDCUW,	      "vaddcuw",	CONST,	altivec_vaddcuw)
-BU_ALTIVEC_2 (VADDUBS,	      "vaddubs",	CONST,	altivec_vaddubs)
-BU_ALTIVEC_2 (VADDSBS,	      "vaddsbs",	CONST,	altivec_vaddsbs)
-BU_ALTIVEC_2 (VADDUHS,	      "vadduhs",	CONST,	altivec_vadduhs)
-BU_ALTIVEC_2 (VADDSHS,	      "vaddshs",	CONST,	altivec_vaddshs)
-BU_ALTIVEC_2 (VADDUWS,	      "vadduws",	CONST,	altivec_vadduws)
-BU_ALTIVEC_2 (VADDSWS,	      "vaddsws",	CONST,	altivec_vaddsws)
-BU_ALTIVEC_2 (VAND_V16QI_UNS, "vand_v16qi_uns",	CONST,	andv16qi3)
-BU_ALTIVEC_2 (VAND_V16QI,     "vand_v16qi",	CONST,	andv16qi3)
-BU_ALTIVEC_2 (VAND_V8HI_UNS,  "vand_v8hi_uns",	CONST,	andv8hi3)
-BU_ALTIVEC_2 (VAND_V8HI,      "vand_v8hi",	CONST,	andv8hi3)
-BU_ALTIVEC_2 (VAND_V4SI_UNS,  "vand_v4si_uns",	CONST,	andv4si3)
-BU_ALTIVEC_2 (VAND_V4SI,      "vand_v4si",	CONST,	andv4si3)
-BU_ALTIVEC_2 (VAND_V2DI_UNS,  "vand_v2di_uns",	CONST,	andv2di3)
-BU_ALTIVEC_2 (VAND_V2DI,      "vand_v2di",	CONST,	andv2di3)
-BU_ALTIVEC_2 (VAND_V4SF,      "vand_v4sf",	CONST,	andv4sf3)
-BU_ALTIVEC_2 (VAND_V2DF,      "vand_v2df",	CONST,	andv2df3)
-BU_ALTIVEC_2 (VANDC_V16QI_UNS,"vandc_v16qi_uns",CONST,	andcv16qi3)
-BU_ALTIVEC_2 (VANDC_V16QI,    "vandc_v16qi",	CONST,	andcv16qi3)
-BU_ALTIVEC_2 (VANDC_V8HI_UNS, "vandc_v8hi_uns",	CONST,	andcv8hi3)
-BU_ALTIVEC_2 (VANDC_V8HI,     "vandc_v8hi",	CONST,	andcv8hi3)
-BU_ALTIVEC_2 (VANDC_V4SI_UNS, "vandc_v4si_uns",	CONST,	andcv4si3)
-BU_ALTIVEC_2 (VANDC_V4SI,     "vandc_v4si",	CONST,	andcv4si3)
-BU_ALTIVEC_2 (VANDC_V2DI_UNS, "vandc_v2di_uns",	CONST,	andcv2di3)
-BU_ALTIVEC_2 (VANDC_V2DI,     "vandc_v2di",	CONST,	andcv2di3)
-BU_ALTIVEC_2 (VANDC_V4SF,     "vandc_v4sf",	CONST,	andcv4sf3)
-BU_ALTIVEC_2 (VANDC_V2DF,     "vandc_v2df",	CONST,	andcv2df3)
-BU_ALTIVEC_2 (VAVGUB,	      "vavgub",		CONST,	uavgv16qi3_ceil)
-BU_ALTIVEC_2 (VAVGSB,	      "vavgsb",		CONST,	avgv16qi3_ceil)
-BU_ALTIVEC_2 (VAVGUH,	      "vavguh",		CONST,	uavgv8hi3_ceil)
-BU_ALTIVEC_2 (VAVGSH,	      "vavgsh",		CONST,	avgv8hi3_ceil)
-BU_ALTIVEC_2 (VAVGUW,	      "vavguw",		CONST,	uavgv4si3_ceil)
-BU_ALTIVEC_2 (VAVGSW,	      "vavgsw",		CONST,	avgv4si3_ceil)
-BU_ALTIVEC_2 (VCFUX,	      "vcfux",		CONST,	altivec_vcfux)
-BU_ALTIVEC_2 (VCFSX,	      "vcfsx",		CONST,	altivec_vcfsx)
-BU_ALTIVEC_2 (VCMPBFP,	      "vcmpbfp",	CONST,	altivec_vcmpbfp)
-BU_ALTIVEC_2 (VCMPEQUB,	      "vcmpequb",	CONST,	vector_eqv16qi)
-BU_ALTIVEC_2 (VCMPEQUH,	      "vcmpequh",	CONST,	vector_eqv8hi)
-BU_ALTIVEC_2 (VCMPEQUW,	      "vcmpequw",	CONST,	vector_eqv4si)
-BU_ALTIVEC_2 (VCMPEQFP,	      "vcmpeqfp",	CONST,	vector_eqv4sf)
-BU_ALTIVEC_2 (VCMPGEFP,	      "vcmpgefp",	CONST,	vector_gev4sf)
-BU_ALTIVEC_2 (VCMPGTUB,	      "vcmpgtub",	CONST,	vector_gtuv16qi)
-BU_ALTIVEC_2 (VCMPGTSB,	      "vcmpgtsb",	CONST,	vector_gtv16qi)
-BU_ALTIVEC_2 (VCMPGTUH,	      "vcmpgtuh",	CONST,	vector_gtuv8hi)
-BU_ALTIVEC_2 (VCMPGTSH,	      "vcmpgtsh",	CONST,	vector_gtv8hi)
-BU_ALTIVEC_2 (VCMPGTUW,	      "vcmpgtuw",	CONST,	vector_gtuv4si)
-BU_ALTIVEC_2 (VCMPGTSW,	      "vcmpgtsw",	CONST,	vector_gtv4si)
-BU_ALTIVEC_2 (VCMPGTFP,	      "vcmpgtfp",	CONST,	vector_gtv4sf)
-BU_ALTIVEC_2 (VCTSXS,	      "vctsxs",		CONST,	altivec_vctsxs)
-BU_ALTIVEC_2 (VCTUXS,	      "vctuxs",		CONST,	altivec_vctuxs)
-BU_ALTIVEC_2 (VMAXUB,	      "vmaxub",		CONST,	umaxv16qi3)
-BU_ALTIVEC_2 (VMAXSB,	      "vmaxsb",		CONST,	smaxv16qi3)
-BU_ALTIVEC_2 (VMAXUH,	      "vmaxuh",		CONST,	umaxv8hi3)
-BU_ALTIVEC_2 (VMAXSH,	      "vmaxsh",		CONST,	smaxv8hi3)
-BU_ALTIVEC_2 (VMAXUW,	      "vmaxuw",		CONST,	umaxv4si3)
-BU_ALTIVEC_2 (VMAXSW,	      "vmaxsw",		CONST,	smaxv4si3)
-BU_ALTIVEC_2 (VMAXFP,	      "vmaxfp",		CONST,	smaxv4sf3)
-BU_ALTIVEC_2 (VMRGHB,	      "vmrghb",		CONST,	altivec_vmrghb)
-BU_ALTIVEC_2 (VMRGHH,	      "vmrghh",		CONST,	altivec_vmrghh)
-BU_ALTIVEC_2 (VMRGHW,	      "vmrghw",		CONST,	altivec_vmrghw)
-BU_ALTIVEC_2 (VMRGLB,	      "vmrglb",		CONST,	altivec_vmrglb)
-BU_ALTIVEC_2 (VMRGLH,	      "vmrglh",		CONST,	altivec_vmrglh)
-BU_ALTIVEC_2 (VMRGLW,	      "vmrglw",		CONST,	altivec_vmrglw)
-BU_ALTIVEC_2 (VMINUB,	      "vminub",		CONST,	uminv16qi3)
-BU_ALTIVEC_2 (VMINSB,	      "vminsb",		CONST,	sminv16qi3)
-BU_ALTIVEC_2 (VMINUH,	      "vminuh",		CONST,	uminv8hi3)
-BU_ALTIVEC_2 (VMINSH,	      "vminsh",		CONST,	sminv8hi3)
-BU_ALTIVEC_2 (VMINUW,	      "vminuw",		CONST,	uminv4si3)
-BU_ALTIVEC_2 (VMINSW,	      "vminsw",		CONST,	sminv4si3)
-BU_ALTIVEC_2 (VMINFP,	      "vminfp",		CONST,	sminv4sf3)
-BU_ALTIVEC_2 (VMULEUB,	      "vmuleub",	CONST,	vec_widen_umult_even_v16qi)
-BU_ALTIVEC_2 (VMULESB,	      "vmulesb",	CONST,	vec_widen_smult_even_v16qi)
-BU_ALTIVEC_2 (VMULEUH,	      "vmuleuh",	CONST,	vec_widen_umult_even_v8hi)
-BU_ALTIVEC_2 (VMULESH,	      "vmulesh",	CONST,	vec_widen_smult_even_v8hi)
-BU_P8V_AV_2 (VMULEUW,	      "vmuleuw",	CONST,	vec_widen_umult_even_v4si)
-BU_P8V_AV_2 (VMULESW,	      "vmulesw",	CONST,	vec_widen_smult_even_v4si)
-BU_ALTIVEC_2 (VMULOUB,	      "vmuloub",	CONST,	vec_widen_umult_odd_v16qi)
-BU_ALTIVEC_2 (VMULOSB,	      "vmulosb",	CONST,	vec_widen_smult_odd_v16qi)
-BU_ALTIVEC_2 (VMULOUH,	      "vmulouh",	CONST,	vec_widen_umult_odd_v8hi)
-BU_ALTIVEC_2 (VMULOSH,	      "vmulosh",	CONST,	vec_widen_smult_odd_v8hi)
-BU_P8V_AV_2 (VMULOUW,	      "vmulouw",	CONST,	vec_widen_umult_odd_v4si)
-BU_P8V_AV_2 (VMULOSW,	      "vmulosw",	CONST,	vec_widen_smult_odd_v4si)
-BU_ALTIVEC_2 (VNOR_V16QI_UNS, "vnor_v16qi_uns",	CONST,	norv16qi3)
-BU_ALTIVEC_2 (VNOR_V16QI,     "vnor_v16qi",	CONST,	norv16qi3)
-BU_ALTIVEC_2 (VNOR_V8HI_UNS,  "vnor_v8hi_uns",	CONST,	norv8hi3)
-BU_ALTIVEC_2 (VNOR_V8HI,      "vnor_v8hi",	CONST,	norv8hi3)
-BU_ALTIVEC_2 (VNOR_V4SI_UNS,  "vnor_v4si_uns",	CONST,	norv4si3)
-BU_ALTIVEC_2 (VNOR_V4SI,      "vnor_v4si",	CONST,	norv4si3)
-BU_ALTIVEC_2 (VNOR_V2DI_UNS,  "vnor_v2di_uns",	CONST,	norv2di3)
-BU_ALTIVEC_2 (VNOR_V2DI,      "vnor_v2di",	CONST,	norv2di3)
-BU_ALTIVEC_2 (VNOR_V4SF,      "vnor_v4sf",	CONST,	norv4sf3)
-BU_ALTIVEC_2 (VNOR_V2DF,      "vnor_v2df",	CONST,	norv2df3)
-BU_ALTIVEC_2 (VOR_V16QI_UNS,  "vor_v16qi_uns",	CONST,	iorv16qi3)
-BU_ALTIVEC_2 (VOR_V16QI,      "vor_v16qi",	CONST,	iorv16qi3)
-BU_ALTIVEC_2 (VOR_V8HI_UNS,   "vor_v8hi_uns",	CONST,	iorv8hi3)
-BU_ALTIVEC_2 (VOR_V8HI,       "vor_v8hi",	CONST,	iorv8hi3)
-BU_ALTIVEC_2 (VOR_V4SI_UNS,   "vor_v4si_uns",	CONST,	iorv4si3)
-BU_ALTIVEC_2 (VOR_V4SI,       "vor_v4si",	CONST,	iorv4si3)
-BU_ALTIVEC_2 (VOR_V2DI_UNS,   "vor_v2di_uns",	CONST,	iorv2di3)
-BU_ALTIVEC_2 (VOR_V2DI,       "vor_v2di",	CONST,	iorv2di3)
-BU_ALTIVEC_2 (VOR_V4SF,       "vor_v4sf",	CONST,	iorv4sf3)
-BU_ALTIVEC_2 (VOR_V2DF,	      "vor_v2df",	CONST,	iorv2df3)
-
-BU_ALTIVEC_2 (VPKUHUM,	      "vpkuhum",	CONST,	altivec_vpkuhum)
-BU_ALTIVEC_2 (VPKUWUM,	      "vpkuwum",	CONST,	altivec_vpkuwum)
-BU_ALTIVEC_2 (VPKPX,	      "vpkpx",		CONST,	altivec_vpkpx)
-BU_ALTIVEC_2 (VPKSHSS,	      "vpkshss",	CONST,	altivec_vpkshss)
-BU_ALTIVEC_2 (VPKSWSS,	      "vpkswss",	CONST,	altivec_vpkswss)
-BU_ALTIVEC_2 (VPKUHUS,	      "vpkuhus",	CONST,	altivec_vpkuhus)
-BU_ALTIVEC_2 (VPKSHUS,	      "vpkshus",	CONST,	altivec_vpkshus)
-BU_ALTIVEC_2 (VPKUWUS,	      "vpkuwus",	CONST,	altivec_vpkuwus)
-BU_ALTIVEC_2 (VPKSWUS,	      "vpkswus",	CONST,	altivec_vpkswus)
-BU_ALTIVEC_2 (VRECIPFP,	      "vrecipdivfp",	CONST,	recipv4sf3)
-BU_ALTIVEC_2 (VRLB,	      "vrlb",		CONST,	vrotlv16qi3)
-BU_ALTIVEC_2 (VRLH,	      "vrlh",		CONST,	vrotlv8hi3)
-BU_ALTIVEC_2 (VRLW,	      "vrlw",		CONST,	vrotlv4si3)
-BU_ALTIVEC_2 (VSLB,	      "vslb",		CONST,	vashlv16qi3)
-BU_ALTIVEC_2 (VSLH,	      "vslh",		CONST,	vashlv8hi3)
-BU_ALTIVEC_2 (VSLW,	      "vslw",		CONST,	vashlv4si3)
-BU_ALTIVEC_2 (VSL,	      "vsl",		CONST,	altivec_vsl)
-BU_ALTIVEC_2 (VSLO,	      "vslo",		CONST,	altivec_vslo)
-BU_ALTIVEC_2 (VSPLTB,	      "vspltb",		CONST,	altivec_vspltb)
-BU_ALTIVEC_2 (VSPLTH,	      "vsplth",		CONST,	altivec_vsplth)
-BU_ALTIVEC_2 (VSPLTW,	      "vspltw",		CONST,	altivec_vspltw)
-BU_ALTIVEC_2 (VSRB,	      "vsrb",		CONST,	vlshrv16qi3)
-BU_ALTIVEC_2 (VSRH,	      "vsrh",		CONST,	vlshrv8hi3)
-BU_ALTIVEC_2 (VSRW,	      "vsrw",		CONST,	vlshrv4si3)
-BU_ALTIVEC_2 (VSRAB,	      "vsrab",		CONST,	vashrv16qi3)
-BU_ALTIVEC_2 (VSRAH,	      "vsrah",		CONST,	vashrv8hi3)
-BU_ALTIVEC_2 (VSRAW,	      "vsraw",		CONST,	vashrv4si3)
-BU_ALTIVEC_2 (VSR,	      "vsr",		CONST,	altivec_vsr)
-BU_ALTIVEC_2 (VSRO,	      "vsro",		CONST,	altivec_vsro)
-BU_ALTIVEC_2 (VSUBUBM,	      "vsububm",	CONST,	subv16qi3)
-BU_ALTIVEC_2 (VSUBUHM,	      "vsubuhm",	CONST,	subv8hi3)
-BU_ALTIVEC_2 (VSUBUWM,	      "vsubuwm",	CONST,	subv4si3)
-BU_ALTIVEC_2 (VSUBFP,	      "vsubfp",		CONST,	subv4sf3)
-BU_ALTIVEC_2 (VSUBCUW,	      "vsubcuw",	CONST,	altivec_vsubcuw)
-BU_ALTIVEC_2 (VSUBUBS,	      "vsububs",	CONST,	altivec_vsububs)
-BU_ALTIVEC_2 (VSUBSBS,	      "vsubsbs",	CONST,	altivec_vsubsbs)
-BU_ALTIVEC_2 (VSUBUHS,	      "vsubuhs",	CONST,	altivec_vsubuhs)
-BU_ALTIVEC_2 (VSUBSHS,	      "vsubshs",	CONST,	altivec_vsubshs)
-BU_ALTIVEC_2 (VSUBUWS,	      "vsubuws",	CONST,	altivec_vsubuws)
-BU_ALTIVEC_2 (VSUBSWS,	      "vsubsws",	CONST,	altivec_vsubsws)
-BU_ALTIVEC_2 (VSUM4UBS,	      "vsum4ubs",	CONST,	altivec_vsum4ubs)
-BU_ALTIVEC_2 (VSUM4SBS,	      "vsum4sbs",	CONST,	altivec_vsum4sbs)
-BU_ALTIVEC_2 (VSUM4SHS,	      "vsum4shs",	CONST,	altivec_vsum4shs)
-BU_ALTIVEC_2 (VSUM2SWS,	      "vsum2sws",	CONST,	altivec_vsum2sws)
-BU_ALTIVEC_2 (VSUMSWS,	      "vsumsws",	CONST,	altivec_vsumsws)
-BU_ALTIVEC_2 (VSUMSWS_BE,     "vsumsws_be",	CONST,	altivec_vsumsws_direct)
-BU_ALTIVEC_2 (VXOR_V16QI_UNS, "vxor_v16qi_uns",	CONST,	xorv16qi3)
-BU_ALTIVEC_2 (VXOR_V16QI,     "vxor_v16qi",	CONST,	xorv16qi3)
-BU_ALTIVEC_2 (VXOR_V8HI_UNS,  "vxor_v8hi_uns",	CONST,	xorv8hi3)
-BU_ALTIVEC_2 (VXOR_V8HI,      "vxor_v8hi",	CONST,	xorv8hi3)
-BU_ALTIVEC_2 (VXOR_V4SI_UNS,  "vxor_v4si_uns",	CONST,	xorv4si3)
-BU_ALTIVEC_2 (VXOR_V4SI,      "vxor_v4si",	CONST,	xorv4si3)
-BU_ALTIVEC_2 (VXOR_V2DI_UNS,  "vxor_v2di_uns",	CONST,	xorv2di3)
-BU_ALTIVEC_2 (VXOR_V2DI,      "vxor_v2di",	CONST,	xorv2di3)
-BU_ALTIVEC_2 (VXOR_V4SF,      "vxor_v4sf",	CONST,	xorv4sf3)
-BU_ALTIVEC_2 (VXOR_V2DF,      "vxor_v2df",	CONST,	xorv2df3)
-
-BU_ALTIVEC_2 (COPYSIGN_V4SF,  "copysignfp",	CONST,	vector_copysignv4sf3)
-
-/* Altivec ABS functions.  */
-BU_ALTIVEC_A (ABS_V4SI,	      "abs_v4si",	CONST,	absv4si2)
-BU_ALTIVEC_A (ABS_V8HI,	      "abs_v8hi",	CONST,	absv8hi2)
-BU_ALTIVEC_A (ABS_V4SF,	      "abs_v4sf",	CONST,	absv4sf2)
-BU_ALTIVEC_A (ABS_V16QI,      "abs_v16qi",	CONST,	absv16qi2)
-BU_ALTIVEC_A (ABSS_V4SI,      "abss_v4si",	SAT,	altivec_abss_v4si)
-BU_ALTIVEC_A (ABSS_V8HI,      "abss_v8hi",	SAT,	altivec_abss_v8hi)
-BU_ALTIVEC_A (ABSS_V16QI,     "abss_v16qi",	SAT,	altivec_abss_v16qi)
-
-/* Altivec NABS functions.  */
-BU_ALTIVEC_A (NABS_V2DI,      "nabs_v2di",	CONST,	nabsv2di2)
-BU_ALTIVEC_A (NABS_V4SI,      "nabs_v4si",	CONST,	nabsv4si2)
-BU_ALTIVEC_A (NABS_V8HI,      "nabs_v8hi",	CONST,	nabsv8hi2)
-BU_ALTIVEC_A (NABS_V16QI,     "nabs_v16qi",	CONST,	nabsv16qi2)
-BU_ALTIVEC_A (NABS_V4SF,      "nabs_v4sf",	CONST,	vsx_nabsv4sf2)
-BU_ALTIVEC_A (NABS_V2DF,      "nabs_v2df",	CONST,	vsx_nabsv2df2)
-
-/* 1 argument Altivec builtin functions.  */
-BU_ALTIVEC_1 (VEXPTEFP,	      "vexptefp",	FP,	altivec_vexptefp)
-BU_ALTIVEC_1 (VLOGEFP,	      "vlogefp",	FP,	altivec_vlogefp)
-BU_ALTIVEC_1 (VREFP,	      "vrefp",		FP,	rev4sf2)
-BU_ALTIVEC_1 (VRFIM,	      "vrfim",		FP,	vector_floorv4sf2)
-BU_ALTIVEC_1 (VRFIN,	      "vrfin",		FP,	altivec_vrfin)
-BU_ALTIVEC_1 (VRFIP,	      "vrfip",		FP,	vector_ceilv4sf2)
-BU_ALTIVEC_1 (VRFIZ,	      "vrfiz",		FP,	vector_btruncv4sf2)
-BU_ALTIVEC_1 (VRSQRTFP,	      "vrsqrtfp",	FP,	rsqrtv4sf2)
-BU_ALTIVEC_1 (VRSQRTEFP,      "vrsqrtefp",	FP,	rsqrtev4sf2)
-BU_ALTIVEC_1 (VSPLTISB,	      "vspltisb",	CONST,	altivec_vspltisb)
-BU_ALTIVEC_1 (VSPLTISH,	      "vspltish",	CONST,	altivec_vspltish)
-BU_ALTIVEC_1 (VSPLTISW,	      "vspltisw",	CONST,	altivec_vspltisw)
-BU_ALTIVEC_1 (VUPKHSB,	      "vupkhsb",	CONST,	altivec_vupkhsb)
-BU_ALTIVEC_1 (VUPKHPX,	      "vupkhpx",	CONST,	altivec_vupkhpx)
-BU_ALTIVEC_1 (VUPKHSH,	      "vupkhsh",	CONST,	altivec_vupkhsh)
-BU_ALTIVEC_1 (VUPKLSB,	      "vupklsb",	CONST,	altivec_vupklsb)
-BU_ALTIVEC_1 (VUPKLPX,	      "vupklpx",	CONST,	altivec_vupklpx)
-BU_ALTIVEC_1 (VUPKLSH,	      "vupklsh",	CONST,	altivec_vupklsh)
-
-BU_ALTIVEC_1 (VREVE_V2DI,      "vreve_v2di", CONST,  altivec_vrevev2di2)
-BU_ALTIVEC_1 (VREVE_V4SI,      "vreve_v4si", CONST,  altivec_vrevev4si2)
-BU_ALTIVEC_1 (VREVE_V8HI,      "vreve_v8hi", CONST,  altivec_vrevev8hi2)
-BU_ALTIVEC_1 (VREVE_V16QI,     "vreve_v16qi", CONST, altivec_vrevev16qi2)
-BU_ALTIVEC_1 (VREVE_V2DF,      "vreve_v2df", CONST,  altivec_vrevev2df2)
-BU_ALTIVEC_1 (VREVE_V4SF,      "vreve_v4sf", CONST,  altivec_vrevev4sf2)
-
-BU_ALTIVEC_1 (FLOAT_V4SI_V4SF,    "float_sisf",	    FP,	floatv4siv4sf2)
-BU_ALTIVEC_1 (UNSFLOAT_V4SI_V4SF, "uns_float_sisf", FP, floatunsv4siv4sf2)
-BU_ALTIVEC_1 (FIX_V4SF_V4SI,      "fix_sfsi",       FP, fix_truncv4sfv4si2)
-BU_ALTIVEC_1 (FIXUNS_V4SF_V4SI,   "fixuns_sfsi",    FP, fixuns_truncv4sfv4si2)
-
-/* Altivec predicate functions.  */
-BU_ALTIVEC_P (VCMPBFP_P,      "vcmpbfp_p",	CONST,	altivec_vcmpbfp_p)
-BU_ALTIVEC_P (VCMPEQFP_P,     "vcmpeqfp_p",	CONST,	vector_eq_v4sf_p)
-BU_ALTIVEC_P (VCMPGEFP_P,     "vcmpgefp_p",	CONST,	vector_ge_v4sf_p)
-BU_ALTIVEC_P (VCMPGTFP_P,     "vcmpgtfp_p",	CONST,	vector_gt_v4sf_p)
-BU_ALTIVEC_P (VCMPEQUW_P,     "vcmpequw_p",	CONST,	vector_eq_v4si_p)
-BU_ALTIVEC_P (VCMPGTSW_P,     "vcmpgtsw_p",	CONST,	vector_gt_v4si_p)
-BU_ALTIVEC_P (VCMPGTUW_P,     "vcmpgtuw_p",	CONST,	vector_gtu_v4si_p)
-BU_ALTIVEC_P (VCMPEQUH_P,     "vcmpequh_p",	CONST,	vector_eq_v8hi_p)
-BU_ALTIVEC_P (VCMPGTSH_P,     "vcmpgtsh_p",	CONST,	vector_gt_v8hi_p)
-BU_ALTIVEC_P (VCMPGTUH_P,     "vcmpgtuh_p",	CONST,	vector_gtu_v8hi_p)
-BU_ALTIVEC_P (VCMPEQUB_P,     "vcmpequb_p",	CONST,	vector_eq_v16qi_p)
-BU_ALTIVEC_P (VCMPGTSB_P,     "vcmpgtsb_p",	CONST,	vector_gt_v16qi_p)
-BU_ALTIVEC_P (VCMPGTUB_P,     "vcmpgtub_p",	CONST,	vector_gtu_v16qi_p)
-
-/* AltiVec builtins that are handled as special cases.  */
-BU_ALTIVEC_X (MTVSCR,		"mtvscr",	    MISC)
-BU_ALTIVEC_X (MFVSCR,		"mfvscr",	    MISC)
-BU_ALTIVEC_X (DSSALL,		"dssall",	    MISC)
-BU_ALTIVEC_X (DSS,		"dss",		    MISC)
-BU_ALTIVEC_X (LVSL,		"lvsl",		    PURE)
-BU_ALTIVEC_X (LVSR,		"lvsr",		    PURE)
-BU_ALTIVEC_X (LVEBX,		"lvebx",	    PURE)
-BU_ALTIVEC_X (LVEHX,		"lvehx",	    PURE)
-BU_ALTIVEC_X (LVEWX,		"lvewx",	    PURE)
-BU_P10V_AV_X (SE_LXVRBX,	"se_lxvrbx",	    PURE)
-BU_P10V_AV_X (SE_LXVRHX,	"se_lxvrhx",	    PURE)
-BU_P10V_AV_X (SE_LXVRWX,	"se_lxvrwx",	    PURE)
-BU_P10V_AV_X (SE_LXVRDX,	"se_lxvrdx",	    PURE)
-BU_P10V_AV_X (ZE_LXVRBX,	"ze_lxvrbx",	    PURE)
-BU_P10V_AV_X (ZE_LXVRHX,	"ze_lxvrhx",	    PURE)
-BU_P10V_AV_X (ZE_LXVRWX,	"ze_lxvrwx",	    PURE)
-BU_P10V_AV_X (ZE_LXVRDX,	"ze_lxvrdx",	    PURE)
-BU_P10V_AV_X (TR_STXVRBX,	"tr_stxvrbx",	    MEM)
-BU_P10V_AV_X (TR_STXVRHX,	"tr_stxvrhx",	    MEM)
-BU_P10V_AV_X (TR_STXVRWX,	"tr_stxvrwx",	    MEM)
-BU_P10V_AV_X (TR_STXVRDX,	"tr_stxvrdx",	    MEM)
-BU_ALTIVEC_X (LVXL,		"lvxl",		    PURE)
-BU_ALTIVEC_X (LVXL_V2DF,	"lvxl_v2df",	    PURE)
-BU_ALTIVEC_X (LVXL_V2DI,	"lvxl_v2di",	    PURE)
-BU_ALTIVEC_X (LVXL_V4SF,	"lvxl_v4sf",	    PURE)
-BU_ALTIVEC_X (LVXL_V4SI,	"lvxl_v4si",	    PURE)
-BU_ALTIVEC_X (LVXL_V8HI,	"lvxl_v8hi",	    PURE)
-BU_ALTIVEC_X (LVXL_V16QI,	"lvxl_v16qi",	    PURE)
-BU_ALTIVEC_X (LVX,		"lvx",		    PURE)
-BU_ALTIVEC_X (LVX_V1TI,		"lvx_v1ti",	    PURE)
-BU_ALTIVEC_X (LVX_V2DF,		"lvx_v2df",	    PURE)
-BU_ALTIVEC_X (LVX_V2DI,		"lvx_v2di",	    PURE)
-BU_ALTIVEC_X (LVX_V4SF,		"lvx_v4sf",	    PURE)
-BU_ALTIVEC_X (LVX_V4SI,		"lvx_v4si",	    PURE)
-BU_ALTIVEC_X (LVX_V8HI,		"lvx_v8hi",	    PURE)
-BU_ALTIVEC_X (LVX_V16QI,	"lvx_v16qi",	    PURE)
-BU_ALTIVEC_X (STVX,		"stvx",		    MEM)
-BU_ALTIVEC_X (STVX_V2DF,	"stvx_v2df",	    MEM)
-BU_ALTIVEC_X (STVX_V2DI,	"stvx_v2di",	    MEM)
-BU_ALTIVEC_X (STVX_V4SF,	"stvx_v4sf",	    MEM)
-BU_ALTIVEC_X (STVX_V4SI,	"stvx_v4si",	    MEM)
-BU_ALTIVEC_X (STVX_V8HI,	"stvx_v8hi",	    MEM)
-BU_ALTIVEC_X (STVX_V16QI,	"stvx_v16qi",	    MEM)
-BU_ALTIVEC_C (LVLX,		"lvlx",		    PURE)
-BU_ALTIVEC_C (LVLXL,		"lvlxl",	    PURE)
-BU_ALTIVEC_C (LVRX,		"lvrx",		    PURE)
-BU_ALTIVEC_C (LVRXL,		"lvrxl",	    PURE)
-BU_ALTIVEC_X (STVEBX,		"stvebx",	    MEM)
-BU_ALTIVEC_X (STVEHX,		"stvehx",	    MEM)
-BU_ALTIVEC_X (STVEWX,		"stvewx",	    MEM)
-BU_ALTIVEC_X (STVXL,		"stvxl",	    MEM)
-BU_ALTIVEC_X (STVXL_V2DF,	"stvxl_v2df",	    MEM)
-BU_ALTIVEC_X (STVXL_V2DI,	"stvxl_v2di",	    MEM)
-BU_ALTIVEC_X (STVXL_V4SF,	"stvxl_v4sf",	    MEM)
-BU_ALTIVEC_X (STVXL_V4SI,	"stvxl_v4si",	    MEM)
-BU_ALTIVEC_X (STVXL_V8HI,	"stvxl_v8hi",	    MEM)
-BU_ALTIVEC_X (STVXL_V16QI,	"stvxl_v16qi",	    MEM)
-BU_ALTIVEC_C (STVLX,		"stvlx",	    MEM)
-BU_ALTIVEC_C (STVLXL,		"stvlxl",	    MEM)
-BU_ALTIVEC_C (STVRX,		"stvrx",	    MEM)
-BU_ALTIVEC_C (STVRXL,		"stvrxl",	    MEM)
-BU_ALTIVEC_X (MASK_FOR_LOAD,	"mask_for_load",    MISC)
-BU_ALTIVEC_X (VEC_INIT_V4SI,	"vec_init_v4si",    CONST)
-BU_ALTIVEC_X (VEC_INIT_V8HI,	"vec_init_v8hi",    CONST)
-BU_ALTIVEC_X (VEC_INIT_V16QI,	"vec_init_v16qi",   CONST)
-BU_ALTIVEC_X (VEC_INIT_V4SF,	"vec_init_v4sf",    CONST)
-BU_ALTIVEC_X (VEC_SET_V4SI,	"vec_set_v4si",     CONST)
-BU_ALTIVEC_X (VEC_SET_V8HI,	"vec_set_v8hi",     CONST)
-BU_ALTIVEC_X (VEC_SET_V16QI,	"vec_set_v16qi",    CONST)
-BU_ALTIVEC_X (VEC_SET_V4SF,	"vec_set_v4sf",     CONST)
-BU_ALTIVEC_X (VEC_EXT_V4SI,	"vec_ext_v4si",     CONST)
-BU_ALTIVEC_X (VEC_EXT_V8HI,	"vec_ext_v8hi",     CONST)
-BU_ALTIVEC_X (VEC_EXT_V16QI,	"vec_ext_v16qi",    CONST)
-BU_ALTIVEC_X (VEC_EXT_V4SF,	"vec_ext_v4sf",     CONST)
-
-/* Altivec overloaded builtins.  */
-/* For now, don't set the classification for overloaded functions.
-   The function should be converted to the type specific instruction
-   before we get to the point about classifying the builtin type.  */
-
-/* 3 argument Altivec overloaded builtins.  */
-BU_ALTIVEC_OVERLOAD_3 (MADD,       "madd")
-BU_ALTIVEC_OVERLOAD_3 (MADDS,      "madds")
-BU_ALTIVEC_OVERLOAD_3 (MLADD,      "mladd")
-BU_ALTIVEC_OVERLOAD_3 (MRADDS,     "mradds")
-BU_ALTIVEC_OVERLOAD_3 (MSUM,       "msum")
-BU_ALTIVEC_OVERLOAD_3 (MSUMS,      "msums")
-BU_ALTIVEC_OVERLOAD_3 (NMSUB,      "nmsub")
-BU_ALTIVEC_OVERLOAD_3 (PERM,       "perm")
-BU_ALTIVEC_OVERLOAD_3 (SEL,        "sel")
-BU_ALTIVEC_OVERLOAD_3 (VMSUMMBM,   "vmsummbm")
-BU_ALTIVEC_OVERLOAD_3 (VMSUMSHM,   "vmsumshm")
-BU_ALTIVEC_OVERLOAD_3 (VMSUMSHS,   "vmsumshs")
-BU_ALTIVEC_OVERLOAD_3 (VMSUMUBM,   "vmsumubm")
-BU_ALTIVEC_OVERLOAD_3 (VMSUMUHM,   "vmsumuhm")
-BU_ALTIVEC_OVERLOAD_3 (VMSUMUDM,   "vmsumudm")
-BU_ALTIVEC_OVERLOAD_3 (VMSUMUHS,   "vmsumuhs")
-
-/* Altivec DST overloaded builtins.  */
-BU_ALTIVEC_OVERLOAD_D (DST,	   "dst")
-BU_ALTIVEC_OVERLOAD_D (DSTT,	   "dstt")
-BU_ALTIVEC_OVERLOAD_D (DSTST,	   "dstst")
-BU_ALTIVEC_OVERLOAD_D (DSTSTT,	   "dststt")
-
-/* 2 argument Altivec overloaded builtins.  */
-BU_ALTIVEC_OVERLOAD_2 (ADD,	   "add")
-BU_ALTIVEC_OVERLOAD_2 (ADDC,	   "addc")
-BU_ALTIVEC_OVERLOAD_2 (ADDS,	   "adds")
-BU_ALTIVEC_OVERLOAD_2 (AND,	   "and")
-BU_ALTIVEC_OVERLOAD_2 (ANDC,	   "andc")
-BU_ALTIVEC_OVERLOAD_2 (AVG,	   "avg")
-BU_ALTIVEC_OVERLOAD_2 (CMPB,	   "cmpb")
-BU_ALTIVEC_OVERLOAD_2 (CMPEQ,	   "cmpeq")
-BU_ALTIVEC_OVERLOAD_2 (CMPGE,	   "cmpge")
-BU_ALTIVEC_OVERLOAD_2 (CMPGT,	   "cmpgt")
-BU_ALTIVEC_OVERLOAD_2 (CMPLE,	   "cmple")
-BU_ALTIVEC_OVERLOAD_2 (CMPLT,	   "cmplt")
-BU_ALTIVEC_OVERLOAD_2 (COPYSIGN,   "copysign")
-BU_ALTIVEC_OVERLOAD_2 (MAX,	   "max")
-BU_ALTIVEC_OVERLOAD_2 (MERGEH,	   "mergeh")
-BU_ALTIVEC_OVERLOAD_2 (MERGEL,	   "mergel")
-BU_ALTIVEC_OVERLOAD_2 (MIN,	   "min")
-BU_ALTIVEC_OVERLOAD_2 (MULE,	   "mule")
-BU_ALTIVEC_OVERLOAD_2 (MULO,	   "mulo")
-BU_ALTIVEC_OVERLOAD_2 (NOR,	   "nor")
-BU_ALTIVEC_OVERLOAD_2 (OR,	   "or")
-BU_ALTIVEC_OVERLOAD_2 (PACK,	   "pack")
-BU_ALTIVEC_OVERLOAD_2 (PACKPX,	   "packpx")
-BU_ALTIVEC_OVERLOAD_2 (PACKS,	   "packs")
-BU_ALTIVEC_OVERLOAD_2 (PACKSU,	   "packsu")
-BU_ALTIVEC_OVERLOAD_2 (RECIP,	   "recipdiv")
-BU_ALTIVEC_OVERLOAD_2 (RL,	   "rl")
-BU_ALTIVEC_OVERLOAD_2 (SL,	   "sl")
-BU_ALTIVEC_OVERLOAD_2 (SLL,	   "sll")
-BU_ALTIVEC_OVERLOAD_2 (SLO,	   "slo")
-BU_ALTIVEC_OVERLOAD_2 (SR,	   "sr")
-BU_ALTIVEC_OVERLOAD_2 (SRA,	   "sra")
-BU_ALTIVEC_OVERLOAD_2 (SRL,	   "srl")
-BU_ALTIVEC_OVERLOAD_2 (SRO,	   "sro")
-BU_ALTIVEC_OVERLOAD_2 (SUB,	   "sub")
-BU_ALTIVEC_OVERLOAD_2 (SUBC,	   "subc")
-BU_ALTIVEC_OVERLOAD_2 (SUBS,	   "subs")
-BU_ALTIVEC_OVERLOAD_2 (SUM2S,	   "sum2s")
-BU_ALTIVEC_OVERLOAD_2 (SUM4S,	   "sum4s")
-BU_ALTIVEC_OVERLOAD_2 (SUMS,	   "sums")
-BU_ALTIVEC_OVERLOAD_2 (VADDFP,	   "vaddfp")
-BU_ALTIVEC_OVERLOAD_2 (VADDSBS,	   "vaddsbs")
-BU_ALTIVEC_OVERLOAD_2 (VADDSHS,	   "vaddshs")
-BU_ALTIVEC_OVERLOAD_2 (VADDSWS,	   "vaddsws")
-BU_ALTIVEC_OVERLOAD_2 (VADDUBM,	   "vaddubm")
-BU_ALTIVEC_OVERLOAD_2 (VADDUBS,	   "vaddubs")
-BU_ALTIVEC_OVERLOAD_2 (VADDUHM,	   "vadduhm")
-BU_ALTIVEC_OVERLOAD_2 (VADDUHS,	   "vadduhs")
-BU_ALTIVEC_OVERLOAD_2 (VADDUWM,	   "vadduwm")
-BU_ALTIVEC_OVERLOAD_2 (VADDUWS,	   "vadduws")
-BU_ALTIVEC_OVERLOAD_2 (VAVGSB,	   "vavgsb")
-BU_ALTIVEC_OVERLOAD_2 (VAVGSH,	   "vavgsh")
-BU_ALTIVEC_OVERLOAD_2 (VAVGSW,	   "vavgsw")
-BU_ALTIVEC_OVERLOAD_2 (VAVGUB,	   "vavgub")
-BU_ALTIVEC_OVERLOAD_2 (VAVGUH,	   "vavguh")
-BU_ALTIVEC_OVERLOAD_2 (VAVGUW,	   "vavguw")
-BU_ALTIVEC_OVERLOAD_2 (VCMPEQFP,   "vcmpeqfp")
-BU_ALTIVEC_OVERLOAD_2 (VCMPEQUB,   "vcmpequb")
-BU_ALTIVEC_OVERLOAD_2 (VCMPEQUH,   "vcmpequh")
-BU_ALTIVEC_OVERLOAD_2 (VCMPEQUW,   "vcmpequw")
-BU_ALTIVEC_OVERLOAD_2 (VCMPGTFP,   "vcmpgtfp")
-BU_ALTIVEC_OVERLOAD_2 (VCMPGTSB,   "vcmpgtsb")
-BU_ALTIVEC_OVERLOAD_2 (VCMPGTSH,   "vcmpgtsh")
-BU_ALTIVEC_OVERLOAD_2 (VCMPGTSW,   "vcmpgtsw")
-BU_ALTIVEC_OVERLOAD_2 (VCMPGTUB,   "vcmpgtub")
-BU_ALTIVEC_OVERLOAD_2 (VCMPGTUH,   "vcmpgtuh")
-BU_ALTIVEC_OVERLOAD_2 (VCMPGTUW,   "vcmpgtuw")
-BU_ALTIVEC_OVERLOAD_2 (VMAXFP,	   "vmaxfp")
-BU_ALTIVEC_OVERLOAD_2 (VMAXSB,	   "vmaxsb")
-BU_ALTIVEC_OVERLOAD_2 (VMAXSH,	   "vmaxsh")
-BU_ALTIVEC_OVERLOAD_2 (VMAXSW,	   "vmaxsw")
-BU_ALTIVEC_OVERLOAD_2 (VMAXUB,	   "vmaxub")
-BU_ALTIVEC_OVERLOAD_2 (VMAXUH,	   "vmaxuh")
-BU_ALTIVEC_OVERLOAD_2 (VMAXUW,	   "vmaxuw")
-BU_ALTIVEC_OVERLOAD_2 (VMINFP,	   "vminfp")
-BU_ALTIVEC_OVERLOAD_2 (VMINSB,	   "vminsb")
-BU_ALTIVEC_OVERLOAD_2 (VMINSH,	   "vminsh")
-BU_ALTIVEC_OVERLOAD_2 (VMINSW,	   "vminsw")
-BU_ALTIVEC_OVERLOAD_2 (VMINUB,	   "vminub")
-BU_ALTIVEC_OVERLOAD_2 (VMINUH,	   "vminuh")
-BU_ALTIVEC_OVERLOAD_2 (VMINUW,	   "vminuw")
-BU_ALTIVEC_OVERLOAD_2 (VMRGHB,	   "vmrghb")
-BU_ALTIVEC_OVERLOAD_2 (VMRGHH,	   "vmrghh")
-BU_ALTIVEC_OVERLOAD_2 (VMRGHW,	   "vmrghw")
-BU_ALTIVEC_OVERLOAD_2 (VMRGLB,	   "vmrglb")
-BU_ALTIVEC_OVERLOAD_2 (VMRGLH,	   "vmrglh")
-BU_ALTIVEC_OVERLOAD_2 (VMRGLW,	   "vmrglw")
-BU_ALTIVEC_OVERLOAD_2 (VMULESB,	   "vmulesb")
-BU_ALTIVEC_OVERLOAD_2 (VMULESH,	   "vmulesh")
-BU_ALTIVEC_OVERLOAD_2 (VMULESW,	   "vmulesw")
-BU_ALTIVEC_OVERLOAD_2 (VMULEUB,	   "vmuleub")
-BU_ALTIVEC_OVERLOAD_2 (VMULEUH,	   "vmuleuh")
-BU_ALTIVEC_OVERLOAD_2 (VMULEUW,	   "vmuleuw")
-BU_ALTIVEC_OVERLOAD_2 (VMULOSB,	   "vmulosb")
-BU_ALTIVEC_OVERLOAD_2 (VMULOSH,	   "vmulosh")
-BU_ALTIVEC_OVERLOAD_2 (VMULOSW,	   "vmulosw")
-BU_ALTIVEC_OVERLOAD_2 (VMULOUB,	   "vmuloub")
-BU_ALTIVEC_OVERLOAD_2 (VMULOUH,	   "vmulouh")
-BU_ALTIVEC_OVERLOAD_2 (VMULOUW,	   "vmulouw")
-BU_ALTIVEC_OVERLOAD_2 (VPKSHSS,	   "vpkshss")
-BU_ALTIVEC_OVERLOAD_2 (VPKSHUS,	   "vpkshus")
-BU_ALTIVEC_OVERLOAD_2 (VPKSWSS,	   "vpkswss")
-BU_ALTIVEC_OVERLOAD_2 (VPKSWUS,	   "vpkswus")
-BU_ALTIVEC_OVERLOAD_2 (VPKUHUM,	   "vpkuhum")
-BU_ALTIVEC_OVERLOAD_2 (VPKUHUS,	   "vpkuhus")
-BU_ALTIVEC_OVERLOAD_2 (VPKUWUM,	   "vpkuwum")
-BU_ALTIVEC_OVERLOAD_2 (VPKUWUS,	   "vpkuwus")
-BU_ALTIVEC_OVERLOAD_2 (VRLB,	   "vrlb")
-BU_ALTIVEC_OVERLOAD_2 (VRLH,	   "vrlh")
-BU_ALTIVEC_OVERLOAD_2 (VRLW,	   "vrlw")
-BU_ALTIVEC_OVERLOAD_2 (VSLB,	   "vslb")
-BU_ALTIVEC_OVERLOAD_2 (VSLH,	   "vslh")
-BU_ALTIVEC_OVERLOAD_2 (VSLW,	   "vslw")
-BU_ALTIVEC_OVERLOAD_2 (VSRAB,	   "vsrab")
-BU_ALTIVEC_OVERLOAD_2 (VSRAH,	   "vsrah")
-BU_ALTIVEC_OVERLOAD_2 (VSRAW,	   "vsraw")
-BU_ALTIVEC_OVERLOAD_2 (VSRB,	   "vsrb")
-BU_ALTIVEC_OVERLOAD_2 (VSRH,	   "vsrh")
-BU_ALTIVEC_OVERLOAD_2 (VSRW,	   "vsrw")
-BU_ALTIVEC_OVERLOAD_2 (VSUBFP,	   "vsubfp")
-BU_ALTIVEC_OVERLOAD_2 (VSUBSBS,	   "vsubsbs")
-BU_ALTIVEC_OVERLOAD_2 (VSUBSHS,	   "vsubshs")
-BU_ALTIVEC_OVERLOAD_2 (VSUBSWS,	   "vsubsws")
-BU_ALTIVEC_OVERLOAD_2 (VSUBUBM,	   "vsububm")
-BU_ALTIVEC_OVERLOAD_2 (VSUBUBS,	   "vsububs")
-BU_ALTIVEC_OVERLOAD_2 (VSUBUHM,	   "vsubuhm")
-BU_ALTIVEC_OVERLOAD_2 (VSUBUHS,	   "vsubuhs")
-BU_ALTIVEC_OVERLOAD_2 (VSUBUWM,	   "vsubuwm")
-BU_ALTIVEC_OVERLOAD_2 (VSUBUWS,	   "vsubuws")
-BU_ALTIVEC_OVERLOAD_2 (VSUM4SBS,   "vsum4sbs")
-BU_ALTIVEC_OVERLOAD_2 (VSUM4SHS,   "vsum4shs")
-BU_ALTIVEC_OVERLOAD_2 (VSUM4UBS,   "vsum4ubs")
-BU_ALTIVEC_OVERLOAD_2 (XOR,	   "xor")
-
-/* 1 argument Altivec overloaded functions.  */
-BU_ALTIVEC_OVERLOAD_1 (ABS,	   "abs")
-BU_ALTIVEC_OVERLOAD_1 (NABS,	   "nabs")
-BU_ALTIVEC_OVERLOAD_1 (ABSS,	   "abss")
-BU_ALTIVEC_OVERLOAD_1 (CEIL,	   "ceil")
-BU_ALTIVEC_OVERLOAD_1 (EXPTE,	   "expte")
-BU_ALTIVEC_OVERLOAD_1 (FLOOR,	   "floor")
-BU_ALTIVEC_OVERLOAD_1 (LOGE,	   "loge")
-BU_ALTIVEC_OVERLOAD_1 (MTVSCR,	   "mtvscr")
-BU_ALTIVEC_OVERLOAD_1 (NEARBYINT,  "nearbyint")
-BU_ALTIVEC_OVERLOAD_1 (RE,	   "re")
-BU_ALTIVEC_OVERLOAD_1 (RINT,       "rint")
-BU_ALTIVEC_OVERLOAD_1 (ROUND,	   "round")
-BU_ALTIVEC_OVERLOAD_1 (RSQRT,	   "rsqrt")
-BU_ALTIVEC_OVERLOAD_1 (RSQRTE,	   "rsqrte")
-BU_ALTIVEC_OVERLOAD_1 (SQRT,       "sqrt")
-BU_ALTIVEC_OVERLOAD_1 (TRUNC,	   "trunc")
-BU_ALTIVEC_OVERLOAD_1 (UNPACKH,	   "unpackh")
-BU_ALTIVEC_OVERLOAD_1 (UNPACKL,	   "unpackl")
-BU_ALTIVEC_OVERLOAD_1 (VUPKHPX,	   "vupkhpx")
-BU_ALTIVEC_OVERLOAD_1 (VUPKHSB,	   "vupkhsb")
-BU_ALTIVEC_OVERLOAD_1 (VUPKHSH,	   "vupkhsh")
-BU_ALTIVEC_OVERLOAD_1 (VUPKLPX,	   "vupklpx")
-BU_ALTIVEC_OVERLOAD_1 (VUPKLSB,	   "vupklsb")
-BU_ALTIVEC_OVERLOAD_1 (VUPKLSH,	   "vupklsh")
-
-BU_ALTIVEC_OVERLOAD_1 (VREVE,        "vreve")
-
-/* Overloaded altivec predicates.  */
-BU_ALTIVEC_OVERLOAD_P (VCMPEQ_P,   "vcmpeq_p")
-BU_ALTIVEC_OVERLOAD_P (VCMPGT_P,   "vcmpgt_p")
-BU_ALTIVEC_OVERLOAD_P (VCMPGE_P,   "vcmpge_p")
-
-/* Overloaded Altivec builtins that are handled as special cases.  */
-BU_ALTIVEC_OVERLOAD_X (ADDE,	   "adde")
-BU_ALTIVEC_OVERLOAD_X (ADDEC,	   "addec")
-BU_ALTIVEC_OVERLOAD_X (CMPNE,	   "cmpne")
-BU_ALTIVEC_OVERLOAD_X (CTF,	   "ctf")
-BU_ALTIVEC_OVERLOAD_X (CTS,	   "cts")
-BU_ALTIVEC_OVERLOAD_X (CTU,	   "ctu")
-BU_ALTIVEC_OVERLOAD_X (EXTRACT,	   "extract")
-BU_ALTIVEC_OVERLOAD_X (INSERT,	   "insert")
-BU_ALTIVEC_OVERLOAD_X (LD,	   "ld")
-BU_ALTIVEC_OVERLOAD_X (LDE,	   "lde")
-BU_ALTIVEC_OVERLOAD_X (LDL,	   "ldl")
-BU_ALTIVEC_OVERLOAD_X (LVEBX,	   "lvebx")
-BU_ALTIVEC_OVERLOAD_X (LVEHX,	   "lvehx")
-BU_ALTIVEC_OVERLOAD_X (LVEWX,	   "lvewx")
-BU_P10V_OVERLOAD_X (SE_LXVRX,   "se_lxvrx")
-BU_P10V_OVERLOAD_X (ZE_LXVRX,   "ze_lxvrx")
-BU_P10V_OVERLOAD_X (TR_STXVRX,  "tr_stxvrx")
-BU_ALTIVEC_OVERLOAD_X (LVLX,	   "lvlx")
-BU_ALTIVEC_OVERLOAD_X (LVLXL,	   "lvlxl")
-BU_ALTIVEC_OVERLOAD_X (LVRX,	   "lvrx")
-BU_ALTIVEC_OVERLOAD_X (LVRXL,	   "lvrxl")
-BU_ALTIVEC_OVERLOAD_X (LVSL,	   "lvsl")
-BU_ALTIVEC_OVERLOAD_X (LVSR,	   "lvsr")
-BU_ALTIVEC_OVERLOAD_X (MUL,	   "mul")
-BU_ALTIVEC_OVERLOAD_X (PROMOTE,	   "promote")
-BU_ALTIVEC_OVERLOAD_X (SLD,	   "sld")
-BU_ALTIVEC_OVERLOAD_X (SLDW,	   "sldw")
-BU_ALTIVEC_OVERLOAD_X (SPLAT,	   "splat")
-BU_ALTIVEC_OVERLOAD_X (SPLATS,	   "splats")
-BU_ALTIVEC_OVERLOAD_X (ST,	   "st")
-BU_ALTIVEC_OVERLOAD_X (STE,	   "ste")
-BU_ALTIVEC_OVERLOAD_X (STEP,	   "step")
-BU_ALTIVEC_OVERLOAD_X (STL,	   "stl")
-BU_ALTIVEC_OVERLOAD_X (STVEBX,	   "stvebx")
-BU_ALTIVEC_OVERLOAD_X (STVEHX,	   "stvehx")
-BU_ALTIVEC_OVERLOAD_X (STVEWX,	   "stvewx")
-BU_ALTIVEC_OVERLOAD_X (STVLX,	   "stvlx")
-BU_ALTIVEC_OVERLOAD_X (STVLXL,	   "stvlxl")
-BU_ALTIVEC_OVERLOAD_X (STVRX,	   "stvrx")
-BU_ALTIVEC_OVERLOAD_X (STVRXL,	   "stvrxl")
-BU_ALTIVEC_OVERLOAD_X (SUBE,	   "sube")
-BU_ALTIVEC_OVERLOAD_X (SUBEC,	   "subec")
-BU_ALTIVEC_OVERLOAD_X (VCFSX,	   "vcfsx")
-BU_ALTIVEC_OVERLOAD_X (VCFUX,	   "vcfux")
-BU_ALTIVEC_OVERLOAD_X (VSPLTB,	   "vspltb")
-BU_ALTIVEC_OVERLOAD_X (VSPLTH,	   "vsplth")
-BU_ALTIVEC_OVERLOAD_X (VSPLTW,	   "vspltw")
-\f
-/* 3 argument VSX builtins.  */
-BU_VSX_3 (XVMADDSP,           "xvmaddsp",       CONST, 	fmav4sf4)
-BU_VSX_3 (XVMSUBSP,           "xvmsubsp",       CONST, 	fmsv4sf4)
-BU_VSX_3 (XVNMADDSP,          "xvnmaddsp",      CONST, 	nfmav4sf4)
-BU_VSX_3 (XVNMSUBSP,          "xvnmsubsp",      CONST, 	nfmsv4sf4)
-
-BU_VSX_3 (XVMADDDP,           "xvmadddp",       CONST, 	fmav2df4)
-BU_VSX_3 (XVMSUBDP,           "xvmsubdp",       CONST, 	fmsv2df4)
-BU_VSX_3 (XVNMADDDP,          "xvnmadddp",      CONST, 	nfmav2df4)
-BU_VSX_3 (XVNMSUBDP,          "xvnmsubdp",      CONST, 	nfmsv2df4)
-
-BU_VSX_3 (XXSEL_1TI,          "xxsel_1ti",      CONST, 	vector_select_v1ti)
-BU_VSX_3 (XXSEL_2DI,          "xxsel_2di",      CONST, 	vector_select_v2di)
-BU_VSX_3 (XXSEL_2DF,          "xxsel_2df",      CONST, 	vector_select_v2df)
-BU_VSX_3 (XXSEL_4SF,          "xxsel_4sf",      CONST, 	vector_select_v4sf)
-BU_VSX_3 (XXSEL_4SI,          "xxsel_4si",      CONST, 	vector_select_v4si)
-BU_VSX_3 (XXSEL_8HI,          "xxsel_8hi",      CONST, 	vector_select_v8hi)
-BU_VSX_3 (XXSEL_16QI,         "xxsel_16qi",     CONST, 	vector_select_v16qi)
-BU_VSX_3 (XXSEL_1TI_UNS,      "xxsel_1ti_uns",  CONST, 	vector_select_v1ti_uns)
-BU_VSX_3 (XXSEL_2DI_UNS,      "xxsel_2di_uns",  CONST, 	vector_select_v2di_uns)
-BU_VSX_3 (XXSEL_4SI_UNS,      "xxsel_4si_uns",  CONST, 	vector_select_v4si_uns)
-BU_VSX_3 (XXSEL_8HI_UNS,      "xxsel_8hi_uns",  CONST, 	vector_select_v8hi_uns)
-BU_VSX_3 (XXSEL_16QI_UNS,     "xxsel_16qi_uns", CONST, 	vector_select_v16qi_uns)
-
-BU_VSX_3 (VPERM_1TI,          "vperm_1ti",      CONST, 	altivec_vperm_v1ti)
-BU_VSX_3 (VPERM_2DI,          "vperm_2di",      CONST, 	altivec_vperm_v2di)
-BU_VSX_3 (VPERM_2DF,          "vperm_2df",      CONST, 	altivec_vperm_v2df)
-BU_VSX_3 (VPERM_4SF,          "vperm_4sf",      CONST, 	altivec_vperm_v4sf)
-BU_VSX_3 (VPERM_4SI,          "vperm_4si",      CONST, 	altivec_vperm_v4si)
-BU_VSX_3 (VPERM_8HI,          "vperm_8hi",      CONST, 	altivec_vperm_v8hi)
-BU_VSX_3 (VPERM_16QI,         "vperm_16qi",     CONST, 	altivec_vperm_v16qi)
-BU_VSX_3 (VPERM_1TI_UNS,      "vperm_1ti_uns",  CONST, 	altivec_vperm_v1ti_uns)
-BU_VSX_3 (VPERM_2DI_UNS,      "vperm_2di_uns",  CONST, 	altivec_vperm_v2di_uns)
-BU_VSX_3 (VPERM_4SI_UNS,      "vperm_4si_uns",  CONST, 	altivec_vperm_v4si_uns)
-BU_VSX_3 (VPERM_8HI_UNS,      "vperm_8hi_uns",  CONST, 	altivec_vperm_v8hi_uns)
-BU_VSX_3 (VPERM_16QI_UNS,     "vperm_16qi_uns", CONST, 	altivec_vperm_v16qi_uns)
-
-BU_VSX_3 (XXPERMDI_1TI,       "xxpermdi_1ti",   CONST, 	vsx_xxpermdi_v1ti)
-BU_VSX_3 (XXPERMDI_2DF,       "xxpermdi_2df",   CONST, 	vsx_xxpermdi_v2df)
-BU_VSX_3 (XXPERMDI_2DI,       "xxpermdi_2di",   CONST, 	vsx_xxpermdi_v2di)
-BU_VSX_3 (XXPERMDI_4SF,       "xxpermdi_4sf",   CONST, 	vsx_xxpermdi_v4sf)
-BU_VSX_3 (XXPERMDI_4SI,       "xxpermdi_4si",   CONST, 	vsx_xxpermdi_v4si)
-BU_VSX_3 (XXPERMDI_8HI,       "xxpermdi_8hi",   CONST, 	vsx_xxpermdi_v8hi)
-BU_VSX_3 (XXPERMDI_16QI,      "xxpermdi_16qi",  CONST, 	vsx_xxpermdi_v16qi)
-BU_VSX_3 (SET_1TI,            "set_1ti",        CONST, 	vsx_set_v1ti)
-BU_VSX_3 (SET_2DF,            "set_2df",        CONST, 	vsx_set_v2df)
-BU_VSX_3 (SET_2DI,            "set_2di",        CONST, 	vsx_set_v2di)
-BU_VSX_3 (XXSLDWI_2DI,        "xxsldwi_2di",    CONST, 	vsx_xxsldwi_v2di)
-BU_VSX_3 (XXSLDWI_2DF,        "xxsldwi_2df",    CONST, 	vsx_xxsldwi_v2df)
-BU_VSX_3 (XXSLDWI_4SF,        "xxsldwi_4sf",    CONST, 	vsx_xxsldwi_v4sf)
-BU_VSX_3 (XXSLDWI_4SI,        "xxsldwi_4si",    CONST, 	vsx_xxsldwi_v4si)
-BU_VSX_3 (XXSLDWI_8HI,        "xxsldwi_8hi",    CONST, 	vsx_xxsldwi_v8hi)
-BU_VSX_3 (XXSLDWI_16QI,       "xxsldwi_16qi",   CONST, 	vsx_xxsldwi_v16qi)
-
-/* 2 argument VSX builtins.  */
-BU_VSX_2 (XVADDDP,	      "xvadddp",	FP,	addv2df3)
-BU_VSX_2 (XVSUBDP,	      "xvsubdp",	FP,	subv2df3)
-BU_VSX_2 (XVMULDP,	      "xvmuldp",	FP,	mulv2df3)
-BU_VSX_2 (XVDIVDP,	      "xvdivdp",	FP,	divv2df3)
-BU_VSX_2 (RECIP_V2DF,	      "xvrecipdivdp",	FP,	recipv2df3)
-BU_VSX_2 (XVMINDP,	      "xvmindp",	CONST,	sminv2df3)
-BU_VSX_2 (XVMAXDP,	      "xvmaxdp",	CONST,	smaxv2df3)
-BU_VSX_2 (XVTDIVDP_FE,	      "xvtdivdp_fe",	CONST,	vsx_tdivv2df3_fe)
-BU_VSX_2 (XVTDIVDP_FG,	      "xvtdivdp_fg",	CONST,	vsx_tdivv2df3_fg)
-BU_VSX_2 (XVCMPEQDP,	      "xvcmpeqdp",	CONST,	vector_eqv2df)
-BU_VSX_2 (XVCMPGTDP,	      "xvcmpgtdp",	CONST,	vector_gtv2df)
-BU_VSX_2 (XVCMPGEDP,	      "xvcmpgedp",	CONST,	vector_gev2df)
-
-BU_VSX_2 (XVADDSP,	      "xvaddsp",	FP,	addv4sf3)
-BU_VSX_2 (XVSUBSP,	      "xvsubsp",	FP,	subv4sf3)
-BU_VSX_2 (XVMULSP,	      "xvmulsp",	FP,	mulv4sf3)
-BU_VSX_2 (XVDIVSP,	      "xvdivsp",	FP,	divv4sf3)
-BU_VSX_2 (RECIP_V4SF,	      "xvrecipdivsp",	FP,	recipv4sf3)
-BU_VSX_2 (XVMINSP,	      "xvminsp",	CONST,	sminv4sf3)
-BU_VSX_2 (XVMAXSP,	      "xvmaxsp",	CONST,	smaxv4sf3)
-BU_VSX_2 (XVTDIVSP_FE,	      "xvtdivsp_fe",	CONST,	vsx_tdivv4sf3_fe)
-BU_VSX_2 (XVTDIVSP_FG,	      "xvtdivsp_fg",	CONST,	vsx_tdivv4sf3_fg)
-BU_VSX_2 (XVCMPEQSP,	      "xvcmpeqsp",	CONST,	vector_eqv4sf)
-BU_VSX_2 (XVCMPGTSP,	      "xvcmpgtsp",	CONST,	vector_gtv4sf)
-BU_VSX_2 (XVCMPGESP,	      "xvcmpgesp",	CONST,	vector_gev4sf)
-
-BU_VSX_2 (XSMINDP,	      "xsmindp",	CONST,	smindf3)
-BU_VSX_2 (XSMAXDP,	      "xsmaxdp",	CONST,	smaxdf3)
-BU_VSX_2 (XSTDIVDP_FE,	      "xstdivdp_fe",	CONST,	vsx_tdivdf3_fe)
-BU_VSX_2 (XSTDIVDP_FG,	      "xstdivdp_fg",	CONST,	vsx_tdivdf3_fg)
-BU_VSX_2 (CPSGNDP,	      "cpsgndp",	CONST,	vector_copysignv2df3)
-BU_VSX_2 (CPSGNSP,	      "cpsgnsp",	CONST,	vector_copysignv4sf3)
-
-BU_VSX_2 (CONCAT_2DF,	      "concat_2df",	CONST,	vsx_concat_v2df)
-BU_VSX_2 (CONCAT_2DI,	      "concat_2di",	CONST,	vsx_concat_v2di)
-BU_VSX_2 (SPLAT_2DF,	      "splat_2df",	CONST,	vsx_splat_v2df)
-BU_VSX_2 (SPLAT_2DI,	      "splat_2di",	CONST,	vsx_splat_v2di)
-BU_VSX_2 (XXMRGHW_4SF,	      "xxmrghw",	CONST,	vsx_xxmrghw_v4sf)
-BU_VSX_2 (XXMRGHW_4SI,	      "xxmrghw_4si",	CONST,	vsx_xxmrghw_v4si)
-BU_VSX_2 (XXMRGLW_4SF,	      "xxmrglw",	CONST,	vsx_xxmrglw_v4sf)
-BU_VSX_2 (XXMRGLW_4SI,	      "xxmrglw_4si",	CONST,	vsx_xxmrglw_v4si)
-BU_VSX_2 (VEC_MERGEL_V2DF,    "mergel_2df",	CONST,	vsx_mergel_v2df)
-BU_VSX_2 (VEC_MERGEL_V2DI,    "mergel_2di",	CONST,	vsx_mergel_v2di)
-BU_VSX_2 (VEC_MERGEH_V2DF,    "mergeh_2df",	CONST,	vsx_mergeh_v2df)
-BU_VSX_2 (VEC_MERGEH_V2DI,    "mergeh_2di",	CONST,	vsx_mergeh_v2di)
-BU_VSX_2 (XXSPLTD_V2DF,       "xxspltd_2df",    CONST,  vsx_xxspltd_v2df)
-BU_VSX_2 (XXSPLTD_V2DI,       "xxspltd_2di",    CONST,  vsx_xxspltd_v2di)
-BU_VSX_2 (DIV_V2DI,           "div_2di",        CONST,  vsx_div_v2di)
-BU_VSX_2 (UDIV_V2DI,          "udiv_2di",       CONST,  vsx_udiv_v2di)
-BU_VSX_2 (MUL_V2DI,           "mul_2di",        CONST,  vsx_mul_v2di)
-
-BU_VSX_2 (XVCVSXDDP_SCALE,    "xvcvsxddp_scale", CONST, vsx_xvcvsxddp_scale)
-BU_VSX_2 (XVCVUXDDP_SCALE,    "xvcvuxddp_scale", CONST, vsx_xvcvuxddp_scale)
-BU_VSX_2 (XVCVDPSXDS_SCALE,   "xvcvdpsxds_scale", CONST, vsx_xvcvdpsxds_scale)
-BU_VSX_2 (XVCVDPUXDS_SCALE,   "xvcvdpuxds_scale", CONST, vsx_xvcvdpuxds_scale)
-
-BU_VSX_2 (CMPGE_16QI,         "cmpge_16qi",     CONST,  vector_nltv16qi)
-BU_VSX_2 (CMPGE_8HI,          "cmpge_8hi",      CONST,  vector_nltv8hi)
-BU_VSX_2 (CMPGE_4SI,          "cmpge_4si",      CONST,  vector_nltv4si)
-BU_VSX_2 (CMPGE_2DI,          "cmpge_2di",      CONST,  vector_nltv2di)
-BU_VSX_2 (CMPGE_U16QI,        "cmpge_u16qi",    CONST,  vector_nltuv16qi)
-BU_VSX_2 (CMPGE_U8HI,         "cmpge_u8hi",     CONST,  vector_nltuv8hi)
-BU_VSX_2 (CMPGE_U4SI,         "cmpge_u4si",     CONST,  vector_nltuv4si)
-BU_VSX_2 (CMPGE_U2DI,         "cmpge_u2di",     CONST,  vector_nltuv2di)
-
-BU_VSX_2 (CMPLE_16QI,         "cmple_16qi",     CONST,  vector_ngtv16qi)
-BU_VSX_2 (CMPLE_8HI,          "cmple_8hi",      CONST,  vector_ngtv8hi)
-BU_VSX_2 (CMPLE_4SI,          "cmple_4si",      CONST,  vector_ngtv4si)
-BU_VSX_2 (CMPLE_2DI,          "cmple_2di",      CONST,  vector_ngtv2di)
-BU_VSX_2 (CMPLE_U16QI,        "cmple_u16qi",    CONST,  vector_ngtuv16qi)
-BU_VSX_2 (CMPLE_U8HI,         "cmple_u8hi",     CONST,  vector_ngtuv8hi)
-BU_VSX_2 (CMPLE_U4SI,         "cmple_u4si",     CONST,  vector_ngtuv4si)
-BU_VSX_2 (CMPLE_U2DI,         "cmple_u2di",     CONST,  vector_ngtuv2di)
-
-/* VSX abs builtin functions.  */
-BU_VSX_A (XVABSDP,	      "xvabsdp",	CONST,	absv2df2)
-BU_VSX_A (XVNABSDP,	      "xvnabsdp",	CONST,	vsx_nabsv2df2)
-BU_VSX_A (XVABSSP,	      "xvabssp",	CONST,	absv4sf2)
-BU_VSX_A (XVNABSSP,	      "xvnabssp",	CONST,	vsx_nabsv4sf2)
-
-/* 1 argument VSX builtin functions.  */
-BU_VSX_1 (XVNEGDP,	      "xvnegdp",	CONST,	negv2df2)
-BU_VSX_1 (XVSQRTDP,	      "xvsqrtdp",	CONST,	sqrtv2df2)
-BU_VSX_1 (RSQRT_2DF,	      "xvrsqrtdp",	CONST,	rsqrtv2df2)
-BU_VSX_1 (XVRSQRTEDP,	      "xvrsqrtedp",	CONST,	rsqrtev2df2)
-BU_VSX_1 (XVTSQRTDP_FE,	      "xvtsqrtdp_fe",	CONST,	vsx_tsqrtv2df2_fe)
-BU_VSX_1 (XVTSQRTDP_FG,	      "xvtsqrtdp_fg",	CONST,	vsx_tsqrtv2df2_fg)
-BU_VSX_1 (XVREDP,	      "xvredp",		CONST,	vsx_frev2df2)
-
-BU_VSX_1 (XVNEGSP,	      "xvnegsp",	CONST,	negv4sf2)
-BU_VSX_1 (XVSQRTSP,	      "xvsqrtsp",	CONST,	sqrtv4sf2)
-BU_VSX_1 (RSQRT_4SF,          "xvrsqrtsp",	CONST,	rsqrtv4sf2)
-BU_VSX_1 (XVRSQRTESP,	      "xvrsqrtesp",	CONST,	rsqrtev4sf2)
-BU_VSX_1 (XVTSQRTSP_FE,	      "xvtsqrtsp_fe",	CONST,	vsx_tsqrtv4sf2_fe)
-BU_VSX_1 (XVTSQRTSP_FG,	      "xvtsqrtsp_fg",	CONST,	vsx_tsqrtv4sf2_fg)
-BU_VSX_1 (XVRESP,	      "xvresp",		CONST,	vsx_frev4sf2)
-
-BU_VSX_1 (XSCVDPSP,	      "xscvdpsp",	CONST,	vsx_xscvdpsp)
-BU_VSX_1 (XSCVSPDP,	      "xscvspdp",	CONST,	vsx_xscvspdp)
-BU_VSX_1 (XVCVDPSP,	      "xvcvdpsp",	CONST,	vsx_xvcvdpsp)
-BU_VSX_1 (XVCVSPDP,	      "xvcvspdp",	CONST,	vsx_xvcvspdp)
-BU_VSX_1 (XSTSQRTDP_FE,	      "xstsqrtdp_fe",	CONST,	vsx_tsqrtdf2_fe)
-BU_VSX_1 (XSTSQRTDP_FG,	      "xstsqrtdp_fg",	CONST,	vsx_tsqrtdf2_fg)
-
-BU_VSX_1 (XVCVDPSXDS,	      "xvcvdpsxds",	CONST,	vsx_fix_truncv2dfv2di2)
-BU_VSX_1 (XVCVDPUXDS,	      "xvcvdpuxds",	CONST,	vsx_fixuns_truncv2dfv2di2)
-BU_VSX_1 (XVCVDPUXDS_UNS,     "xvcvdpuxds_uns",	CONST,	vsx_fixuns_truncv2dfv2di2)
-BU_VSX_1 (XVCVSXDDP,	      "xvcvsxddp",	CONST,	vsx_floatv2div2df2)
-BU_VSX_1 (XVCVUXDDP,	      "xvcvuxddp",	CONST,	vsx_floatunsv2div2df2)
-BU_VSX_1 (XVCVUXDDP_UNS,       "xvcvuxddp_uns",	CONST,	vsx_floatunsv2div2df2)
-
-BU_VSX_1 (XVCVSPSXWS,	      "xvcvspsxws",	CONST,	vsx_fix_truncv4sfv4si2)
-BU_VSX_1 (XVCVSPUXWS,	      "xvcvspuxws",	CONST,	vsx_fixuns_truncv4sfv4si2)
-BU_VSX_1 (XVCVSXWSP,	      "xvcvsxwsp",	CONST,	vsx_floatv4siv4sf2)
-BU_VSX_1 (XVCVUXWSP,	      "xvcvuxwsp",	CONST,	vsx_floatunsv4siv4sf2)
-
-BU_VSX_1 (XVCVDPSXWS,	      "xvcvdpsxws",	CONST,	vsx_xvcvdpsxws)
-BU_VSX_1 (XVCVDPUXWS,	      "xvcvdpuxws",	CONST,	vsx_xvcvdpuxws)
-BU_VSX_1 (XVCVSXWDP,	      "xvcvsxwdp",	CONST,	vsx_xvcvsxwdp)
-BU_VSX_1 (XVCVUXWDP,	      "xvcvuxwdp",	CONST,	vsx_xvcvuxwdp)
-BU_VSX_1 (XVRDPI,	      "xvrdpi",		CONST,	vsx_xvrdpi)
-BU_VSX_1 (XVRDPIC,	      "xvrdpic",	CONST,	vsx_xvrdpic)
-BU_VSX_1 (XVRDPIM,	      "xvrdpim",	CONST,	vsx_floorv2df2)
-BU_VSX_1 (XVRDPIP,	      "xvrdpip",	CONST,	vsx_ceilv2df2)
-BU_VSX_1 (XVRDPIZ,	      "xvrdpiz",	CONST,	vsx_btruncv2df2)
-
-BU_VSX_1 (XVCVSPSXDS,	      "xvcvspsxds",	CONST,	vsx_xvcvspsxds)
-BU_VSX_1 (XVCVSPUXDS,	      "xvcvspuxds",	CONST,	vsx_xvcvspuxds)
-BU_VSX_1 (XVCVSXDSP,	      "xvcvsxdsp",	CONST,	vsx_xvcvsxdsp)
-BU_VSX_1 (XVCVUXDSP,	      "xvcvuxdsp",	CONST,	vsx_xvcvuxdsp)
-
-BU_VSX_1 (XVCVSXWSP_V4SF,  "vsx_xvcvsxwsp",   CONST,	vsx_xvcvsxwsp)
-BU_VSX_1 (XVCVUXWSP_V4SF,  "vsx_xvcvuxwsp",   CONST,	vsx_xvcvuxwsp)
-BU_VSX_1 (FLOATE_V2DI,     "floate_v2di",     CONST,	floatev2di)
-BU_VSX_1 (FLOATE_V2DF,     "floate_v2df",     CONST,	floatev2df)
-BU_VSX_1 (FLOATO_V2DI,     "floato_v2di",     CONST,	floatov2di)
-BU_VSX_1 (FLOATO_V2DF,     "floato_v2df",     CONST,	floatov2df)
-BU_VSX_1 (UNS_FLOATO_V2DI, "uns_floato_v2di", CONST,	unsfloatov2di)
-BU_VSX_1 (UNS_FLOATE_V2DI, "uns_floate_v2di", CONST,	unsfloatev2di)
-
-BU_VSX_1 (XVRSPI,	      "xvrspi",		CONST,	vsx_xvrspi)
-BU_VSX_1 (XVRSPIC,	      "xvrspic",	CONST,	vsx_xvrspic)
-BU_VSX_1 (XVRSPIM,	      "xvrspim",	CONST,	vsx_floorv4sf2)
-BU_VSX_1 (XVRSPIP,	      "xvrspip",	CONST,	vsx_ceilv4sf2)
-BU_VSX_1 (XVRSPIZ,	      "xvrspiz",	CONST,	vsx_btruncv4sf2)
-
-BU_VSX_1 (XSRDPI,	      "xsrdpi",		CONST,	vsx_xsrdpi)
-BU_VSX_1 (XSRDPIC,	      "xsrdpic",	CONST,	vsx_xsrdpic)
-BU_VSX_1 (XSRDPIM,	      "xsrdpim",	CONST,	floordf2)
-BU_VSX_1 (XSRDPIP,	      "xsrdpip",	CONST,	ceildf2)
-BU_VSX_1 (XSRDPIZ,	      "xsrdpiz",	CONST,	btruncdf2)
-
-BU_VSX_1 (DOUBLEE_V4SI,      "doublee_v4si",     CONST,	doubleev4si2)
-BU_VSX_1 (DOUBLEE_V4SF,      "doublee_v4sf",     CONST,	doubleev4sf2)
-BU_VSX_1 (UNS_DOUBLEE_V4SI,  "uns_doublee_v4si", CONST,	unsdoubleev4si2)
-BU_VSX_1 (DOUBLEO_V4SI,      "doubleo_v4si",     CONST,	doubleov4si2)
-BU_VSX_1 (DOUBLEO_V4SF,      "doubleo_v4sf",     CONST,	doubleov4sf2)
-BU_VSX_1 (UNS_DOUBLEO_V4SI,  "uns_doubleo_v4si", CONST,	unsdoubleov4si2)
-BU_VSX_1 (DOUBLEH_V4SI,      "doubleh_v4si",     CONST,	doublehv4si2)
-BU_VSX_1 (DOUBLEH_V4SF,      "doubleh_v4sf",     CONST,	doublehv4sf2)
-BU_VSX_1 (UNS_DOUBLEH_V4SI,  "uns_doubleh_v4si", CONST,	unsdoublehv4si2)
-BU_VSX_1 (DOUBLEL_V4SI,      "doublel_v4si",     CONST,	doublelv4si2)
-BU_VSX_1 (DOUBLEL_V4SF,      "doublel_v4sf",     CONST,	doublelv4sf2)
-BU_VSX_1 (UNS_DOUBLEL_V4SI,  "uns_doublel_v4si", CONST,	unsdoublelv4si2)
-
-BU_VSX_1 (VEC_VSIGNED_V4SF,      "vsigned_v4sf",     CONST,  vsx_xvcvspsxws)
-BU_VSX_1 (VEC_VSIGNED_V2DF,      "vsigned_v2df",     CONST,  vsx_xvcvdpsxds)
-BU_VSX_1 (VEC_VSIGNEDE_V2DF,     "vsignede_v2df",    CONST,  vsignede_v2df)
-BU_VSX_1 (VEC_VSIGNEDO_V2DF,     "vsignedo_v2df",    CONST,  vsignedo_v2df)
-
-BU_VSX_1 (VEC_VUNSIGNED_V4SF,    "vunsigned_v4sf",    CONST,  vsx_xvcvspsxws)
-BU_VSX_1 (VEC_VUNSIGNED_V2DF,    "vunsigned_v2df",    CONST,  vsx_xvcvdpsxds)
-BU_VSX_1 (VEC_VUNSIGNEDE_V2DF,   "vunsignede_v2df",   CONST,  vunsignede_v2df)
-BU_VSX_1 (VEC_VUNSIGNEDO_V2DF,   "vunsignedo_v2df",   CONST,  vunsignedo_v2df)
-
-/* VSX predicate functions.  */
-BU_VSX_P (XVCMPEQSP_P,	      "xvcmpeqsp_p",	CONST,	vector_eq_v4sf_p)
-BU_VSX_P (XVCMPGESP_P,	      "xvcmpgesp_p",	CONST,	vector_ge_v4sf_p)
-BU_VSX_P (XVCMPGTSP_P,	      "xvcmpgtsp_p",	CONST,	vector_gt_v4sf_p)
-BU_VSX_P (XVCMPEQDP_P,	      "xvcmpeqdp_p",	CONST,	vector_eq_v2df_p)
-BU_VSX_P (XVCMPGEDP_P,	      "xvcmpgedp_p",	CONST,	vector_ge_v2df_p)
-BU_VSX_P (XVCMPGTDP_P,	      "xvcmpgtdp_p",	CONST,	vector_gt_v2df_p)
-
-/* VSX builtins that are handled as special cases.  */
-BU_VSX_X (LXSDX,	      "lxsdx",		PURE)
-BU_VSX_X (LXVD2X_V1TI,	      "lxvd2x_v1ti",	PURE)
-BU_VSX_X (LXVD2X_V2DF,	      "lxvd2x_v2df",	PURE)
-BU_VSX_X (LXVD2X_V2DI,	      "lxvd2x_v2di",	PURE)
-BU_VSX_X (LXVDSX,	      "lxvdsx",		PURE)
-BU_VSX_X (LXVW4X_V4SF,	      "lxvw4x_v4sf",	PURE)
-BU_VSX_X (LXVW4X_V4SI,	      "lxvw4x_v4si",	PURE)
-BU_VSX_X (LXVW4X_V8HI,	      "lxvw4x_v8hi",	PURE)
-BU_VSX_X (LXVW4X_V16QI,	      "lxvw4x_v16qi",	PURE)
-BU_VSX_X (STXSDX,	      "stxsdx",		MEM)
-BU_VSX_X (STXVD2X_V1TI,	      "stxvd2x_v1ti",	MEM)
-BU_VSX_X (STXVD2X_V2DF,	      "stxvd2x_v2df",	MEM)
-BU_VSX_X (STXVD2X_V2DI,	      "stxvd2x_v2di",	MEM)
-BU_VSX_X (STXVW4X_V4SF,	      "stxvw4x_v4sf",	MEM)
-BU_VSX_X (STXVW4X_V4SI,	      "stxvw4x_v4si",	MEM)
-BU_VSX_X (STXVW4X_V8HI,	      "stxvw4x_v8hi",	MEM)
-BU_VSX_X (STXVW4X_V16QI,      "stxvw4x_v16qi",	MEM)
-BU_VSX_X (LD_ELEMREV_V1TI,    "ld_elemrev_v1ti",  PURE)
-BU_VSX_X (LD_ELEMREV_V2DF,    "ld_elemrev_v2df",  PURE)
-BU_VSX_X (LD_ELEMREV_V2DI,    "ld_elemrev_v2di",  PURE)
-BU_VSX_X (LD_ELEMREV_V4SF,    "ld_elemrev_v4sf",  PURE)
-BU_VSX_X (LD_ELEMREV_V4SI,    "ld_elemrev_v4si",  PURE)
-BU_VSX_X (LD_ELEMREV_V8HI,    "ld_elemrev_v8hi",  PURE)
-BU_VSX_X (LD_ELEMREV_V16QI,   "ld_elemrev_v16qi", PURE)
-BU_VSX_X (ST_ELEMREV_V1TI,    "st_elemrev_v1ti",  MEM)
-BU_VSX_X (ST_ELEMREV_V2DF,    "st_elemrev_v2df",  MEM)
-BU_VSX_X (ST_ELEMREV_V2DI,    "st_elemrev_v2di",  MEM)
-BU_VSX_X (ST_ELEMREV_V4SF,    "st_elemrev_v4sf",  MEM)
-BU_VSX_X (ST_ELEMREV_V4SI,    "st_elemrev_v4si",  MEM)
-BU_VSX_X (ST_ELEMREV_V8HI,    "st_elemrev_v8hi",  MEM)
-BU_VSX_X (ST_ELEMREV_V16QI,   "st_elemrev_v16qi", MEM)
-BU_VSX_X (XSABSDP,	      "xsabsdp",	CONST)
-BU_VSX_X (XSADDDP,	      "xsadddp",	FP)
-BU_VSX_X (XSCMPODP,	      "xscmpodp",	FP)
-BU_VSX_X (XSCMPUDP,	      "xscmpudp",	FP)
-BU_VSX_X (XSCVDPSXDS,	      "xscvdpsxds",	FP)
-BU_VSX_X (XSCVDPSXWS,	      "xscvdpsxws",	FP)
-BU_VSX_X (XSCVDPUXDS,	      "xscvdpuxds",	FP)
-BU_VSX_X (XSCVDPUXWS,	      "xscvdpuxws",	FP)
-BU_VSX_X (XSCVSXDDP,	      "xscvsxddp",	FP)
-BU_VSX_X (XSCVUXDDP,	      "xscvuxddp",	FP)
-BU_VSX_X (XSDIVDP,	      "xsdivdp",	FP)
-BU_VSX_X (XSMADDADP,	      "xsmaddadp",	FP)
-BU_VSX_X (XSMADDMDP,	      "xsmaddmdp",	FP)
-BU_VSX_X (XSMOVDP,	      "xsmovdp",	FP)
-BU_VSX_X (XSMSUBADP,	      "xsmsubadp",	FP)
-BU_VSX_X (XSMSUBMDP,	      "xsmsubmdp",	FP)
-BU_VSX_X (XSMULDP,	      "xsmuldp",	FP)
-BU_VSX_X (XSNABSDP,	      "xsnabsdp",	FP)
-BU_VSX_X (XSNEGDP,	      "xsnegdp",	FP)
-BU_VSX_X (XSNMADDADP,	      "xsnmaddadp",	FP)
-BU_VSX_X (XSNMADDMDP,	      "xsnmaddmdp",	FP)
-BU_VSX_X (XSNMSUBADP,	      "xsnmsubadp",	FP)
-BU_VSX_X (XSNMSUBMDP,	      "xsnmsubmdp",	FP)
-BU_VSX_X (XSSUBDP,	      "xssubdp",	FP)
-BU_VSX_X (VEC_INIT_V1TI,      "vec_init_v1ti",	CONST)
-BU_VSX_X (VEC_INIT_V2DF,      "vec_init_v2df",	CONST)
-BU_VSX_X (VEC_INIT_V2DI,      "vec_init_v2di",	CONST)
-BU_VSX_X (VEC_SET_V1TI,	      "vec_set_v1ti",	CONST)
-BU_VSX_X (VEC_SET_V2DF,	      "vec_set_v2df",	CONST)
-BU_VSX_X (VEC_SET_V2DI,	      "vec_set_v2di",	CONST)
-BU_VSX_X (VEC_EXT_V1TI,	      "vec_ext_v1ti",	CONST)
-BU_VSX_X (VEC_EXT_V2DF,	      "vec_ext_v2df",	CONST)
-BU_VSX_X (VEC_EXT_V2DI,	      "vec_ext_v2di",	CONST)
-
-/* VSX overloaded builtins, add the overloaded functions not present in
-   Altivec.  */
-
-/* 3 argument VSX overloaded builtins.  */
-BU_VSX_OVERLOAD_3  (MSUB,     "msub")
-BU_VSX_OVERLOAD_3  (NMADD,    "nmadd")
-BU_VSX_OVERLOAD_3V (XXPERMDI, "xxpermdi")
-BU_VSX_OVERLOAD_3V (XXSLDWI,  "xxsldwi")
-
-/* 2 argument VSX overloaded builtin functions.  */
-BU_VSX_OVERLOAD_2 (DIV,	     "div")
-BU_VSX_OVERLOAD_2 (XXMRGHW,  "xxmrghw")
-BU_VSX_OVERLOAD_2 (XXMRGLW,  "xxmrglw")
-BU_VSX_OVERLOAD_2 (XXSPLTD,  "xxspltd")
-BU_VSX_OVERLOAD_2 (XXSPLTW,  "xxspltw")
-
-/* 1 argument VSX overloaded builtin functions.  */
-BU_VSX_OVERLOAD_1 (DOUBLE,   "double")
-BU_VSX_OVERLOAD_1 (DOUBLEE,  "doublee")
-BU_VSX_OVERLOAD_1 (UNS_DOUBLEE,  "uns_doublee")
-BU_VSX_OVERLOAD_1 (DOUBLEO,  "doubleo")
-BU_VSX_OVERLOAD_1 (UNS_DOUBLEO,  "uns_doubleo")
-BU_VSX_OVERLOAD_1 (DOUBLEH,  "doubleh")
-BU_VSX_OVERLOAD_1 (UNS_DOUBLEH,  "uns_doubleh")
-BU_VSX_OVERLOAD_1 (DOUBLEL,  "doublel")
-BU_VSX_OVERLOAD_1 (UNS_DOUBLEL,  "uns_doublel")
-BU_VSX_OVERLOAD_1 (FLOAT,  "float")
-BU_VSX_OVERLOAD_1 (FLOATE,  "floate")
-BU_VSX_OVERLOAD_1 (FLOATO,  "floato")
-
-BU_VSX_OVERLOAD_1 (VSIGNED,   "vsigned")
-BU_VSX_OVERLOAD_1 (VSIGNEDE,  "vsignede")
-BU_VSX_OVERLOAD_1 (VSIGNEDO,  "vsignedo")
-
-BU_VSX_OVERLOAD_1 (VUNSIGNED,   "vunsigned")
-BU_VSX_OVERLOAD_1 (VUNSIGNEDE,  "vunsignede")
-BU_VSX_OVERLOAD_1 (VUNSIGNEDO,  "vunsignedo")
-
-/* VSX builtins that are handled as special cases.  */
-
-
-/* NON-TRADITIONAL BEHAVIOR HERE: Besides introducing the
-   __builtin_vec_ld and __builtin_vec_st built-in functions,
-   the VSX_BUILTIN_VEC_LD and VSX_BUILTIN_VEC_ST symbolic constants
-   introduced below are also affiliated with the __builtin_vec_vsx_ld
-   and __builtin_vec_vsx_st functions respectively.  This unnatural
-   binding is formed with explicit calls to the def_builtin function
-   found in rs6000.c.  */
-BU_VSX_OVERLOAD_X (LD,	     "ld")
-BU_VSX_OVERLOAD_X (ST,	     "st")
-BU_VSX_OVERLOAD_X (XL,	     "xl")
-BU_VSX_OVERLOAD_X (XL_BE,    "xl_be")
-BU_VSX_OVERLOAD_X (XST,	     "xst")
-BU_VSX_OVERLOAD_X (XST_BE,   "xst_be")
-\f
-
-/* 2 argument CMPB instructions added in ISA 2.05. */
-BU_P6_2 (CMPB_32,        "cmpb_32",	CONST,	cmpbsi3)
-BU_P6_64BIT_2 (CMPB,     "cmpb",	CONST,	cmpbdi3)
-
-/* 1 argument VSX instructions added in ISA 2.07.  */
-BU_P8V_VSX_1 (XSCVSPDPN,      "xscvspdpn",	CONST,	vsx_xscvspdpn)
-BU_P8V_VSX_1 (XSCVDPSPN,      "xscvdpspn",	CONST,	vsx_xscvdpspn)
-BU_P8V_VSX_1 (REVB_V1TI,      "revb_v1ti",	CONST,	revb_v1ti)
-BU_P8V_VSX_1 (REVB_V2DI,      "revb_v2di",	CONST,	revb_v2di)
-BU_P8V_VSX_1 (REVB_V4SI,      "revb_v4si",	CONST,	revb_v4si)
-BU_P8V_VSX_1 (REVB_V8HI,      "revb_v8hi",	CONST,	revb_v8hi)
-BU_P8V_VSX_1 (REVB_V16QI,     "revb_v16qi",	CONST,	revb_v16qi)
-BU_P8V_VSX_1 (REVB_V2DF,      "revb_v2df",	CONST,	revb_v2df)
-BU_P8V_VSX_1 (REVB_V4SF,      "revb_v4sf",	CONST,	revb_v4sf)
-
-/* Power 8 Altivec NEG functions.  */
-BU_P8V_AV_1 (NEG_V2DI,      "neg_v2di",	CONST,	negv2di2)
-BU_P8V_AV_1 (NEG_V4SI,      "neg_v4si",	CONST,	negv4si2)
-BU_P8V_AV_1 (NEG_V8HI,      "neg_v8hi",	CONST,	negv8hi2)
-BU_P8V_AV_1 (NEG_V16QI,     "neg_v16qi",	CONST,	negv16qi2)
-BU_P8V_AV_1 (NEG_V4SF,      "neg_v4sf",	CONST,	negv4sf2)
-BU_P8V_AV_1 (NEG_V2DF,      "neg_v2df",	CONST,	negv2df2)
-
-
-/* 2 argument VSX instructions added in ISA 2.07.  */
-BU_P8V_VSX_2 (FLOAT2_V2DF,        "float2_v2df",	CONST,  float2_v2df)
-BU_P8V_VSX_2 (FLOAT2_V2DI,        "float2_v2di",	CONST,  float2_v2di)
-BU_P8V_VSX_2 (UNS_FLOAT2_V2DI,    "uns_float2_v2di",    CONST,  uns_float2_v2di)
-BU_P8V_VSX_2 (VEC_VSIGNED2_V2DF,   "vsigned2_v2df",    CONST,  vsigned2_v2df)
-BU_P8V_VSX_2 (VEC_VUNSIGNED2_V2DF, "vunsigned2_v2df",  CONST,  vunsigned2_v2df)
-
-
-/* 1 argument altivec instructions added in ISA 2.07.  */
-BU_P8V_AV_1 (ABS_V2DI,	      "abs_v2di",	CONST,	absv2di2)
-BU_P8V_AV_1 (VUPKHSW,	      "vupkhsw",	CONST,	altivec_vupkhsw)
-BU_P8V_AV_1 (VUPKLSW,	      "vupklsw",	CONST,	altivec_vupklsw)
-BU_P8V_AV_1 (VCLZB,	      "vclzb",		CONST,  clzv16qi2)
-BU_P8V_AV_1 (VCLZH,	      "vclzh",		CONST,  clzv8hi2)
-BU_P8V_AV_1 (VCLZW,	      "vclzw",		CONST,  clzv4si2)
-BU_P8V_AV_1 (VCLZD,	      "vclzd",		CONST,  clzv2di2)
-BU_P8V_AV_1 (VPOPCNTB,	      "vpopcntb",	CONST,  popcountv16qi2)
-BU_P8V_AV_1 (VPOPCNTH,	      "vpopcnth",	CONST,  popcountv8hi2)
-BU_P8V_AV_1 (VPOPCNTW,	      "vpopcntw",	CONST,  popcountv4si2)
-BU_P8V_AV_1 (VPOPCNTD,	      "vpopcntd",	CONST,  popcountv2di2)
-BU_P8V_AV_1 (VPOPCNTUB,       "vpopcntub",	CONST,  popcountv16qi2)
-BU_P8V_AV_1 (VPOPCNTUH,       "vpopcntuh",	CONST,  popcountv8hi2)
-BU_P8V_AV_1 (VPOPCNTUW,       "vpopcntuw",	CONST,  popcountv4si2)
-BU_P8V_AV_1 (VPOPCNTUD,       "vpopcntud",	CONST,  popcountv2di2)
-BU_P8V_AV_1 (VGBBD,	      "vgbbd",		CONST,  p8v_vgbbd)
-
-/* 2 argument altivec instructions added in ISA 2.07.  */
-BU_P8V_AV_2 (VADDCUQ,		"vaddcuq",	CONST,	altivec_vaddcuq)
-BU_P8V_AV_2 (VADDUDM,		"vaddudm",	CONST,	addv2di3)
-BU_P8V_AV_2 (VADDUQM,		"vadduqm",	CONST,	altivec_vadduqm)
-BU_P8V_AV_2 (VMINSD,		"vminsd",	CONST,	sminv2di3)
-BU_P8V_AV_2 (VMAXSD,		"vmaxsd",	CONST,	smaxv2di3)
-BU_P8V_AV_2 (VMINUD,		"vminud",	CONST,	uminv2di3)
-BU_P8V_AV_2 (VMAXUD,		"vmaxud",	CONST,	umaxv2di3)
-BU_P8V_AV_2 (VMRGEW_V2DI,	"vmrgew_v2di",	CONST,	p8_vmrgew_v2di)
-BU_P8V_AV_2 (VMRGEW_V2DF,	"vmrgew_v2df",	CONST,	p8_vmrgew_v2df)
-BU_P8V_AV_2 (VMRGEW_V4SI,	"vmrgew_v4si",	CONST,	p8_vmrgew_v4si)
-BU_P8V_AV_2 (VMRGEW_V4SF,	"vmrgew_v4sf",	CONST,	p8_vmrgew_v4sf)
-BU_P8V_AV_2 (VMRGOW_V4SI,	"vmrgow_v4si",	CONST,	p8_vmrgow_v4si)
-BU_P8V_AV_2 (VMRGOW_V4SF,	"vmrgow_v4sf",	CONST,	p8_vmrgow_v4sf)
-BU_P8V_AV_2 (VMRGOW_V2DI,	"vmrgow_v2di",	CONST,	p8_vmrgow_v2di)
-BU_P8V_AV_2 (VMRGOW_V2DF,	"vmrgow_v2df",	CONST,	p8_vmrgow_v2df)
-BU_P8V_AV_2 (VBPERMQ,		"vbpermq",	CONST,	altivec_vbpermq)
-BU_P8V_AV_2 (VBPERMQ2,		"vbpermq2",	CONST,	altivec_vbpermq2)
-BU_P8V_AV_2 (VPKUDUM,		"vpkudum",	CONST,	altivec_vpkudum)
-BU_P8V_AV_2 (VPKSDSS,		"vpksdss",	CONST,	altivec_vpksdss)
-BU_P8V_AV_2 (VPKUDUS,		"vpkudus",	CONST,	altivec_vpkudus)
-BU_P8V_AV_2 (VPKSDUS,		"vpksdus",	CONST,	altivec_vpksdus)
-BU_P8V_AV_2 (VPMSUMB,		"vpmsumb",	CONST,	crypto_vpmsumb)
-BU_P8V_AV_2 (VPMSUMH,		"vpmsumh",	CONST,	crypto_vpmsumh)
-BU_P8V_AV_2 (VPMSUMW,		"vpmsumw",	CONST,	crypto_vpmsumw)
-BU_P8V_AV_2 (VPMSUMD,		"vpmsumd",	CONST,	crypto_vpmsumd)
-BU_P8V_AV_2 (VRLD,		"vrld",		CONST,	vrotlv2di3)
-BU_P8V_AV_2 (VSLD,		"vsld",		CONST,	vashlv2di3)
-BU_P8V_AV_2 (VSRD,		"vsrd",		CONST,	vlshrv2di3)
-BU_P8V_AV_2 (VSRAD,		"vsrad",	CONST,	vashrv2di3)
-BU_P8V_AV_2 (VSUBCUQ,		"vsubcuq",	CONST,	altivec_vsubcuq)
-BU_P8V_AV_2 (VSUBUDM,		"vsubudm",	CONST,	subv2di3)
-BU_P8V_AV_2 (VSUBUQM,		"vsubuqm",	CONST,	altivec_vsubuqm)
-
-BU_P8V_AV_2 (EQV_V16QI_UNS,	"eqv_v16qi_uns",CONST,	eqvv16qi3)
-BU_P8V_AV_2 (EQV_V16QI,		"eqv_v16qi",	CONST,	eqvv16qi3)
-BU_P8V_AV_2 (EQV_V8HI_UNS,	"eqv_v8hi_uns",	CONST,	eqvv8hi3)
-BU_P8V_AV_2 (EQV_V8HI,		"eqv_v8hi",	CONST,	eqvv8hi3)
-BU_P8V_AV_2 (EQV_V4SI_UNS,	"eqv_v4si_uns",	CONST,	eqvv4si3)
-BU_P8V_AV_2 (EQV_V4SI,		"eqv_v4si",	CONST,	eqvv4si3)
-BU_P8V_AV_2 (EQV_V2DI_UNS,	"eqv_v2di_uns",	CONST,	eqvv2di3)
-BU_P8V_AV_2 (EQV_V2DI,		"eqv_v2di",	CONST,	eqvv2di3)
-BU_P8V_AV_2 (EQV_V1TI_UNS,	"eqv_v1ti_uns",	CONST,	eqvv1ti3)
-BU_P8V_AV_2 (EQV_V1TI,		"eqv_v1ti",	CONST,	eqvv1ti3)
-BU_P8V_AV_2 (EQV_V4SF,		"eqv_v4sf",	CONST,	eqvv4sf3)
-BU_P8V_AV_2 (EQV_V2DF,		"eqv_v2df",	CONST,	eqvv2df3)
-
-BU_P8V_AV_2 (NAND_V16QI_UNS,	"nand_v16qi_uns", CONST,	nandv16qi3)
-BU_P8V_AV_2 (NAND_V16QI,	"nand_v16qi",	  CONST,	nandv16qi3)
-BU_P8V_AV_2 (NAND_V8HI_UNS,	"nand_v8hi_uns",  CONST,	nandv8hi3)
-BU_P8V_AV_2 (NAND_V8HI,		"nand_v8hi",	  CONST,	nandv8hi3)
-BU_P8V_AV_2 (NAND_V4SI_UNS,	"nand_v4si_uns",  CONST,	nandv4si3)
-BU_P8V_AV_2 (NAND_V4SI,		"nand_v4si",	  CONST,	nandv4si3)
-BU_P8V_AV_2 (NAND_V2DI_UNS,	"nand_v2di_uns",  CONST,	nandv2di3)
-BU_P8V_AV_2 (NAND_V2DI,		"nand_v2di",	  CONST,	nandv2di3)
-BU_P8V_AV_2 (NAND_V1TI_UNS,	"nand_v1ti_uns",  CONST,	nandv1ti3)
-BU_P8V_AV_2 (NAND_V1TI,		"nand_v1ti",	  CONST,	nandv1ti3)
-BU_P8V_AV_2 (NAND_V4SF,		"nand_v4sf",	  CONST,	nandv4sf3)
-BU_P8V_AV_2 (NAND_V2DF,		"nand_v2df",	  CONST,	nandv2df3)
-
-BU_P8V_AV_2 (ORC_V16QI_UNS,	"orc_v16qi_uns",CONST,	orcv16qi3)
-BU_P8V_AV_2 (ORC_V16QI,		"orc_v16qi",	CONST,	orcv16qi3)
-BU_P8V_AV_2 (ORC_V8HI_UNS,	"orc_v8hi_uns",	CONST,	orcv8hi3)
-BU_P8V_AV_2 (ORC_V8HI,		"orc_v8hi",	CONST,	orcv8hi3)
-BU_P8V_AV_2 (ORC_V4SI_UNS,	"orc_v4si_uns",	CONST,	orcv4si3)
-BU_P8V_AV_2 (ORC_V4SI,		"orc_v4si",	CONST,	orcv4si3)
-BU_P8V_AV_2 (ORC_V2DI_UNS,	"orc_v2di_uns",	CONST,	orcv2di3)
-BU_P8V_AV_2 (ORC_V2DI,		"orc_v2di",	CONST,	orcv2di3)
-BU_P8V_AV_2 (ORC_V1TI_UNS,	"orc_v1ti_uns",	CONST,	orcv1ti3)
-BU_P8V_AV_2 (ORC_V1TI,		"orc_v1ti",	CONST,	orcv1ti3)
-BU_P8V_AV_2 (ORC_V4SF,		"orc_v4sf",	CONST,	orcv4sf3)
-BU_P8V_AV_2 (ORC_V2DF,		"orc_v2df",	CONST,	orcv2df3)
-
-/* 3 argument altivec instructions added in ISA 2.07.  */
-BU_P8V_AV_3 (VADDEUQM,		"vaddeuqm",	CONST,	altivec_vaddeuqm)
-BU_P8V_AV_3 (VADDECUQ,		"vaddecuq",	CONST,	altivec_vaddecuq)
-BU_P8V_AV_3 (VSUBEUQM,		"vsubeuqm",	CONST,	altivec_vsubeuqm)
-BU_P8V_AV_3 (VSUBECUQ,		"vsubecuq",	CONST,	altivec_vsubecuq)
-
-/* Vector comparison instructions added in ISA 2.07.  */
-BU_P8V_AV_2 (VCMPEQUD,		"vcmpequd",	CONST,	vector_eqv2di)
-BU_P8V_AV_2 (VCMPGTSD,		"vcmpgtsd",	CONST,	vector_gtv2di)
-BU_P8V_AV_2 (VCMPGTUD,		"vcmpgtud",	CONST,	vector_gtuv2di)
-
-/* Vector comparison predicate instructions added in ISA 2.07.  */
-BU_P8V_AV_P (VCMPEQUD_P,	"vcmpequd_p",	CONST,	vector_eq_v2di_p)
-BU_P8V_AV_P (VCMPGTSD_P,	"vcmpgtsd_p",	CONST,	vector_gt_v2di_p)
-BU_P8V_AV_P (VCMPGTUD_P,	"vcmpgtud_p",	CONST,	vector_gtu_v2di_p)
-
-BU_P8V_AV_3 (VPERMXOR,		"vpermxor",	CONST, 	altivec_vpermxor)
-
-/* ISA 2.05 overloaded 2 argument functions.  */
-BU_P6_OVERLOAD_2 (CMPB, "cmpb")
-
-/* ISA 2.07 vector overloaded 1 argument functions.  */
-BU_P8V_OVERLOAD_1 (VUPKHSW,	"vupkhsw")
-BU_P8V_OVERLOAD_1 (VUPKLSW,	"vupklsw")
-BU_P8V_OVERLOAD_1 (VCLZ,	"vclz")
-BU_P8V_OVERLOAD_1 (VCLZB,	"vclzb")
-BU_P8V_OVERLOAD_1 (VCLZH,	"vclzh")
-BU_P8V_OVERLOAD_1 (VCLZW,	"vclzw")
-BU_P8V_OVERLOAD_1 (VCLZD,	"vclzd")
-BU_P8V_OVERLOAD_1 (VPOPCNT,	"vpopcnt")
-BU_P8V_OVERLOAD_1 (VPOPCNTB,	"vpopcntb")
-BU_P8V_OVERLOAD_1 (VPOPCNTH,	"vpopcnth")
-BU_P8V_OVERLOAD_1 (VPOPCNTW,	"vpopcntw")
-BU_P8V_OVERLOAD_1 (VPOPCNTD,	"vpopcntd")
-BU_P8V_OVERLOAD_1 (VPOPCNTU,	"vpopcntu")
-BU_P8V_OVERLOAD_1 (VPOPCNTUB,	"vpopcntub")
-BU_P8V_OVERLOAD_1 (VPOPCNTUH,	"vpopcntuh")
-BU_P8V_OVERLOAD_1 (VPOPCNTUW,	"vpopcntuw")
-BU_P8V_OVERLOAD_1 (VPOPCNTUD,	"vpopcntud")
-BU_P8V_OVERLOAD_1 (VGBBD,	"vgbbd")
-BU_P8V_OVERLOAD_1 (REVB,	"revb")
-BU_P8V_OVERLOAD_1 (NEG, 	"neg")
-
-/* ISA 2.07 vector overloaded 2 argument functions.  */
-BU_P8V_OVERLOAD_2 (EQV,		"eqv")
-BU_P8V_OVERLOAD_2 (NAND,	"nand")
-BU_P8V_OVERLOAD_2 (ORC,		"orc")
-BU_P8V_OVERLOAD_2 (VADDCUQ,	"vaddcuq")
-BU_P8V_OVERLOAD_2 (VADDUDM,	"vaddudm")
-BU_P8V_OVERLOAD_2 (VADDUQM,	"vadduqm")
-BU_P8V_OVERLOAD_2 (VBPERMQ,	"vbpermq")
-BU_P8V_OVERLOAD_2 (VMAXSD,	"vmaxsd")
-BU_P8V_OVERLOAD_2 (VMAXUD,	"vmaxud")
-BU_P8V_OVERLOAD_2 (VMINSD,	"vminsd")
-BU_P8V_OVERLOAD_2 (VMINUD,	"vminud")
-BU_P8V_OVERLOAD_2 (VMRGEW,	"vmrgew")
-BU_P8V_OVERLOAD_2 (VMRGOW,	"vmrgow")
-BU_P8V_OVERLOAD_2 (VPKSDSS,	"vpksdss")
-BU_P8V_OVERLOAD_2 (VPKSDUS,	"vpksdus")
-BU_P8V_OVERLOAD_2 (VPKUDUM,	"vpkudum")
-BU_P8V_OVERLOAD_2 (VPKUDUS,	"vpkudus")
-BU_P8V_OVERLOAD_2 (VPMSUM,      "vpmsum")
-BU_P8V_OVERLOAD_2 (VRLD,	"vrld")
-BU_P8V_OVERLOAD_2 (VSLD,	"vsld")
-BU_P8V_OVERLOAD_2 (VSRAD,	"vsrad")
-BU_P8V_OVERLOAD_2 (VSRD,	"vsrd")
-BU_P8V_OVERLOAD_2 (VSUBCUQ,	"vsubcuq")
-BU_P8V_OVERLOAD_2 (VSUBUDM,	"vsubudm")
-BU_P8V_OVERLOAD_2 (VSUBUQM,	"vsubuqm")
-BU_P8V_OVERLOAD_2 (FLOAT2,   "float2")
-BU_P8V_OVERLOAD_2 (UNS_FLOAT2,   "uns_float2")
-BU_P8V_OVERLOAD_2 (VSIGNED2,     "vsigned2")
-BU_P8V_OVERLOAD_2 (VUNSIGNED2,   "vunsigned2")
-
-/* ISA 2.07 vector overloaded 3 argument functions.  */
-BU_P8V_OVERLOAD_3 (VADDECUQ,	"vaddecuq")
-BU_P8V_OVERLOAD_3 (VADDEUQM,	"vaddeuqm")
-BU_P8V_OVERLOAD_3 (VSUBECUQ,	"vsubecuq")
-BU_P8V_OVERLOAD_3 (VSUBEUQM,	"vsubeuqm")
-BU_P8V_OVERLOAD_3 (VPERMXOR,   "vpermxor")
-
-/* ISA 3.0 vector overloaded 2-argument functions. */
-BU_P9V_AV_2 (VSLV,		"vslv",			CONST, vslv)
-BU_P9V_AV_2 (VSRV,		"vsrv",			CONST, vsrv)
-BU_P9V_AV_2 (CONVERT_4F32_8I16, "convert_4f32_8i16", CONST, convert_4f32_8i16)
-BU_P9V_AV_2 (CONVERT_4F32_8F16, "convert_4f32_8f16", CONST, convert_4f32_8f16)
-
-BU_P9V_AV_2 (VFIRSTMATCHINDEX_V16QI, "first_match_index_v16qi",
-	     CONST, first_match_index_v16qi)
-BU_P9V_AV_2 (VFIRSTMATCHINDEX_V8HI, "first_match_index_v8hi",
-	     CONST, first_match_index_v8hi)
-BU_P9V_AV_2 (VFIRSTMATCHINDEX_V4SI, "first_match_index_v4si",
-	     CONST, first_match_index_v4si)
-BU_P9V_AV_2 (VFIRSTMATCHOREOSINDEX_V16QI, "first_match_or_eos_index_v16qi",
-	     CONST, first_match_or_eos_index_v16qi)
-BU_P9V_AV_2 (VFIRSTMATCHOREOSINDEX_V8HI, "first_match_or_eos_index_v8hi",
-	     CONST, first_match_or_eos_index_v8hi)
-BU_P9V_AV_2 (VFIRSTMATCHOREOSINDEX_V4SI, "first_match_or_eos_index_v4si",
-	     CONST, first_match_or_eos_index_v4si)
-BU_P9V_AV_2 (VFIRSTMISMATCHINDEX_V16QI, "first_mismatch_index_v16qi",
-	     CONST, first_mismatch_index_v16qi)
-BU_P9V_AV_2 (VFIRSTMISMATCHINDEX_V8HI, "first_mismatch_index_v8hi",
-	     CONST, first_mismatch_index_v8hi)
-BU_P9V_AV_2 (VFIRSTMISMATCHINDEX_V4SI, "first_mismatch_index_v4si",
-	     CONST, first_mismatch_index_v4si)
-BU_P9V_AV_2 (VFIRSTMISMATCHOREOSINDEX_V16QI, "first_mismatch_or_eos_index_v16qi",
-	     CONST, first_mismatch_or_eos_index_v16qi)
-BU_P9V_AV_2 (VFIRSTMISMATCHOREOSINDEX_V8HI, "first_mismatch_or_eos_index_v8hi",
-	     CONST, first_mismatch_or_eos_index_v8hi)
-BU_P9V_AV_2 (VFIRSTMISMATCHOREOSINDEX_V4SI, "first_mismatch_or_eos_index_v4si",
-	     CONST, first_mismatch_or_eos_index_v4si)
-
-/* ISA 3.0 vector overloaded 2-argument functions. */
-BU_P9V_OVERLOAD_2 (VSLV,	"vslv")
-BU_P9V_OVERLOAD_2 (VSRV,	"vsrv")
-BU_P9V_OVERLOAD_2 (CONVERT_4F32_8I16, "convert_4f32_8i16")
-BU_P9V_OVERLOAD_2 (CONVERT_4F32_8F16, "convert_4f32_8f16")
-
-/* 2 argument vector functions added in ISA 3.0 (power9). */
-BU_P9V_AV_2 (VADUB,		"vadub",		CONST,  vaduv16qi3)
-BU_P9V_AV_2 (VADUH,		"vaduh",		CONST,  vaduv8hi3)
-BU_P9V_AV_2 (VADUW,		"vaduw",		CONST,  vaduv4si3)
-BU_P9V_AV_2 (VRLWNM,		"vrlwnm",		CONST,	altivec_vrlwnm)
-BU_P9V_AV_2 (VRLDNM,		"vrldnm",		CONST,	altivec_vrldnm)
-BU_P9V_AV_2 (VBPERMD,		"vbpermd",		CONST,  altivec_vbpermd)
-
-/* ISA 3.0 vector overloaded 2 argument functions. */
-BU_P9V_OVERLOAD_2 (VADU,	"vadu")
-BU_P9V_OVERLOAD_2 (VADUB,	"vadub")
-BU_P9V_OVERLOAD_2 (VADUH,	"vaduh")
-BU_P9V_OVERLOAD_2 (VADUW,	"vaduw")
-BU_P9V_OVERLOAD_2 (RLNM,	"rlnm")
-BU_P9V_OVERLOAD_2 (VBPERM,	"vbperm_api")
-
-/* ISA 3.0 3-argument vector functions.  */
-BU_P9V_AV_3 (VRLWMI,		"vrlwmi",		CONST,	altivec_vrlwmi)
-BU_P9V_AV_3 (VRLDMI,		"vrldmi",		CONST,	altivec_vrldmi)
-
-/* ISA 3.0 vector overloaded 3-argument functions.  */
-BU_P9V_OVERLOAD_3 (RLMI,	"rlmi")
-
-/* 1 argument vsx scalar functions added in ISA 3.0 (power9).  */
-BU_P9V_64BIT_VSX_1 (VSEEDP,	"scalar_extract_exp",	CONST,	xsxexpdp)
-BU_P9V_64BIT_VSX_1 (VSESDP,	"scalar_extract_sig",	CONST,	xsxsigdp)
-
-BU_FLOAT128_HW_VSX_1 (VSEEQP,	"scalar_extract_expq",	CONST,	xsxexpqp_kf)
-BU_FLOAT128_HW_VSX_1 (VSESQP,	"scalar_extract_sigq",	CONST,	xsxsigqp_kf)
-
-BU_FLOAT128_HW_VSX_1 (VSTDCNQP, "scalar_test_neg_qp",	CONST,	xststdcnegqp_kf)
-BU_P9V_VSX_1 (VSTDCNDP,	"scalar_test_neg_dp",	CONST,	xststdcnegdp)
-BU_P9V_VSX_1 (VSTDCNSP,	"scalar_test_neg_sp",	CONST,	xststdcnegsp)
-
-BU_P9V_VSX_1 (XXBRQ_V16QI,	"xxbrq_v16qi",	CONST,	p9_xxbrq_v16qi)
-BU_P9V_VSX_1 (XXBRQ_V1TI,	"xxbrq_v1ti",	CONST,	p9_xxbrq_v1ti)
-BU_P9V_VSX_1 (XXBRD_V2DI,	"xxbrd_v2di",	CONST,	p9_xxbrd_v2di)
-BU_P9V_VSX_1 (XXBRD_V2DF,	"xxbrd_v2df",	CONST,	p9_xxbrd_v2df)
-BU_P9V_VSX_1 (XXBRW_V4SI,	"xxbrw_v4si",	CONST,	p9_xxbrw_v4si)
-BU_P9V_VSX_1 (XXBRW_V4SF,	"xxbrw_v4sf",	CONST,	p9_xxbrw_v4sf)
-BU_P9V_VSX_1 (XXBRH_V8HI,	"xxbrh_v8hi",	CONST,	p9_xxbrh_v8hi)
-
-/* 2 argument vsx scalar functions added in ISA 3.0 (power9).  */
-BU_P9V_64BIT_VSX_2 (VSIEDP,	"scalar_insert_exp",	CONST,	xsiexpdp)
-BU_P9V_64BIT_VSX_2 (VSIEDPF,	"scalar_insert_exp_dp",	CONST,	xsiexpdpf)
-
-BU_FLOAT128_HW_VSX_2 (VSIEQP,	"scalar_insert_exp_q",	CONST,	xsiexpqp_kf)
-BU_FLOAT128_HW_VSX_2 (VSIEQPF,	"scalar_insert_exp_qp",	CONST,	xsiexpqpf_kf)
-
-BU_P9V_VSX_2 (VSCEDPGT,	"scalar_cmp_exp_dp_gt",	CONST,	xscmpexpdp_gt)
-BU_P9V_VSX_2 (VSCEDPLT,	"scalar_cmp_exp_dp_lt",	CONST,	xscmpexpdp_lt)
-BU_P9V_VSX_2 (VSCEDPEQ,	"scalar_cmp_exp_dp_eq",	CONST,	xscmpexpdp_eq)
-BU_P9V_VSX_2 (VSCEDPUO,	"scalar_cmp_exp_dp_unordered",	CONST,	xscmpexpdp_unordered)
-
-BU_P9V_VSX_2 (VSCEQPGT,	"scalar_cmp_exp_qp_gt",	CONST,	xscmpexpqp_gt_kf)
-BU_P9V_VSX_2 (VSCEQPLT,	"scalar_cmp_exp_qp_lt",	CONST,	xscmpexpqp_lt_kf)
-BU_P9V_VSX_2 (VSCEQPEQ,	"scalar_cmp_exp_qp_eq",	CONST,	xscmpexpqp_eq_kf)
-BU_P9V_VSX_2 (VSCEQPUO,	"scalar_cmp_exp_qp_unordered",	CONST,	xscmpexpqp_unordered_kf)
-
-BU_FLOAT128_HW_VSX_2 (VSTDCQP, "scalar_test_data_class_qp",	CONST,	xststdcqp_kf)
-BU_P9V_VSX_2 (VSTDCDP,	"scalar_test_data_class_dp",	CONST,	xststdcdp)
-BU_P9V_VSX_2 (VSTDCSP,	"scalar_test_data_class_sp",	CONST,	xststdcsp)
-
-/* ISA 3.0 vector scalar overloaded 1 argument functions.  */
-BU_P9V_OVERLOAD_1 (VSEEDP,	"scalar_extract_exp")
-BU_P9V_OVERLOAD_1 (VSESDP,	"scalar_extract_sig")
-
-BU_P9V_OVERLOAD_1 (VSTDCN,	"scalar_test_neg")
-BU_P9V_OVERLOAD_1 (VSTDCNQP,	"scalar_test_neg_qp")
-BU_P9V_OVERLOAD_1 (VSTDCNDP,	"scalar_test_neg_dp")
-BU_P9V_OVERLOAD_1 (VSTDCNSP,	"scalar_test_neg_sp")
-
-BU_P9V_OVERLOAD_1 (VEXTRACT_FP_FROM_SHORTH, "vextract_fp_from_shorth")
-BU_P9V_OVERLOAD_1 (VEXTRACT_FP_FROM_SHORTL, "vextract_fp_from_shortl")
-
-/* ISA 3.0 vector scalar overloaded 2 argument functions.  */
-BU_P9V_OVERLOAD_2 (VFIRSTMATCHINDEX,	"first_match_index")
-BU_P9V_OVERLOAD_2 (VFIRSTMISMATCHINDEX,	"first_mismatch_index")
-BU_P9V_OVERLOAD_2 (VFIRSTMATCHOREOSINDEX,	"first_match_or_eos_index")
-BU_P9V_OVERLOAD_2 (VFIRSTMISMATCHOREOSINDEX,	"first_mismatch_or_eos_index")
-
-BU_P9V_OVERLOAD_2 (VSIEDP,	"scalar_insert_exp")
-
-BU_P9V_OVERLOAD_2 (VSTDC,	"scalar_test_data_class")
-BU_P9V_OVERLOAD_2 (VSTDCQP,	"scalar_test_data_class_qp")
-BU_P9V_OVERLOAD_2 (VSTDCDP,	"scalar_test_data_class_dp")
-BU_P9V_OVERLOAD_2 (VSTDCSP,	"scalar_test_data_class_sp")
-
-BU_P9V_OVERLOAD_2 (VSCEGT,	"scalar_cmp_exp_gt")
-BU_P9V_OVERLOAD_2 (VSCEDPGT,	"scalar_cmp_exp_dp_gt")
-BU_P9V_OVERLOAD_2 (VSCEQPGT,	"scalar_cmp_exp_qp_gt")
-BU_P9V_OVERLOAD_2 (VSCELT,	"scalar_cmp_exp_lt")
-BU_P9V_OVERLOAD_2 (VSCEDPLT,	"scalar_cmp_exp_dp_lt")
-BU_P9V_OVERLOAD_2 (VSCEQPLT,	"scalar_cmp_exp_qp_lt")
-BU_P9V_OVERLOAD_2 (VSCEEQ,	"scalar_cmp_exp_eq")
-BU_P9V_OVERLOAD_2 (VSCEDPEQ,	"scalar_cmp_exp_dp_eq")
-BU_P9V_OVERLOAD_2 (VSCEQPEQ,	"scalar_cmp_exp_qp_eq")
-BU_P9V_OVERLOAD_2 (VSCEUO,	"scalar_cmp_exp_unordered")
-BU_P9V_OVERLOAD_2 (VSCEDPUO,	"scalar_cmp_exp_dp_unordered")
-BU_P9V_OVERLOAD_2 (VSCEQPUO,	"scalar_cmp_exp_qp_unordered")
-
-/* 1 argument vsx vector functions added in ISA 3.0 (power9).  */
-BU_P9V_VSX_1 (VEEDP, "extract_exp_dp", CONST, xvxexpdp)
-BU_P9V_VSX_1 (VEESP, "extract_exp_sp", CONST, xvxexpsp)
-BU_P9V_VSX_1 (VESDP, "extract_sig_dp", CONST, xvxsigdp)
-BU_P9V_VSX_1 (VESSP, "extract_sig_sp", CONST, xvxsigsp)
-BU_P9V_VSX_1 (VEXTRACT_FP_FROM_SHORTH, "vextract_fp_from_shorth", CONST, vextract_fp_from_shorth)
-BU_P9V_VSX_1 (VEXTRACT_FP_FROM_SHORTL, "vextract_fp_from_shortl", CONST, vextract_fp_from_shortl)
-
-/* 2 argument vsx vector functions added in ISA 3.0 (power9).  */
-BU_P9V_VSX_2 (VIEDP, "insert_exp_dp", CONST, xviexpdp)
-BU_P9V_VSX_2 (VIESP, "insert_exp_sp", CONST, xviexpsp)
-BU_P9V_VSX_2 (VTDCDP, "test_data_class_dp", CONST, xvtstdcdp)
-BU_P9V_VSX_2 (VTDCSP, "test_data_class_sp", CONST, xvtstdcsp)
-
-/* ISA 3.0 vector overloaded 1 argument functions.  */
-BU_P9V_OVERLOAD_1 (VES,		"extract_sig")
-BU_P9V_OVERLOAD_1 (VESDP,	"extract_sig_dp")
-BU_P9V_OVERLOAD_1 (VESSP,	"extract_sig_sp")
-
-BU_P9V_OVERLOAD_1 (VEE,		"extract_exp")
-BU_P9V_OVERLOAD_1 (VEEDP,	"extract_exp_dp")
-BU_P9V_OVERLOAD_1 (VEESP,	"extract_exp_sp")
-
-/* ISA 3.0 vector overloaded 2 argument functions.  */
-BU_P9V_OVERLOAD_2 (VTDC,	"test_data_class")
-BU_P9V_OVERLOAD_2 (VTDCDP,	"test_data_class_dp")
-BU_P9V_OVERLOAD_2 (VTDCSP,	"test_data_class_sp")
-
-BU_P9V_OVERLOAD_2 (VIE,		"insert_exp")
-BU_P9V_OVERLOAD_2 (VIEDP,	"insert_exp_dp")
-BU_P9V_OVERLOAD_2 (VIESP,	"insert_exp_sp")
-
-/* 2 argument vector functions added in ISA 3.0 (power9).  */
-BU_P9V_64BIT_VSX_2 (LXVL,	"lxvl",		PURE,	lxvl)
-BU_P9V_64BIT_VSX_2 (XL_LEN_R,	"xl_len_r",	PURE,	xl_len_r)
-
-BU_P9V_AV_2 (VEXTUBLX, "vextublx",		CONST,	vextublx)
-BU_P9V_AV_2 (VEXTUBRX, "vextubrx",		CONST,	vextubrx)
-BU_P9V_AV_2 (VEXTUHLX, "vextuhlx",		CONST,	vextuhlx)
-BU_P9V_AV_2 (VEXTUHRX, "vextuhrx",		CONST,	vextuhrx)
-BU_P9V_AV_2 (VEXTUWLX, "vextuwlx",		CONST,	vextuwlx)
-BU_P9V_AV_2 (VEXTUWRX, "vextuwrx",		CONST,	vextuwrx)
-
-/* Insert/extract 4 byte word into a vector.  */
-BU_P9V_VSX_3 (INSERT4B,    "insert4b",		CONST,  insert4b)
-BU_P9V_VSX_2 (EXTRACT4B,   "extract4b", 	CONST,  extract4b)
-
-/* Hardware IEEE 128-bit floating point round to odd instrucitons added in ISA
-   3.0 (power9).  */
-BU_FLOAT128_HW_1 (SQRTF128_ODD,  "sqrtf128_round_to_odd",  FP, sqrtkf2_odd)
-BU_FLOAT128_HW_1 (TRUNCF128_ODD, "truncf128_round_to_odd", FP, trunckfdf2_odd)
-BU_FLOAT128_HW_2 (ADDF128_ODD,   "addf128_round_to_odd",   FP, addkf3_odd)
-BU_FLOAT128_HW_2 (SUBF128_ODD,   "subf128_round_to_odd",   FP, subkf3_odd)
-BU_FLOAT128_HW_2 (MULF128_ODD,   "mulf128_round_to_odd",   FP, mulkf3_odd)
-BU_FLOAT128_HW_2 (DIVF128_ODD,   "divf128_round_to_odd",   FP, divkf3_odd)
-BU_FLOAT128_HW_3 (FMAF128_ODD,   "fmaf128_round_to_odd",   FP, fmakf4_odd)
-
-/* 3 argument vector functions returning void, treated as SPECIAL,
-   added in ISA 3.0 (power9).  */
-BU_P9V_64BIT_AV_X (STXVL,	"stxvl",	MISC)
-BU_P9V_64BIT_AV_X (XST_LEN_R,	"xst_len_r",	MISC)
-
-/* 1 argument vector functions added in ISA 3.0 (power9). */
-BU_P9V_AV_1 (VCLZLSBB_V16QI, "vclzlsbb_v16qi",	CONST,	vclzlsbb_v16qi)
-BU_P9V_AV_1 (VCLZLSBB_V8HI, "vclzlsbb_v8hi",	CONST,	vclzlsbb_v8hi)
-BU_P9V_AV_1 (VCLZLSBB_V4SI, "vclzlsbb_v4si",	CONST,	vclzlsbb_v4si)
-BU_P9V_AV_1 (VCTZLSBB_V16QI, "vctzlsbb_v16qi",	CONST,	vctzlsbb_v16qi)
-BU_P9V_AV_1 (VCTZLSBB_V8HI, "vctzlsbb_v8hi",	CONST,	vctzlsbb_v8hi)
-BU_P9V_AV_1 (VCTZLSBB_V4SI, "vctzlsbb_v4si",	CONST,	vctzlsbb_v4si)
-
-/* Built-in support for Power9 "VSU option" string operations includes
-   new awareness of the "vector compare not equal" (vcmpneb, vcmpneb.,
-   vcmpneh, vcmpneh., vcmpnew, vcmpnew.) and "vector compare
-   not equal or zero" (vcmpnezb, vcmpnezb., vcmpnezh, vcmpnezh.,
-   vcmpnezw, vcmpnezw.) instructions.  */
-
-BU_P9V_AV_2 (CMPNEB,	"vcmpneb",	CONST,	vcmpneb)
-BU_P9V_AV_2 (CMPNEH,	"vcmpneh",	CONST,	vcmpneh)
-BU_P9V_AV_2 (CMPNEW,	"vcmpnew",	CONST,	vcmpnew)
-
-BU_P9V_AV_2 (VCMPNEB_P,	"vcmpneb_p",	CONST,	vector_ne_v16qi_p)
-BU_P9V_AV_2 (VCMPNEH_P,	"vcmpneh_p",	CONST,	vector_ne_v8hi_p)
-BU_P9V_AV_2 (VCMPNEW_P,	"vcmpnew_p",	CONST,	vector_ne_v4si_p)
-BU_P9V_AV_2 (VCMPNED_P,	"vcmpned_p",	CONST,	vector_ne_v2di_p)
-
-BU_P9V_AV_2 (VCMPNEFP_P,	"vcmpnefp_p",	CONST,	vector_ne_v4sf_p)
-BU_P9V_AV_2 (VCMPNEDP_P,	"vcmpnedp_p",	CONST,	vector_ne_v2df_p)
-
-BU_P9V_AV_2 (VCMPAEB_P,	"vcmpaeb_p",	CONST,	vector_ae_v16qi_p)
-BU_P9V_AV_2 (VCMPAEH_P,	"vcmpaeh_p",	CONST,	vector_ae_v8hi_p)
-BU_P9V_AV_2 (VCMPAEW_P,	"vcmpaew_p",	CONST,	vector_ae_v4si_p)
-BU_P9V_AV_2 (VCMPAED_P,	"vcmpaed_p",	CONST,	vector_ae_v2di_p)
-
-BU_P9V_AV_2 (VCMPAEFP_P,	"vcmpaefp_p",	CONST,	vector_ae_v4sf_p)
-BU_P9V_AV_2 (VCMPAEDP_P,	"vcmpaedp_p",	CONST,	vector_ae_v2df_p)
-
-BU_P9V_AV_2 (CMPNEZB,	"vcmpnezb",	CONST,	vcmpnezb)
-BU_P9V_AV_2 (CMPNEZH,	"vcmpnezh",	CONST,	vcmpnezh)
-BU_P9V_AV_2 (CMPNEZW,	"vcmpnezw",	CONST,	vcmpnezw)
-
-BU_P9V_AV_P (VCMPNEZB_P,	"vcmpnezb_p",	CONST,	vector_nez_v16qi_p)
-BU_P9V_AV_P (VCMPNEZH_P,	"vcmpnezh_p",	CONST,	vector_nez_v8hi_p)
-BU_P9V_AV_P (VCMPNEZW_P,	"vcmpnezw_p",	CONST,	vector_nez_v4si_p)
-
-/* ISA 3.0 Vector scalar overloaded 2 argument functions */
-BU_P9V_OVERLOAD_2 (LXVL,	"lxvl")
-BU_P9V_OVERLOAD_2 (XL_LEN_R,	"xl_len_r")
-BU_P9V_OVERLOAD_2 (VEXTULX,	"vextulx")
-BU_P9V_OVERLOAD_2 (VEXTURX,	"vexturx")
-BU_P9V_OVERLOAD_2 (EXTRACT4B,  "extract4b")
-
-/* ISA 3.0 Vector scalar overloaded 3 argument functions */
-BU_P9V_OVERLOAD_3 (STXVL,	"stxvl")
-BU_P9V_OVERLOAD_3 (XST_LEN_R,	"xst_len_r")
-BU_P9V_OVERLOAD_3 (INSERT4B,    "insert4b")
-
-/* Overloaded CMPNE support was implemented prior to Power 9,
-   so is not mentioned here.  */
-BU_P9V_OVERLOAD_2 (CMPNEZ,	"vcmpnez")
-
-BU_P9V_OVERLOAD_P (VCMPNEZ_P,	"vcmpnez_p")
-BU_P9V_OVERLOAD_2 (VCMPNE_P,	"vcmpne_p")
-BU_P9V_OVERLOAD_2 (VCMPAE_P,	"vcmpae_p")
-
-/* ISA 3.0 Vector scalar overloaded 1 argument functions */
-BU_P9V_OVERLOAD_1 (VCLZLSBB,	"vclzlsbb")
-BU_P9V_OVERLOAD_1 (VCTZLSBB,	"vctzlsbb")
-\f
-/* 2 argument extended divide functions added in ISA 2.06.  */
-BU_P7_MISC_2 (DIVWE,		"divwe",	CONST,	dive_si)
-BU_P7_MISC_2 (DIVWEU,		"divweu",	CONST,	diveu_si)
-BU_P7_POWERPC64_MISC_2 (DIVDE,	"divde",	CONST,	dive_di)
-BU_P7_POWERPC64_MISC_2 (DIVDEU,	"divdeu",	CONST,	diveu_di)
-
-/* 1 argument DFP (decimal floating point) functions added in ISA 2.05.  */
-BU_DFP_MISC_1 (DXEX,		"dxex",		CONST,	dfp_dxex_dd)
-BU_DFP_MISC_1 (DXEXQ,		"dxexq",	CONST,	dfp_dxex_td)
-
-/* 2 argument DFP (decimal floating point) functions added in ISA 2.05.  */
-BU_DFP_MISC_2 (DDEDPD,		"ddedpd",	CONST,	dfp_ddedpd_dd)
-BU_DFP_MISC_2 (DDEDPDQ,		"ddedpdq",	CONST,	dfp_ddedpd_td)
-BU_DFP_MISC_2 (DENBCD,		"denbcd",	CONST,	dfp_denbcd_dd)
-BU_DFP_MISC_2 (DENBCDQ,		"denbcdq",	CONST,	dfp_denbcd_td)
-BU_DFP_MISC_2 (DIEX,		"diex",		CONST,	dfp_diex_dd)
-BU_DFP_MISC_2 (DIEXQ,		"diexq",	CONST,	dfp_diex_td)
-BU_DFP_MISC_2 (DSCLI,		"dscli",	CONST,	dfp_dscli_dd)
-BU_DFP_MISC_2 (DSCLIQ,		"dscliq",	CONST,	dfp_dscli_td)
-BU_DFP_MISC_2 (DSCRI,		"dscri",	CONST,	dfp_dscri_dd)
-BU_DFP_MISC_2 (DSCRIQ,		"dscriq",	CONST,	dfp_dscri_td)
-
-/* 0 argument void function that we pretend was added in ISA 2.06.
-   It's a special nop recognized by 2018+ firmware for P7 and up,
-   with speculation barrier semantics.  */
-BU_P7_MISC_X (SPEC_BARRIER,	"ppc_speculation_barrier",	MISC)
-
-/* 1 argument BCD functions added in ISA 2.06.  */
-BU_P7_MISC_1 (CDTBCD,		"cdtbcd",	CONST,	cdtbcd)
-BU_P7_MISC_1 (CBCDTD,		"cbcdtd",	CONST,	cbcdtd)
-
-/* 2 argument BCD functions added in ISA 2.06.  */
-BU_P7_MISC_2 (ADDG6S,		"addg6s",	CONST,	addg6s)
-
-/* 3 argument BCD functions added in ISA 2.07.  */
-BU_P8V_MISC_3 (BCDADD_V1TI,	"bcdadd_v1ti",	CONST,	bcdadd_v1ti)
-BU_P8V_MISC_3 (BCDADD_V16QI,	"bcdadd_v16qi",	CONST,	bcdadd_v16qi)
-BU_P8V_MISC_3 (BCDADD_LT_V1TI,	"bcdadd_lt_v1ti",  CONST, bcdadd_lt_v1ti)
-BU_P8V_MISC_3 (BCDADD_LT_V16QI,	"bcdadd_lt_v16qi", CONST, bcdadd_lt_v16qi)
-BU_P8V_MISC_3 (BCDADD_EQ_V1TI,	"bcdadd_eq_v1ti",  CONST, bcdadd_eq_v1ti)
-BU_P8V_MISC_3 (BCDADD_EQ_V16QI,	"bcdadd_eq_v16qi", CONST, bcdadd_eq_v16qi)
-BU_P8V_MISC_3 (BCDADD_GT_V1TI,	"bcdadd_gt_v1ti",  CONST, bcdadd_gt_v1ti)
-BU_P8V_MISC_3 (BCDADD_GT_V16QI,	"bcdadd_gt_v16qi", CONST, bcdadd_gt_v16qi)
-BU_P8V_MISC_3 (BCDADD_OV_V1TI,	"bcdadd_ov_v1ti",  CONST, bcdadd_unordered_v1ti)
-BU_P8V_MISC_3 (BCDADD_OV_V16QI,	"bcdadd_ov_v16qi", CONST, bcdadd_unordered_v16qi)
-
-BU_P8V_MISC_3 (BCDSUB_V1TI,	"bcdsub_v1ti",	CONST,	bcdsub_v1ti)
-BU_P8V_MISC_3 (BCDSUB_V16QI,	"bcdsub_v16qi",	CONST,	bcdsub_v16qi)
-BU_P8V_MISC_3 (BCDSUB_LT_V1TI,	"bcdsub_lt_v1ti",  CONST, bcdsub_lt_v1ti)
-BU_P8V_MISC_3 (BCDSUB_LT_V16QI,	"bcdsub_lt_v16qi", CONST, bcdsub_lt_v16qi)
-BU_P8V_MISC_3 (BCDSUB_LE_V1TI,	"bcdsub_le_v1ti",  CONST, bcdsub_le_v1ti)
-BU_P8V_MISC_3 (BCDSUB_LE_V16QI,	"bcdsub_le_v16qi", CONST, bcdsub_le_v16qi)
-BU_P8V_MISC_3 (BCDSUB_EQ_V1TI,	"bcdsub_eq_v1ti",  CONST, bcdsub_eq_v1ti)
-BU_P8V_MISC_3 (BCDSUB_EQ_V16QI,	"bcdsub_eq_v16qi", CONST, bcdsub_eq_v16qi)
-BU_P8V_MISC_3 (BCDSUB_GT_V1TI,	"bcdsub_gt_v1ti",  CONST, bcdsub_gt_v1ti)
-BU_P8V_MISC_3 (BCDSUB_GT_V16QI,	"bcdsub_gt_v16qi", CONST, bcdsub_gt_v16qi)
-BU_P8V_MISC_3 (BCDSUB_GE_V1TI,	"bcdsub_ge_v1ti",  CONST, bcdsub_ge_v1ti)
-BU_P8V_MISC_3 (BCDSUB_GE_V16QI,	"bcdsub_ge_v16qi", CONST, bcdsub_ge_v16qi)
-BU_P8V_MISC_3 (BCDSUB_OV_V1TI,	"bcdsub_ov_v1ti",  CONST, bcdsub_unordered_v1ti)
-BU_P8V_MISC_3 (BCDSUB_OV_V16QI,	"bcdsub_ov_v16qi", CONST, bcdsub_unordered_v16qi)
-
-BU_P8V_MISC_1 (BCDINVALID_V1TI,	"bcdinvalid_v1ti",  CONST, bcdinvalid_v1ti)
-BU_P8V_MISC_1 (BCDINVALID_V16QI, "bcdinvalid_v16qi", CONST, bcdinvalid_v16qi)
-
-BU_P9V_AV_1 (BCDMUL10_V16QI, "bcdmul10_v16qi", CONST, bcdmul10_v16qi)
-BU_P9V_AV_1 (BCDDIV10_V16QI, "bcddiv10_v16qi", CONST, bcddiv10_v16qi)
-BU_P8V_MISC_1 (DENBCD_V16QI,	"denb2dfp_v16qi", CONST, dfp_denbcd_v16qi)
-
-BU_P8V_OVERLOAD_3 (BCDADD,	"bcdadd")
-BU_P8V_OVERLOAD_3 (BCDADD_LT,	"bcdadd_lt")
-BU_P8V_OVERLOAD_3 (BCDADD_EQ,	"bcdadd_eq")
-BU_P8V_OVERLOAD_3 (BCDADD_GT,	"bcdadd_gt")
-BU_P8V_OVERLOAD_3 (BCDADD_OV,	"bcdadd_ov")
-BU_P8V_OVERLOAD_3 (BCDSUB,	"bcdsub")
-BU_P8V_OVERLOAD_3 (BCDSUB_LT,	"bcdsub_lt")
-BU_P8V_OVERLOAD_3 (BCDSUB_LE,	"bcdsub_le")
-BU_P8V_OVERLOAD_3 (BCDSUB_EQ,	"bcdsub_eq")
-BU_P8V_OVERLOAD_3 (BCDSUB_GT,	"bcdsub_gt")
-BU_P8V_OVERLOAD_3 (BCDSUB_GE,	"bcdsub_ge")
-BU_P8V_OVERLOAD_3 (BCDSUB_OV,	"bcdsub_ov")
-BU_P8V_OVERLOAD_1 (BCDINVALID,	"bcdinvalid")
-BU_P9V_OVERLOAD_1 (BCDMUL10,	"bcdmul10")
-BU_P9V_OVERLOAD_1 (BCDDIV10,	"bcddiv10")
-BU_P8V_OVERLOAD_1 (DENBCD,	"denb2dfp")
-
-/* 2 argument pack/unpack 128-bit floating point types.  */
-BU_DFP_MISC_2 (PACK_TD,		"pack_dec128",		CONST,	packtd)
-BU_DFP_MISC_2 (UNPACK_TD,	"unpack_dec128",	CONST,	unpacktd)
-
-/* 0 argument general-purpose register functions added in ISA 3.0 (power9).  */
-BU_P9_MISC_0 (DARN_32,		"darn_32", 		MISC, darn_32)
-BU_P9_64BIT_MISC_0 (DARN_RAW,	"darn_raw", 		MISC, darn_raw)
-BU_P9_64BIT_MISC_0 (DARN,	"darn",			MISC, darn)
-
-BU_LDBL128_2 (PACK_TF,		"pack_longdouble",	CONST,	packtf)
-BU_LDBL128_2 (UNPACK_TF,	"unpack_longdouble",	CONST,	unpacktf)
-
-BU_IBM128_2 (PACK_IF,		"pack_ibm128",		CONST,	packif)
-BU_IBM128_2 (UNPACK_IF,		"unpack_ibm128",	CONST,	unpackif)
-
-BU_P7_MISC_2 (PACK_V1TI,	"pack_vector_int128",	CONST,	packv1ti)
-BU_P7_MISC_2 (UNPACK_V1TI,	"unpack_vector_int128",	CONST,	unpackv1ti)
-
-/* 2 argument DFP (Decimal Floating Point) functions added in ISA 3.0.  */
-BU_P9_DFP_MISC_2 (TSTSFI_LT_DD, "dtstsfi_lt_dd", CONST, dfptstsfi_lt_dd)
-BU_P9_DFP_MISC_2 (TSTSFI_LT_TD, "dtstsfi_lt_td", CONST, dfptstsfi_lt_td)
-
-BU_P9_DFP_MISC_2 (TSTSFI_EQ_DD, "dtstsfi_eq_dd", CONST, dfptstsfi_eq_dd)
-BU_P9_DFP_MISC_2 (TSTSFI_EQ_TD, "dtstsfi_eq_td", CONST, dfptstsfi_eq_td)
-
-BU_P9_DFP_MISC_2 (TSTSFI_GT_DD, "dtstsfi_gt_dd", CONST, dfptstsfi_gt_dd)
-BU_P9_DFP_MISC_2 (TSTSFI_GT_TD, "dtstsfi_gt_td", CONST, dfptstsfi_gt_td)
-
-BU_P9_DFP_MISC_2 (TSTSFI_OV_DD, "dtstsfi_ov_dd", CONST, dfptstsfi_unordered_dd)
-BU_P9_DFP_MISC_2 (TSTSFI_OV_TD, "dtstsfi_ov_td", CONST, dfptstsfi_unordered_td)
-
-/* 2 argument overloaded DFP functions added in ISA 3.0.  */
-BU_P9_DFP_OVERLOAD_2 (TSTSFI_LT,	"dtstsfi_lt")
-BU_P9_DFP_OVERLOAD_2 (TSTSFI_LT_DD,	"dtstsfi_lt_dd")
-BU_P9_DFP_OVERLOAD_2 (TSTSFI_LT_TD,	"dtstsfi_lt_td")
-
-BU_P9_DFP_OVERLOAD_2 (TSTSFI_EQ,	"dtstsfi_eq")
-BU_P9_DFP_OVERLOAD_2 (TSTSFI_EQ_DD,	"dtstsfi_eq_dd")
-BU_P9_DFP_OVERLOAD_2 (TSTSFI_EQ_TD,	"dtstsfi_eq_td")
-
-BU_P9_DFP_OVERLOAD_2 (TSTSFI_GT,	"dtstsfi_gt")
-BU_P9_DFP_OVERLOAD_2 (TSTSFI_GT_DD,	"dtstsfi_gt_dd")
-BU_P9_DFP_OVERLOAD_2 (TSTSFI_GT_TD,	"dtstsfi_gt_td")
-
-BU_P9_DFP_OVERLOAD_2 (TSTSFI_OV,	"dtstsfi_ov")
-BU_P9_DFP_OVERLOAD_2 (TSTSFI_OV_DD,	"dtstsfi_ov_dd")
-BU_P9_DFP_OVERLOAD_2 (TSTSFI_OV_TD,	"dtstsfi_ov_td")
-
-/* 1 argument vector functions added in ISA 3.0 (power9).  */
-BU_P9V_AV_1 (VCTZB,		"vctzb",		CONST,  ctzv16qi2)
-BU_P9V_AV_1 (VCTZH,		"vctzh",		CONST,  ctzv8hi2)
-BU_P9V_AV_1 (VCTZW,		"vctzw",		CONST,  ctzv4si2)
-BU_P9V_AV_1 (VCTZD,		"vctzd",		CONST,  ctzv2di2)
-BU_P9V_AV_1 (VPRTYBD,		"vprtybd",		CONST,  parityv2di2)
-BU_P9V_AV_1 (VPRTYBQ,		"vprtybq",		CONST,  parityv1ti2)
-BU_P9V_AV_1 (VPRTYBW,		"vprtybw",		CONST,  parityv4si2)
-
-/* ISA 3.0 vector overloaded 1 argument functions.  */
-BU_P9V_OVERLOAD_1 (VCTZ,	"vctz")
-BU_P9V_OVERLOAD_1 (VCTZB,	"vctzb")
-BU_P9V_OVERLOAD_1 (VCTZH,	"vctzh")
-BU_P9V_OVERLOAD_1 (VCTZW,	"vctzw")
-BU_P9V_OVERLOAD_1 (VCTZD,	"vctzd")
-BU_P9V_OVERLOAD_1 (VPRTYB,	"vprtyb")
-BU_P9V_OVERLOAD_1 (VPRTYBD,	"vprtybd")
-BU_P9V_OVERLOAD_1 (VPRTYBQ,	"vprtybq")
-BU_P9V_OVERLOAD_1 (VPRTYBW,	"vprtybw")
-BU_P9V_OVERLOAD_1 (VPARITY_LSBB,	"vparity_lsbb")
-BU_P9V_OVERLOAD_1 (VSIGNEXTI,	"vsignexti")
-BU_P9V_OVERLOAD_1 (VSIGNEXTLL,	"vsignextll")
-
-/* 2 argument functions added in ISA 3.0 (power9).  */
-BU_P9_2 (CMPRB,	"byte_in_range",	CONST,	cmprb)
-BU_P9_2 (CMPRB2,	"byte_in_either_range",	CONST,	cmprb2)
-BU_P9_64BIT_2 (CMPEQB,	"byte_in_set",	CONST,	cmpeqb)
-
-/* 2 argument overloaded functions added in ISA 3.0 (power9).  */
-BU_P9_OVERLOAD_2 (CMPRB,	"byte_in_range")
-BU_P9_OVERLOAD_2 (CMPRB2,	"byte_in_either_range")
-BU_P9_OVERLOAD_2 (CMPEQB,	"byte_in_set")
-\f
-
-BU_P9V_AV_1 (VSIGNEXTSB2W,	"vsignextsb2w",		CONST,  vsignextend_qi_v4si)
-BU_P9V_AV_1 (VSIGNEXTSH2W,	"vsignextsh2w",		CONST,  vsignextend_hi_v4si)
-BU_P9V_AV_1 (VSIGNEXTSB2D,	"vsignextsb2d",		CONST,  vsignextend_qi_v2di)
-BU_P9V_AV_1 (VSIGNEXTSH2D,	"vsignextsh2d",		CONST,  vsignextend_hi_v2di)
-BU_P9V_AV_1 (VSIGNEXTSW2D,	"vsignextsw2d",		CONST,  vsignextend_si_v2di)
-
-/* Builtins for scalar instructions added in ISA 3.1 (power10).  */
-BU_P10V_AV_P (VCMPEQUT_P,	"vcmpequt_p",	CONST,	vector_eq_v1ti_p)
-BU_P10V_AV_P (VCMPGTST_P,	"vcmpgtst_p",	CONST,	vector_gt_v1ti_p)
-BU_P10V_AV_P (VCMPGTUT_P,	"vcmpgtut_p",	CONST,	vector_gtu_v1ti_p)
-
-BU_P10_POWERPC64_MISC_2 (CFUGED, "cfuged", CONST, cfuged)
-BU_P10_POWERPC64_MISC_2 (CNTLZDM, "cntlzdm", CONST, cntlzdm)
-BU_P10_POWERPC64_MISC_2 (CNTTZDM, "cnttzdm", CONST, cnttzdm)
-BU_P10_POWERPC64_MISC_2 (PDEPD, "pdepd", CONST, pdepd)
-BU_P10_POWERPC64_MISC_2 (PEXTD, "pextd", CONST, pextd)
-
-/* Builtins for vector instructions added in ISA 3.1 (power10).  */
-BU_P10V_AV_2 (VCLRLB, "vclrlb", CONST, vclrlb)
-BU_P10V_AV_2 (VCLRRB, "vclrrb", CONST, vclrrb)
-BU_P10V_AV_2 (VCFUGED, "vcfuged", CONST, vcfuged)
-BU_P10V_AV_2 (VCLZDM, "vclzdm", CONST, vclzdm)
-BU_P10V_AV_2 (VCTZDM, "vctzdm", CONST, vctzdm)
-BU_P10V_AV_2 (VPDEPD, "vpdepd", CONST, vpdepd)
-BU_P10V_AV_2 (VPEXTD, "vpextd", CONST, vpextd)
-BU_P10V_AV_2 (VGNB, "vgnb", CONST, vgnb)
-BU_P10V_VSX_4 (XXEVAL, "xxeval", CONST, xxeval)
-BU_P10V_VSX_2 (XXGENPCVM_V16QI, "xxgenpcvm_v16qi", CONST, xxgenpcvm_v16qi)
-BU_P10V_VSX_2 (XXGENPCVM_V8HI, "xxgenpcvm_v8hi", CONST, xxgenpcvm_v8hi)
-BU_P10V_VSX_2 (XXGENPCVM_V4SI, "xxgenpcvm_v4si", CONST, xxgenpcvm_v4si)
-BU_P10V_VSX_2 (XXGENPCVM_V2DI, "xxgenpcvm_v2di", CONST, xxgenpcvm_v2di)
-BU_P10V_AV_2 (VCMPGTUT,		"vcmpgtut",	CONST,	vector_gtuv1ti)
-BU_P10V_AV_2 (VCMPGTST,		"vcmpgtst",	CONST,	vector_gtv1ti)
-BU_P10V_AV_2 (VCMPEQUT,		"vcmpequt",	CONST,	vector_eqv1ti)
-BU_P10V_AV_2 (CMPNET,		"vcmpnet",	CONST,	vcmpnet)
-BU_P10V_AV_2 (CMPGE_1TI,	"cmpge_1ti",    CONST,  vector_nltv1ti)
-BU_P10V_AV_2 (CMPGE_U1TI,	"cmpge_u1ti",   CONST,  vector_nltuv1ti)
-BU_P10V_AV_2 (CMPLE_1TI,	"cmple_1ti",    CONST,  vector_ngtv1ti)
-BU_P10V_AV_2 (CMPLE_U1TI,	"cmple_u1ti",   CONST,  vector_ngtuv1ti)
-BU_P10V_AV_2 (VNOR_V1TI_UNS,	"vnor_v1ti_uns",CONST,	norv1ti3)
-BU_P10V_AV_2 (VNOR_V1TI,	"vnor_v1ti",	CONST,	norv1ti3)
-BU_P10V_AV_2 (VCMPNET_P,	"vcmpnet_p",	CONST,	vector_ne_v1ti_p)
-BU_P10V_AV_2 (VCMPAET_P,	"vcmpaet_p",	CONST,	vector_ae_v1ti_p)
-
-BU_P10V_AV_1 (VSIGNEXTSD2Q,	"vsignext",     CONST,  vsignextend_v2di_v1ti)
-
-BU_P10V_AV_2 (VMULEUD,	"vmuleud",	CONST,	vec_widen_umult_even_v2di)
-BU_P10V_AV_2 (VMULESD,	"vmulesd",	CONST,	vec_widen_smult_even_v2di)
-BU_P10V_AV_2 (VMULOUD,	"vmuloud",	CONST,	vec_widen_umult_odd_v2di)
-BU_P10V_AV_2 (VMULOSD,	"vmulosd",	CONST,	vec_widen_smult_odd_v2di)
-BU_P10V_AV_2 (VRLQ,		"vrlq",		CONST,	vrotlv1ti3)
-BU_P10V_AV_2 (VSLQ,		"vslq",		CONST,	vashlv1ti3)
-BU_P10V_AV_2 (VSRQ,		"vsrq",		CONST,	vlshrv1ti3)
-BU_P10V_AV_2 (VSRAQ,		"vsraq",	CONST,	vashrv1ti3)
-BU_P10V_AV_2 (VRLQNM,	"vrlqnm",	CONST,	altivec_vrlqnm)
-BU_P10V_AV_2 (DIV_V1TI,	"div_1ti",      CONST,  vsx_div_v1ti)
-BU_P10V_AV_2 (UDIV_V1TI,	"udiv_1ti",     CONST,  vsx_udiv_v1ti)
-BU_P10V_AV_2 (DIVES_V1TI,	"dives",	CONST,	vsx_dives_v1ti)
-BU_P10V_AV_2 (DIVEU_V1TI,	"diveu",	CONST,	vsx_diveu_v1ti)
-BU_P10V_AV_2 (MODS_V1TI,	"mods",		CONST,	vsx_mods_v1ti)
-BU_P10V_AV_2 (MODU_V1TI,	"modu",		CONST,	vsx_modu_v1ti)
-
-BU_P10V_AV_3 (VRLQMI,	"vrlqmi",	CONST,	altivec_vrlqmi)
-BU_P10V_AV_3 (VEXTRACTBL, "vextdubvlx", CONST, vextractlv16qi)
-BU_P10V_AV_3 (VEXTRACTHL, "vextduhvlx", CONST, vextractlv8hi)
-BU_P10V_AV_3 (VEXTRACTWL, "vextduwvlx", CONST, vextractlv4si)
-BU_P10V_AV_3 (VEXTRACTDL, "vextddvlx", CONST, vextractlv2di)
-
-BU_P10V_AV_3 (VEXTRACTBR, "vextdubvhx", CONST, vextractrv16qi)
-BU_P10V_AV_3 (VEXTRACTHR, "vextduhvhx", CONST, vextractrv8hi)
-BU_P10V_AV_3 (VEXTRACTWR, "vextduwvhx", CONST, vextractrv4si)
-BU_P10V_AV_3 (VEXTRACTDR, "vextddvhx", CONST, vextractrv2di)
-
-BU_P10V_AV_3 (VINSERTGPRBL, "vinsgubvlx", CONST, vinsertgl_v16qi)
-BU_P10V_AV_3 (VINSERTGPRHL, "vinsguhvlx", CONST, vinsertgl_v8hi)
-BU_P10V_AV_3 (VINSERTGPRWL, "vinsguwvlx", CONST, vinsertgl_v4si)
-BU_P10V_AV_3 (VINSERTGPRDL, "vinsgudvlx", CONST, vinsertgl_v2di)
-BU_P10V_AV_3 (VINSERTVPRBL, "vinsvubvlx", CONST, vinsertvl_v16qi)
-BU_P10V_AV_3 (VINSERTVPRHL, "vinsvuhvlx", CONST, vinsertvl_v8hi)
-BU_P10V_AV_3 (VINSERTVPRWL, "vinsvuwvlx", CONST, vinsertvl_v4si)
-
-BU_P10V_AV_3 (VINSERTGPRBR, "vinsgubvrx", CONST, vinsertgr_v16qi)
-BU_P10V_AV_3 (VINSERTGPRHR, "vinsguhvrx", CONST, vinsertgr_v8hi)
-BU_P10V_AV_3 (VINSERTGPRWR, "vinsguwvrx", CONST, vinsertgr_v4si)
-BU_P10V_AV_3 (VINSERTGPRDR, "vinsgudvrx", CONST, vinsertgr_v2di)
-BU_P10V_AV_3 (VINSERTVPRBR, "vinsvubvrx", CONST, vinsertvr_v16qi)
-BU_P10V_AV_3 (VINSERTVPRHR, "vinsvuhvrx", CONST, vinsertvr_v8hi)
-BU_P10V_AV_3 (VINSERTVPRWR, "vinsvuwvrx", CONST, vinsertvr_v4si)
-
-BU_P10V_AV_3 (VREPLACE_ELT_V4SI, "vreplace_v4si", CONST, vreplace_elt_v4si)
-BU_P10V_AV_3 (VREPLACE_ELT_UV4SI, "vreplace_uv4si", CONST, vreplace_elt_v4si)
-BU_P10V_AV_3 (VREPLACE_ELT_V4SF, "vreplace_v4sf", CONST, vreplace_elt_v4sf)
-BU_P10V_AV_3 (VREPLACE_ELT_V2DI, "vreplace_v2di", CONST, vreplace_elt_v2di)
-BU_P10V_AV_3 (VREPLACE_ELT_UV2DI, "vreplace_uv2di", CONST, vreplace_elt_v2di)
-BU_P10V_AV_3 (VREPLACE_ELT_V2DF, "vreplace_v2df", CONST, vreplace_elt_v2df)
-
-BU_P10V_AV_3 (VREPLACE_UN_V4SI, "vreplace_un_v4si", CONST, vreplace_un_v4si)
-BU_P10V_AV_3 (VREPLACE_UN_UV4SI, "vreplace_un_uv4si", CONST, vreplace_un_v4si)
-BU_P10V_AV_3 (VREPLACE_UN_V4SF, "vreplace_un_v4sf", CONST, vreplace_un_v4sf)
-BU_P10V_AV_3 (VREPLACE_UN_V2DI, "vreplace_un_v2di", CONST, vreplace_un_v2di)
-BU_P10V_AV_3 (VREPLACE_UN_UV2DI, "vreplace_un_uv2di", CONST, vreplace_un_v2di)
-BU_P10V_AV_3 (VREPLACE_UN_V2DF, "vreplace_un_v2df", CONST, vreplace_un_v2df)
-
-BU_P10V_AV_3 (VSLDB_V16QI, "vsldb_v16qi", CONST, vsldb_v16qi)
-BU_P10V_AV_3 (VSLDB_V8HI, "vsldb_v8hi", CONST, vsldb_v8hi)
-BU_P10V_AV_3 (VSLDB_V4SI, "vsldb_v4si", CONST, vsldb_v4si)
-BU_P10V_AV_3 (VSLDB_V2DI, "vsldb_v2di", CONST, vsldb_v2di)
-
-BU_P10V_AV_3 (VSRDB_V16QI, "vsrdb_v16qi", CONST, vsrdb_v16qi)
-BU_P10V_AV_3 (VSRDB_V8HI, "vsrdb_v8hi", CONST, vsrdb_v8hi)
-BU_P10V_AV_3 (VSRDB_V4SI, "vsrdb_v4si", CONST, vsrdb_v4si)
-BU_P10V_AV_3 (VSRDB_V2DI, "vsrdb_v2di", CONST, vsrdb_v2di)
-
-BU_P10V_AV_2 (DIVES_V4SI, "vdivesw", CONST, dives_v4si)
-BU_P10V_AV_2 (DIVES_V2DI, "vdivesd", CONST, dives_v2di)
-BU_P10V_AV_2 (DIVEU_V4SI, "vdiveuw", CONST, diveu_v4si)
-BU_P10V_AV_2 (DIVEU_V2DI, "vdiveud", CONST, diveu_v2di)
-BU_P10V_AV_2 (DIVS_V4SI, "vdivsw", CONST, divv4si3)
-BU_P10V_AV_2 (DIVS_V2DI, "vdivsd", CONST, divv2di3)
-BU_P10V_AV_2 (DIVU_V4SI, "vdivuw", CONST, udivv4si3)
-BU_P10V_AV_2 (DIVU_V2DI, "vdivud", CONST, udivv2di3)
-BU_P10V_AV_2 (MODS_V2DI, "vmodsd", CONST, modv2di3)
-BU_P10V_AV_2 (MODS_V4SI, "vmodsw", CONST, modv4si3)
-BU_P10V_AV_2 (MODU_V2DI, "vmodud", CONST, umodv2di3)
-BU_P10V_AV_2 (MODU_V4SI, "vmoduw", CONST, umodv4si3)
-BU_P10V_AV_2 (MULHS_V2DI, "vmulhsd", CONST, smulv2di3_highpart)
-BU_P10V_AV_2 (MULHS_V4SI, "vmulhsw", CONST, smulv4si3_highpart)
-BU_P10V_AV_2 (MULHU_V2DI, "vmulhud", CONST, umulv2di3_highpart)
-BU_P10V_AV_2 (MULHU_V4SI, "vmulhuw", CONST, umulv4si3_highpart)
-BU_P10V_AV_2 (MULLD_V2DI, "vmulld", CONST, mulv2di3)
-
-BU_P10V_VSX_1 (VXXSPLTIW_V4SI, "vxxspltiw_v4si", CONST, xxspltiw_v4si)
-BU_P10V_VSX_1 (VXXSPLTIW_V4SF, "vxxspltiw_v4sf", CONST, xxspltiw_v4sf)
-
-BU_P10V_VSX_1 (VXXSPLTID, "vxxspltidp", CONST, xxspltidp_v2df)
-
-BU_P10V_VSX_3 (VXXSPLTI32DX_V4SI, "vxxsplti32dx_v4si", CONST, xxsplti32dx_v4si)
-BU_P10V_VSX_3 (VXXSPLTI32DX_V4SF, "vxxsplti32dx_v4sf", CONST, xxsplti32dx_v4sf)
-
-BU_P10V_VSX_3 (VXXBLEND_V16QI, "xxblend_v16qi", CONST, xxblend_v16qi)
-BU_P10V_VSX_3 (VXXBLEND_V8HI, "xxblend_v8hi", CONST, xxblend_v8hi)
-BU_P10V_VSX_3 (VXXBLEND_V4SI, "xxblend_v4si", CONST, xxblend_v4si)
-BU_P10V_VSX_3 (VXXBLEND_V2DI, "xxblend_v2di", CONST, xxblend_v2di)
-BU_P10V_VSX_3 (VXXBLEND_V4SF, "xxblend_v4sf", CONST, xxblend_v4sf)
-BU_P10V_VSX_3 (VXXBLEND_V2DF, "xxblend_v2df", CONST, xxblend_v2df)
-
-BU_P10V_VSX_4 (VXXPERMX, "xxpermx", CONST, xxpermx)
-
-BU_P10V_AV_1 (VSTRIBR, "vstribr", CONST, vstrir_v16qi)
-BU_P10V_AV_1 (VSTRIHR, "vstrihr", CONST, vstrir_v8hi)
-BU_P10V_AV_1 (VSTRIBL, "vstribl", CONST, vstril_v16qi)
-BU_P10V_AV_1 (VSTRIHL, "vstrihl", CONST, vstril_v8hi)
-
-BU_P10V_AV_1 (VSTRIBR_P, "vstribr_p", CONST, vstrir_p_v16qi)
-BU_P10V_AV_1 (VSTRIHR_P, "vstrihr_p", CONST, vstrir_p_v8hi)
-BU_P10V_AV_1 (VSTRIBL_P, "vstribl_p", CONST, vstril_p_v16qi)
-BU_P10V_AV_1 (VSTRIHL_P, "vstrihl_p", CONST, vstril_p_v8hi)
-
-BU_P10V_VSX_1 (XVTLSBB_ZEROS, "xvtlsbb_all_zeros", CONST, xvtlsbbz)
-BU_P10V_VSX_1 (XVTLSBB_ONES, "xvtlsbb_all_ones", CONST, xvtlsbbo)
-
-BU_P10V_AV_1 (MTVSRBM, "mtvsrbm", CONST, vec_mtvsr_v16qi)
-BU_P10V_AV_1 (MTVSRHM, "mtvsrhm", CONST, vec_mtvsr_v8hi)
-BU_P10V_AV_1 (MTVSRWM, "mtvsrwm", CONST, vec_mtvsr_v4si)
-BU_P10V_AV_1 (MTVSRDM, "mtvsrdm", CONST, vec_mtvsr_v2di)
-BU_P10V_AV_1 (MTVSRQM, "mtvsrqm", CONST, vec_mtvsr_v1ti)
-BU_P10V_AV_2 (VCNTMBB, "cntmbb", CONST, vec_cntmb_v16qi)
-BU_P10V_AV_2 (VCNTMBH, "cntmbh", CONST, vec_cntmb_v8hi)
-BU_P10V_AV_2 (VCNTMBW, "cntmbw", CONST, vec_cntmb_v4si)
-BU_P10V_AV_2 (VCNTMBD, "cntmbd", CONST, vec_cntmb_v2di)
-BU_P10V_AV_1 (VEXPANDMB, "vexpandmb", CONST, vec_expand_v16qi)
-BU_P10V_AV_1 (VEXPANDMH, "vexpandmh", CONST, vec_expand_v8hi)
-BU_P10V_AV_1 (VEXPANDMW, "vexpandmw", CONST, vec_expand_v4si)
-BU_P10V_AV_1 (VEXPANDMD, "vexpandmd", CONST, vec_expand_v2di)
-BU_P10V_AV_1 (VEXPANDMQ, "vexpandmq", CONST, vec_expand_v1ti)
-BU_P10V_AV_1 (VEXTRACTMB, "vextractmb", CONST, vec_extract_v16qi)
-BU_P10V_AV_1 (VEXTRACTMH, "vextractmh", CONST, vec_extract_v8hi)
-BU_P10V_AV_1 (VEXTRACTMW, "vextractmw", CONST, vec_extract_v4si)
-BU_P10V_AV_1 (VEXTRACTMD, "vextractmd", CONST, vec_extract_v2di)
-BU_P10V_AV_1 (VEXTRACTMQ, "vextractmq", CONST, vec_extract_v1ti)
-
-/* Overloaded vector builtins for ISA 3.1 (power10).  */
-BU_P10_OVERLOAD_2 (CLRL, "clrl")
-BU_P10_OVERLOAD_2 (CLRR, "clrr")
-BU_P10_OVERLOAD_2 (GNB, "gnb")
-BU_P10_OVERLOAD_4 (XXEVAL, "xxeval")
-BU_P10_OVERLOAD_2 (XXGENPCVM, "xxgenpcvm")
-
-BU_P10_OVERLOAD_3 (EXTRACTL, "extractl")
-BU_P10_OVERLOAD_3 (EXTRACTH, "extracth")
-BU_P10_OVERLOAD_3 (INSERTL, "insertl")
-BU_P10_OVERLOAD_3 (INSERTH, "inserth")
-BU_P10_OVERLOAD_3 (REPLACE_ELT, "replace_elt")
-BU_P10_OVERLOAD_3 (REPLACE_UN, "replace_un")
-BU_P10_OVERLOAD_3 (SLDB, "sldb")
-BU_P10_OVERLOAD_3 (SRDB, "srdb")
-
-BU_P10_OVERLOAD_1 (VSTRIR, "strir")
-BU_P10_OVERLOAD_1 (VSTRIL, "stril")
-
-BU_P10_OVERLOAD_1 (VSTRIR_P, "strir_p")
-BU_P10_OVERLOAD_1 (VSTRIL_P, "stril_p")
-
-BU_P10_OVERLOAD_1 (XVTLSBB_ZEROS, "xvtlsbb_all_zeros")
-BU_P10_OVERLOAD_1 (XVTLSBB_ONES, "xvtlsbb_all_ones")
-
-BU_P10_OVERLOAD_2 (MULH, "mulh")
-BU_P10_OVERLOAD_2 (DIVE, "dive")
-BU_P10_OVERLOAD_2 (MOD, "mod")
-\f
-BU_P10_OVERLOAD_1 (MTVSRBM, "mtvsrbm")
-BU_P10_OVERLOAD_1 (MTVSRHM, "mtvsrhm")
-BU_P10_OVERLOAD_1 (MTVSRWM, "mtvsrwm")
-BU_P10_OVERLOAD_1 (MTVSRDM, "mtvsrdm")
-BU_P10_OVERLOAD_1 (MTVSRQM, "mtvsrqm")
-BU_P10_OVERLOAD_2 (VCNTM, "cntm")
-BU_P10_OVERLOAD_1 (VEXPANDM, "vexpandm")
-BU_P10_OVERLOAD_1 (VEXTRACTM, "vextractm")
-BU_P10_OVERLOAD_1 (XXSPLTIW, "xxspltiw")
-BU_P10_OVERLOAD_1 (XXSPLTID, "xxspltid")
-BU_P10_OVERLOAD_3 (XXSPLTI32DX, "xxsplti32dx")
-BU_P10_OVERLOAD_3 (XXBLEND, "xxblend")
-BU_P10_OVERLOAD_4 (XXPERMX, "xxpermx")
-
-/* 1 argument crypto functions.  */
-BU_CRYPTO_1 (VSBOX,		"vsbox",	  CONST, crypto_vsbox_v2di)
-BU_CRYPTO_1 (VSBOX_BE,		"vsbox_be",	  CONST, crypto_vsbox_v16qi)
-
-/* 2 argument crypto functions.  */
-BU_CRYPTO_2 (VCIPHER,		"vcipher",	  CONST, crypto_vcipher_v2di)
-BU_CRYPTO_2 (VCIPHER_BE,	"vcipher_be",	  CONST, crypto_vcipher_v16qi)
-BU_CRYPTO_2 (VCIPHERLAST,	"vcipherlast",
-	     CONST, crypto_vcipherlast_v2di)
-BU_CRYPTO_2 (VCIPHERLAST_BE,	"vcipherlast_be",
-	     CONST, crypto_vcipherlast_v16qi)
-BU_CRYPTO_2 (VNCIPHER,		"vncipher",	  CONST, crypto_vncipher_v2di)
-BU_CRYPTO_2 (VNCIPHER_BE,	"vncipher_be",	  CONST, crypto_vncipher_v16qi)
-BU_CRYPTO_2 (VNCIPHERLAST,	"vncipherlast",
-	     CONST, crypto_vncipherlast_v2di)
-BU_CRYPTO_2 (VNCIPHERLAST_BE,	"vncipherlast_be",
-	     CONST, crypto_vncipherlast_v16qi)
-BU_CRYPTO_2A (VPMSUMB,		"vpmsumb",	  CONST, crypto_vpmsumb)
-BU_CRYPTO_2A (VPMSUMH,		"vpmsumh",	  CONST, crypto_vpmsumh)
-BU_CRYPTO_2A (VPMSUMW,		"vpmsumw",	  CONST, crypto_vpmsumw)
-BU_CRYPTO_2A (VPMSUMD,		"vpmsumd",	  CONST, crypto_vpmsumd)
-
-/* 3 argument crypto functions.  */
-BU_CRYPTO_3A (VPERMXOR_V2DI,	"vpermxor_v2di",  CONST, crypto_vpermxor_v2di)
-BU_CRYPTO_3A (VPERMXOR_V4SI,	"vpermxor_v4si",  CONST, crypto_vpermxor_v4si)
-BU_CRYPTO_3A (VPERMXOR_V8HI,	"vpermxor_v8hi",  CONST, crypto_vpermxor_v8hi)
-BU_CRYPTO_3A (VPERMXOR_V16QI,	"vpermxor_v16qi", CONST, crypto_vpermxor_v16qi)
-BU_CRYPTO_3 (VSHASIGMAW,	"vshasigmaw",	  CONST, crypto_vshasigmaw)
-BU_CRYPTO_3 (VSHASIGMAD,	"vshasigmad",	  CONST, crypto_vshasigmad)
-
-/* 2 argument crypto overloaded functions.  */
-BU_CRYPTO_OVERLOAD_2A (VPMSUM,	 "vpmsum")
-
-/* 3 argument crypto overloaded functions.  */
-BU_CRYPTO_OVERLOAD_3A (VPERMXOR,	 "vpermxor")
-BU_CRYPTO_OVERLOAD_3 (VSHASIGMA, "vshasigma")
-
-BU_P10_OVERLOAD_1 (SIGNEXT, "vsignextq")
-\f
-/* HTM functions.  */
-BU_HTM_1  (TABORT,	"tabort",	CR,	tabort)
-BU_HTM_3  (TABORTDC,	"tabortdc",	CR,	tabortdc)
-BU_HTM_3  (TABORTDCI,	"tabortdci",	CR,	tabortdci)
-BU_HTM_3  (TABORTWC,	"tabortwc",	CR,	tabortwc)
-BU_HTM_3  (TABORTWCI,	"tabortwci",	CR,	tabortwci)
-BU_HTM_1  (TBEGIN,	"tbegin",	CR,	tbegin)
-BU_HTM_0  (TCHECK,	"tcheck",	CR,	tcheck)
-BU_HTM_1  (TEND,	"tend",		CR,	tend)
-BU_HTM_0  (TENDALL,	"tendall",	CR,	tend)
-BU_HTM_0  (TRECHKPT,	"trechkpt",	CR,	trechkpt)
-BU_HTM_1  (TRECLAIM,	"treclaim",	CR,	treclaim)
-BU_HTM_0  (TRESUME,	"tresume",	CR,	tsr)
-BU_HTM_0  (TSUSPEND,	"tsuspend",	CR,	tsr)
-BU_HTM_1  (TSR,		"tsr",		CR,	tsr)
-BU_HTM_0  (TTEST,	"ttest",	CR,	ttest)
-
-BU_HTM_0  (GET_TFHAR,	"get_tfhar",	SPR,	nothing)
-BU_HTM_V1 (SET_TFHAR,	"set_tfhar",	SPR,	nothing)
-BU_HTM_0  (GET_TFIAR,	"get_tfiar",	SPR,	nothing)
-BU_HTM_V1 (SET_TFIAR,	"set_tfiar",	SPR,	nothing)
-BU_HTM_0  (GET_TEXASR,	"get_texasr",	SPR,	nothing)
-BU_HTM_V1 (SET_TEXASR,	"set_texasr",	SPR,	nothing)
-BU_HTM_0  (GET_TEXASRU,	"get_texasru",	SPR,	nothing)
-BU_HTM_V1 (SET_TEXASRU,	"set_texasru",	SPR,	nothing)
-
-\f
-/* Power7 builtins, that aren't VSX instructions.  */
-BU_SPECIAL_X (POWER7_BUILTIN_BPERMD, "__builtin_bpermd", RS6000_BTM_POPCNTD,
-	      RS6000_BTC_CONST)
-
-/* Miscellaneous builtins.  */
-BU_SPECIAL_X (RS6000_BUILTIN_RECIP, "__builtin_recipdiv", RS6000_BTM_FRE,
-	      RS6000_BTC_FP)
-
-BU_SPECIAL_X (RS6000_BUILTIN_RECIPF, "__builtin_recipdivf", RS6000_BTM_FRES,
-	      RS6000_BTC_FP)
-
-BU_SPECIAL_X (RS6000_BUILTIN_RSQRT, "__builtin_rsqrt", RS6000_BTM_FRSQRTE,
-	      RS6000_BTC_FP)
-
-BU_SPECIAL_X (RS6000_BUILTIN_RSQRTF, "__builtin_rsqrtf", RS6000_BTM_FRSQRTES,
-	      RS6000_BTC_FP)
-
-BU_SPECIAL_X (RS6000_BUILTIN_GET_TB, "__builtin_ppc_get_timebase",
-	      RS6000_BTM_ALWAYS, RS6000_BTC_MISC)
-
-BU_SPECIAL_X (RS6000_BUILTIN_MFTB, "__builtin_ppc_mftb",
-	      RS6000_BTM_ALWAYS, RS6000_BTC_MISC)
-
-BU_SPECIAL_X (RS6000_BUILTIN_MFFS, "__builtin_mffs",
-	      RS6000_BTM_ALWAYS, RS6000_BTC_MISC)
-
-BU_SPECIAL_X (RS6000_BUILTIN_MFFSL, "__builtin_mffsl",
-	      RS6000_BTM_ALWAYS, RS6000_BTC_MISC)
-
-RS6000_BUILTIN_X (RS6000_BUILTIN_MTFSF, "__builtin_mtfsf",
-	          RS6000_BTM_ALWAYS,
-	          RS6000_BTC_MISC | RS6000_BTC_UNARY | RS6000_BTC_VOID,
-		  CODE_FOR_rs6000_mtfsf)
-
-RS6000_BUILTIN_X (RS6000_BUILTIN_MTFSB0, "__builtin_mtfsb0",
-		  RS6000_BTM_ALWAYS,
-		  RS6000_BTC_MISC | RS6000_BTC_UNARY | RS6000_BTC_VOID,
-		  CODE_FOR_rs6000_mtfsb0)
-
-RS6000_BUILTIN_X (RS6000_BUILTIN_MTFSB1, "__builtin_mtfsb1",
-		  RS6000_BTM_ALWAYS,
-		  RS6000_BTC_MISC | RS6000_BTC_UNARY | RS6000_BTC_VOID,
-		  CODE_FOR_rs6000_mtfsb1)
-
-RS6000_BUILTIN_X (RS6000_BUILTIN_SET_FPSCR_RN, "__builtin_set_fpscr_rn",
-		  RS6000_BTM_ALWAYS,
-		  RS6000_BTC_MISC | RS6000_BTC_UNARY| RS6000_BTC_VOID,
-		  CODE_FOR_rs6000_set_fpscr_rn)
-
-RS6000_BUILTIN_X (RS6000_BUILTIN_SET_FPSCR_DRN, "__builtin_set_fpscr_drn",
-		  RS6000_BTM_DFP,
-		  RS6000_BTC_MISC | RS6000_BTM_64BIT | RS6000_BTC_UNARY
-		  | RS6000_BTC_VOID,
-		  CODE_FOR_rs6000_set_fpscr_drn)
-
-BU_SPECIAL_X (RS6000_BUILTIN_CPU_INIT, "__builtin_cpu_init",
-	      RS6000_BTM_ALWAYS, RS6000_BTC_MISC)
-
-BU_SPECIAL_X (RS6000_BUILTIN_CPU_IS, "__builtin_cpu_is",
-	      RS6000_BTM_ALWAYS, RS6000_BTC_MISC)
-
-BU_SPECIAL_X (RS6000_BUILTIN_CPU_SUPPORTS, "__builtin_cpu_supports",
-	      RS6000_BTM_ALWAYS, RS6000_BTC_MISC)
-
-/* Darwin CfString builtin.  */
-BU_SPECIAL_X (RS6000_BUILTIN_CFSTRING, "__builtin_cfstring", RS6000_BTM_ALWAYS,
-	      RS6000_BTC_MISC)
-
-/* POWER10 MMA builtins.  */
-BU_P10V_VSX_1 (XVCVBF16SPN,	 "xvcvbf16spn",	MISC, vsx_xvcvbf16spn)
-BU_P10V_VSX_1 (XVCVSPBF16,	    "xvcvspbf16",	MISC, vsx_xvcvspbf16)
-
-BU_MMA_PAIR_LD (LXVP,	    "lxvp",		MISC)
-BU_MMA_PAIR_ST (STXVP,	    "stxvp",		PAIR)
-
-BU_MMA_1 (XXMFACC,	    "xxmfacc",		QUAD, mma_xxmfacc)
-BU_MMA_1 (XXMTACC,	    "xxmtacc",		QUAD, mma_xxmtacc)
-BU_MMA_1 (XXSETACCZ,	    "xxsetaccz",	MISC, mma_xxsetaccz)
-
-BU_MMA_2 (DISASSEMBLE_ACC, "disassemble_acc",	QUAD, mma_disassemble_acc)
-BU_MMA_V2 (DISASSEMBLE_PAIR, "disassemble_pair", PAIR, vsx_disassemble_pair)
-BU_COMPAT (VSX_BUILTIN_DISASSEMBLE_PAIR, "mma_disassemble_pair")
-
-BU_MMA_V3 (BUILD_PAIR,	    "build_pair",	MISC, vsx_assemble_pair)
-BU_MMA_V3 (ASSEMBLE_PAIR,   "assemble_pair",	MISC, vsx_assemble_pair)
-BU_COMPAT (VSX_BUILTIN_ASSEMBLE_PAIR, "mma_assemble_pair")
-BU_MMA_3 (XVBF16GER2,	    "xvbf16ger2",	MISC, mma_xvbf16ger2)
-BU_MMA_3 (XVF16GER2,	    "xvf16ger2",	MISC, mma_xvf16ger2)
-BU_MMA_3 (XVF32GER,	    "xvf32ger",		MISC, mma_xvf32ger)
-BU_MMA_3 (XVF64GER,	    "xvf64ger",		PAIR, mma_xvf64ger)
-BU_MMA_3 (XVI4GER8,	    "xvi4ger8",		MISC, mma_xvi4ger8)
-BU_MMA_3 (XVI8GER4,	    "xvi8ger4",		MISC, mma_xvi8ger4)
-BU_MMA_3 (XVI16GER2,	    "xvi16ger2",	MISC, mma_xvi16ger2)
-BU_MMA_3 (XVI16GER2S,	    "xvi16ger2s",	MISC, mma_xvi16ger2s)
-BU_MMA_3 (XVBF16GER2NN,	    "xvbf16ger2nn",     QUAD, mma_xvbf16ger2nn)
-BU_MMA_3 (XVBF16GER2NP,	    "xvbf16ger2np",     QUAD, mma_xvbf16ger2np)
-BU_MMA_3 (XVBF16GER2PN,	    "xvbf16ger2pn",     QUAD, mma_xvbf16ger2pn)
-BU_MMA_3 (XVBF16GER2PP,	    "xvbf16ger2pp",     QUAD, mma_xvbf16ger2pp)
-BU_MMA_3 (XVF16GER2NN,	    "xvf16ger2nn",      QUAD, mma_xvf16ger2nn)
-BU_MMA_3 (XVF16GER2NP,	    "xvf16ger2np",      QUAD, mma_xvf16ger2np)
-BU_MMA_3 (XVF16GER2PN,	    "xvf16ger2pn",      QUAD, mma_xvf16ger2pn)
-BU_MMA_3 (XVF16GER2PP,	    "xvf16ger2pp",      QUAD, mma_xvf16ger2pp)
-BU_MMA_3 (XVF32GERNN,	    "xvf32gernn",       QUAD, mma_xvf32gernn)
-BU_MMA_3 (XVF32GERNP,	    "xvf32gernp",       QUAD, mma_xvf32gernp)
-BU_MMA_3 (XVF32GERPN,	    "xvf32gerpn",       QUAD, mma_xvf32gerpn)
-BU_MMA_3 (XVF32GERPP,	    "xvf32gerpp",       QUAD, mma_xvf32gerpp)
-BU_MMA_3 (XVF64GERNN,	    "xvf64gernn",       QUADPAIR, mma_xvf64gernn)
-BU_MMA_3 (XVF64GERNP,	    "xvf64gernp",       QUADPAIR, mma_xvf64gernp)
-BU_MMA_3 (XVF64GERPN,	    "xvf64gerpn",       QUADPAIR, mma_xvf64gerpn)
-BU_MMA_3 (XVF64GERPP,	    "xvf64gerpp",       QUADPAIR, mma_xvf64gerpp)
-BU_MMA_3 (XVI4GER8PP,	    "xvi4ger8pp",	QUAD, mma_xvi4ger8pp)
-BU_MMA_3 (XVI8GER4PP,	    "xvi8ger4pp",       QUAD, mma_xvi8ger4pp)
-BU_MMA_3 (XVI8GER4SPP,	    "xvi8ger4spp",      QUAD, mma_xvi8ger4spp)
-BU_MMA_3 (XVI16GER2PP,	    "xvi16ger2pp",      QUAD, mma_xvi16ger2pp)
-BU_MMA_3 (XVI16GER2SPP,	    "xvi16ger2spp",     QUAD, mma_xvi16ger2spp)
-
-BU_MMA_5 (BUILD_ACC,	    "build_acc",	MISC, mma_assemble_acc)
-BU_MMA_5 (ASSEMBLE_ACC,     "assemble_acc",	MISC, mma_assemble_acc)
-BU_MMA_5 (PMXVF32GER,	    "pmxvf32ger",       MISC, mma_pmxvf32ger)
-BU_MMA_5 (PMXVF64GER,	    "pmxvf64ger",       PAIR, mma_pmxvf64ger)
-BU_MMA_5 (PMXVF32GERNN,	    "pmxvf32gernn",     QUAD, mma_pmxvf32gernn)
-BU_MMA_5 (PMXVF32GERNP,	    "pmxvf32gernp",     QUAD, mma_pmxvf32gernp)
-BU_MMA_5 (PMXVF32GERPN,	    "pmxvf32gerpn",     QUAD, mma_pmxvf32gerpn)
-BU_MMA_5 (PMXVF32GERPP,	    "pmxvf32gerpp",     QUAD, mma_pmxvf32gerpp)
-BU_MMA_5 (PMXVF64GERNN,	    "pmxvf64gernn",     QUADPAIR, mma_pmxvf64gernn)
-BU_MMA_5 (PMXVF64GERNP,	    "pmxvf64gernp",     QUADPAIR, mma_pmxvf64gernp)
-BU_MMA_5 (PMXVF64GERPN,	    "pmxvf64gerpn",     QUADPAIR, mma_pmxvf64gerpn)
-BU_MMA_5 (PMXVF64GERPP,	    "pmxvf64gerpp",     QUADPAIR, mma_pmxvf64gerpp)
-
-BU_MMA_6 (PMXVBF16GER2,	    "pmxvbf16ger2",     MISC, mma_pmxvbf16ger2)
-BU_MMA_6 (PMXVF16GER2,	    "pmxvf16ger2",      MISC, mma_pmxvf16ger2)
-BU_MMA_6 (PMXVI4GER8,	    "pmxvi4ger8",       MISC, mma_pmxvi4ger8)
-BU_MMA_6 (PMXVI8GER4,	    "pmxvi8ger4",	MISC, mma_pmxvi8ger4)
-BU_MMA_6 (PMXVI16GER2,	    "pmxvi16ger2",      MISC, mma_pmxvi16ger2)
-BU_MMA_6 (PMXVI16GER2S,	    "pmxvi16ger2s",     MISC, mma_pmxvi16ger2s)
-BU_MMA_6 (PMXVBF16GER2NN,   "pmxvbf16ger2nn",   QUAD, mma_pmxvbf16ger2nn)
-BU_MMA_6 (PMXVBF16GER2NP,   "pmxvbf16ger2np",   QUAD, mma_pmxvbf16ger2np)
-BU_MMA_6 (PMXVBF16GER2PN,   "pmxvbf16ger2pn",   QUAD, mma_pmxvbf16ger2pn)
-BU_MMA_6 (PMXVBF16GER2PP,   "pmxvbf16ger2pp",   QUAD, mma_pmxvbf16ger2pp)
-BU_MMA_6 (PMXVF16GER2NN,    "pmxvf16ger2nn",    QUAD, mma_pmxvf16ger2nn)
-BU_MMA_6 (PMXVF16GER2NP,    "pmxvf16ger2np",    QUAD, mma_pmxvf16ger2np)
-BU_MMA_6 (PMXVF16GER2PN,    "pmxvf16ger2pn",    QUAD, mma_pmxvf16ger2pn)
-BU_MMA_6 (PMXVF16GER2PP,    "pmxvf16ger2pp",    QUAD, mma_pmxvf16ger2pp)
-BU_MMA_6 (PMXVI4GER8PP,	    "pmxvi4ger8pp",     QUAD, mma_pmxvi4ger8pp)
-BU_MMA_6 (PMXVI8GER4PP,	    "pmxvi8ger4pp",	QUAD, mma_pmxvi8ger4pp)
-BU_MMA_6 (PMXVI8GER4SPP,    "pmxvi8ger4spp",	QUAD, mma_pmxvi8ger4spp)
-BU_MMA_6 (PMXVI16GER2PP,    "pmxvi16ger2pp",    QUAD, mma_pmxvi16ger2pp)
-BU_MMA_6 (PMXVI16GER2SPP,   "pmxvi16ger2spp",   QUAD, mma_pmxvi16ger2spp)
diff --git a/gcc/config/rs6000/rs6000-call.c b/gcc/config/rs6000/rs6000-call.c
index 734887055b2..619f936668e 100644
--- a/gcc/config/rs6000/rs6000-call.c
+++ b/gcc/config/rs6000/rs6000-call.c
@@ -89,20 +89,6 @@
 #define TARGET_NO_PROTOTYPE 0
 #endif
 
-struct builtin_compatibility
-{
-  const enum rs6000_builtins code;
-  const char *const name;
-};
-
-struct builtin_description
-{
-  const HOST_WIDE_INT mask;
-  const enum insn_code icode;
-  const char *const name;
-  const enum rs6000_builtins code;
-};
-
 /* Used by __builtin_cpu_is(), mapping from PLATFORM names to values.  */
 static const struct
 {
@@ -184,127 +170,6 @@ static const struct
 
 static rtx rs6000_expand_new_builtin (tree, rtx, rtx, machine_mode, int);
 static bool rs6000_gimple_fold_new_builtin (gimple_stmt_iterator *gsi);
-
-
-/* Hash table to keep track of the argument types for builtin functions.  */
-
-struct GTY((for_user)) builtin_hash_struct
-{
-  tree type;
-  machine_mode mode[4];	/* return value + 3 arguments.  */
-  unsigned char uns_p[4];	/* and whether the types are unsigned.  */
-};
-
-struct builtin_hasher : ggc_ptr_hash<builtin_hash_struct>
-{
-  static hashval_t hash (builtin_hash_struct *);
-  static bool equal (builtin_hash_struct *, builtin_hash_struct *);
-};
-
-static GTY (()) hash_table<builtin_hasher> *builtin_hash_table;
-
-/* Hash function for builtin functions with up to 3 arguments and a return
-   type.  */
-hashval_t
-builtin_hasher::hash (builtin_hash_struct *bh)
-{
-  unsigned ret = 0;
-  int i;
-
-  for (i = 0; i < 4; i++)
-    {
-      ret = (ret * (unsigned)MAX_MACHINE_MODE) + ((unsigned)bh->mode[i]);
-      ret = (ret * 2) + bh->uns_p[i];
-    }
-
-  return ret;
-}
-
-/* Compare builtin hash entries H1 and H2 for equivalence.  */
-bool
-builtin_hasher::equal (builtin_hash_struct *p1, builtin_hash_struct *p2)
-{
-  return ((p1->mode[0] == p2->mode[0])
-	  && (p1->mode[1] == p2->mode[1])
-	  && (p1->mode[2] == p2->mode[2])
-	  && (p1->mode[3] == p2->mode[3])
-	  && (p1->uns_p[0] == p2->uns_p[0])
-	  && (p1->uns_p[1] == p2->uns_p[1])
-	  && (p1->uns_p[2] == p2->uns_p[2])
-	  && (p1->uns_p[3] == p2->uns_p[3]));
-}
-
-\f
-/* Table that classifies rs6000 builtin functions (pure, const, etc.).  */
-#undef RS6000_BUILTIN_0
-#undef RS6000_BUILTIN_1
-#undef RS6000_BUILTIN_2
-#undef RS6000_BUILTIN_3
-#undef RS6000_BUILTIN_4
-#undef RS6000_BUILTIN_A
-#undef RS6000_BUILTIN_D
-#undef RS6000_BUILTIN_H
-#undef RS6000_BUILTIN_M
-#undef RS6000_BUILTIN_P
-#undef RS6000_BUILTIN_X
-
-#define RS6000_BUILTIN_0(ENUM, NAME, MASK, ATTR, ICODE) \
-  { NAME, ICODE, MASK, ATTR },
-
-#define RS6000_BUILTIN_1(ENUM, NAME, MASK, ATTR, ICODE) \
-  { NAME, ICODE, MASK, ATTR },
-
-#define RS6000_BUILTIN_2(ENUM, NAME, MASK, ATTR, ICODE)  \
-  { NAME, ICODE, MASK, ATTR },
-
-#define RS6000_BUILTIN_3(ENUM, NAME, MASK, ATTR, ICODE)  \
-  { NAME, ICODE, MASK, ATTR },
-
-#define RS6000_BUILTIN_4(ENUM, NAME, MASK, ATTR, ICODE)  \
-  { NAME, ICODE, MASK, ATTR },
-
-#define RS6000_BUILTIN_A(ENUM, NAME, MASK, ATTR, ICODE)  \
-  { NAME, ICODE, MASK, ATTR },
-
-#define RS6000_BUILTIN_D(ENUM, NAME, MASK, ATTR, ICODE)  \
-  { NAME, ICODE, MASK, ATTR },
-
-#define RS6000_BUILTIN_H(ENUM, NAME, MASK, ATTR, ICODE)  \
-  { NAME, ICODE, MASK, ATTR },
-
-#define RS6000_BUILTIN_M(ENUM, NAME, MASK, ATTR, ICODE)  \
-  { NAME, ICODE, MASK, ATTR },
-
-#define RS6000_BUILTIN_P(ENUM, NAME, MASK, ATTR, ICODE)  \
-  { NAME, ICODE, MASK, ATTR },
-
-#define RS6000_BUILTIN_X(ENUM, NAME, MASK, ATTR, ICODE)  \
-  { NAME, ICODE, MASK, ATTR },
-
-struct rs6000_builtin_info_type {
-  const char *name;
-  const enum insn_code icode;
-  const HOST_WIDE_INT mask;
-  const unsigned attr;
-};
-
-static const struct rs6000_builtin_info_type rs6000_builtin_info[] =
-{
-#include "rs6000-builtin.def"
-};
-
-#undef RS6000_BUILTIN_0
-#undef RS6000_BUILTIN_1
-#undef RS6000_BUILTIN_2
-#undef RS6000_BUILTIN_3
-#undef RS6000_BUILTIN_4
-#undef RS6000_BUILTIN_A
-#undef RS6000_BUILTIN_D
-#undef RS6000_BUILTIN_H
-#undef RS6000_BUILTIN_M
-#undef RS6000_BUILTIN_P
-#undef RS6000_BUILTIN_X
-
 \f
 /* Nonzero if we can use a floating-point register to pass this arg.  */
 #define USE_FP_FOR_ARG_P(CUM,MODE)		\
@@ -3130,367 +2995,6 @@ const char *rs6000_type_string (tree type_node)
   return "unknown";
 }
 
-static const struct builtin_compatibility bdesc_compat[] =
-{
-#define RS6000_BUILTIN_COMPAT
-#include "rs6000-builtin.def"
-};
-#undef RS6000_BUILTIN_COMPAT
-
-/* Simple ternary operations: VECd = foo (VECa, VECb, VECc).  */
-
-#undef RS6000_BUILTIN_0
-#undef RS6000_BUILTIN_1
-#undef RS6000_BUILTIN_2
-#undef RS6000_BUILTIN_3
-#undef RS6000_BUILTIN_4
-#undef RS6000_BUILTIN_A
-#undef RS6000_BUILTIN_D
-#undef RS6000_BUILTIN_H
-#undef RS6000_BUILTIN_M
-#undef RS6000_BUILTIN_P
-#undef RS6000_BUILTIN_X
-
-#define RS6000_BUILTIN_0(ENUM, NAME, MASK, ATTR, ICODE)
-#define RS6000_BUILTIN_1(ENUM, NAME, MASK, ATTR, ICODE)
-#define RS6000_BUILTIN_2(ENUM, NAME, MASK, ATTR, ICODE)
-#define RS6000_BUILTIN_3(ENUM, NAME, MASK, ATTR, ICODE) \
-  { MASK, ICODE, NAME, ENUM },
-
-#define RS6000_BUILTIN_4(ENUM, NAME, MASK, ATTR, ICODE)
-#define RS6000_BUILTIN_A(ENUM, NAME, MASK, ATTR, ICODE)
-#define RS6000_BUILTIN_D(ENUM, NAME, MASK, ATTR, ICODE)
-#define RS6000_BUILTIN_H(ENUM, NAME, MASK, ATTR, ICODE)
-#define RS6000_BUILTIN_M(ENUM, NAME, MASK, ATTR, ICODE)
-#define RS6000_BUILTIN_P(ENUM, NAME, MASK, ATTR, ICODE)
-#define RS6000_BUILTIN_X(ENUM, NAME, MASK, ATTR, ICODE)
-
-static const struct builtin_description bdesc_3arg[] =
-{
-#include "rs6000-builtin.def"
-};
-
-/* Simple quaternary operations: VECd = foo (VECa, VECb, VECc, VECd).  */
-
-#undef RS6000_BUILTIN_0
-#undef RS6000_BUILTIN_1
-#undef RS6000_BUILTIN_2
-#undef RS6000_BUILTIN_3
-#undef RS6000_BUILTIN_4
-#undef RS6000_BUILTIN_A
-#undef RS6000_BUILTIN_D
-#undef RS6000_BUILTIN_H
-#undef RS6000_BUILTIN_M
-#undef RS6000_BUILTIN_P
-#undef RS6000_BUILTIN_X
-
-#define RS6000_BUILTIN_0(ENUM, NAME, MASK, ATTR, ICODE)
-#define RS6000_BUILTIN_1(ENUM, NAME, MASK, ATTR, ICODE)
-#define RS6000_BUILTIN_2(ENUM, NAME, MASK, ATTR, ICODE)
-#define RS6000_BUILTIN_3(ENUM, NAME, MASK, ATTR, ICODE)
-#define RS6000_BUILTIN_4(ENUM, NAME, MASK, ATTR, ICODE) \
-  { MASK, ICODE, NAME, ENUM },
-
-#define RS6000_BUILTIN_A(ENUM, NAME, MASK, ATTR, ICODE)
-#define RS6000_BUILTIN_D(ENUM, NAME, MASK, ATTR, ICODE)
-#define RS6000_BUILTIN_H(ENUM, NAME, MASK, ATTR, ICODE)
-#define RS6000_BUILTIN_M(ENUM, NAME, MASK, ATTR, ICODE)
-#define RS6000_BUILTIN_P(ENUM, NAME, MASK, ATTR, ICODE)
-#define RS6000_BUILTIN_X(ENUM, NAME, MASK, ATTR, ICODE)
-
-static const struct builtin_description bdesc_4arg[] =
-{
-#include "rs6000-builtin.def"
-};
-
-/* DST operations: void foo (void *, const int, const char).  */
-
-#undef RS6000_BUILTIN_0
-#undef RS6000_BUILTIN_1
-#undef RS6000_BUILTIN_2
-#undef RS6000_BUILTIN_3
-#undef RS6000_BUILTIN_4
-#undef RS6000_BUILTIN_A
-#undef RS6000_BUILTIN_D
-#undef RS6000_BUILTIN_H
-#undef RS6000_BUILTIN_M
-#undef RS6000_BUILTIN_P
-#undef RS6000_BUILTIN_X
-
-#define RS6000_BUILTIN_0(ENUM, NAME, MASK, ATTR, ICODE)
-#define RS6000_BUILTIN_1(ENUM, NAME, MASK, ATTR, ICODE)
-#define RS6000_BUILTIN_2(ENUM, NAME, MASK, ATTR, ICODE)
-#define RS6000_BUILTIN_3(ENUM, NAME, MASK, ATTR, ICODE)
-#define RS6000_BUILTIN_4(ENUM, NAME, MASK, ATTR, ICODE)
-#define RS6000_BUILTIN_A(ENUM, NAME, MASK, ATTR, ICODE)
-#define RS6000_BUILTIN_D(ENUM, NAME, MASK, ATTR, ICODE) \
-  { MASK, ICODE, NAME, ENUM },
-
-#define RS6000_BUILTIN_H(ENUM, NAME, MASK, ATTR, ICODE)
-#define RS6000_BUILTIN_M(ENUM, NAME, MASK, ATTR, ICODE)
-#define RS6000_BUILTIN_P(ENUM, NAME, MASK, ATTR, ICODE)
-#define RS6000_BUILTIN_X(ENUM, NAME, MASK, ATTR, ICODE)
-
-static const struct builtin_description bdesc_dst[] =
-{
-#include "rs6000-builtin.def"
-};
-
-/* Simple binary operations: VECc = foo (VECa, VECb).  */
-
-#undef RS6000_BUILTIN_0
-#undef RS6000_BUILTIN_1
-#undef RS6000_BUILTIN_2
-#undef RS6000_BUILTIN_3
-#undef RS6000_BUILTIN_4
-#undef RS6000_BUILTIN_A
-#undef RS6000_BUILTIN_D
-#undef RS6000_BUILTIN_H
-#undef RS6000_BUILTIN_M
-#undef RS6000_BUILTIN_P
-#undef RS6000_BUILTIN_X
-
-#define RS6000_BUILTIN_0(ENUM, NAME, MASK, ATTR, ICODE)
-#define RS6000_BUILTIN_1(ENUM, NAME, MASK, ATTR, ICODE)
-#define RS6000_BUILTIN_2(ENUM, NAME, MASK, ATTR, ICODE) \
-  { MASK, ICODE, NAME, ENUM },
-
-#define RS6000_BUILTIN_3(ENUM, NAME, MASK, ATTR, ICODE)
-#define RS6000_BUILTIN_4(ENUM, NAME, MASK, ATTR, ICODE)
-#define RS6000_BUILTIN_A(ENUM, NAME, MASK, ATTR, ICODE)
-#define RS6000_BUILTIN_D(ENUM, NAME, MASK, ATTR, ICODE)
-#define RS6000_BUILTIN_H(ENUM, NAME, MASK, ATTR, ICODE)
-#define RS6000_BUILTIN_M(ENUM, NAME, MASK, ATTR, ICODE)
-#define RS6000_BUILTIN_P(ENUM, NAME, MASK, ATTR, ICODE)
-#define RS6000_BUILTIN_X(ENUM, NAME, MASK, ATTR, ICODE)
-
-static const struct builtin_description bdesc_2arg[] =
-{
-#include "rs6000-builtin.def"
-};
-
-#undef RS6000_BUILTIN_0
-#undef RS6000_BUILTIN_1
-#undef RS6000_BUILTIN_2
-#undef RS6000_BUILTIN_3
-#undef RS6000_BUILTIN_4
-#undef RS6000_BUILTIN_A
-#undef RS6000_BUILTIN_D
-#undef RS6000_BUILTIN_H
-#undef RS6000_BUILTIN_M
-#undef RS6000_BUILTIN_P
-#undef RS6000_BUILTIN_X
-
-#define RS6000_BUILTIN_0(ENUM, NAME, MASK, ATTR, ICODE)
-#define RS6000_BUILTIN_1(ENUM, NAME, MASK, ATTR, ICODE)
-#define RS6000_BUILTIN_2(ENUM, NAME, MASK, ATTR, ICODE)
-#define RS6000_BUILTIN_3(ENUM, NAME, MASK, ATTR, ICODE)
-#define RS6000_BUILTIN_4(ENUM, NAME, MASK, ATTR, ICODE)
-#define RS6000_BUILTIN_A(ENUM, NAME, MASK, ATTR, ICODE)
-#define RS6000_BUILTIN_D(ENUM, NAME, MASK, ATTR, ICODE)
-#define RS6000_BUILTIN_H(ENUM, NAME, MASK, ATTR, ICODE)
-#define RS6000_BUILTIN_M(ENUM, NAME, MASK, ATTR, ICODE)
-#define RS6000_BUILTIN_P(ENUM, NAME, MASK, ATTR, ICODE) \
-  { MASK, ICODE, NAME, ENUM },
-
-#define RS6000_BUILTIN_X(ENUM, NAME, MASK, ATTR, ICODE)
-
-/* AltiVec predicates.  */
-
-static const struct builtin_description bdesc_altivec_preds[] =
-{
-#include "rs6000-builtin.def"
-};
-
-/* ABS* operations.  */
-
-#undef RS6000_BUILTIN_0
-#undef RS6000_BUILTIN_1
-#undef RS6000_BUILTIN_2
-#undef RS6000_BUILTIN_3
-#undef RS6000_BUILTIN_4
-#undef RS6000_BUILTIN_A
-#undef RS6000_BUILTIN_D
-#undef RS6000_BUILTIN_H
-#undef RS6000_BUILTIN_M
-#undef RS6000_BUILTIN_P
-#undef RS6000_BUILTIN_X
-
-#define RS6000_BUILTIN_0(ENUM, NAME, MASK, ATTR, ICODE)
-#define RS6000_BUILTIN_1(ENUM, NAME, MASK, ATTR, ICODE)
-#define RS6000_BUILTIN_2(ENUM, NAME, MASK, ATTR, ICODE)
-#define RS6000_BUILTIN_3(ENUM, NAME, MASK, ATTR, ICODE)
-#define RS6000_BUILTIN_4(ENUM, NAME, MASK, ATTR, ICODE)
-#define RS6000_BUILTIN_A(ENUM, NAME, MASK, ATTR, ICODE) \
-  { MASK, ICODE, NAME, ENUM },
-
-#define RS6000_BUILTIN_D(ENUM, NAME, MASK, ATTR, ICODE)
-#define RS6000_BUILTIN_H(ENUM, NAME, MASK, ATTR, ICODE)
-#define RS6000_BUILTIN_M(ENUM, NAME, MASK, ATTR, ICODE)
-#define RS6000_BUILTIN_P(ENUM, NAME, MASK, ATTR, ICODE)
-#define RS6000_BUILTIN_X(ENUM, NAME, MASK, ATTR, ICODE)
-
-static const struct builtin_description bdesc_abs[] =
-{
-#include "rs6000-builtin.def"
-};
-
-/* Simple unary operations: VECb = foo (unsigned literal) or VECb =
-   foo (VECa).  */
-
-#undef RS6000_BUILTIN_0
-#undef RS6000_BUILTIN_1
-#undef RS6000_BUILTIN_2
-#undef RS6000_BUILTIN_3
-#undef RS6000_BUILTIN_4
-#undef RS6000_BUILTIN_A
-#undef RS6000_BUILTIN_D
-#undef RS6000_BUILTIN_H
-#undef RS6000_BUILTIN_M
-#undef RS6000_BUILTIN_P
-#undef RS6000_BUILTIN_X
-
-#define RS6000_BUILTIN_0(ENUM, NAME, MASK, ATTR, ICODE)
-#define RS6000_BUILTIN_1(ENUM, NAME, MASK, ATTR, ICODE) \
-  { MASK, ICODE, NAME, ENUM },
-
-#define RS6000_BUILTIN_2(ENUM, NAME, MASK, ATTR, ICODE)
-#define RS6000_BUILTIN_3(ENUM, NAME, MASK, ATTR, ICODE)
-#define RS6000_BUILTIN_4(ENUM, NAME, MASK, ATTR, ICODE)
-#define RS6000_BUILTIN_A(ENUM, NAME, MASK, ATTR, ICODE)
-#define RS6000_BUILTIN_D(ENUM, NAME, MASK, ATTR, ICODE)
-#define RS6000_BUILTIN_H(ENUM, NAME, MASK, ATTR, ICODE)
-#define RS6000_BUILTIN_M(ENUM, NAME, MASK, ATTR, ICODE)
-#define RS6000_BUILTIN_P(ENUM, NAME, MASK, ATTR, ICODE)
-#define RS6000_BUILTIN_X(ENUM, NAME, MASK, ATTR, ICODE)
-
-static const struct builtin_description bdesc_1arg[] =
-{
-#include "rs6000-builtin.def"
-};
-
-/* Simple no-argument operations: result = __builtin_darn_32 () */
-
-#undef RS6000_BUILTIN_0
-#undef RS6000_BUILTIN_1
-#undef RS6000_BUILTIN_2
-#undef RS6000_BUILTIN_3
-#undef RS6000_BUILTIN_4
-#undef RS6000_BUILTIN_A
-#undef RS6000_BUILTIN_D
-#undef RS6000_BUILTIN_H
-#undef RS6000_BUILTIN_M
-#undef RS6000_BUILTIN_P
-#undef RS6000_BUILTIN_X
-
-#define RS6000_BUILTIN_0(ENUM, NAME, MASK, ATTR, ICODE) \
-  { MASK, ICODE, NAME, ENUM },
-
-#define RS6000_BUILTIN_1(ENUM, NAME, MASK, ATTR, ICODE)
-#define RS6000_BUILTIN_2(ENUM, NAME, MASK, ATTR, ICODE)
-#define RS6000_BUILTIN_3(ENUM, NAME, MASK, ATTR, ICODE)
-#define RS6000_BUILTIN_4(ENUM, NAME, MASK, ATTR, ICODE)
-#define RS6000_BUILTIN_A(ENUM, NAME, MASK, ATTR, ICODE)
-#define RS6000_BUILTIN_D(ENUM, NAME, MASK, ATTR, ICODE)
-#define RS6000_BUILTIN_H(ENUM, NAME, MASK, ATTR, ICODE)
-#define RS6000_BUILTIN_M(ENUM, NAME, MASK, ATTR, ICODE)
-#define RS6000_BUILTIN_P(ENUM, NAME, MASK, ATTR, ICODE)
-#define RS6000_BUILTIN_X(ENUM, NAME, MASK, ATTR, ICODE)
-
-static const struct builtin_description bdesc_0arg[] =
-{
-#include "rs6000-builtin.def"
-};
-
-/* HTM builtins.  */
-#undef RS6000_BUILTIN_0
-#undef RS6000_BUILTIN_1
-#undef RS6000_BUILTIN_2
-#undef RS6000_BUILTIN_3
-#undef RS6000_BUILTIN_4
-#undef RS6000_BUILTIN_A
-#undef RS6000_BUILTIN_D
-#undef RS6000_BUILTIN_H
-#undef RS6000_BUILTIN_M
-#undef RS6000_BUILTIN_P
-#undef RS6000_BUILTIN_X
-
-#define RS6000_BUILTIN_0(ENUM, NAME, MASK, ATTR, ICODE)
-#define RS6000_BUILTIN_1(ENUM, NAME, MASK, ATTR, ICODE)
-#define RS6000_BUILTIN_2(ENUM, NAME, MASK, ATTR, ICODE)
-#define RS6000_BUILTIN_3(ENUM, NAME, MASK, ATTR, ICODE)
-#define RS6000_BUILTIN_4(ENUM, NAME, MASK, ATTR, ICODE)
-#define RS6000_BUILTIN_A(ENUM, NAME, MASK, ATTR, ICODE)
-#define RS6000_BUILTIN_D(ENUM, NAME, MASK, ATTR, ICODE)
-#define RS6000_BUILTIN_H(ENUM, NAME, MASK, ATTR, ICODE) \
-  { MASK, ICODE, NAME, ENUM },
-
-#define RS6000_BUILTIN_M(ENUM, NAME, MASK, ATTR, ICODE)
-#define RS6000_BUILTIN_P(ENUM, NAME, MASK, ATTR, ICODE)
-#define RS6000_BUILTIN_X(ENUM, NAME, MASK, ATTR, ICODE)
-
-static const struct builtin_description bdesc_htm[] =
-{
-#include "rs6000-builtin.def"
-};
-
-/* MMA builtins.  */
-#undef RS6000_BUILTIN_0
-#undef RS6000_BUILTIN_1
-#undef RS6000_BUILTIN_2
-#undef RS6000_BUILTIN_3
-#undef RS6000_BUILTIN_4
-#undef RS6000_BUILTIN_A
-#undef RS6000_BUILTIN_D
-#undef RS6000_BUILTIN_H
-#undef RS6000_BUILTIN_M
-#undef RS6000_BUILTIN_P
-#undef RS6000_BUILTIN_X
-
-#define RS6000_BUILTIN_0(ENUM, NAME, MASK, ATTR, ICODE)
-#define RS6000_BUILTIN_1(ENUM, NAME, MASK, ATTR, ICODE)
-#define RS6000_BUILTIN_2(ENUM, NAME, MASK, ATTR, ICODE)
-#define RS6000_BUILTIN_3(ENUM, NAME, MASK, ATTR, ICODE)
-#define RS6000_BUILTIN_4(ENUM, NAME, MASK, ATTR, ICODE)
-#define RS6000_BUILTIN_A(ENUM, NAME, MASK, ATTR, ICODE)
-#define RS6000_BUILTIN_D(ENUM, NAME, MASK, ATTR, ICODE)
-#define RS6000_BUILTIN_H(ENUM, NAME, MASK, ATTR, ICODE)
-#define RS6000_BUILTIN_M(ENUM, NAME, MASK, ATTR, ICODE) \
-  { MASK, ICODE, NAME, ENUM },
-
-#define RS6000_BUILTIN_P(ENUM, NAME, MASK, ATTR, ICODE)
-#define RS6000_BUILTIN_X(ENUM, NAME, MASK, ATTR, ICODE)
-
-static const struct builtin_description bdesc_mma[] =
-{
-#include "rs6000-builtin.def"
-};
-
-#undef RS6000_BUILTIN_0
-#undef RS6000_BUILTIN_1
-#undef RS6000_BUILTIN_2
-#undef RS6000_BUILTIN_3
-#undef RS6000_BUILTIN_4
-#undef RS6000_BUILTIN_A
-#undef RS6000_BUILTIN_D
-#undef RS6000_BUILTIN_H
-#undef RS6000_BUILTIN_M
-#undef RS6000_BUILTIN_P
-#undef RS6000_BUILTIN_X
-
-/* Return true if a builtin function is overloaded.  */
-bool
-rs6000_overloaded_builtin_p (enum rs6000_builtins fncode)
-{
-  return (rs6000_builtin_info[(int)fncode].attr & RS6000_BTC_OVERLOADED) != 0;
-}
-
-const char *
-rs6000_overloaded_builtin_name (enum rs6000_builtins fncode)
-{
-  return rs6000_builtin_info[(int)fncode].name;
-}
-
 static rtx
 altivec_expand_predicate_builtin (enum insn_code icode, tree exp, rtx target)
 {
@@ -3611,24 +3115,6 @@ swap_endian_selector_for_mode (machine_mode mode)
 						     gen_rtvec_v (16, perm)));
 }
 
-/* Return the appropriate SPR number associated with the given builtin.  */
-static inline HOST_WIDE_INT
-htm_spr_num (enum rs6000_builtins code)
-{
-  if (code == HTM_BUILTIN_GET_TFHAR
-      || code == HTM_BUILTIN_SET_TFHAR)
-    return TFHAR_SPR;
-  else if (code == HTM_BUILTIN_GET_TFIAR
-	   || code == HTM_BUILTIN_SET_TFIAR)
-    return TFIAR_SPR;
-  else if (code == HTM_BUILTIN_GET_TEXASR
-	   || code == HTM_BUILTIN_SET_TEXASR)
-    return TEXASR_SPR;
-  gcc_assert (code == HTM_BUILTIN_GET_TEXASRU
-	      || code == HTM_BUILTIN_SET_TEXASRU);
-  return TEXASRU_SPR;
-}
-
 /* Return the correct ICODE value depending on whether we are
    setting or reading the HTM SPRs.  */
 static inline enum insn_code
@@ -3768,18 +3254,6 @@ altivec_expand_vec_ext_builtin (tree exp, rtx target)
   return target;
 }
 
-/* Check whether a builtin function is supported in this target
-   configuration.  */
-bool
-rs6000_builtin_is_supported_p (enum rs6000_builtins fncode)
-{
-  HOST_WIDE_INT fnmask = rs6000_builtin_info[fncode].mask;
-  if ((fnmask & rs6000_builtin_mask) != fnmask)
-    return false;
-  else
-    return true;
-}
-
 /* Raise an error message for a builtin function that is called without the
    appropriate target options being set.  */
 
@@ -4005,190 +3479,6 @@ fold_mergeeo_helper (gimple_stmt_iterator *gsi, gimple *stmt, int use_odd)
   gsi_replace (gsi, g, true);
 }
 
-/* Expand the MMA built-ins early, so that we can convert the pass-by-reference
-   __vector_quad arguments into pass-by-value arguments, leading to more
-   efficient code generation.  */
-
-bool
-rs6000_gimple_fold_mma_builtin (gimple_stmt_iterator *gsi)
-{
-  gimple *stmt = gsi_stmt (*gsi);
-  tree fndecl = gimple_call_fndecl (stmt);
-  enum rs6000_builtins fncode
-    = (enum rs6000_builtins) DECL_MD_FUNCTION_CODE (fndecl);
-  unsigned attr = rs6000_builtin_info[fncode].attr;
-
-  if ((attr & RS6000_BTC_GIMPLE) == 0)
-    return false;
-
-  unsigned nopnds = (attr & RS6000_BTC_OPND_MASK);
-  gimple_seq new_seq = NULL;
-  gimple *new_call;
-  tree new_decl;
-
-  if (fncode == MMA_BUILTIN_DISASSEMBLE_ACC
-      || fncode == VSX_BUILTIN_DISASSEMBLE_PAIR)
-    {
-      /* This is an MMA disassemble built-in function.  */
-      push_gimplify_context (true);
-      unsigned nvec = (fncode == MMA_BUILTIN_DISASSEMBLE_ACC) ? 4 : 2;
-      tree dst_ptr = gimple_call_arg (stmt, 0);
-      tree src_ptr = gimple_call_arg (stmt, 1);
-      tree src_type = TREE_TYPE (src_ptr);
-      tree src = create_tmp_reg_or_ssa_name (TREE_TYPE (src_type));
-      gimplify_assign (src, build_simple_mem_ref (src_ptr), &new_seq);
-
-      /* If we are not disassembling an accumulator/pair or our destination is
-	 another accumulator/pair, then just copy the entire thing as is.  */
-      if ((fncode == MMA_BUILTIN_DISASSEMBLE_ACC
-	   && TREE_TYPE (TREE_TYPE (dst_ptr)) == vector_quad_type_node)
-	  || (fncode == VSX_BUILTIN_DISASSEMBLE_PAIR
-	      && TREE_TYPE (TREE_TYPE (dst_ptr)) == vector_pair_type_node))
-	{
-	  tree dst = build_simple_mem_ref (build1 (VIEW_CONVERT_EXPR,
-						   src_type, dst_ptr));
-	  gimplify_assign (dst, src, &new_seq);
-	  pop_gimplify_context (NULL);
-	  gsi_replace_with_seq (gsi, new_seq, true);
-	  return true;
-	}
-
-      /* If we're disassembling an accumulator into a different type, we need
-	 to emit a xxmfacc instruction now, since we cannot do it later.  */
-      if (fncode == MMA_BUILTIN_DISASSEMBLE_ACC)
-	{
-	  new_decl = rs6000_builtin_decls[MMA_BUILTIN_XXMFACC_INTERNAL];
-	  new_call = gimple_build_call (new_decl, 1, src);
-	  src = create_tmp_reg_or_ssa_name (vector_quad_type_node);
-	  gimple_call_set_lhs (new_call, src);
-	  gimple_seq_add_stmt (&new_seq, new_call);
-	}
-
-      /* Copy the accumulator/pair vector by vector.  */
-      new_decl = rs6000_builtin_decls[fncode + 1];
-      tree dst_type = build_pointer_type_for_mode (unsigned_V16QI_type_node,
-						   ptr_mode, true);
-      tree dst_base = build1 (VIEW_CONVERT_EXPR, dst_type, dst_ptr);
-      for (unsigned i = 0; i < nvec; i++)
-	{
-	  unsigned index = WORDS_BIG_ENDIAN ? i : nvec - 1 - i;
-	  tree dst = build2 (MEM_REF, unsigned_V16QI_type_node, dst_base,
-			     build_int_cst (dst_type, index * 16));
-	  tree dstssa = create_tmp_reg_or_ssa_name (unsigned_V16QI_type_node);
-	  new_call = gimple_build_call (new_decl, 2, src,
-					build_int_cstu (uint16_type_node, i));
-	  gimple_call_set_lhs (new_call, dstssa);
-	  gimple_seq_add_stmt (&new_seq, new_call);
-	  gimplify_assign (dst, dstssa, &new_seq);
-	}
-      pop_gimplify_context (NULL);
-      gsi_replace_with_seq (gsi, new_seq, true);
-      return true;
-    }
-  else if (fncode == VSX_BUILTIN_LXVP)
-    {
-      push_gimplify_context (true);
-      tree offset = gimple_call_arg (stmt, 0);
-      tree ptr = gimple_call_arg (stmt, 1);
-      tree lhs = gimple_call_lhs (stmt);
-      if (TREE_TYPE (TREE_TYPE (ptr)) != vector_pair_type_node)
-	ptr = build1 (VIEW_CONVERT_EXPR,
-		      build_pointer_type (vector_pair_type_node), ptr);
-      tree mem = build_simple_mem_ref (build2 (POINTER_PLUS_EXPR,
-					       TREE_TYPE (ptr), ptr, offset));
-      gimplify_assign (lhs, mem, &new_seq);
-      pop_gimplify_context (NULL);
-      gsi_replace_with_seq (gsi, new_seq, true);
-      return true;
-    }
-  else if (fncode == VSX_BUILTIN_STXVP)
-    {
-      push_gimplify_context (true);
-      tree src = gimple_call_arg (stmt, 0);
-      tree offset = gimple_call_arg (stmt, 1);
-      tree ptr = gimple_call_arg (stmt, 2);
-      if (TREE_TYPE (TREE_TYPE (ptr)) != vector_pair_type_node)
-	ptr = build1 (VIEW_CONVERT_EXPR,
-		      build_pointer_type (vector_pair_type_node), ptr);
-      tree mem = build_simple_mem_ref (build2 (POINTER_PLUS_EXPR,
-					       TREE_TYPE (ptr), ptr, offset));
-      gimplify_assign (mem, src, &new_seq);
-      pop_gimplify_context (NULL);
-      gsi_replace_with_seq (gsi, new_seq, true);
-      return true;
-    }
-
-  /* Convert this built-in into an internal version that uses pass-by-value
-     arguments.  The internal built-in follows immediately after this one.  */
-  new_decl = rs6000_builtin_decls[fncode + 1];
-  tree lhs, op[MAX_MMA_OPERANDS];
-  tree acc = gimple_call_arg (stmt, 0);
-  push_gimplify_context (true);
-
-  if ((attr & RS6000_BTC_QUAD) != 0)
-    {
-      /* This built-in has a pass-by-reference accumulator input, so load it
-	 into a temporary accumulator for use as a pass-by-value input.  */
-      op[0] = create_tmp_reg_or_ssa_name (vector_quad_type_node);
-      for (unsigned i = 1; i < nopnds; i++)
-	op[i] = gimple_call_arg (stmt, i);
-      gimplify_assign (op[0], build_simple_mem_ref (acc), &new_seq);
-    }
-  else
-    {
-      /* This built-in does not use its pass-by-reference accumulator argument
-	 as an input argument, so remove it from the input list.  */
-      nopnds--;
-      for (unsigned i = 0; i < nopnds; i++)
-	op[i] = gimple_call_arg (stmt, i + 1);
-    }
-
-  switch (nopnds)
-    {
-    case 0:
-      new_call = gimple_build_call (new_decl, 0);
-      break;
-    case 1:
-      new_call = gimple_build_call (new_decl, 1, op[0]);
-      break;
-    case 2:
-      new_call = gimple_build_call (new_decl, 2, op[0], op[1]);
-      break;
-    case 3:
-      new_call = gimple_build_call (new_decl, 3, op[0], op[1], op[2]);
-      break;
-    case 4:
-      new_call = gimple_build_call (new_decl, 4, op[0], op[1], op[2], op[3]);
-      break;
-    case 5:
-      new_call = gimple_build_call (new_decl, 5, op[0], op[1], op[2], op[3],
-				    op[4]);
-      break;
-    case 6:
-      new_call = gimple_build_call (new_decl, 6, op[0], op[1], op[2], op[3],
-				    op[4], op[5]);
-      break;
-    case 7:
-      new_call = gimple_build_call (new_decl, 7, op[0], op[1], op[2], op[3],
-				    op[4], op[5], op[6]);
-      break;
-    default:
-      gcc_unreachable ();
-    }
-
-  if (fncode == VSX_BUILTIN_BUILD_PAIR || fncode == VSX_BUILTIN_ASSEMBLE_PAIR)
-    lhs = create_tmp_reg_or_ssa_name (vector_pair_type_node);
-  else
-    lhs = create_tmp_reg_or_ssa_name (vector_quad_type_node);
-  gimple_call_set_lhs (new_call, lhs);
-  gimple_seq_add_stmt (&new_seq, new_call);
-  gimplify_assign (build_simple_mem_ref (acc), lhs, &new_seq);
-  pop_gimplify_context (NULL);
-  gsi_replace_with_seq (gsi, new_seq, true);
-
-  return true;
-}
-
 /* Fold a machine-dependent built-in in GIMPLE.  (For folding into
    a constant, use rs6000_fold_builtin.)  */
 
@@ -7231,5 +6521,3 @@ rs6000_output_mi_thunk (FILE *file, tree thunk_fndecl ATTRIBUTE_UNUSED,
   reload_completed = 0;
   epilogue_completed = 0;
 }
-
-#include "gt-rs6000-call.h"
diff --git a/gcc/config/rs6000/rs6000-protos.h b/gcc/config/rs6000/rs6000-protos.h
index 14f6b313105..c01ae005d0b 100644
--- a/gcc/config/rs6000/rs6000-protos.h
+++ b/gcc/config/rs6000/rs6000-protos.h
@@ -272,9 +272,6 @@ extern void rs6000_call_darwin (rtx, rtx, rtx, rtx);
 extern void rs6000_sibcall_darwin (rtx, rtx, rtx, rtx);
 extern void rs6000_aix_asm_output_dwarf_table_ref (char *);
 extern void get_ppc476_thunk_name (char name[32]);
-extern bool rs6000_overloaded_builtin_p (enum rs6000_builtins);
-extern bool rs6000_builtin_is_supported_p (enum rs6000_builtins);
-extern const char *rs6000_overloaded_builtin_name (enum rs6000_builtins);
 extern int rs6000_store_data_bypass_p (rtx_insn *, rtx_insn *);
 extern HOST_WIDE_INT rs6000_builtin_mask_calculate (void);
 extern void rs6000_asm_output_dwarf_pcrel (FILE *file, int size,
diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c
index cb58037f9a5..f5116289a7f 100644
--- a/gcc/config/rs6000/rs6000.c
+++ b/gcc/config/rs6000/rs6000.c
@@ -171,7 +171,6 @@ static int dbg_cost_ctrl;
 
 /* Built in types.  */
 tree rs6000_builtin_types[RS6000_BTI_MAX];
-tree rs6000_builtin_decls[RS6000_BUILTIN_COUNT];
 
 /* Flag to say the TOC is initialized */
 int toc_initialized, need_toc_init;
@@ -2585,8 +2584,6 @@ rs6000_debug_reg_global (void)
 	   (int)rs6000_sched_restricted_insns_priority);
   fprintf (stderr, DEBUG_FMT_D, "Number of standard builtins",
 	   (int)END_BUILTINS);
-  fprintf (stderr, DEBUG_FMT_D, "Number of rs6000 builtins",
-	   (int)RS6000_BUILTIN_COUNT);
 
   fprintf (stderr, DEBUG_FMT_D, "Enable float128 on VSX",
 	   (int)TARGET_FLOAT128_ENABLE_TYPE);
diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h
index b12ee8bfe5b..4d2f88d4218 100644
--- a/gcc/config/rs6000/rs6000.h
+++ b/gcc/config/rs6000/rs6000.h
@@ -2344,62 +2344,6 @@ extern int frame_pointer_needed;
 				 | RS6000_BTM_MMA			\
 				 | RS6000_BTM_P10)
 
-/* Define builtin enum index.  */
-
-#undef RS6000_BUILTIN_0
-#undef RS6000_BUILTIN_1
-#undef RS6000_BUILTIN_2
-#undef RS6000_BUILTIN_3
-#undef RS6000_BUILTIN_4
-#undef RS6000_BUILTIN_A
-#undef RS6000_BUILTIN_D
-#undef RS6000_BUILTIN_H
-#undef RS6000_BUILTIN_M
-#undef RS6000_BUILTIN_P
-#undef RS6000_BUILTIN_X
-
-#define RS6000_BUILTIN_0(ENUM, NAME, MASK, ATTR, ICODE) ENUM,
-#define RS6000_BUILTIN_1(ENUM, NAME, MASK, ATTR, ICODE) ENUM,
-#define RS6000_BUILTIN_2(ENUM, NAME, MASK, ATTR, ICODE) ENUM,
-#define RS6000_BUILTIN_3(ENUM, NAME, MASK, ATTR, ICODE) ENUM,
-#define RS6000_BUILTIN_4(ENUM, NAME, MASK, ATTR, ICODE) ENUM,
-#define RS6000_BUILTIN_A(ENUM, NAME, MASK, ATTR, ICODE) ENUM,
-#define RS6000_BUILTIN_D(ENUM, NAME, MASK, ATTR, ICODE) ENUM,
-#define RS6000_BUILTIN_H(ENUM, NAME, MASK, ATTR, ICODE) ENUM,
-#define RS6000_BUILTIN_M(ENUM, NAME, MASK, ATTR, ICODE) ENUM,
-#define RS6000_BUILTIN_P(ENUM, NAME, MASK, ATTR, ICODE) ENUM,
-#define RS6000_BUILTIN_X(ENUM, NAME, MASK, ATTR, ICODE) ENUM,
-
-enum rs6000_builtins
-{
-#include "rs6000-builtin.def"
-
-  RS6000_BUILTIN_COUNT
-};
-
-#undef RS6000_BUILTIN_0
-#undef RS6000_BUILTIN_1
-#undef RS6000_BUILTIN_2
-#undef RS6000_BUILTIN_3
-#undef RS6000_BUILTIN_4
-#undef RS6000_BUILTIN_A
-#undef RS6000_BUILTIN_D
-#undef RS6000_BUILTIN_H
-#undef RS6000_BUILTIN_M
-#undef RS6000_BUILTIN_P
-#undef RS6000_BUILTIN_X
-
-/* Mappings for overloaded builtins.  */
-struct altivec_builtin_types
-{
-  enum rs6000_builtins code;
-  enum rs6000_builtins overloaded_code;
-  signed char ret_type;
-  signed char op1;
-  signed char op2;
-  signed char op3;
-};
-
 enum rs6000_builtin_type_index
 {
   RS6000_BTI_NOT_OPAQUE,
@@ -2600,7 +2544,6 @@ enum rs6000_builtin_type_index
 #define ptr_long_long_unsigned_type_node (rs6000_builtin_types[RS6000_BTI_ptr_long_long_unsigned])
 
 extern GTY(()) tree rs6000_builtin_types[RS6000_BTI_MAX];
-extern GTY(()) tree rs6000_builtin_decls[RS6000_BUILTIN_COUNT];
 
 #ifndef USED_FOR_TARGET
 extern GTY(()) tree builtin_mode_to_type[MAX_MACHINE_MODE][2];
diff --git a/gcc/config/rs6000/t-rs6000 b/gcc/config/rs6000/t-rs6000
index 3d3143a171d..98ddd977f96 100644
--- a/gcc/config/rs6000/t-rs6000
+++ b/gcc/config/rs6000/t-rs6000
@@ -18,7 +18,6 @@
 # along with GCC; see the file COPYING3.  If not see
 # <http://www.gnu.org/licenses/>.
 
-TM_H += $(srcdir)/config/rs6000/rs6000-builtin.def
 TM_H += $(srcdir)/config/rs6000/rs6000-cpus.def
 TM_H += $(srcdir)/config/rs6000/rs6000-modes.h
 PASSES_EXTRA += $(srcdir)/config/rs6000/rs6000-passes.def
-- 
2.27.0

[PATCH 5/6] rs6000: Rename functions with "new" in their names

[Bill Schmidt]

From: Bill Schmidt <wschmidt@linux.ibm.com>

Hi!

While we had two sets of built-in functionality at the same time, I put "new"
in the names of quite a few functions.  Time to undo that.

Bootstrapped and tested on powerpc64le-linux-gnu with no regressions.  Is this
okay for trunk?

Thanks!
Bill

2021-12-02  Bill Schmidt  <wschmidt@linux.ibm.com>

gcc/
	* config/rs6000/rs6000-c.c (altivec_resolve_new_overloaded_builtin):
	Remove forward declaration.
	(rs6000_new_builtin_type_compatible): Rename to
	rs6000_builtin_type_compatible.
	(rs6000_builtin_type_compatible): Remove.
	(altivec_resolve_overloaded_builtin): Remove.
	(altivec_build_new_resolved_builtin): Rename to
	altivec_build_resolved_builtin.
	(altivec_resolve_new_overloaded_builtin): Rename to
	altivec_resolve_overloaded_builtin.  Remove static keyword.  Adjust
	called function names.
	* config/rs6000/rs6000-call.c (rs6000_expand_new_builtin): Remove
	forward declaration.
	(rs6000_gimple_fold_new_builtin): Likewise.
	(rs6000_invalid_new_builtin): Rename to rs6000_invalid_builtin.
	(rs6000_gimple_fold_builtin): Remove.
	(rs6000_new_builtin_valid_without_lhs): Rename to
	rs6000_builtin_valid_without_lhs.
	(rs6000_new_builtin_is_supported): Rename to
	rs6000_builtin_is_supported.
	(rs6000_gimple_fold_new_mma_builtin): Rename to
	rs6000_gimple_fold_mma_builtin.
	(rs6000_gimple_fold_new_builtin): Rename to
	rs6000_gimple_fold_builtin.  Remove static keyword.  Adjust called
	function names.
	(rs6000_expand_builtin): Remove.
	(new_cpu_expand_builtin): Rename to cpu_expand_builtin.
	(new_mma_expand_builtin): Rename to mma_expand_builtin.
	(new_htm_spr_num): Rename to htm_spr_num.
	(new_htm_expand_builtin): Rename to htm_expand_builtin.  Change name
	of called function.
	(rs6000_expand_new_builtin): Rename to rs6000_expand_builtin.  Remove
	static keyword.  Adjust called function names.
	(rs6000_new_builtin_decl): Rename to rs6000_builtin_decl.  Remove
	static keyword.
	(rs6000_builtin_decl): Remove.
	* config/rs6000/rs6000-gen-builtins.c (write_decls): In gnerated code,
	rename rs6000_new_builtin_is_supported to rs6000_builtin_is_supported.
	* config/rs6000/rs6000-internal.h (rs6000_invalid_new_builtin): Rename
	to rs6000_invalid_builtin.
	* config/rs6000/rs6000.c (rs6000_new_builtin_vectorized_function):
	Rename to rs6000_builtin_vectorized_function.
	(rs6000_new_builtin_md_vectorized_function): Rename to
	rs6000_builtin_md_vectorized_function.
	(rs6000_builtin_vectorized_function): Remove.
	(rs6000_builtin_md_vectorized_function): Remove.
---
 gcc/config/rs6000/rs6000-c.c            | 120 +++++++++---------------
 gcc/config/rs6000/rs6000-call.c         |  99 ++++++-------------
 gcc/config/rs6000/rs6000-gen-builtins.c |   3 +-
 gcc/config/rs6000/rs6000-internal.h     |   2 +-
 gcc/config/rs6000/rs6000.c              |  31 ++----
 5 files changed, 80 insertions(+), 175 deletions(-)

diff --git a/gcc/config/rs6000/rs6000-c.c b/gcc/config/rs6000/rs6000-c.c
index d44edf585aa..f790c72d621 100644
--- a/gcc/config/rs6000/rs6000-c.c
+++ b/gcc/config/rs6000/rs6000-c.c
@@ -37,9 +37,6 @@
 
 #include "rs6000-internal.h"
 
-static tree altivec_resolve_new_overloaded_builtin (location_t, tree, void *);
-
-
 /* Handle the machine specific pragma longcall.  Its syntax is
 
    # pragma longcall ( TOGGLE )
@@ -817,7 +814,7 @@ is_float128_p (tree t)
 
 /* Return true iff ARGTYPE can be compatibly passed as PARMTYPE.  */
 static bool
-rs6000_new_builtin_type_compatible (tree parmtype, tree argtype)
+rs6000_builtin_type_compatible (tree parmtype, tree argtype)
 {
   if (parmtype == error_mark_node)
     return false;
@@ -840,23 +837,6 @@ rs6000_new_builtin_type_compatible (tree parmtype, tree argtype)
   return lang_hooks.types_compatible_p (parmtype, argtype);
 }
 
-static inline bool
-rs6000_builtin_type_compatible (tree t, int id)
-{
-  tree builtin_type;
-  builtin_type = rs6000_builtin_type (id);
-  if (t == error_mark_node)
-    return false;
-  if (INTEGRAL_TYPE_P (t) && INTEGRAL_TYPE_P (builtin_type))
-    return true;
-  else if (TARGET_IEEEQUAD && TARGET_LONG_DOUBLE_128
-	   && is_float128_p (t) && is_float128_p (builtin_type))
-    return true;
-  else
-    return lang_hooks.types_compatible_p (t, builtin_type);
-}
-
-
 /* In addition to calling fold_convert for EXPR of type TYPE, also
    call c_fully_fold to remove any C_MAYBE_CONST_EXPRs that could be
    hiding there (PR47197).  */
@@ -873,16 +853,6 @@ fully_fold_convert (tree type, tree expr)
   return result;
 }
 
-/* Implementation of the resolve_overloaded_builtin target hook, to
-   support Altivec's overloaded builtins.  */
-
-tree
-altivec_resolve_overloaded_builtin (location_t loc, tree fndecl,
-				    void *passed_arglist)
-{
-  return altivec_resolve_new_overloaded_builtin (loc, fndecl, passed_arglist);
-}
-
 /* Build a tree for a function call to an Altivec non-overloaded builtin.
    The overloaded builtin that matched the types and args is described
    by DESC.  The N arguments are given in ARGS, respectively.
@@ -891,10 +861,9 @@ altivec_resolve_overloaded_builtin (location_t loc, tree fndecl,
    a small exception for vec_{all,any}_{ge,le} predicates. */
 
 static tree
-altivec_build_new_resolved_builtin (tree *args, int n, tree fntype,
-				    tree ret_type,
-				    rs6000_gen_builtins bif_id,
-				    rs6000_gen_builtins ovld_id)
+altivec_build_resolved_builtin (tree *args, int n, tree fntype, tree ret_type,
+				rs6000_gen_builtins bif_id,
+				rs6000_gen_builtins ovld_id)
 {
   tree argtypes = TYPE_ARG_TYPES (fntype);
   tree arg_type[MAX_OVLD_ARGS];
@@ -963,9 +932,9 @@ altivec_build_new_resolved_builtin (tree *args, int n, tree fntype,
    support Altivec's overloaded builtins.  FIXME: This code needs
    to be brutally factored.  */
 
-static tree
-altivec_resolve_new_overloaded_builtin (location_t loc, tree fndecl,
-					void *passed_arglist)
+tree
+altivec_resolve_overloaded_builtin (location_t loc, tree fndecl,
+				    void *passed_arglist)
 {
   vec<tree, va_gc> *arglist = static_cast<vec<tree, va_gc> *> (passed_arglist);
   unsigned int nargs = vec_safe_length (arglist);
@@ -1096,7 +1065,7 @@ altivec_resolve_new_overloaded_builtin (location_t loc, tree fndecl,
 		vec<tree, va_gc> *params = make_tree_vector ();
 		vec_safe_push (params, arg0);
 		vec_safe_push (params, arg1);
-		tree call = altivec_resolve_new_overloaded_builtin
+		tree call = altivec_resolve_overloaded_builtin
 		  (loc, rs6000_builtin_decls_x[RS6000_OVLD_VEC_CMPEQ],
 		   params);
 		/* Use save_expr to ensure that operands used more than once
@@ -1106,7 +1075,7 @@ altivec_resolve_new_overloaded_builtin (location_t loc, tree fndecl,
 		params = make_tree_vector ();
 		vec_safe_push (params, call);
 		vec_safe_push (params, call);
-		return altivec_resolve_new_overloaded_builtin
+		return altivec_resolve_overloaded_builtin
 		  (loc, rs6000_builtin_decls_x[RS6000_OVLD_VEC_NOR], params);
 	      }
 	      /* Other types are errors.  */
@@ -1165,9 +1134,8 @@ altivec_resolve_new_overloaded_builtin (location_t loc, tree fndecl,
 		add_sub_builtin = rs6000_builtin_decls_x[RS6000_OVLD_VEC_SUB];
 
 	      tree call
-		= altivec_resolve_new_overloaded_builtin (loc,
-							  add_sub_builtin,
-							  params);
+		= altivec_resolve_overloaded_builtin (loc, add_sub_builtin,
+						      params);
 	      tree const1 = build_int_cstu (TREE_TYPE (arg0_type), 1);
 	      tree ones_vector = build_vector_from_val (arg0_type, const1);
 	      tree and_expr = fold_build2_loc (loc, BIT_AND_EXPR, arg0_type,
@@ -1175,9 +1143,8 @@ altivec_resolve_new_overloaded_builtin (location_t loc, tree fndecl,
 	      params = make_tree_vector ();
 	      vec_safe_push (params, call);
 	      vec_safe_push (params, and_expr);
-	      return altivec_resolve_new_overloaded_builtin (loc,
-							     add_sub_builtin,
-							     params);
+	      return altivec_resolve_overloaded_builtin (loc, add_sub_builtin,
+							 params);
 	    }
 	  /* For {un}signed __int128s use the vaddeuqm/vsubeuqm instruction
 	     directly.  */
@@ -1244,9 +1211,8 @@ altivec_resolve_new_overloaded_builtin (location_t loc, tree fndecl,
 	    else
 	      as_c_builtin = rs6000_builtin_decls_x[RS6000_OVLD_VEC_SUBC];
 
-	    tree call1 = altivec_resolve_new_overloaded_builtin (loc,
-								 as_c_builtin,
-								 params);
+	    tree call1 = altivec_resolve_overloaded_builtin (loc, as_c_builtin,
+							     params);
 	    params = make_tree_vector ();
 	    vec_safe_push (params, arg0);
 	    vec_safe_push (params, arg1);
@@ -1256,9 +1222,8 @@ altivec_resolve_new_overloaded_builtin (location_t loc, tree fndecl,
 	    else
 	      as_builtin = rs6000_builtin_decls_x[RS6000_OVLD_VEC_SUB];
 
-	    tree call2 = altivec_resolve_new_overloaded_builtin (loc,
-								 as_builtin,
-								 params);
+	    tree call2 = altivec_resolve_overloaded_builtin (loc, as_builtin,
+							     params);
 	    tree const1 = build_int_cstu (TREE_TYPE (arg0_type), 1);
 	    tree ones_vector = build_vector_from_val (arg0_type, const1);
 	    tree and_expr = fold_build2_loc (loc, BIT_AND_EXPR, arg0_type,
@@ -1266,14 +1231,14 @@ altivec_resolve_new_overloaded_builtin (location_t loc, tree fndecl,
 	    params = make_tree_vector ();
 	    vec_safe_push (params, call2);
 	    vec_safe_push (params, and_expr);
-	    call2 = altivec_resolve_new_overloaded_builtin (loc, as_c_builtin,
-							    params);
+	    call2 = altivec_resolve_overloaded_builtin (loc, as_c_builtin,
+							params);
 	    params = make_tree_vector ();
 	    vec_safe_push (params, call1);
 	    vec_safe_push (params, call2);
 	    tree or_builtin = rs6000_builtin_decls_x[RS6000_OVLD_VEC_OR];
-	    return altivec_resolve_new_overloaded_builtin (loc, or_builtin,
-							   params);
+	    return altivec_resolve_overloaded_builtin (loc, or_builtin,
+						       params);
 	    }
 	  /* For {un}signed __int128s use the vaddecuq/vsubbecuq
 	     instructions.  This occurs through normal processing.  */
@@ -1779,17 +1744,17 @@ altivec_resolve_new_overloaded_builtin (location_t loc, tree fndecl,
 	tree parmtype0 = TREE_VALUE (TYPE_ARG_TYPES (fntype));
 	tree parmtype1 = TREE_VALUE (TREE_CHAIN (TYPE_ARG_TYPES (fntype)));
 
-	if (rs6000_new_builtin_type_compatible (types[0], parmtype0)
-	    && rs6000_new_builtin_type_compatible (types[1], parmtype1))
+	if (rs6000_builtin_type_compatible (types[0], parmtype0)
+	    && rs6000_builtin_type_compatible (types[1], parmtype1))
 	  {
 	    if (rs6000_builtin_decl (instance->bifid, false) != error_mark_node
-		&& rs6000_new_builtin_is_supported (instance->bifid))
+		&& rs6000_builtin_is_supported (instance->bifid))
 	      {
 		tree ret_type = TREE_TYPE (instance->fntype);
-		return altivec_build_new_resolved_builtin (args, n, fntype,
-							   ret_type,
-							   instance->bifid,
-							   fcode);
+		return altivec_build_resolved_builtin (args, n, fntype,
+						       ret_type,
+						       instance->bifid,
+						       fcode);
 	      }
 	    else
 	      unsupported_builtin = true;
@@ -1837,17 +1802,17 @@ altivec_resolve_new_overloaded_builtin (location_t loc, tree fndecl,
 	tree parmtype0 = TREE_VALUE (TYPE_ARG_TYPES (fntype));
 	tree parmtype1 = TREE_VALUE (TREE_CHAIN (TYPE_ARG_TYPES (fntype)));
 
-	if (rs6000_new_builtin_type_compatible (types[0], parmtype0)
-	    && rs6000_new_builtin_type_compatible (types[1], parmtype1))
+	if (rs6000_builtin_type_compatible (types[0], parmtype0)
+	    && rs6000_builtin_type_compatible (types[1], parmtype1))
 	  {
 	    if (rs6000_builtin_decl (instance->bifid, false) != error_mark_node
-		&& rs6000_new_builtin_is_supported (instance->bifid))
+		&& rs6000_builtin_is_supported (instance->bifid))
 	      {
 		tree ret_type = TREE_TYPE (instance->fntype);
-		return altivec_build_new_resolved_builtin (args, n, fntype,
-							   ret_type,
-							   instance->bifid,
-							   fcode);
+		return altivec_build_resolved_builtin (args, n, fntype,
+						       ret_type,
+						       instance->bifid,
+						       fcode);
 	      }
 	    else
 	      unsupported_builtin = true;
@@ -1869,8 +1834,7 @@ altivec_resolve_new_overloaded_builtin (location_t loc, tree fndecl,
 		 arg_i++)
 	      {
 		tree parmtype = TREE_VALUE (nextparm);
-		if (!rs6000_new_builtin_type_compatible (types[arg_i],
-							 parmtype))
+		if (!rs6000_builtin_type_compatible (types[arg_i], parmtype))
 		  {
 		    mismatch = true;
 		    break;
@@ -1881,16 +1845,16 @@ altivec_resolve_new_overloaded_builtin (location_t loc, tree fndecl,
 	    if (mismatch)
 	      continue;
 
-	    supported = rs6000_new_builtin_is_supported (instance->bifid);
+	    supported = rs6000_builtin_is_supported (instance->bifid);
 	    if (rs6000_builtin_decl (instance->bifid, false) != error_mark_node
 		&& supported)
 	      {
 		tree fntype = rs6000_builtin_info_x[instance->bifid].fntype;
 		tree ret_type = TREE_TYPE (instance->fntype);
-		return altivec_build_new_resolved_builtin (args, n, fntype,
-							   ret_type,
-							   instance->bifid,
-							   fcode);
+		return altivec_build_resolved_builtin (args, n, fntype,
+						       ret_type,
+						       instance->bifid,
+						       fcode);
 	      }
 	    else
 	      {
@@ -1908,7 +1872,7 @@ altivec_resolve_new_overloaded_builtin (location_t loc, tree fndecl,
 	    /* Indicate that the instantiation of the overloaded builtin
 	       name is not available with the target flags in effect.  */
 	    rs6000_gen_builtins fcode = (rs6000_gen_builtins) instance->bifid;
-	    rs6000_invalid_new_builtin (fcode);
+	    rs6000_invalid_builtin (fcode);
 	    /* Provide clarity of the relationship between the overload
 	       and the instantiation.  */
 	    const char *internal_name
diff --git a/gcc/config/rs6000/rs6000-call.c b/gcc/config/rs6000/rs6000-call.c
index 619f936668e..bc035d69731 100644
--- a/gcc/config/rs6000/rs6000-call.c
+++ b/gcc/config/rs6000/rs6000-call.c
@@ -167,9 +167,6 @@ static const struct
   { "arch_3_1",		PPC_FEATURE2_ARCH_3_1,		1 },
   { "mma",		PPC_FEATURE2_MMA,		1 },
 };
-
-static rtx rs6000_expand_new_builtin (tree, rtx, rtx, machine_mode, int);
-static bool rs6000_gimple_fold_new_builtin (gimple_stmt_iterator *gsi);
 \f
 /* Nonzero if we can use a floating-point register to pass this arg.  */
 #define USE_FP_FOR_ARG_P(CUM,MODE)		\
@@ -3258,7 +3255,7 @@ altivec_expand_vec_ext_builtin (tree exp, rtx target)
    appropriate target options being set.  */
 
 void
-rs6000_invalid_new_builtin (enum rs6000_gen_builtins fncode)
+rs6000_invalid_builtin (enum rs6000_gen_builtins fncode)
 {
   size_t j = (size_t) fncode;
   const char *name = rs6000_builtin_info_x[j].bifname;
@@ -3479,20 +3476,11 @@ fold_mergeeo_helper (gimple_stmt_iterator *gsi, gimple *stmt, int use_odd)
   gsi_replace (gsi, g, true);
 }
 
-/* Fold a machine-dependent built-in in GIMPLE.  (For folding into
-   a constant, use rs6000_fold_builtin.)  */
-
-bool
-rs6000_gimple_fold_builtin (gimple_stmt_iterator *gsi)
-{
-  return rs6000_gimple_fold_new_builtin (gsi);
-}
-
 /*  Helper function to sort out which built-ins may be valid without having
     a LHS.  */
 static bool
-rs6000_new_builtin_valid_without_lhs (enum rs6000_gen_builtins fn_code,
-				      tree fndecl)
+rs6000_builtin_valid_without_lhs (enum rs6000_gen_builtins fn_code,
+				  tree fndecl)
 {
   if (TREE_TYPE (TREE_TYPE (fndecl)) == void_type_node)
     return true;
@@ -3520,7 +3508,7 @@ rs6000_new_builtin_valid_without_lhs (enum rs6000_gen_builtins fn_code,
 /* Check whether a builtin function is supported in this target
    configuration.  */
 bool
-rs6000_new_builtin_is_supported (enum rs6000_gen_builtins fncode)
+rs6000_builtin_is_supported (enum rs6000_gen_builtins fncode)
 {
   switch (rs6000_builtin_info_x[(size_t) fncode].enable)
     {
@@ -3576,8 +3564,8 @@ rs6000_new_builtin_is_supported (enum rs6000_gen_builtins fncode)
    __vector_quad arguments into pass-by-value arguments, leading to more
    efficient code generation.  */
 static bool
-rs6000_gimple_fold_new_mma_builtin (gimple_stmt_iterator *gsi,
-				    rs6000_gen_builtins fn_code)
+rs6000_gimple_fold_mma_builtin (gimple_stmt_iterator *gsi,
+				rs6000_gen_builtins fn_code)
 {
   gimple *stmt = gsi_stmt (*gsi);
   size_t fncode = (size_t) fn_code;
@@ -3776,8 +3764,8 @@ rs6000_gimple_fold_new_mma_builtin (gimple_stmt_iterator *gsi,
 
 /* Fold a machine-dependent built-in in GIMPLE.  (For folding into
    a constant, use rs6000_fold_builtin.)  */
-static bool
-rs6000_gimple_fold_new_builtin (gimple_stmt_iterator *gsi)
+bool
+rs6000_gimple_fold_builtin (gimple_stmt_iterator *gsi)
 {
   gimple *stmt = gsi_stmt (*gsi);
   tree fndecl = gimple_call_fndecl (stmt);
@@ -3796,23 +3784,23 @@ rs6000_gimple_fold_new_builtin (gimple_stmt_iterator *gsi)
 			  : "nothing";
 
   if (TARGET_DEBUG_BUILTIN)
-      fprintf (stderr, "rs6000_gimple_fold_new_builtin %d %s %s\n",
+      fprintf (stderr, "rs6000_gimple_fold_builtin %d %s %s\n",
 	       fn_code, fn_name1, fn_name2);
 
   if (!rs6000_fold_gimple)
     return false;
 
   /* Prevent gimple folding for code that does not have a LHS, unless it is
-     allowed per the rs6000_new_builtin_valid_without_lhs helper function.  */
+     allowed per the rs6000_builtin_valid_without_lhs helper function.  */
   if (!gimple_call_lhs (stmt)
-      && !rs6000_new_builtin_valid_without_lhs (fn_code, fndecl))
+      && !rs6000_builtin_valid_without_lhs (fn_code, fndecl))
     return false;
 
   /* Don't fold invalid builtins, let rs6000_expand_builtin diagnose it.  */
-  if (!rs6000_new_builtin_is_supported (fn_code))
+  if (!rs6000_builtin_is_supported (fn_code))
     return false;
 
-  if (rs6000_gimple_fold_new_mma_builtin (gsi, fn_code))
+  if (rs6000_gimple_fold_mma_builtin (gsi, fn_code))
     return true;
 
   switch (fn_code)
@@ -4755,20 +4743,6 @@ rs6000_gimple_fold_new_builtin (gimple_stmt_iterator *gsi)
   return false;
 }
 
-/* Expand an expression EXP that calls a built-in function,
-   with result going to TARGET if that's convenient
-   (and in mode MODE if that's convenient).
-   SUBTARGET may be used as the target for computing one of EXP's operands.
-   IGNORE is nonzero if the value is to be ignored.  */
-
-rtx
-rs6000_expand_builtin (tree exp, rtx target, rtx subtarget ATTRIBUTE_UNUSED,
-		       machine_mode mode ATTRIBUTE_UNUSED,
-		       int ignore ATTRIBUTE_UNUSED)
-{
-  return rs6000_expand_new_builtin (exp, target, subtarget, mode, ignore);
-}
-
 /* Expand ALTIVEC_BUILTIN_MASK_FOR_LOAD.  */
 rtx
 rs6000_expand_ldst_mask (rtx target, tree arg0)
@@ -4803,8 +4777,8 @@ rs6000_expand_ldst_mask (rtx target, tree arg0)
 
 /* Expand the CPU builtin in FCODE and store the result in TARGET.  */
 static rtx
-new_cpu_expand_builtin (enum rs6000_gen_builtins fcode,
-			tree exp ATTRIBUTE_UNUSED, rtx target)
+cpu_expand_builtin (enum rs6000_gen_builtins fcode,
+		    tree exp ATTRIBUTE_UNUSED, rtx target)
 {
   /* __builtin_cpu_init () is a nop, so expand to nothing.  */
   if (fcode == RS6000_BIF_CPU_INIT)
@@ -5206,8 +5180,8 @@ stv_expand_builtin (insn_code icode, rtx *op,
 
 /* Expand the MMA built-in in EXP, and return it.  */
 static rtx
-new_mma_expand_builtin (tree exp, rtx target, insn_code icode,
-			rs6000_gen_builtins fcode)
+mma_expand_builtin (tree exp, rtx target, insn_code icode,
+		    rs6000_gen_builtins fcode)
 {
   tree fndecl = TREE_OPERAND (CALL_EXPR_FN (exp), 0);
   bool void_func = TREE_TYPE (TREE_TYPE (fndecl)) == void_type_node;
@@ -5319,7 +5293,7 @@ new_mma_expand_builtin (tree exp, rtx target, insn_code icode,
 
 /* Return the appropriate SPR number associated with the given builtin.  */
 static inline HOST_WIDE_INT
-new_htm_spr_num (enum rs6000_gen_builtins code)
+htm_spr_num (enum rs6000_gen_builtins code)
 {
   if (code == RS6000_BIF_GET_TFHAR
       || code == RS6000_BIF_SET_TFHAR)
@@ -5338,8 +5312,8 @@ new_htm_spr_num (enum rs6000_gen_builtins code)
 /* Expand the HTM builtin in EXP and store the result in TARGET.
    Return the expanded rtx.  */
 static rtx
-new_htm_expand_builtin (bifdata *bifaddr, rs6000_gen_builtins fcode,
-			tree exp, rtx target)
+htm_expand_builtin (bifdata *bifaddr, rs6000_gen_builtins fcode,
+		    tree exp, rtx target)
 {
   if (!TARGET_POWERPC64
       && (fcode == RS6000_BIF_TABORTDC
@@ -5425,7 +5399,7 @@ new_htm_expand_builtin (bifdata *bifaddr, rs6000_gen_builtins fcode,
   if (uses_spr)
     {
       machine_mode mode = TARGET_POWERPC64 ? DImode : SImode;
-      op[nopnds++] = gen_rtx_CONST_INT (mode, new_htm_spr_num (fcode));
+      op[nopnds++] = gen_rtx_CONST_INT (mode, htm_spr_num (fcode));
     }
   /* If this builtin accesses a CR field, then pass in a scratch
      CR field as the last operand.  */
@@ -5497,11 +5471,9 @@ new_htm_expand_builtin (bifdata *bifaddr, rs6000_gen_builtins fcode,
    SUBTARGET may be used as the target for computing one of EXP's operands.
    IGNORE is nonzero if the value is to be ignored.
    Use the new builtin infrastructure.  */
-static rtx
-rs6000_expand_new_builtin (tree exp, rtx target,
-			   rtx /* subtarget */,
-			   machine_mode /* mode */,
-			   int ignore)
+rtx
+rs6000_expand_builtin (tree exp, rtx target, rtx /* subtarget */,
+		       machine_mode /* mode */, int ignore)
 {
   tree fndecl = TREE_OPERAND (CALL_EXPR_FN (exp), 0);
   enum rs6000_gen_builtins fcode
@@ -5610,7 +5582,7 @@ rs6000_expand_new_builtin (tree exp, rtx target,
 	|| (e == ENB_P10_64 && TARGET_POWER10 && TARGET_POWERPC64)
 	|| (e == ENB_MMA && TARGET_MMA)))
     {
-      rs6000_invalid_new_builtin (fcode);
+      rs6000_invalid_builtin (fcode);
       return expand_call (exp, target, ignore);
     }
 
@@ -5629,7 +5601,7 @@ rs6000_expand_new_builtin (tree exp, rtx target,
     }
 
   if (bif_is_cpu (*bifaddr))
-    return new_cpu_expand_builtin (fcode, exp, target);
+    return cpu_expand_builtin (fcode, exp, target);
 
   if (bif_is_init (*bifaddr))
     return altivec_expand_vec_init_builtin (TREE_TYPE (exp), exp, target);
@@ -5644,7 +5616,7 @@ rs6000_expand_new_builtin (tree exp, rtx target,
     return altivec_expand_predicate_builtin (icode, exp, target);
 
   if (bif_is_htm (*bifaddr))
-    return new_htm_expand_builtin (bifaddr, fcode, exp, target);
+    return htm_expand_builtin (bifaddr, fcode, exp, target);
 
   if (bif_is_32bit (*bifaddr) && TARGET_32BIT)
     {
@@ -5830,7 +5802,7 @@ rs6000_expand_new_builtin (tree exp, rtx target,
     return lxvrze_expand_builtin (target, icode, op, mode[0], mode[1]);
 
   if (bif_is_mma (*bifaddr))
-    return new_mma_expand_builtin (exp, target, icode, fcode);
+    return mma_expand_builtin (exp, target, icode, fcode);
 
   if (fcode == RS6000_BIF_PACK_IF
       && TARGET_LONG_DOUBLE_128
@@ -6355,8 +6327,8 @@ rs6000_init_builtins (void)
   return;
 }
 
-static tree
-rs6000_new_builtin_decl (unsigned code, bool /* initialize_p */)
+tree
+rs6000_builtin_decl (unsigned code, bool /* initialize_p */)
 {
   rs6000_gen_builtins fcode = (rs6000_gen_builtins) code;
 
@@ -6366,17 +6338,6 @@ rs6000_new_builtin_decl (unsigned code, bool /* initialize_p */)
   return rs6000_builtin_decls_x[code];
 }
 
-/* Returns the rs6000 builtin decl for CODE.  Note that we don't check
-   the builtin mask here since there could be some #pragma/attribute
-   target functions and the rs6000_builtin_mask could be wrong when
-   this checking happens, though it will be updated properly later.  */
-
-tree
-rs6000_builtin_decl (unsigned code, bool initialize_p ATTRIBUTE_UNUSED)
-{
-  return rs6000_new_builtin_decl (code, initialize_p);
-}
-
 /* Return the internal arg pointer used for function incoming
    arguments.  When -fsplit-stack, the arg pointer is r12 so we need
    to copy it to a pseudo in order for it to be preserved over calls
diff --git a/gcc/config/rs6000/rs6000-gen-builtins.c b/gcc/config/rs6000/rs6000-gen-builtins.c
index 9c61b7d9fe6..114289a0034 100644
--- a/gcc/config/rs6000/rs6000-gen-builtins.c
+++ b/gcc/config/rs6000/rs6000-gen-builtins.c
@@ -2375,8 +2375,7 @@ write_decls (void)
 
   fprintf (header_file, "extern void rs6000_init_generated_builtins ();\n\n");
   fprintf (header_file,
-	   "extern bool rs6000_new_builtin_is_supported "
-	   "(rs6000_gen_builtins);\n");
+	   "extern bool rs6000_builtin_is_supported (rs6000_gen_builtins);\n");
   fprintf (header_file,
 	   "extern tree rs6000_builtin_decl (unsigned, "
 	   "bool ATTRIBUTE_UNUSED);\n\n");
diff --git a/gcc/config/rs6000/rs6000-internal.h b/gcc/config/rs6000/rs6000-internal.h
index a880fd37618..49904b3f33d 100644
--- a/gcc/config/rs6000/rs6000-internal.h
+++ b/gcc/config/rs6000/rs6000-internal.h
@@ -142,7 +142,7 @@ extern void rs6000_output_mi_thunk (FILE *file,
 extern bool rs6000_output_addr_const_extra (FILE *file, rtx x);
 extern bool rs6000_gimple_fold_builtin (gimple_stmt_iterator *gsi);
 extern tree rs6000_build_builtin_va_list (void);
-extern void rs6000_invalid_new_builtin (rs6000_gen_builtins fncode);
+extern void rs6000_invalid_builtin (rs6000_gen_builtins fncode);
 extern void rs6000_va_start (tree valist, rtx nextarg);
 extern tree rs6000_gimplify_va_arg (tree valist, tree type, gimple_seq *pre_p,
 				    gimple_seq *post_p);
diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c
index f5116289a7f..bc17c53760d 100644
--- a/gcc/config/rs6000/rs6000.c
+++ b/gcc/config/rs6000/rs6000.c
@@ -5568,14 +5568,14 @@ rs6000_loop_unroll_adjust (unsigned nunroll, struct loop *loop)
    Implement targetm.vectorize.builtin_vectorized_function.  */
 
 static tree
-rs6000_new_builtin_vectorized_function (unsigned int fn, tree type_out,
-					tree type_in)
+rs6000_builtin_vectorized_function (unsigned int fn, tree type_out,
+				    tree type_in)
 {
   machine_mode in_mode, out_mode;
   int in_n, out_n;
 
   if (TARGET_DEBUG_BUILTIN)
-    fprintf (stderr, "rs6000_new_builtin_vectorized_function (%s, %s, %s)\n",
+    fprintf (stderr, "rs6000_builtin_vectorized_function (%s, %s, %s)\n",
 	     combined_fn_name (combined_fn (fn)),
 	     GET_MODE_NAME (TYPE_MODE (type_out)),
 	     GET_MODE_NAME (TYPE_MODE (type_in)));
@@ -5700,15 +5700,15 @@ rs6000_new_builtin_vectorized_function (unsigned int fn, tree type_out,
 /* Implement targetm.vectorize.builtin_md_vectorized_function.  */
 
 static tree
-rs6000_new_builtin_md_vectorized_function (tree fndecl, tree type_out,
-					   tree type_in)
+rs6000_builtin_md_vectorized_function (tree fndecl, tree type_out,
+				       tree type_in)
 {
   machine_mode in_mode, out_mode;
   int in_n, out_n;
 
   if (TARGET_DEBUG_BUILTIN)
     fprintf (stderr,
-	     "rs6000_new_builtin_md_vectorized_function (%s, %s, %s)\n",
+	     "rs6000_builtin_md_vectorized_function (%s, %s, %s)\n",
 	     IDENTIFIER_POINTER (DECL_NAME (fndecl)),
 	     GET_MODE_NAME (TYPE_MODE (type_out)),
 	     GET_MODE_NAME (TYPE_MODE (type_in)));
@@ -5918,25 +5918,6 @@ rs6000_builtin_vectorized_libmass (combined_fn fn, tree type_out,
   return new_fndecl;
 }
 
-/* Returns a function decl for a vectorized version of the builtin function
-   with builtin function code FN and the result vector type TYPE, or NULL_TREE
-   if it is not available.  */
-
-static tree
-rs6000_builtin_vectorized_function (unsigned int fn, tree type_out,
-				    tree type_in)
-{
-  return rs6000_new_builtin_vectorized_function (fn, type_out, type_in);
-}
-
-/* Implement TARGET_VECTORIZE_BUILTIN_MD_VECTORIZED_FUNCTION.  */
-
-static tree
-rs6000_builtin_md_vectorized_function (tree fndecl, tree type_out,
-				       tree type_in)
-{
-  return rs6000_new_builtin_md_vectorized_function (fndecl, type_out, type_in);
-}
 \f
 /* Default CPU string for rs6000*_file_start functions.  */
 static const char *rs6000_default_cpu;
-- 
2.27.0

[PATCH 6/6] rs6000: Rename arrays to remove temporary _x suffix

[Bill Schmidt]

From: Bill Schmidt <wschmidt@linux.ibm.com>

Hi!

While we had two sets of built-in infrastructure at once, I added _x as a
suffix to two arrays to disambiguate the old and new versions.  Time to fix
that also.

Bootstrapped and tested on powerpc64le-linux-gnu with no regressions.  Is this
okay for trunk?

Thanks!
Bill

2021-12-02  Bill Schmidt  <wschmidt@linux.ibm.com>

gcc/
	* config/rs6000/rs6000-c.c (altivec_build_resolved_builtin): Rename
	rs6000_builtin_decls_x to rs6000_builtin_decls.
	(altivec_resolve_overloaded_builtin): Likewise.  Also rename
	rs6000_builtin_info_x to rs6000_builtin_info.
	* config/rs6000/rs6000-call.c (rs6000_invalid_builtin): Rename
	rs6000_builtin_info_x to rs6000_builtin_info.
	(rs6000_builtin_is_supported): Likewise.
	(rs6000_gimple_fold_mma_builtin): Likewise.  Also rename
	rs6000_builtin_decls_x to rs6000_builtin_decls.
	(rs6000_gimple_fold_builtin): Rename rs6000_builtin_info_x to
	rs6000_builtin_info.
	(cpu_expand_builtin): Likewise.
	(rs6000_expand_builtin): Likewise.
	(rs6000_init_builtins): Likewise.  Also rename rs6000_builtin_decls_x
	to rs6000_builtin_decls.
	(rs6000_builtin_decl): Rename rs6000_builtin_decls_x to
	rs6000_builtin_decls.
	* config/rs6000/rs6000-gen-builtins.c (write_decls): In generated code,
	rename rs6000_builtin_decls_x to rs6000_builtin_decls, and rename
	rs6000_builtin_info_x to rs6000_builtin_info.
	(write_bif_static_init): In generated code, rename
	rs6000_builtin_info_x to rs6000_builtin_info.
	(write_init_bif_table): In generated code, rename
	rs6000_builtin_decls_x to rs6000_builtin_decls, and rename
	rs6000_builtin_info_x to rs6000_builtin_info.
	(write_init_ovld_table): In generated code, rename
	rs6000_builtin_decls_x to rs6000_builtin_decls.
	(write_init_file): Likewise.
	* config/rs6000/rs6000.c (rs6000_builtin_vectorized_function):
	Likewise.
	(rs6000_builtin_md_vectorized_function): Likewise.
	(rs6000_builtin_reciprocal): Likewise.
	(add_condition_to_bb): Likewise.
	(rs6000_atomic_assign_expand_fenv): Likewise.
---
 gcc/config/rs6000/rs6000-c.c            | 64 ++++++++++++-------------
 gcc/config/rs6000/rs6000-call.c         | 46 +++++++++---------
 gcc/config/rs6000/rs6000-gen-builtins.c | 27 +++++------
 gcc/config/rs6000/rs6000.c              | 58 +++++++++++-----------
 4 files changed, 96 insertions(+), 99 deletions(-)

diff --git a/gcc/config/rs6000/rs6000-c.c b/gcc/config/rs6000/rs6000-c.c
index f790c72d621..e0ebdeed548 100644
--- a/gcc/config/rs6000/rs6000-c.c
+++ b/gcc/config/rs6000/rs6000-c.c
@@ -867,7 +867,7 @@ altivec_build_resolved_builtin (tree *args, int n, tree fntype, tree ret_type,
 {
   tree argtypes = TYPE_ARG_TYPES (fntype);
   tree arg_type[MAX_OVLD_ARGS];
-  tree fndecl = rs6000_builtin_decls_x[bif_id];
+  tree fndecl = rs6000_builtin_decls[bif_id];
 
   for (int i = 0; i < n; i++)
     {
@@ -1001,13 +1001,13 @@ altivec_resolve_overloaded_builtin (location_t loc, tree fndecl,
 	  case E_SFmode:
 	    {
 	      /* For floats use the xvmulsp instruction directly.  */
-	      tree call = rs6000_builtin_decls_x[RS6000_BIF_XVMULSP];
+	      tree call = rs6000_builtin_decls[RS6000_BIF_XVMULSP];
 	      return build_call_expr (call, 2, arg0, arg1);
 	    }
 	  case E_DFmode:
 	    {
 	      /* For doubles use the xvmuldp instruction directly.  */
-	      tree call = rs6000_builtin_decls_x[RS6000_BIF_XVMULDP];
+	      tree call = rs6000_builtin_decls[RS6000_BIF_XVMULDP];
 	      return build_call_expr (call, 2, arg0, arg1);
 	    }
 	  /* Other types are errors.  */
@@ -1066,7 +1066,7 @@ altivec_resolve_overloaded_builtin (location_t loc, tree fndecl,
 		vec_safe_push (params, arg0);
 		vec_safe_push (params, arg1);
 		tree call = altivec_resolve_overloaded_builtin
-		  (loc, rs6000_builtin_decls_x[RS6000_OVLD_VEC_CMPEQ],
+		  (loc, rs6000_builtin_decls[RS6000_OVLD_VEC_CMPEQ],
 		   params);
 		/* Use save_expr to ensure that operands used more than once
 		   that may have side effects (like calls) are only evaluated
@@ -1076,7 +1076,7 @@ altivec_resolve_overloaded_builtin (location_t loc, tree fndecl,
 		vec_safe_push (params, call);
 		vec_safe_push (params, call);
 		return altivec_resolve_overloaded_builtin
-		  (loc, rs6000_builtin_decls_x[RS6000_OVLD_VEC_NOR], params);
+		  (loc, rs6000_builtin_decls[RS6000_OVLD_VEC_NOR], params);
 	      }
 	      /* Other types are errors.  */
 	    default:
@@ -1129,9 +1129,9 @@ altivec_resolve_overloaded_builtin (location_t loc, tree fndecl,
 	      vec_safe_push (params, arg1);
 
 	      if (fcode == RS6000_OVLD_VEC_ADDE)
-		add_sub_builtin = rs6000_builtin_decls_x[RS6000_OVLD_VEC_ADD];
+		add_sub_builtin = rs6000_builtin_decls[RS6000_OVLD_VEC_ADD];
 	      else
-		add_sub_builtin = rs6000_builtin_decls_x[RS6000_OVLD_VEC_SUB];
+		add_sub_builtin = rs6000_builtin_decls[RS6000_OVLD_VEC_SUB];
 
 	      tree call
 		= altivec_resolve_overloaded_builtin (loc, add_sub_builtin,
@@ -1207,9 +1207,9 @@ altivec_resolve_overloaded_builtin (location_t loc, tree fndecl,
 	    vec_safe_push (params, arg1);
 
 	    if (fcode == RS6000_OVLD_VEC_ADDEC)
-	      as_c_builtin = rs6000_builtin_decls_x[RS6000_OVLD_VEC_ADDC];
+	      as_c_builtin = rs6000_builtin_decls[RS6000_OVLD_VEC_ADDC];
 	    else
-	      as_c_builtin = rs6000_builtin_decls_x[RS6000_OVLD_VEC_SUBC];
+	      as_c_builtin = rs6000_builtin_decls[RS6000_OVLD_VEC_SUBC];
 
 	    tree call1 = altivec_resolve_overloaded_builtin (loc, as_c_builtin,
 							     params);
@@ -1218,9 +1218,9 @@ altivec_resolve_overloaded_builtin (location_t loc, tree fndecl,
 	    vec_safe_push (params, arg1);
 
 	    if (fcode == RS6000_OVLD_VEC_ADDEC)
-	      as_builtin = rs6000_builtin_decls_x[RS6000_OVLD_VEC_ADD];
+	      as_builtin = rs6000_builtin_decls[RS6000_OVLD_VEC_ADD];
 	    else
-	      as_builtin = rs6000_builtin_decls_x[RS6000_OVLD_VEC_SUB];
+	      as_builtin = rs6000_builtin_decls[RS6000_OVLD_VEC_SUB];
 
 	    tree call2 = altivec_resolve_overloaded_builtin (loc, as_builtin,
 							     params);
@@ -1236,7 +1236,7 @@ altivec_resolve_overloaded_builtin (location_t loc, tree fndecl,
 	    params = make_tree_vector ();
 	    vec_safe_push (params, call1);
 	    vec_safe_push (params, call2);
-	    tree or_builtin = rs6000_builtin_decls_x[RS6000_OVLD_VEC_OR];
+	    tree or_builtin = rs6000_builtin_decls[RS6000_OVLD_VEC_OR];
 	    return altivec_resolve_overloaded_builtin (loc, or_builtin,
 						       params);
 	    }
@@ -1380,34 +1380,34 @@ altivec_resolve_overloaded_builtin (location_t loc, tree fndecl,
 		  break;
 
 		case E_V1TImode:
-		  call = rs6000_builtin_decls_x[RS6000_BIF_VEC_EXT_V1TI];
+		  call = rs6000_builtin_decls[RS6000_BIF_VEC_EXT_V1TI];
 		  break;
 
 		case E_V2DFmode:
-		  call = rs6000_builtin_decls_x[RS6000_BIF_VEC_EXT_V2DF];
+		  call = rs6000_builtin_decls[RS6000_BIF_VEC_EXT_V2DF];
 		  break;
 
 		case E_V2DImode:
-		  call = rs6000_builtin_decls_x[RS6000_BIF_VEC_EXT_V2DI];
+		  call = rs6000_builtin_decls[RS6000_BIF_VEC_EXT_V2DI];
 		  break;
 
 		case E_V4SFmode:
-		  call = rs6000_builtin_decls_x[RS6000_BIF_VEC_EXT_V4SF];
+		  call = rs6000_builtin_decls[RS6000_BIF_VEC_EXT_V4SF];
 		  break;
 
 		case E_V4SImode:
 		  if (TARGET_DIRECT_MOVE_64BIT)
-		    call = rs6000_builtin_decls_x[RS6000_BIF_VEC_EXT_V4SI];
+		    call = rs6000_builtin_decls[RS6000_BIF_VEC_EXT_V4SI];
 		  break;
 
 		case E_V8HImode:
 		  if (TARGET_DIRECT_MOVE_64BIT)
-		    call = rs6000_builtin_decls_x[RS6000_BIF_VEC_EXT_V8HI];
+		    call = rs6000_builtin_decls[RS6000_BIF_VEC_EXT_V8HI];
 		  break;
 
 		case E_V16QImode:
 		  if (TARGET_DIRECT_MOVE_64BIT)
-		    call = rs6000_builtin_decls_x[RS6000_BIF_VEC_EXT_V16QI];
+		    call = rs6000_builtin_decls[RS6000_BIF_VEC_EXT_V16QI];
 		  break;
 		}
 	    }
@@ -1422,27 +1422,27 @@ altivec_resolve_overloaded_builtin (location_t loc, tree fndecl,
 		  break;
 
 		case E_V2DFmode:
-		  call = rs6000_builtin_decls_x[RS6000_BIF_VEC_EXT_V2DF];
+		  call = rs6000_builtin_decls[RS6000_BIF_VEC_EXT_V2DF];
 		  break;
 
 		case E_V2DImode:
-		  call = rs6000_builtin_decls_x[RS6000_BIF_VEC_EXT_V2DI];
+		  call = rs6000_builtin_decls[RS6000_BIF_VEC_EXT_V2DI];
 		  break;
 
 		case E_V4SFmode:
-		  call = rs6000_builtin_decls_x[RS6000_BIF_VEC_EXT_V4SF];
+		  call = rs6000_builtin_decls[RS6000_BIF_VEC_EXT_V4SF];
 		  break;
 
 		case E_V4SImode:
-		  call = rs6000_builtin_decls_x[RS6000_BIF_VEC_EXT_V4SI];
+		  call = rs6000_builtin_decls[RS6000_BIF_VEC_EXT_V4SI];
 		  break;
 
 		case E_V8HImode:
-		  call = rs6000_builtin_decls_x[RS6000_BIF_VEC_EXT_V8HI];
+		  call = rs6000_builtin_decls[RS6000_BIF_VEC_EXT_V8HI];
 		  break;
 
 		case E_V16QImode:
-		  call = rs6000_builtin_decls_x[RS6000_BIF_VEC_EXT_V16QI];
+		  call = rs6000_builtin_decls[RS6000_BIF_VEC_EXT_V16QI];
 		  break;
 		}
 	    }
@@ -1542,9 +1542,9 @@ altivec_resolve_overloaded_builtin (location_t loc, tree fndecl,
 
 	  arg2 = wide_int_to_tree (TREE_TYPE (arg2), selector);
 	  if (mode == V2DFmode)
-	    call = rs6000_builtin_decls_x[RS6000_BIF_VEC_SET_V2DF];
+	    call = rs6000_builtin_decls[RS6000_BIF_VEC_SET_V2DF];
 	  else if (mode == V2DImode)
-	    call = rs6000_builtin_decls_x[RS6000_BIF_VEC_SET_V2DI];
+	    call = rs6000_builtin_decls[RS6000_BIF_VEC_SET_V2DI];
 
 	  /* Note, __builtin_vec_insert_<xxx> has vector and scalar types
 	     reversed.  */
@@ -1554,7 +1554,7 @@ altivec_resolve_overloaded_builtin (location_t loc, tree fndecl,
       else if (mode == V1TImode && VECTOR_UNIT_VSX_P (mode)
 	       && TREE_CODE (arg2) == INTEGER_CST)
 	{
-	  tree call = rs6000_builtin_decls_x[RS6000_BIF_VEC_SET_V1TI];
+	  tree call = rs6000_builtin_decls[RS6000_BIF_VEC_SET_V1TI];
 	  wide_int selector = wi::zero(32);
 
 	  arg2 = wide_int_to_tree (TREE_TYPE (arg2), selector);
@@ -1740,7 +1740,7 @@ altivec_resolve_overloaded_builtin (location_t loc, tree fndecl,
 	  instance = instance->next;
 
 	gcc_assert (instance != NULL);
-	tree fntype = rs6000_builtin_info_x[instance->bifid].fntype;
+	tree fntype = rs6000_builtin_info[instance->bifid].fntype;
 	tree parmtype0 = TREE_VALUE (TYPE_ARG_TYPES (fntype));
 	tree parmtype1 = TREE_VALUE (TREE_CHAIN (TYPE_ARG_TYPES (fntype)));
 
@@ -1798,7 +1798,7 @@ altivec_resolve_overloaded_builtin (location_t loc, tree fndecl,
 	  instance = instance->next;
 
 	gcc_assert (instance != NULL);
-	tree fntype = rs6000_builtin_info_x[instance->bifid].fntype;
+	tree fntype = rs6000_builtin_info[instance->bifid].fntype;
 	tree parmtype0 = TREE_VALUE (TYPE_ARG_TYPES (fntype));
 	tree parmtype1 = TREE_VALUE (TREE_CHAIN (TYPE_ARG_TYPES (fntype)));
 
@@ -1849,7 +1849,7 @@ altivec_resolve_overloaded_builtin (location_t loc, tree fndecl,
 	    if (rs6000_builtin_decl (instance->bifid, false) != error_mark_node
 		&& supported)
 	      {
-		tree fntype = rs6000_builtin_info_x[instance->bifid].fntype;
+		tree fntype = rs6000_builtin_info[instance->bifid].fntype;
 		tree ret_type = TREE_TYPE (instance->fntype);
 		return altivec_build_resolved_builtin (args, n, fntype,
 						       ret_type,
@@ -1876,7 +1876,7 @@ altivec_resolve_overloaded_builtin (location_t loc, tree fndecl,
 	    /* Provide clarity of the relationship between the overload
 	       and the instantiation.  */
 	    const char *internal_name
-	      = rs6000_builtin_info_x[instance->bifid].bifname;
+	      = rs6000_builtin_info[instance->bifid].bifname;
 	    rich_location richloc (line_table, input_location);
 	    inform (&richloc,
 		    "overloaded builtin %qs is implemented by builtin %qs",
diff --git a/gcc/config/rs6000/rs6000-call.c b/gcc/config/rs6000/rs6000-call.c
index bc035d69731..b3c46788f2c 100644
--- a/gcc/config/rs6000/rs6000-call.c
+++ b/gcc/config/rs6000/rs6000-call.c
@@ -3258,9 +3258,9 @@ void
 rs6000_invalid_builtin (enum rs6000_gen_builtins fncode)
 {
   size_t j = (size_t) fncode;
-  const char *name = rs6000_builtin_info_x[j].bifname;
+  const char *name = rs6000_builtin_info[j].bifname;
 
-  switch (rs6000_builtin_info_x[j].enable)
+  switch (rs6000_builtin_info[j].enable)
     {
     case ENB_P5:
       error ("%qs requires the %qs option", name, "-mcpu=power5");
@@ -3510,7 +3510,7 @@ rs6000_builtin_valid_without_lhs (enum rs6000_gen_builtins fn_code,
 bool
 rs6000_builtin_is_supported (enum rs6000_gen_builtins fncode)
 {
-  switch (rs6000_builtin_info_x[(size_t) fncode].enable)
+  switch (rs6000_builtin_info[(size_t) fncode].enable)
     {
     case ENB_ALWAYS:
       return true;
@@ -3570,18 +3570,18 @@ rs6000_gimple_fold_mma_builtin (gimple_stmt_iterator *gsi,
   gimple *stmt = gsi_stmt (*gsi);
   size_t fncode = (size_t) fn_code;
 
-  if (!bif_is_mma (rs6000_builtin_info_x[fncode]))
+  if (!bif_is_mma (rs6000_builtin_info[fncode]))
     return false;
 
   /* Each call that can be gimple-expanded has an associated built-in
      function that it will expand into.  If this one doesn't, we have
      already expanded it!  Exceptions: lxvp and stxvp.  */
-  if (rs6000_builtin_info_x[fncode].assoc_bif == RS6000_BIF_NONE
+  if (rs6000_builtin_info[fncode].assoc_bif == RS6000_BIF_NONE
       && fncode != RS6000_BIF_LXVP
       && fncode != RS6000_BIF_STXVP)
     return false;
 
-  bifdata *bd = &rs6000_builtin_info_x[fncode];
+  bifdata *bd = &rs6000_builtin_info[fncode];
   unsigned nopnds = bd->nargs;
   gimple_seq new_seq = NULL;
   gimple *new_call;
@@ -3626,7 +3626,7 @@ rs6000_gimple_fold_mma_builtin (gimple_stmt_iterator *gsi,
 	 to emit a xxmfacc instruction now, since we cannot do it later.  */
       if (fncode == RS6000_BIF_DISASSEMBLE_ACC)
 	{
-	  new_decl = rs6000_builtin_decls_x[RS6000_BIF_XXMFACC_INTERNAL];
+	  new_decl = rs6000_builtin_decls[RS6000_BIF_XXMFACC_INTERNAL];
 	  new_call = gimple_build_call (new_decl, 1, src);
 	  src = create_tmp_reg_or_ssa_name (vector_quad_type_node);
 	  gimple_call_set_lhs (new_call, src);
@@ -3635,7 +3635,7 @@ rs6000_gimple_fold_mma_builtin (gimple_stmt_iterator *gsi,
 
       /* Copy the accumulator/pair vector by vector.  */
       new_decl
-	= rs6000_builtin_decls_x[rs6000_builtin_info_x[fncode].assoc_bif];
+	= rs6000_builtin_decls[rs6000_builtin_info[fncode].assoc_bif];
       tree dst_type = build_pointer_type_for_mode (unsigned_V16QI_type_node,
 						   ptr_mode, true);
       tree dst_base = build1 (VIEW_CONVERT_EXPR, dst_type, dst_ptr);
@@ -3693,7 +3693,7 @@ rs6000_gimple_fold_mma_builtin (gimple_stmt_iterator *gsi,
 
   /* Convert this built-in into an internal version that uses pass-by-value
      arguments.  The internal built-in is found in the assoc_bif field.  */
-  new_decl = rs6000_builtin_decls_x[rs6000_builtin_info_x[fncode].assoc_bif];
+  new_decl = rs6000_builtin_decls[rs6000_builtin_info[fncode].assoc_bif];
   tree lhs, op[MAX_MMA_OPERANDS];
   tree acc = gimple_call_arg (stmt, 0);
   push_gimplify_context (true);
@@ -3777,8 +3777,8 @@ rs6000_gimple_fold_builtin (gimple_stmt_iterator *gsi)
   gimple *g;
 
   size_t uns_fncode = (size_t) fn_code;
-  enum insn_code icode = rs6000_builtin_info_x[uns_fncode].icode;
-  const char *fn_name1 = rs6000_builtin_info_x[uns_fncode].bifname;
+  enum insn_code icode = rs6000_builtin_info[uns_fncode].icode;
+  const char *fn_name1 = rs6000_builtin_info[uns_fncode].bifname;
   const char *fn_name2 = (icode != CODE_FOR_nothing)
 			  ? get_insn_name ((int) icode)
 			  : "nothing";
@@ -4801,7 +4801,7 @@ cpu_expand_builtin (enum rs6000_gen_builtins fcode,
   if (TREE_CODE (arg) != STRING_CST)
     {
       error ("builtin %qs only accepts a string argument",
-	     rs6000_builtin_info_x[(size_t) fcode].bifname);
+	     rs6000_builtin_info[(size_t) fcode].bifname);
       return const0_rtx;
     }
 
@@ -4820,7 +4820,7 @@ cpu_expand_builtin (enum rs6000_gen_builtins fcode,
 	{
 	  /* Invalid CPU argument.  */
 	  error ("cpu %qs is an invalid argument to builtin %qs",
-		 cpu, rs6000_builtin_info_x[(size_t) fcode].bifname);
+		 cpu, rs6000_builtin_info[(size_t) fcode].bifname);
 	  return const0_rtx;
 	}
 
@@ -4849,7 +4849,7 @@ cpu_expand_builtin (enum rs6000_gen_builtins fcode,
 	  /* Invalid HWCAP argument.  */
 	  error ("%s %qs is an invalid argument to builtin %qs",
 		 "hwcap", hwcap,
-		 rs6000_builtin_info_x[(size_t) fcode].bifname);
+		 rs6000_builtin_info[(size_t) fcode].bifname);
 	  return const0_rtx;
 	}
 
@@ -4877,7 +4877,7 @@ cpu_expand_builtin (enum rs6000_gen_builtins fcode,
 
 #else
   warning (0, "builtin %qs needs GLIBC (2.23 and newer) that exports hardware "
-	   "capability bits", rs6000_builtin_info_x[(size_t) fcode].bifname);
+	   "capability bits", rs6000_builtin_info[(size_t) fcode].bifname);
 
   /* For old LIBCs, always return FALSE.  */
   emit_move_insn (target, GEN_INT (0));
@@ -5479,7 +5479,7 @@ rs6000_expand_builtin (tree exp, rtx target, rtx /* subtarget */,
   enum rs6000_gen_builtins fcode
     = (enum rs6000_gen_builtins) DECL_MD_FUNCTION_CODE (fndecl);
   size_t uns_fcode = (size_t)fcode;
-  enum insn_code icode = rs6000_builtin_info_x[uns_fcode].icode;
+  enum insn_code icode = rs6000_builtin_info[uns_fcode].icode;
 
   /* TODO: The following commentary and code is inherited from the original
      builtin processing code.  The commentary is a bit confusing, with the
@@ -5557,7 +5557,7 @@ rs6000_expand_builtin (tree exp, rtx target, rtx /* subtarget */,
   /* In case of "#pragma target" changes, we initialize all builtins
      but check for actual availability now, during expand time.  For
      invalid builtins, generate a normal call.  */
-  bifdata *bifaddr = &rs6000_builtin_info_x[uns_fcode];
+  bifdata *bifaddr = &rs6000_builtin_info[uns_fcode];
   bif_enable e = bifaddr->enable;
 
   if (!(e == ENB_ALWAYS
@@ -6260,7 +6260,7 @@ rs6000_init_builtins (void)
       fprintf (stderr, "\nAutogenerated built-in functions:\n\n");
       for (int i = 1; i < (int) RS6000_BIF_MAX; i++)
 	{
-	  bif_enable e = rs6000_builtin_info_x[i].enable;
+	  bif_enable e = rs6000_builtin_info[i].enable;
 	  if (e == ENB_P5 && !TARGET_POPCNTB)
 	    continue;
 	  if (e == ENB_P6 && !TARGET_CMPB)
@@ -6299,10 +6299,10 @@ rs6000_init_builtins (void)
 	    continue;
 	  if (e == ENB_MMA && !TARGET_MMA)
 	    continue;
-	  tree fntype = rs6000_builtin_info_x[i].fntype;
+	  tree fntype = rs6000_builtin_info[i].fntype;
 	  tree t = TREE_TYPE (fntype);
 	  fprintf (stderr, "%s %s (", rs6000_type_string (t),
-		   rs6000_builtin_info_x[i].bifname);
+		   rs6000_builtin_info[i].bifname);
 	  t = TYPE_ARG_TYPES (fntype);
 	  while (t && TREE_VALUE (t) != void_type_node)
 	    {
@@ -6313,13 +6313,13 @@ rs6000_init_builtins (void)
 		fprintf (stderr, ", ");
 	    }
 	  fprintf (stderr, "); %s [%4d]\n",
-		   rs6000_builtin_info_x[i].attr_string, (int) i);
+		   rs6000_builtin_info[i].attr_string, (int) i);
 	}
       fprintf (stderr, "\nEnd autogenerated built-in functions.\n\n\n");
      }
 
   altivec_builtin_mask_for_load
-    = rs6000_builtin_decls_x[RS6000_BIF_MASK_FOR_LOAD];
+    = rs6000_builtin_decls[RS6000_BIF_MASK_FOR_LOAD];
 
 #ifdef SUBTARGET_INIT_BUILTINS
   SUBTARGET_INIT_BUILTINS;
@@ -6335,7 +6335,7 @@ rs6000_builtin_decl (unsigned code, bool /* initialize_p */)
   if (fcode >= RS6000_OVLD_MAX)
     return error_mark_node;
 
-  return rs6000_builtin_decls_x[code];
+  return rs6000_builtin_decls[code];
 }
 
 /* Return the internal arg pointer used for function incoming
diff --git a/gcc/config/rs6000/rs6000-gen-builtins.c b/gcc/config/rs6000/rs6000-gen-builtins.c
index 114289a0034..f1a9d1f0e63 100644
--- a/gcc/config/rs6000/rs6000-gen-builtins.c
+++ b/gcc/config/rs6000/rs6000-gen-builtins.c
@@ -2208,7 +2208,7 @@ write_decls (void)
   fprintf (header_file, "  RS6000_OVLD_MAX\n};\n\n");
 
   fprintf (header_file,
-	   "extern GTY(()) tree rs6000_builtin_decls_x[RS6000_OVLD_MAX];\n\n");
+	   "extern GTY(()) tree rs6000_builtin_decls[RS6000_OVLD_MAX];\n\n");
 
   fprintf (header_file,
 	   "enum rs6000_ovld_instances\n{\n  RS6000_INST_NONE,\n");
@@ -2336,9 +2336,6 @@ write_decls (void)
 	   "#define bif_is_endian(x)\t((x).bifattrs & bif_endian_bit)\n");
   fprintf (header_file, "\n");
 
-  /* #### Note that the _x is added for now to avoid conflict with
-     the existing rs6000_builtin_info[] file while testing.  It will
-     be removed as we progress.  */
   /* #### Cannot mark this as a GC root because only pointer types can
      be marked as GTY((user)) and be GC roots.  All trees in here are
      kept alive by other globals, so not a big deal.  Alternatively,
@@ -2346,7 +2343,7 @@ write_decls (void)
      to avoid requiring a GTY((user)) designation, but that seems
      unnecessarily gross.  */
   fprintf (header_file,
-	   "extern bifdata rs6000_builtin_info_x[RS6000_BIF_MAX];\n\n");
+	   "extern bifdata rs6000_builtin_info[RS6000_BIF_MAX];\n\n");
 
   fprintf (header_file, "struct GTY((user)) ovlddata\n");
   fprintf (header_file, "{\n");
@@ -2495,12 +2492,12 @@ write_header_file (void)
   return 1;
 }
 
-/* Write the decl and initializer for rs6000_builtin_info_x[].  */
+/* Write the decl and initializer for rs6000_builtin_info[].  */
 static void
 write_bif_static_init (void)
 {
   const char *res[3];
-  fprintf (init_file, "bifdata rs6000_builtin_info_x[RS6000_BIF_MAX] =\n");
+  fprintf (init_file, "bifdata rs6000_builtin_info[RS6000_BIF_MAX] =\n");
   fprintf (init_file, "  {\n");
   fprintf (init_file, "    { /* RS6000_BIF_NONE: */\n");
   fprintf (init_file, "      \"\", ENB_ALWAYS, 0, CODE_FOR_nothing, 0,\n");
@@ -2665,7 +2662,7 @@ write_init_bif_table (void)
   for (int i = 0; i <= curr_bif; i++)
     {
       fprintf (init_file,
-	       "  rs6000_builtin_info_x[RS6000_BIF_%s].fntype"
+	       "  rs6000_builtin_info[RS6000_BIF_%s].fntype"
 	       "\n    = %s;\n",
 	       bifs[i].idname, bifs[i].fndecl);
 
@@ -2692,7 +2689,7 @@ write_init_bif_table (void)
 	}
 
       fprintf (init_file,
-	       "  rs6000_builtin_decls_x[(int)RS6000_BIF_%s] = t\n",
+	       "  rs6000_builtin_decls[(int)RS6000_BIF_%s] = t\n",
 	       bifs[i].idname);
       fprintf (init_file,
 	       "    = add_builtin_function (\"%s\",\n",
@@ -2733,7 +2730,7 @@ write_init_bif_table (void)
 	  fprintf (init_file, "    }\n");
 	  fprintf (init_file, "  else\n");
 	  fprintf (init_file, "    {\n");
-	  fprintf (init_file, "      rs6000_builtin_decls_x"
+	  fprintf (init_file, "      rs6000_builtin_decls"
 		   "[(int)RS6000_BIF_%s] = NULL_TREE;\n", bifs[i].idname);
 	  fprintf (init_file, "    }\n");
 	}
@@ -2786,7 +2783,7 @@ write_init_ovld_table (void)
 	    }
 
 	  fprintf (init_file,
-		   "  rs6000_builtin_decls_x[(int)RS6000_OVLD_%s] = t\n",
+		   "  rs6000_builtin_decls[(int)RS6000_OVLD_%s] = t\n",
 		   stanza->stanza_id);
 	  fprintf (init_file,
 		   "    = add_builtin_function (\"%s\",\n",
@@ -2835,7 +2832,7 @@ write_init_file (void)
   fprintf (init_file, "#include \"rs6000-builtins.h\"\n");
   fprintf (init_file, "\n");
 
-  fprintf (init_file, "tree rs6000_builtin_decls_x[RS6000_OVLD_MAX];\n\n");
+  fprintf (init_file, "tree rs6000_builtin_decls[RS6000_OVLD_MAX];\n\n");
 
   write_bif_static_init ();
   write_ovld_static_init ();
@@ -2851,11 +2848,11 @@ write_init_file (void)
   fprintf (init_file, "\n");
 
   fprintf (init_file,
-	   "  rs6000_builtin_decls_x[RS6000_BIF_NONE] = NULL_TREE;\n");
+	   "  rs6000_builtin_decls[RS6000_BIF_NONE] = NULL_TREE;\n");
   fprintf (init_file,
-	   "  rs6000_builtin_decls_x[RS6000_BIF_MAX] = NULL_TREE;\n");
+	   "  rs6000_builtin_decls[RS6000_BIF_MAX] = NULL_TREE;\n");
   fprintf (init_file,
-	   "  rs6000_builtin_decls_x[RS6000_OVLD_NONE] = NULL_TREE;\n\n");
+	   "  rs6000_builtin_decls[RS6000_OVLD_NONE] = NULL_TREE;\n\n");
 
   write_init_bif_table ();
   write_init_ovld_table ();
diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c
index bc17c53760d..93cd0610ed3 100644
--- a/gcc/config/rs6000/rs6000.c
+++ b/gcc/config/rs6000/rs6000.c
@@ -5596,95 +5596,95 @@ rs6000_builtin_vectorized_function (unsigned int fn, tree type_out,
       if (VECTOR_UNIT_VSX_P (V2DFmode)
 	  && out_mode == DFmode && out_n == 2
 	  && in_mode == DFmode && in_n == 2)
-	return rs6000_builtin_decls_x[RS6000_BIF_CPSGNDP];
+	return rs6000_builtin_decls[RS6000_BIF_CPSGNDP];
       if (VECTOR_UNIT_VSX_P (V4SFmode)
 	  && out_mode == SFmode && out_n == 4
 	  && in_mode == SFmode && in_n == 4)
-	return rs6000_builtin_decls_x[RS6000_BIF_CPSGNSP];
+	return rs6000_builtin_decls[RS6000_BIF_CPSGNSP];
       if (VECTOR_UNIT_ALTIVEC_P (V4SFmode)
 	  && out_mode == SFmode && out_n == 4
 	  && in_mode == SFmode && in_n == 4)
-	return rs6000_builtin_decls_x[RS6000_BIF_COPYSIGN_V4SF];
+	return rs6000_builtin_decls[RS6000_BIF_COPYSIGN_V4SF];
       break;
     CASE_CFN_CEIL:
       if (VECTOR_UNIT_VSX_P (V2DFmode)
 	  && out_mode == DFmode && out_n == 2
 	  && in_mode == DFmode && in_n == 2)
-	return rs6000_builtin_decls_x[RS6000_BIF_XVRDPIP];
+	return rs6000_builtin_decls[RS6000_BIF_XVRDPIP];
       if (VECTOR_UNIT_VSX_P (V4SFmode)
 	  && out_mode == SFmode && out_n == 4
 	  && in_mode == SFmode && in_n == 4)
-	return rs6000_builtin_decls_x[RS6000_BIF_XVRSPIP];
+	return rs6000_builtin_decls[RS6000_BIF_XVRSPIP];
       if (VECTOR_UNIT_ALTIVEC_P (V4SFmode)
 	  && out_mode == SFmode && out_n == 4
 	  && in_mode == SFmode && in_n == 4)
-	return rs6000_builtin_decls_x[RS6000_BIF_VRFIP];
+	return rs6000_builtin_decls[RS6000_BIF_VRFIP];
       break;
     CASE_CFN_FLOOR:
       if (VECTOR_UNIT_VSX_P (V2DFmode)
 	  && out_mode == DFmode && out_n == 2
 	  && in_mode == DFmode && in_n == 2)
-	return rs6000_builtin_decls_x[RS6000_BIF_XVRDPIM];
+	return rs6000_builtin_decls[RS6000_BIF_XVRDPIM];
       if (VECTOR_UNIT_VSX_P (V4SFmode)
 	  && out_mode == SFmode && out_n == 4
 	  && in_mode == SFmode && in_n == 4)
-	return rs6000_builtin_decls_x[RS6000_BIF_XVRSPIM];
+	return rs6000_builtin_decls[RS6000_BIF_XVRSPIM];
       if (VECTOR_UNIT_ALTIVEC_P (V4SFmode)
 	  && out_mode == SFmode && out_n == 4
 	  && in_mode == SFmode && in_n == 4)
-	return rs6000_builtin_decls_x[RS6000_BIF_VRFIM];
+	return rs6000_builtin_decls[RS6000_BIF_VRFIM];
       break;
     CASE_CFN_FMA:
       if (VECTOR_UNIT_VSX_P (V2DFmode)
 	  && out_mode == DFmode && out_n == 2
 	  && in_mode == DFmode && in_n == 2)
-	return rs6000_builtin_decls_x[RS6000_BIF_XVMADDDP];
+	return rs6000_builtin_decls[RS6000_BIF_XVMADDDP];
       if (VECTOR_UNIT_VSX_P (V4SFmode)
 	  && out_mode == SFmode && out_n == 4
 	  && in_mode == SFmode && in_n == 4)
-	return rs6000_builtin_decls_x[RS6000_BIF_XVMADDSP];
+	return rs6000_builtin_decls[RS6000_BIF_XVMADDSP];
       if (VECTOR_UNIT_ALTIVEC_P (V4SFmode)
 	  && out_mode == SFmode && out_n == 4
 	  && in_mode == SFmode && in_n == 4)
-	return rs6000_builtin_decls_x[RS6000_BIF_VMADDFP];
+	return rs6000_builtin_decls[RS6000_BIF_VMADDFP];
       break;
     CASE_CFN_TRUNC:
       if (VECTOR_UNIT_VSX_P (V2DFmode)
 	  && out_mode == DFmode && out_n == 2
 	  && in_mode == DFmode && in_n == 2)
-	return rs6000_builtin_decls_x[RS6000_BIF_XVRDPIZ];
+	return rs6000_builtin_decls[RS6000_BIF_XVRDPIZ];
       if (VECTOR_UNIT_VSX_P (V4SFmode)
 	  && out_mode == SFmode && out_n == 4
 	  && in_mode == SFmode && in_n == 4)
-	return rs6000_builtin_decls_x[RS6000_BIF_XVRSPIZ];
+	return rs6000_builtin_decls[RS6000_BIF_XVRSPIZ];
       if (VECTOR_UNIT_ALTIVEC_P (V4SFmode)
 	  && out_mode == SFmode && out_n == 4
 	  && in_mode == SFmode && in_n == 4)
-	return rs6000_builtin_decls_x[RS6000_BIF_VRFIZ];
+	return rs6000_builtin_decls[RS6000_BIF_VRFIZ];
       break;
     CASE_CFN_NEARBYINT:
       if (VECTOR_UNIT_VSX_P (V2DFmode)
 	  && flag_unsafe_math_optimizations
 	  && out_mode == DFmode && out_n == 2
 	  && in_mode == DFmode && in_n == 2)
-	return rs6000_builtin_decls_x[RS6000_BIF_XVRDPI];
+	return rs6000_builtin_decls[RS6000_BIF_XVRDPI];
       if (VECTOR_UNIT_VSX_P (V4SFmode)
 	  && flag_unsafe_math_optimizations
 	  && out_mode == SFmode && out_n == 4
 	  && in_mode == SFmode && in_n == 4)
-	return rs6000_builtin_decls_x[RS6000_BIF_XVRSPI];
+	return rs6000_builtin_decls[RS6000_BIF_XVRSPI];
       break;
     CASE_CFN_RINT:
       if (VECTOR_UNIT_VSX_P (V2DFmode)
 	  && !flag_trapping_math
 	  && out_mode == DFmode && out_n == 2
 	  && in_mode == DFmode && in_n == 2)
-	return rs6000_builtin_decls_x[RS6000_BIF_XVRDPIC];
+	return rs6000_builtin_decls[RS6000_BIF_XVRDPIC];
       if (VECTOR_UNIT_VSX_P (V4SFmode)
 	  && !flag_trapping_math
 	  && out_mode == SFmode && out_n == 4
 	  && in_mode == SFmode && in_n == 4)
-	return rs6000_builtin_decls_x[RS6000_BIF_XVRSPIC];
+	return rs6000_builtin_decls[RS6000_BIF_XVRSPIC];
       break;
     default:
       break;
@@ -5731,25 +5731,25 @@ rs6000_builtin_md_vectorized_function (tree fndecl, tree type_out,
       if (VECTOR_UNIT_ALTIVEC_OR_VSX_P (V4SFmode)
 	  && out_mode == SFmode && out_n == 4
 	  && in_mode == SFmode && in_n == 4)
-	return rs6000_builtin_decls_x[RS6000_BIF_VRSQRTFP];
+	return rs6000_builtin_decls[RS6000_BIF_VRSQRTFP];
       break;
     case RS6000_BIF_RSQRT:
       if (VECTOR_UNIT_VSX_P (V2DFmode)
 	  && out_mode == DFmode && out_n == 2
 	  && in_mode == DFmode && in_n == 2)
-	return rs6000_builtin_decls_x[RS6000_BIF_RSQRT_2DF];
+	return rs6000_builtin_decls[RS6000_BIF_RSQRT_2DF];
       break;
     case RS6000_BIF_RECIPF:
       if (VECTOR_UNIT_ALTIVEC_OR_VSX_P (V4SFmode)
 	  && out_mode == SFmode && out_n == 4
 	  && in_mode == SFmode && in_n == 4)
-	return rs6000_builtin_decls_x[RS6000_BIF_VRECIPFP];
+	return rs6000_builtin_decls[RS6000_BIF_VRECIPFP];
       break;
     case RS6000_BIF_RECIP:
       if (VECTOR_UNIT_VSX_P (V2DFmode)
 	  && out_mode == DFmode && out_n == 2
 	  && in_mode == DFmode && in_n == 2)
-	return rs6000_builtin_decls_x[RS6000_BIF_RECIP_V2DF];
+	return rs6000_builtin_decls[RS6000_BIF_RECIP_V2DF];
       break;
     default:
       break;
@@ -5804,7 +5804,7 @@ rs6000_builtin_md_vectorized_function (tree fndecl, tree type_out,
 	}
 
       if (in_mode == exp_mode && in_vmode == exp_vmode)
-	return rs6000_builtin_decls_x[bif];
+	return rs6000_builtin_decls[bif];
     }
 
   return NULL_TREE;
@@ -22496,13 +22496,13 @@ rs6000_builtin_reciprocal (tree fndecl)
       if (!RS6000_RECIP_AUTO_RSQRTE_P (V2DFmode))
 	return NULL_TREE;
 
-      return rs6000_builtin_decls_x[RS6000_BIF_RSQRT_2DF];
+      return rs6000_builtin_decls[RS6000_BIF_RSQRT_2DF];
 
     case RS6000_BIF_XVSQRTSP:
       if (!RS6000_RECIP_AUTO_RSQRTE_P (V4SFmode))
 	return NULL_TREE;
 
-      return rs6000_builtin_decls_x[RS6000_BIF_RSQRT_4SF];
+      return rs6000_builtin_decls[RS6000_BIF_RSQRT_4SF];
 
     default:
       return NULL_TREE;
@@ -25124,7 +25124,7 @@ add_condition_to_bb (tree function_decl, tree version_decl,
 
   tree bool_zero = build_int_cst (bool_int_type_node, 0);
   tree cond_var = create_tmp_var (bool_int_type_node);
-  tree predicate_decl = rs6000_builtin_decls_x[(int) RS6000_BIF_CPU_SUPPORTS];
+  tree predicate_decl = rs6000_builtin_decls[(int) RS6000_BIF_CPU_SUPPORTS];
   const char *arg_str = rs6000_clone_map[clone_isa].name;
   tree predicate_arg = build_string_literal (strlen (arg_str) + 1, arg_str);
   gimple *call_cond_stmt = gimple_build_call (predicate_decl, 1, predicate_arg);
@@ -27764,8 +27764,8 @@ rs6000_atomic_assign_expand_fenv (tree *hold, tree *clear, tree *update)
       return;
     }
 
-  tree mffs = rs6000_builtin_decls_x[RS6000_BIF_MFFS];
-  tree mtfsf = rs6000_builtin_decls_x[RS6000_BIF_MTFSF];
+  tree mffs = rs6000_builtin_decls[RS6000_BIF_MFFS];
+  tree mtfsf = rs6000_builtin_decls[RS6000_BIF_MTFSF];
   tree call_mffs = build_call_expr (mffs, 0);
 
   /* Generates the equivalent of feholdexcept (&fenv_var)
-- 
2.27.0

Re: [PATCH 0/6] rs6000: Remove "old" built-in function infrastructure

[Bill Schmidt]

I had difficulty with patch 1/6 being too large, and there have been some small
upstream changes in this area, so I will resubmit this series shortly.  There
were also problems with my SMTP server for some of the CCs as well...

Sorry for the churn!
Bill

On 12/3/21 12:22 PM, Bill Schmidt wrote:
> From: Bill Schmidt <wschmidt@linux.ibm.com>
>
> Hi!
>
> Now that the new built-in function support is all upstream and enabled, it
> seems safe and prudent to remove the old code to avoid confusion.  I broke this
> up to the extent possible, but the first patch is a bit large and messy because
> so many dead functions have to be removed when taking out the
> "new_builtins_are_live" variable.
>
> Bill Schmidt (6):
>   rs6000: Remove new_builtins_are_live and dead code it was guarding
>   rs6000: Remove altivec_overloaded_builtins array and initialization
>   rs6000: Rename rs6000-builtin-new.def to rs6000-builtins.def
>   rs6000: Remove rs6000-builtin.def and associated data and functions
>   rs6000: Rename functions with "new" in their names
>   rs6000: Rename arrays to remove temporary _x suffix
>
>  gcc/config/rs6000/darwin.h                    |     8 +-
>  gcc/config/rs6000/rs6000-builtin.def          |  3350 ---
>  ...00-builtin-new.def => rs6000-builtins.def} |     0
>  gcc/config/rs6000/rs6000-c.c                  |  1342 +-
>  gcc/config/rs6000/rs6000-call.c               | 17810 +++-------------
>  gcc/config/rs6000/rs6000-gen-builtins.c       |   115 +-
>  gcc/config/rs6000/rs6000-internal.h           |     2 +-
>  gcc/config/rs6000/rs6000-protos.h             |     3 -
>  gcc/config/rs6000/rs6000.c                    |   334 +-
>  gcc/config/rs6000/rs6000.h                    |    58 -
>  gcc/config/rs6000/t-rs6000                    |     7 +-
>  11 files changed, 3173 insertions(+), 19856 deletions(-)
>  delete mode 100644 gcc/config/rs6000/rs6000-builtin.def
>  rename gcc/config/rs6000/{rs6000-builtin-new.def => rs6000-builtins.def} (100%)
>