From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mx0b-001b2d01.pphosted.com (mx0b-001b2d01.pphosted.com [148.163.158.5]) by sourceware.org (Postfix) with ESMTPS id 139EB3858D33 for ; Fri, 17 Feb 2023 05:08:17 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 139EB3858D33 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=linux.vnet.ibm.com Authentication-Results: sourceware.org; spf=none smtp.mailfrom=linux.vnet.ibm.com Received: from pps.filterd (m0127361.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 31H4BhwY008045; Fri, 17 Feb 2023 05:08:16 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ibm.com; h=message-id : date : mime-version : subject : to : cc : references : from : in-reply-to : content-type : content-transfer-encoding; s=pp1; bh=KE0llb+YzPsnGgfxZV4hs34yDPhH+b2/cnqpk8J5kco=; b=F27K393egJjTs0NgbQMn6arpSnTeSrkZ7o+55m31AkyaVqHIX6PeewsieMMDDAp1zyrO /UmFUmlGCLtMlw7SP6AWej2/Wws31LmjiXCFOQVHumMk7WRTR5W0NSGY43qg9sygWH8e K911MMLQhuKXj4FJ1HiTvsku3F3mGC7GKJuNGhTapsQ9Vo78S1Dke7UZaJ9SlFib5zLD 9KFG58FnsOVolfRIMD+tugO+HEvKi304IInVYopIi7ZkDJLPA7Pg6fDvniEm5Ov7s3MV LSciwfTXk8WkadgwAiiXttDAYs4vlLPyjjXGrP3Bi/Hxyu5wnoiySBzUjbs2zCKAGLgS Gw== Received: from ppma02dal.us.ibm.com (a.bd.3ea9.ip4.static.sl-reverse.com [169.62.189.10]) by mx0a-001b2d01.pphosted.com (PPS) with ESMTPS id 3nsnmfm0p1-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 17 Feb 2023 05:08:16 +0000 Received: from pps.filterd (ppma02dal.us.ibm.com [127.0.0.1]) by ppma02dal.us.ibm.com (8.17.1.19/8.17.1.19) with ESMTP id 31H2ZVvx024146; Fri, 17 Feb 2023 05:08:15 GMT Received: from smtprelay07.wdc07v.mail.ibm.com ([9.208.129.116]) by ppma02dal.us.ibm.com (PPS) with ESMTPS id 3np2n7whjy-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 17 Feb 2023 05:08:15 +0000 Received: from smtpav05.dal12v.mail.ibm.com (smtpav05.dal12v.mail.ibm.com [10.241.53.104]) by smtprelay07.wdc07v.mail.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 31H58Dil2556548 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Fri, 17 Feb 2023 05:08:13 GMT Received: from smtpav05.dal12v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 50A0E5805D; Fri, 17 Feb 2023 05:08:13 +0000 (GMT) Received: from smtpav05.dal12v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id A79FB58068; Fri, 17 Feb 2023 05:08:11 +0000 (GMT) Received: from [9.43.103.4] (unknown [9.43.103.4]) by smtpav05.dal12v.mail.ibm.com (Postfix) with ESMTP; Fri, 17 Feb 2023 05:08:11 +0000 (GMT) Message-ID: Date: Fri, 17 Feb 2023 10:38:10 +0530 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Macintosh; Intel Mac OS X 10.15; rv:102.0) Gecko/20100101 Thunderbird/102.7.2 Subject: Re: [PING 2] [PATCH] swap: Fix incorrect lane extraction by vec_extract() [PR106770] Content-Language: en-US To: GCC Patches Cc: Peter Bergner , Segher Boessenkool , meissner@linux.ibm.com, "Kewen.Lin" References: From: Surya Kumari Jangala In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-TM-AS-GCONF: 00 X-Proofpoint-GUID: oSbCyxWRfhOV_1vwuxqZEZE-QYYrXDBN X-Proofpoint-ORIG-GUID: oSbCyxWRfhOV_1vwuxqZEZE-QYYrXDBN X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.219,Aquarius:18.0.930,Hydra:6.0.562,FMLib:17.11.170.22 definitions=2023-02-17_02,2023-02-16_01,2023-02-09_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 malwarescore=0 phishscore=0 mlxscore=0 mlxlogscore=999 priorityscore=1501 adultscore=0 suspectscore=0 bulkscore=0 impostorscore=0 spamscore=0 clxscore=1011 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2212070000 definitions=main-2302170045 X-Spam-Status: No, score=-11.9 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_EF,GIT_PATCH_0,KAM_SHORT,NICE_REPLY_A,RCVD_IN_MSPIKE_H2,SPF_HELO_NONE,SPF_NONE,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: Ping. Please review the patch. On 12/01/23 10:21 pm, Surya Kumari Jangala via Gcc-patches wrote: > Ping > > On 04/01/23 1:58 pm, Surya Kumari Jangala via Gcc-patches wrote: >> swap: Fix incorrect lane extraction by vec_extract() [PR106770] >> >> In the routine rs6000_analyze_swaps(), special handling of swappable >> instructions is done even if the webs that contain the swappable >> instructions are not optimized, i.e., the webs do not contain any >> permuting load/store instructions along with the associated register >> swap instructions. Doing special handling in such webs will result in >> the extracted lane being adjusted unnecessarily for vec_extract. >> >> Modifying swappable instructions is also incorrect in webs where >> loads/stores on quad word aligned addresses are changed to lvx/stvx. >> Similarly, in webs where swap(load(vector constant)) instructions are >> replaced with load(swapped vector constant), the swappable >> instructions should not be modified. >> >> 2023-01-04 Surya Kumari Jangala >> >> gcc/ >> PR rtl-optimization/106770 >> * rs6000-p8swap.cc (rs6000_analyze_swaps): . >> >> gcc/testsuite/ >> PR rtl-optimization/106770 >> * gcc.target/powerpc/pr106770.c: New test. >> --- >> >> diff --git a/gcc/config/rs6000/rs6000-p8swap.cc b/gcc/config/rs6000/rs6000-p8swap.cc >> index 19fbbfb67dc..7ed39251df9 100644 >> --- a/gcc/config/rs6000/rs6000-p8swap.cc >> +++ b/gcc/config/rs6000/rs6000-p8swap.cc >> @@ -179,6 +179,9 @@ class swap_web_entry : public web_entry_base >> unsigned int special_handling : 4; >> /* Set if the web represented by this entry cannot be optimized. */ >> unsigned int web_not_optimizable : 1; >> + /* Set if the web represented by this entry has been optimized, ie, >> + register swaps of permuting loads/stores have been removed. */ >> + unsigned int web_is_optimized : 1; >> /* Set if this insn should be deleted. */ >> unsigned int will_delete : 1; >> }; >> @@ -2627,22 +2630,43 @@ rs6000_analyze_swaps (function *fun) >> /* For each load and store in an optimizable web (which implies >> the loads and stores are permuting), find the associated >> register swaps and mark them for removal. Due to various >> - optimizations we may mark the same swap more than once. Also >> - perform special handling for swappable insns that require it. */ >> + optimizations we may mark the same swap more than once. Fix up >> + the non-permuting loads and stores by converting them into >> + permuting ones. */ >> for (i = 0; i < e; ++i) >> if ((insn_entry[i].is_load || insn_entry[i].is_store) >> && insn_entry[i].is_swap) >> { >> swap_web_entry* root_entry >> = (swap_web_entry*)((&insn_entry[i])->unionfind_root ()); >> - if (!root_entry->web_not_optimizable) >> + if (!root_entry->web_not_optimizable) { >> mark_swaps_for_removal (insn_entry, i); >> + root_entry->web_is_optimized = true; >> + } >> } >> - else if (insn_entry[i].is_swappable && insn_entry[i].special_handling) >> + else if (insn_entry[i].is_swappable >> + && (insn_entry[i].special_handling == SH_NOSWAP_LD || >> + insn_entry[i].special_handling == SH_NOSWAP_ST)) >> + { >> + swap_web_entry* root_entry >> + = (swap_web_entry*)((&insn_entry[i])->unionfind_root ()); >> + if (!root_entry->web_not_optimizable) { >> + handle_special_swappables (insn_entry, i); >> + root_entry->web_is_optimized = true; >> + } >> + } >> + >> + /* Perform special handling for swappable insns that require it. >> + Note that special handling should be done only for those >> + swappable insns that are present in webs optimized above. */ >> + for (i = 0; i < e; ++i) >> + if (insn_entry[i].is_swappable && insn_entry[i].special_handling && >> + !(insn_entry[i].special_handling == SH_NOSWAP_LD || >> + insn_entry[i].special_handling == SH_NOSWAP_ST)) >> { >> swap_web_entry* root_entry >> = (swap_web_entry*)((&insn_entry[i])->unionfind_root ()); >> - if (!root_entry->web_not_optimizable) >> + if (root_entry->web_is_optimized) >> handle_special_swappables (insn_entry, i); >> } >> >> diff --git a/gcc/testsuite/gcc.target/powerpc/pr106770.c b/gcc/testsuite/gcc.target/powerpc/pr106770.c >> new file mode 100644 >> index 00000000000..84e9aead975 >> --- /dev/null >> +++ b/gcc/testsuite/gcc.target/powerpc/pr106770.c >> @@ -0,0 +1,20 @@ >> +/* { dg-do compile } */ >> +/* { dg-require-effective-target powerpc_p8vector_ok } */ >> +/* { dg-options "-mdejagnu-cpu=power8 -O3 " } */ >> +/* { dg-final { scan-assembler-times "xxpermdi" 2 } } */ >> + >> +/* Test case to resolve PR106770 */ >> + >> +#include >> + >> +int cmp2(double a, double b) >> +{ >> + vector double va = vec_promote(a, 1); >> + vector double vb = vec_promote(b, 1); >> + vector long long vlt = (vector long long)vec_cmplt(va, vb); >> + vector long long vgt = (vector long long)vec_cmplt(vb, va); >> + vector signed long long vr = vec_sub(vlt, vgt); >> + >> + return vec_extract(vr, 1); >> +} >> +