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From: HAO CHEN GUI <guihaoc@linux.ibm.com>
To: gcc-patches <gcc-patches@gcc.gnu.org>
Cc: Segher Boessenkool <segher@kernel.crashing.org>,
	David <dje.gcc@gmail.com>, "Kewen.Lin" <linkw@linux.ibm.com>,
	Peter Bergner <bergner@linux.ibm.com>
Subject: [PATCH v3, rs6000] Enable have_cbranchcc4 on rs6000
Date: Tue, 6 Dec 2022 13:44:49 +0800	[thread overview]
Message-ID: <f321ea49-6adb-7f28-aa98-13168b961e3c@linux.ibm.com> (raw)

Hi,
  This patch enables "have_cbranchcc4" on rs6000 by defining
a "cbranchcc4" expander. "have_cbrnachcc4" is a flag in ifcvt.cc
to indicate if branch by CC bits is invalid or not. With this
flag enabled, some branches can be optimized to conditional
moves.

  The patch relies on the former patch which is under review.
https://gcc.gnu.org/pipermail/gcc-patches/2022-December/607810.html

  Bootstrapped and tested on powerpc64-linux BE and LE with no
regressions. Is this okay for trunk? Any recommendations? Thanks
a lot.

Thanks
Gui Haochen

ChangeLog
2022-12-06  Haochen Gui <guihaoc@linux.ibm.com>

gcc/
	* config/rs6000/rs6000.md (cbranchcc4): New expander.

gcc/testsuite
	* gcc.target/powerpc/cbranchcc4.c: New.
	* gcc.target/powerpc/cbranchcc4-1.c: New.


patch.diff
diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index e9e5cd1e54d..d7ddd96cc70 100644
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -11932,6 +11932,16 @@ (define_expand "cbranch<mode>4"
   DONE;
 })

+(define_expand "cbranchcc4"
+  [(set (pc)
+	(if_then_else (match_operator 0 "branch_comparison_operator"
+			[(match_operand 1 "cc_reg_operand")
+			 (match_operand 2 "zero_constant")])
+		      (label_ref (match_operand 3))
+		      (pc)))]
+  ""
+  "")
+
 (define_expand "cstore<mode>4_signed"
   [(use (match_operator 1 "signed_comparison_operator"
          [(match_operand:P 2 "gpc_reg_operand")
diff --git a/gcc/testsuite/gcc.target/powerpc/cbranchcc4-1.c b/gcc/testsuite/gcc.target/powerpc/cbranchcc4-1.c
new file mode 100644
index 00000000000..3c8286bf091
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/cbranchcc4-1.c
@@ -0,0 +1,17 @@
+/* { dg-do compile } */
+/* { dg-options "-O2" */
+
+/* This case should be successfully compiled after cbranchcc4 is enabled.  It
+   generates a "*cbranch_2insn" insn which makes predicate check of cbranchcc4
+   failed and returns a NULL rtx from prepare_cmp_insn.  */
+
+int foo (double d)
+{
+  if (d == 0.0)
+    return 0;
+
+  d = ((d) >= 0 ? (d) : -(d));
+
+  if (d < 1.0)
+    return 1;
+}
diff --git a/gcc/testsuite/gcc.target/powerpc/cbranchcc4.c b/gcc/testsuite/gcc.target/powerpc/cbranchcc4.c
new file mode 100644
index 00000000000..528ba1a878d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/cbranchcc4.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -fdump-rtl-ce1" } */
+/* { dg-final { scan-rtl-dump "noce_try_store_flag_constants" "ce1" } } */
+
+/* The inner branch should be detected by ifcvt then be converted to a setcc
+   with a plus by noce_try_store_flag_constants.  */
+
+int test (unsigned int a, unsigned int b)
+{
+    return (a < b ? 0 : (a > b ? 2 : 1));
+}

             reply	other threads:[~2022-12-06  5:44 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-12-06  5:44 HAO CHEN GUI [this message]
2022-12-07  3:06 ` Kewen.Lin
2022-12-07  5:24   ` HAO CHEN GUI
2022-12-07  5:50     ` Kewen.Lin

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