From: Jeff Law <jeffreyalaw@gmail.com>
To: Manolis Tsamis <manolis.tsamis@vrull.eu>, gcc-patches@gcc.gnu.org
Cc: Richard Biener <richard.guenther@gmail.com>,
Palmer Dabbelt <palmer@rivosinc.com>,
Philipp Tomsich <philipp.tomsich@vrull.eu>,
Kito Cheng <kito.cheng@gmail.com>
Subject: Re: [PATCH 0/2] RISC-V: New pass to optimize calculation of offsets for memory operations.
Date: Thu, 15 Jun 2023 09:04:38 -0600 [thread overview]
Message-ID: <f3343623-5746-4ad0-fad3-c872614ab8c4@gmail.com> (raw)
In-Reply-To: <dd4c44f5-1fa7-c0b0-996a-5dc8f6871dcd@gmail.com>
On 5/25/23 07:42, Jeff Law wrote:
> Thanks Manolis. Do you happen to know if this includes the fixes I
> passed along to Philipp a few months back? My recollection is one fixed
> stale DF data which prevented an ICE during bootstrapping, the other
> needed to ignore debug insns in one or two places so that the behavior
> didn't change based on the existence of debug insns.
So we stumbled over another relatively minor issue in this code this
week that I'm sure you'll want to fix for a V2.
Specifically fold_offset's "scale" argument needs to be a HOST_WIDE_INT
rather than an "int". Inside the ASHIFT handling you need to change the
type of shift_scale to a HOST_WIDE_INT as well and potentially the
actual computation of shift_scale.
The problem is if you have a compile-time constant address on rv64, it
might be constructed with code like this:
> (insn 282 47 283 6 (set (reg:DI 14 a4 [267])
> (const_int 348160 [0x55000])) "test_dbmd_pucinterruptenable_rw.c":18:31 179 {*movdi_64bit}
> (nil))
> (insn 283 282 284 6 (set (reg:DI 14 a4 [267])
> (plus:DI (reg:DI 14 a4 [267])
> (const_int 1365 [0x555]))) "test_dbmd_pucinterruptenable_rw.c":18:31 5 {riscv_adddi3}
> (expr_list:REG_EQUAL (const_int 349525 [0x55555])
> (nil)))
> (insn 284 283 285 6 (set (reg:DI 13 a3 [268])
> (const_int 1431662592 [0x55557000])) "test_dbmd_pucinterruptenable_rw.c":18:31 179 {*movdi_64bit}
> (nil))
> (insn 285 284 215 6 (set (reg:DI 13 a3 [268])
> (plus:DI (reg:DI 13 a3 [268])
> (const_int 4 [0x4]))) "test_dbmd_pucinterruptenable_rw.c":18:31 5 {riscv_adddi3}
> (expr_list:REG_EQUAL (const_int 1431662596 [0x55557004])
> (nil)))
> (insn 215 285 216 6 (set (reg:DI 14 a4 [271])
> (ashift:DI (reg:DI 14 a4 [267])
> (const_int 32 [0x20]))) "test_dbmd_pucinterruptenable_rw.c":18:31 204 {ashldi3}
> (nil))
> (insn 216 215 42 6 (set (reg/f:DI 14 a4 [166])
> (plus:DI (reg:DI 14 a4 [271])
> (reg:DI 13 a3 [268]))) "test_dbmd_pucinterruptenable_rw.c":18:31 5 {riscv_adddi3}
> (expr_list:REG_DEAD (reg:DI 13 a3 [268])
> (expr_list:REG_EQUIV (const_int 1501199875796996 [0x5555555557004])
> (nil))))
Note that 32bit ASHIFT in insn 215. If you're doing that computation in
a 32bit integer type, then it's going to shift off the end of the type.
Jeff
next prev parent reply other threads:[~2023-06-15 15:04 UTC|newest]
Thread overview: 45+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-05-25 12:35 Manolis Tsamis
2023-05-25 12:35 ` [PATCH 1/2] Implementation of new RISCV optimizations pass: fold-mem-offsets Manolis Tsamis
2023-05-25 13:01 ` Richard Biener
2023-05-25 13:25 ` Manolis Tsamis
2023-05-25 13:31 ` Jeff Law
2023-05-25 13:50 ` Richard Biener
2023-05-25 14:02 ` Manolis Tsamis
2023-05-29 23:30 ` Jeff Law
2023-05-31 12:19 ` Manolis Tsamis
2023-05-31 14:00 ` Jeff Law
2023-05-25 14:13 ` Jeff Law
2023-05-25 14:18 ` Philipp Tomsich
2023-06-08 5:37 ` Jeff Law
2023-06-12 7:36 ` Manolis Tsamis
2023-06-12 14:37 ` Jeff Law
2023-06-09 0:57 ` Jeff Law
2023-06-12 7:32 ` Manolis Tsamis
2023-06-12 21:58 ` Jeff Law
2023-06-15 17:34 ` Manolis Tsamis
2023-06-10 15:49 ` Jeff Law
2023-06-12 7:41 ` Manolis Tsamis
2023-06-12 21:36 ` Jeff Law
2023-05-25 12:35 ` [PATCH 2/2] cprop_hardreg: Enable propagation of the stack pointer if possible Manolis Tsamis
2023-05-25 13:38 ` Jeff Law
2023-05-31 12:15 ` Manolis Tsamis
2023-06-07 22:16 ` Jeff Law
2023-06-07 22:18 ` Jeff Law
2023-06-08 6:15 ` Manolis Tsamis
2023-06-15 20:13 ` Philipp Tomsich
2023-06-19 16:57 ` Thiago Jung Bauermann
2023-06-19 17:07 ` Manolis Tsamis
2023-06-19 23:40 ` Andrew Pinski
2023-06-19 23:48 ` Andrew Pinski
2023-06-20 2:16 ` Jeff Law
2023-06-20 4:52 ` Tamar Christina
2023-06-20 5:00 ` Jeff Law
2023-06-21 23:42 ` Thiago Jung Bauermann
2023-06-22 7:37 ` Richard Biener
2023-06-22 7:58 ` Philipp Tomsich
2023-05-25 13:42 ` [PATCH 0/2] RISC-V: New pass to optimize calculation of offsets for memory operations Jeff Law
2023-05-25 13:57 ` Manolis Tsamis
2023-06-15 15:04 ` Jeff Law [this message]
2023-06-15 15:30 ` Manolis Tsamis
2023-06-15 15:56 ` Jeff Law
2023-06-18 18:11 ` Jeff Law
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