From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from omggw0009-vm1.mail.otm.yahoo.co.jp (omggw0009-vm1.mail.otm.yahoo.co.jp [182.22.18.159]) by sourceware.org (Postfix) with ESMTPS id 23DBE3858D38 for ; Sat, 18 Feb 2023 04:43:46 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 23DBE3858D38 Authentication-Results: sourceware.org; dmarc=pass (p=quarantine dis=none) header.from=yahoo.co.jp Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=yahoo.co.jp X-YMail-OSG: q0ai.psVM1mw9a1Wv58UqhukCXBHvpz0Zk_UP630w.obUgyFodvuhq7u4WD1Ojw eIgmlONEIGckLxKes0G5Vvotph1203sIz6gHVaEcXzdFebOuYvyq1b.fHo3Cm0wngeRAvOTejbai mQkmIPrQt5uoora6uKl4_xeFWIRo3s5MmlcyBDy2ZAy75j3zwXFGzy6n.SxAGWO498947zhyJv3q CmJnsl3iAyhamzBOFPhuT.xUPkpXybFjuDs0wEMfaXhY3PcYAS5RuaH4kmT2WT0E7ul9B6GaCi0l 2SZq3PojgRBD5IoVSTf2mxVtogd1.sR8dS4UYjhVKl5nEk6p.0UIcW2JFSCbO5EdAI3WLyHvu7GW Yf_3Mvlho_uxj35v7KG7ZV5G7WoHNkGyf7DSb_1s0EpaPJVOAtTvU0G7cAHxzAR_npEzGqXXHMSW 0_axcri7_2xqlQDPNabf7wcH7YWfIsfJkHVQsCL7qti5tpBMJahWeeR_3uYRCoqcjpbtn4.YjE6F IpsshvDpXSkBc2vnj9JVKpwuNNPOegCagQb7yJuWsLjdfUq7jiLmZahV0X1LlLnfJfkOEUmL_jVz b5wIaaZawhh0uXLoVSBpCpwg3_R9vq_bJ_4_OMq4iU4_6yp4rRy8ZM1R566FwkiNKefsdOWN40zC 4_LUsiUkLDcS2b_6KIhpkbpXpRKW4ce5UC242YDvMl_9pSrnrG03EvFWngBH7droORcLijQZZBYI J8xNS3TLXMPRGYaZ_myqBOxjNne3b.Va3MRNjDWA__4juCNqx4bd2eouimuPcIPY8oupnZGbvKlB ROLKQGXX5tJNXp9_oJITGR4ajdGHVENhW0RN4qUnFpxgUEuSJG.LzZr_VmzNN2aKMI6h.rd9kSfs 3In6uYERWsstSNCGYFEmP6kl41Ks16DeFn19PkCP6eRLoK9sNZii3Ba5TNHMcRLqpgE7bBBNOzo0 NcT8- Received: from sonicgw.mail.yahoo.co.jp by sonicconh6001.mail.ssk.yahoo.co.jp with HTTP; Sat, 18 Feb 2023 04:43:43 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; t=1676695423; s=yj20110701; d=yahoo.co.jp; h=Message-ID:Date:MIME-Version:To:Cc:From:Subject:Content-Type:Content-Transfer-Encoding:References; bh=7TGVT5S+epW7DTI3olaCVBjSx9R6u7V0t2OGQ2Ew244=; b=S/JLoO+Cm9bgOrA+TLmLbDnxFagUJSGpsR0cib3M41szd/d6G9oHOAZJugoGAXmE v4qvZp0q2RkY5vAdompKvGNge4iO2kWTt3c9x877BUkfgYJVYN/28jjXmjwZ4lCfyvw O+V709ZZEByJYrIE5Sq3Dwpe3IFFW7JvTyf1OTOk= DomainKey-Signature: a=rsa-sha1; q=dns; c=nofws; s=yj20110701; d=yahoo.co.jp; h=Message-ID:Date:MIME-Version:Cc:From:Content-Type:Content-Transfer-Encoding:References; b=Xr9j4bzv69+9AZ+o2N52tpfK+NtL+yaIAo660IU0yWX5dmpvvtqnP8Ib1oIkDZKF TZcTJsvsePR5EsdbaQbALvaKyoDQQVyqAuKCfSOi/FQHdD+IuEHtBCsDqM65i959G14 efPHAb+dIwKiuvKACEfWg4Q2LIa+z0oG1U17hDH8=; Received: by smtphe6005.mail.ssk.ynwp.yahoo.co.jp (YJ Hermes SMTP Server) with ESMTPA ID 120e26d8195711f5401b828014960b1b; Sat, 18 Feb 2023 13:43:37 +0900 (JST) Message-ID: Date: Sat, 18 Feb 2023 13:43:34 +0900 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 6.1; Win64; x64; rv:102.0) Gecko/20100101 Thunderbird/102.8.0 To: GCC Patches Cc: Max Filippov From: Takayuki 'January June' Suwa Subject: [PATCH v5] xtensa: Eliminate unnecessary general-purpose reg-reg moves Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit References: X-Spam-Status: No, score=-12.9 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_ENVFROM_END_DIGIT,FREEMAIL_FROM,GIT_PATCH_0,KAM_SHORT,SPF_HELO_NONE,SPF_PASS,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: Register-register move instructions that can be easily seen as unnecessary by the human eye may remain in the compiled result. For example: /* example */ double test(double a, double b) { return __builtin_copysign(a, b); } test: add.n a3, a3, a3 extui a5, a5, 31, 1 ssai 1 ;; Be in the same BB src a7, a5, a3 ;; Replacing the destination doesn't ;; violate any constraints of the ;; operands ;; No CALL insns in this span ;; Both A3 and A7 are irrelevant to ;; insns in this span mov.n a3, a7 ;; An unnecessary reg-reg move ;; A7 is not used after this ret.n The last two instructions above, excluding the return instruction, could be done like this: src a3, a5, a3 This symptom often occurs when handling DI/DFmode values with SImode instructions. This patch solves the above problem using peephole2 pattern. gcc/ChangeLog: * config/xtensa/xtensa.md: New peephole2 pattern that eliminates the occurrence of general-purpose register used only once and for transferring intermediate value. gcc/testsuite/ChangeLog: * gcc.target/xtensa/elim_GP_regmove_[01].c: New. --- gcc/config/xtensa/xtensa.md | 46 +++++++++++++++++++ .../gcc.target/xtensa/elim_GP_regmove_0.c | 23 ++++++++++ .../gcc.target/xtensa/elim_GP_regmove_1.c | 10 ++++ 3 files changed, 79 insertions(+) create mode 100644 gcc/testsuite/gcc.target/xtensa/elim_GP_regmove_0.c create mode 100644 gcc/testsuite/gcc.target/xtensa/elim_GP_regmove_1.c diff --git a/gcc/config/xtensa/xtensa.md b/gcc/config/xtensa/xtensa.md index d3996b26cb5..4c1305c05e7 100644 --- a/gcc/config/xtensa/xtensa.md +++ b/gcc/config/xtensa/xtensa.md @@ -3050,3 +3050,49 @@ FALLTHRU:; operands[1] = GEN_INT (imm0); operands[2] = GEN_INT (imm1); }) + +(define_peephole2 + [(set (match_operand 0 "register_operand") + (match_operand 1 "register_operand"))] + "REG_NREGS (operands[0]) == 1 && GP_REG_P (REGNO (operands[0])) + && REG_NREGS (operands[1]) == 1 && GP_REG_P (REGNO (operands[1])) + && peep2_reg_dead_p (1, operands[1])" + [(const_int 0)] +{ + basic_block bb = BLOCK_FOR_INSN (curr_insn); + rtx_insn *head = BB_HEAD (bb), *insn; + rtx dest = operands[0], src = operands[1], pattern, t_dest, dest_orig; + for (insn = PREV_INSN (curr_insn); + insn && insn != head; + insn = PREV_INSN (insn)) + if (CALL_P (insn)) + break; + else if (INSN_P (insn)) + { + if (GET_CODE (pattern = PATTERN (insn)) == SET + && REG_P (t_dest = SET_DEST (pattern)) + && REG_NREGS (t_dest) == 1 + && REGNO (t_dest) == REGNO (src)) + { + dest_orig = SET_DEST (pattern); + SET_DEST (pattern) = gen_rtx_REG (GET_MODE (t_dest), + REGNO (dest)); + extract_insn (insn); + if (!constrain_operands (true, get_enabled_alternatives (insn))) + { + SET_DEST (pattern) = dest_orig; + goto ABORT; + } + df_insn_rescan (insn); + goto FALLTHRU; + } + if (reg_overlap_mentioned_p (dest, pattern) + || reg_overlap_mentioned_p (src, pattern) + || set_of (dest, insn) + || set_of (src, insn)) + break; + } +ABORT: + FAIL; +FALLTHRU:; +}) diff --git a/gcc/testsuite/gcc.target/xtensa/elim_GP_regmove_0.c b/gcc/testsuite/gcc.target/xtensa/elim_GP_regmove_0.c new file mode 100644 index 00000000000..5c195c357dc --- /dev/null +++ b/gcc/testsuite/gcc.target/xtensa/elim_GP_regmove_0.c @@ -0,0 +1,23 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -fpeephole2" } */ + +/* can be processed */ +double test0(double a, double b) { + return __builtin_copysign(a, b); +} + +/* cannot be processed: due to violate '0' constraint of the 2nd source operand. */ +int test1(int a, int b) { + int c; + asm volatile ("" : "=a"(c) : "r"(a), "0"(b)); + return c; +} + +/* cannot be processed: due to violate '&' constraint of the destination operand. */ +int test2(int a) { + int b; + asm volatile ("" : "=&a"(b) : "r"(a)); + return b; +} + +/* { dg-final { scan-assembler-times "mov\t|mov.n\t" 2 } } */ diff --git a/gcc/testsuite/gcc.target/xtensa/elim_GP_regmove_1.c b/gcc/testsuite/gcc.target/xtensa/elim_GP_regmove_1.c new file mode 100644 index 00000000000..a13ef818827 --- /dev/null +++ b/gcc/testsuite/gcc.target/xtensa/elim_GP_regmove_1.c @@ -0,0 +1,10 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -fpeephole2 -mabi=windowed" } */ + +/* cannot be processed: due to violate 'a' constraint of the destination operand of the stack adjustment instruction. */ +void test(void) { + int buffer[8192]; + asm volatile ("" : : "m"(buffer)); +} + +/* { dg-final { scan-assembler-times "movsp" 1 } } */ -- 2.30.2