From: Richard Earnshaw <Richard.Earnshaw@foss.arm.com>
To: Ezra.Sitorus@arm.com, gcc-patches@gcc.gnu.org
Cc: richard.earnshaw@arm.com, kyrylo.tkachov@arm.com
Subject: Re: [PATCH 3/3] [GCC] arm: vst1_types_x4 ACLE intrinsics
Date: Mon, 27 Nov 2023 14:59:24 +0000 [thread overview]
Message-ID: <f598a403-b726-4183-a218-00a8c3292d7c@foss.arm.com> (raw)
In-Reply-To: <20231006115600.20630-4-Ezra.Sitorus@arm.com>
On 06/10/2023 12:56, Ezra.Sitorus@arm.com wrote:
> From: Ezra Sitorus <ezra.sitorus@arm.com>
>
> This patch is part of a series of patches implementing the _xN variants of the vst1 intrinsic for arm32.
> This patch adds the _x4 variants of the vst1 intrinsic.
OK, but please see comment on first patch about naming and formatting.
R.
>
> ACLE documents are at https://developer.arm.com/documentation/ihi0053/latest/
> ISA documents are at https://developer.arm.com/documentation/ddi0487/latest/
>
> gcc/ChangeLog:
> * config/arm/arm_neon.h
> (vst1_u8_x4, vst1_u16_x4, vst1_u32_x4, vst1_u64_x4): New.
> (vst1_s8_x4, vst1_s16_x4, vst1_s32_x4, vst1_s64_x4): New.
> (vst1_f16_x4, vst1_f32_x4): New.
> (vst1_p8_x4, vst1_p16_x4, vst1_p64_x4): New.
> (vst1_bf16_x4): New.
> * config/arm/arm_neon_builtins.def (vst1_x4): New entries.
> * config/arm/neon.md (vst1_x4<mode>): New.
>
> gcc/testsuite/ChangeLog:
> * gcc.target/arm/simd/vst1_base_xN_1.c: Add new test.
> * gcc.target/arm/simd/vst1_bf16_xN_1.c: Add new test.
> * gcc.target/arm/simd/vst1_fp16_xN_1.c: Add new test.
> * gcc.target/arm/simd/vst1_p64_xN_1.c: Add new test.
> ---
> gcc/config/arm/arm_neon.h | 114 ++++++++++++++++++
> gcc/config/arm/arm_neon_builtins.def | 1 +
> gcc/config/arm/neon.md | 10 ++
> .../gcc.target/arm/simd/vst1_base_xN_1.c | 62 +++++++++-
> .../gcc.target/arm/simd/vst1_bf16_xN_1.c | 6 +-
> .../gcc.target/arm/simd/vst1_fp16_xN_1.c | 7 +-
> .../gcc.target/arm/simd/vst1_p64_xN_1.c | 7 +-
> 7 files changed, 200 insertions(+), 7 deletions(-)
>
> diff --git a/gcc/config/arm/arm_neon.h b/gcc/config/arm/arm_neon.h
> index b01171e5966..41e645d8352 100644
> --- a/gcc/config/arm/arm_neon.h
> +++ b/gcc/config/arm/arm_neon.h
> @@ -11258,6 +11258,14 @@ vst1_p64_x3 (poly64_t * __a, poly64x1x3_t __b)
> __builtin_neon_vst1_x3di ((__builtin_neon_di *) __a, __bu.__o);
> }
>
> +__extension__ extern __inline void
> +__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
> +vst1_p64_x4 (poly64_t * __a, poly64x1x4_t __b)
> +{
> + union { poly64x1x4_t __i; __builtin_neon_oi __o; } __bu = { __b };
> + __builtin_neon_vst1_x3di ((__builtin_neon_di *) __a, __bu.__o);
> +}
> +
> #pragma GCC pop_options
> __extension__ extern __inline void
> __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
> @@ -11351,6 +11359,38 @@ vst1_s64_x3 (int64_t * __a, int64x1x3_t __b)
> __builtin_neon_vst1_x3di ((__builtin_neon_di *) __a, __bu.__o);
> }
>
> +__extension__ extern __inline void
> +__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
> +vst1_s8_x4 (int8_t * __a, int8x8x4_t __b)
> +{
> + union { int8x8x4_t __i; __builtin_neon_oi __o; } __bu = { __b };
> + __builtin_neon_vst1_x4v8qi ((__builtin_neon_qi *) __a, __bu.__o);
> +}
> +
> +__extension__ extern __inline void
> +__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
> +vst1_s16_x4 (int16_t * __a, int16x4x4_t __b)
> +{
> + union { int16x4x4_t __i; __builtin_neon_oi __o; } __bu = { __b };
> + __builtin_neon_vst1_x4v4hi ((__builtin_neon_hi *) __a, __bu.__o);
> +}
> +
> +__extension__ extern __inline void
> +__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
> +vst1_s32_x4 (int32_t * __a, int32x2x4_t __b)
> +{
> + union { int32x2x4_t __i; __builtin_neon_oi __o; } __bu = { __b };
> + __builtin_neon_vst1_x4v2si ((__builtin_neon_si *) __a, __bu.__o);
> +}
> +
> +__extension__ extern __inline void
> +__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
> +vst1_s64_x4 (int64_t * __a, int64x1x4_t __b)
> +{
> + union { int64x1x4_t __i; __builtin_neon_oi __o; } __bu = { __b };
> + __builtin_neon_vst1_x4di ((__builtin_neon_di *) __a, __bu.__o);
> +}
> +
> #if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
> __extension__ extern __inline void
> __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
> @@ -11403,6 +11443,24 @@ vst1_f32_x3 (float32_t * __a, float32x2x3_t __b)
> __builtin_neon_vst1_x3v2sf ((__builtin_neon_sf *) __a, __bu.__o);
> }
>
> +#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
> +__extension__ extern __inline void
> +__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
> +vst1_f16_x4 (float16_t * __a, float16x4x4_t __b)
> +{
> + union { float16x4x4_t __i; __builtin_neon_oi __o; } __bu = { __b };
> + __builtin_neon_vst1_x4v4hf (__a, __bu.__o);
> +}
> +#endif
> +
> +__extension__ extern __inline void
> +__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
> +vst1_f32_x4 (float32_t * __a, float32x2x4_t __b)
> +{
> + union { float32x2x4_t __i; __builtin_neon_oi __o; } __bu = { __b };
> + __builtin_neon_vst1_x4v2sf ((__builtin_neon_sf *) __a, __bu.__o);
> +}
> +
> __extension__ extern __inline void
> __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
> vst1_u8 (uint8_t * __a, uint8x8_t __b)
> @@ -11495,6 +11553,38 @@ vst1_u64_x3 (uint64_t * __a, uint64x1x3_t __b)
> __builtin_neon_vst1_x3di ((__builtin_neon_di *) __a, __bu.__o);
> }
>
> +__extension__ extern __inline void
> +__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
> +vst1_u8_x4 (uint8_t * __a, uint8x8x4_t __b)
> +{
> + union { uint8x8x4_t __i; __builtin_neon_oi __o; } __bu = { __b };
> + __builtin_neon_vst1_x4v8qi ((__builtin_neon_qi *) __a, __bu.__o);
> +}
> +
> +__extension__ extern __inline void
> +__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
> +vst1_u16_x4 (uint16_t * __a, uint16x4x4_t __b)
> +{
> + union { uint16x4x4_t __i; __builtin_neon_oi __o; } __bu = { __b };
> + __builtin_neon_vst1_x4v4hi ((__builtin_neon_hi *) __a, __bu.__o);
> +}
> +
> +__extension__ extern __inline void
> +__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
> +vst1_u32_x4 (uint32_t * __a, uint32x2x4_t __b)
> +{
> + union { uint32x2x4_t __i; __builtin_neon_oi __o; } __bu = { __b };
> + __builtin_neon_vst1_x4v2si ((__builtin_neon_si *) __a, __bu.__o);
> +}
> +
> +__extension__ extern __inline void
> +__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
> +vst1_u64_x4 (uint64_t * __a, uint64x1x4_t __b)
> +{
> + union { uint64x1x4_t __i; __builtin_neon_oi __o; } __bu = { __b };
> + __builtin_neon_vst1_x4di ((__builtin_neon_di *) __a, __bu.__o);
> +}
> +
> __extension__ extern __inline void
> __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
> vst1_p8 (poly8_t * __a, poly8x8_t __b)
> @@ -11541,6 +11631,22 @@ vst1_p16_x3 (poly16_t * __a, poly16x4x3_t __b)
> __builtin_neon_vst1_x3v4hi ((__builtin_neon_hi *) __a, __bu.__o);
> }
>
> +__extension__ extern __inline void
> +__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
> +vst1_p8_x4 (poly8_t * __a, poly8x8x4_t __b)
> +{
> + union { poly8x8x4_t __i; __builtin_neon_oi __o; } __bu = { __b };
> + __builtin_neon_vst1_x4v8qi ((__builtin_neon_qi *) __a, __bu.__o);
> +}
> +
> +__extension__ extern __inline void
> +__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
> +vst1_p16_x4 (poly16_t * __a, poly16x4x4_t __b)
> +{
> + union { poly16x4x4_t __i; __builtin_neon_oi __o; } __bu = { __b };
> + __builtin_neon_vst1_x4v4hi ((__builtin_neon_hi *) __a, __bu.__o);
> +}
> +
> #pragma GCC push_options
> #pragma GCC target ("fpu=crypto-neon-fp-armv8")
> __extension__ extern __inline void
> @@ -20298,6 +20404,14 @@ vst1_bf16_x3 (bfloat16_t * __a, bfloat16x4x3_t __b)
> __builtin_neon_vst1_x3v4hf ((__builtin_neon_bf *) __a, __bu.__o);
> }
>
> +__extension__ extern __inline void
> +__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
> +vst1_bf16_x4 (bfloat16_t * __a, bfloat16x4x4_t __b)
> +{
> + union { bfloat16x4x4_t __i; __builtin_neon_oi __o; } __bu = { __b };
> + __builtin_neon_vst1_x4v4hf ((__builtin_neon_bf *) __a, __bu.__o);
> +}
> +
> __extension__ extern __inline void
> __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
> vst1q_bf16 (bfloat16_t * __a, bfloat16x8_t __b)
> diff --git a/gcc/config/arm/arm_neon_builtins.def b/gcc/config/arm/arm_neon_builtins.def
> index e33b3429f65..95300cb0fe4 100644
> --- a/gcc/config/arm/arm_neon_builtins.def
> +++ b/gcc/config/arm/arm_neon_builtins.def
> @@ -310,6 +310,7 @@ VAR10 (LOAD1, vld1_dup,
> v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf, v2di)
> VAR7 (STORE1, vst1_x2, v8qi, v4hi, v2si, di, v4hf, v2sf, v4bf)
> VAR7 (STORE1, vst1_x3, v8qi, v4hi, v2si, di, v4hf, v2sf, v4bf)
> +VAR7 (STORE1, vst1_x4, v8qi, v4hi, v2si, di, v4hf, v2sf, v4bf)
> VAR14 (STORE1, vst1,
> v8qi, v4hi, v4hf, v2si, v2sf, di, v16qi, v8hi, v8hf, v4si, v4sf, v2di,
> v4bf, v8bf)
> diff --git a/gcc/config/arm/neon.md b/gcc/config/arm/neon.md
> index 3d1d2aa7d06..f5d583129fa 100644
> --- a/gcc/config/arm/neon.md
> +++ b/gcc/config/arm/neon.md
> @@ -5145,6 +5145,16 @@ if (BYTES_BIG_ENDIAN)
> [(set_attr "type" "neon_store1_3reg<q>")]
> )
>
> +(define_insn "neon_vst1_x4<mode>"
> + [(set (match_operand:OI 0 "neon_struct_operand" "=Um")
> + (unspec:OI [(match_operand:OI 1 "s_register_operand" "w")
> + (unspec:VDQX [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
> + UNSPEC_VST1))]
> + "TARGET_NEON"
> + "vst1.<V_sz_elem>\t%h1, %A0"
> + [(set_attr "type" "neon_store1_4reg<q>")]
> +)
> +
> (define_insn "neon_vst1<mode>"
> [(set (match_operand:VDQX 0 "neon_struct_operand" "=Um")
> (unspec:VDQX [(match_operand:VDQX 1 "s_register_operand" "w")]
> diff --git a/gcc/testsuite/gcc.target/arm/simd/vst1_base_xN_1.c b/gcc/testsuite/gcc.target/arm/simd/vst1_base_xN_1.c
> index 5f820a6a496..04ca6583552 100644
> --- a/gcc/testsuite/gcc.target/arm/simd/vst1_base_xN_1.c
> +++ b/gcc/testsuite/gcc.target/arm/simd/vst1_base_xN_1.c
> @@ -115,8 +115,62 @@ void test_vst1_p16_x3 (poly16_t * ptr, poly16x4x3_t val)
> vst1_p16_x3 (ptr, val);
> }
>
> +void test_vst1_u8_x4 (uint8_t * ptr, uint8x8x4_t val)
> +{
> + vst1_u8_x4 (ptr, val);
> +}
> +
> +void test_vst1_u16_x4 (uint16_t * ptr, uint16x4x4_t val)
> +{
> + vst1_u16_x4 (ptr, val);
> +}
> +
> +void test_vst1_u32_x4 (uint32_t * ptr, uint32x2x4_t val)
> +{
> + vst1_u32_x4 (ptr, val);
> +}
> +
> +void test_vst1_u64_x4 (uint64_t * ptr, uint64x1x4_t val)
> +{
> + vst1_u64_x4 (ptr, val);
> +}
> +
> +void test_vst1_s8_x4 (int8_t * ptr, int8x8x4_t val)
> +{
> + vst1_s8_x4 (ptr, val);
> +}
> +
> +void test_vst1_s16_x4 (int16_t * ptr, int16x4x4_t val)
> +{
> + vst1_s16_x4 (ptr, val);
> +}
> +
> +void test_vst1_s32_x4 (int32_t * ptr, int32x2x4_t val)
> +{
> + vst1_s32_x4 (ptr, val);
> +}
> +
> +void test_vst1_s64_x4 (int64_t * ptr, int64x1x4_t val)
> +{
> + vst1_s64_x4 (ptr, val);
> +}
> +
> +void test_vst1_f32_x4 (float32_t * ptr, float32x2x4_t val)
> +{
> + vst1_f32_x4 (ptr, val);
> +}
> +
> +void test_vst1_p8_x4 (poly8_t * ptr, poly8x8x4_t val)
> +{
> + vst1_p8_x4 (ptr, val);
> +}
> +
> +void test_vst1_p16_x4 (poly16_t * ptr, poly16x4x4_t val)
> +{
> + vst1_p16_x4 (ptr, val);
> +}
>
> -/* { dg-final { scan-assembler-times {vst1.8\t\{d[0-9]+-d[0-9]+\}, \[r[0-9]+\]\n} 6 } } */
> -/* { dg-final { scan-assembler-times {vst1.16\t\{d[0-9]+-d[0-9]+\}, \[r[0-9]+\]\n} 6 } } */
> -/* { dg-final { scan-assembler-times {vst1.32\t\{d[0-9]+-d[0-9]+\}, \[r[0-9]+\]\n} 6 } } */
> -/* { dg-final { scan-assembler-times {vst1.64\t\{d[0-9]+-d[0-9]+\}, \[r[0-9]+:64\]\n} 4 } } */
> +/* { dg-final { scan-assembler-times {vst1.8\t\{d[0-9]+-d[0-9]+\}, \[r[0-9]+\]\n} 9 } } */
> +/* { dg-final { scan-assembler-times {vst1.16\t\{d[0-9]+-d[0-9]+\}, \[r[0-9]+\]\n} 9 } } */
> +/* { dg-final { scan-assembler-times {vst1.32\t\{d[0-9]+-d[0-9]+\}, \[r[0-9]+\]\n} 9 } } */
> +/* { dg-final { scan-assembler-times {vst1.64\t\{d[0-9]+-d[0-9]+\}, \[r[0-9]+:64\]\n} 6 } } */
> diff --git a/gcc/testsuite/gcc.target/arm/simd/vst1_bf16_xN_1.c b/gcc/testsuite/gcc.target/arm/simd/vst1_bf16_xN_1.c
> index a3a00ead468..d919c7d060d 100644
> --- a/gcc/testsuite/gcc.target/arm/simd/vst1_bf16_xN_1.c
> +++ b/gcc/testsuite/gcc.target/arm/simd/vst1_bf16_xN_1.c
> @@ -15,4 +15,8 @@ void test_vst1_bf16_x3 (bfloat16_t * ptr, bfloat16x4x3_t val)
> vst1_bf16_x3 (ptr, val);
> }
>
> -/* { dg-final { scan-assembler-times {vst1.16\t\{d[0-9]+-d[0-9]+\}, \[r[0-9]+\]\n} 2 } } */
> +void test_vst1_bf16_x4 (bfloat16_t * ptr, bfloat16x4x4_t val)
> +{
> + vst1_bf16_x4 (ptr, val);
> +}
> +/* { dg-final { scan-assembler-times {vst1.16\t\{d[0-9]+-d[0-9]+\}, \[r[0-9]+\]\n} 3 } } */
> diff --git a/gcc/testsuite/gcc.target/arm/simd/vst1_fp16_xN_1.c b/gcc/testsuite/gcc.target/arm/simd/vst1_fp16_xN_1.c
> index 0a6863e24c6..3d1d1eb7ad1 100644
> --- a/gcc/testsuite/gcc.target/arm/simd/vst1_fp16_xN_1.c
> +++ b/gcc/testsuite/gcc.target/arm/simd/vst1_fp16_xN_1.c
> @@ -15,4 +15,9 @@ void test_vst1_f16_x3 (float16_t * ptr, float16x4x3_t val)
> vst1_f16_x3 (ptr, val);
> }
>
> -/* { dg-final { scan-assembler-times {vst1.16\t\{d[0-9]+-d[0-9]+\}, \[r[0-9]+\]\n} 2 } } */
> +void test_vst1_f16_x4 (float16_t * ptr, float16x4x4_t val)
> +{
> + vst1_f16_x4 (ptr, val);
> +}
> +
> +/* { dg-final { scan-assembler-times {vst1.16\t\{d[0-9]+-d[0-9]+\}, \[r[0-9]+\]\n} 3 } } */
> diff --git a/gcc/testsuite/gcc.target/arm/simd/vst1_p64_xN_1.c b/gcc/testsuite/gcc.target/arm/simd/vst1_p64_xN_1.c
> index 5dbd6049bc9..62912143481 100644
> --- a/gcc/testsuite/gcc.target/arm/simd/vst1_p64_xN_1.c
> +++ b/gcc/testsuite/gcc.target/arm/simd/vst1_p64_xN_1.c
> @@ -15,4 +15,9 @@ void test_vst1_p64_x3 (poly64_t * ptr, poly64x1x3_t val)
> vst1_p64_x3 (ptr, val);
> }
>
> -/* { dg-final { scan-assembler-times {vst1.64\t\{d[0-9]+-d[0-9]+\}, \[r[0-9]+:64\]\n} 2 } } */
> \ No newline at end of file
> +void test_vst1_p64_x4 (poly64_t * ptr, poly64x1x4_t val)
> +{
> + vst1_p64_x4 (ptr, val);
> +}
> +
> +/* { dg-final { scan-assembler-times {vst1.64\t\{d[0-9]+-d[0-9]+\}, \[r[0-9]+:64\]\n} 3 } } */
> \ No newline at end of file
prev parent reply other threads:[~2023-11-27 14:59 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-10-06 11:55 [PATCH 0/3] [GCC] arm: vst1_types_xN " Ezra.Sitorus
2023-10-06 11:55 ` [PATCH 1/3] [GCC] arm: vst1_types_x2 " Ezra.Sitorus
2023-11-27 14:56 ` Richard Earnshaw
2023-11-27 14:57 ` Richard Earnshaw
2023-10-06 11:55 ` [PATCH 2/3] [GCC] arm: vst1_types_x3 " Ezra.Sitorus
2023-11-27 14:58 ` Richard Earnshaw
2023-10-06 11:56 ` [PATCH 3/3] [GCC] arm: vst1_types_x4 " Ezra.Sitorus
2023-11-27 14:59 ` Richard Earnshaw [this message]
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