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From: Kyrill Tkachov <kyrylo.tkachov@foss.arm.com>
To: Shaokun Zhang <zhangshaokun@hisilicon.com>,
	"gcc-patches@gcc.gnu.org" <gcc-patches@gcc.gnu.org>
Cc: Richard Earnshaw <Richard.Earnshaw@arm.com>,
	James Greenhalgh <James.Greenhalgh@arm.com>,
	Marcus Shawcroft <Marcus.Shawcroft@arm.com>,
	Richard Sandiford <Richard.Sandiford@arm.com>,
	"Tangnianyao (ICT)" <tangnianyao@huawei.com>
Subject: Re: [Question on aarch64] Questions on TLB range instructions on aarch64
Date: Tue, 17 Sep 2019 11:25:00 -0000	[thread overview]
Message-ID: <f884f64c-f2a6-4483-cc83-bc0e9349cb36@foss.arm.com> (raw)
In-Reply-To: <cc14b9df-6244-c0b7-f7ea-73732d31cac4@hisilicon.com>

Hi Shaokun,

On 9/17/19 12:17 PM, Shaokun Zhang wrote:
> Hi aarch64 maintainers,
>
> Sorry to noise you again.
>
No problem :) However, this isn't strictly-speaking a gcc issue because...


> We(HiSilicon) next generation CPU core will support "ARMv8.4-TLBI, TLB 
> maintenance and TLB range instructions"
> feature, so I try to compile it that tlbi rvae1is is replaced in linux 
> kernel which is in my local branch,
> there are some error messages:
>
> /tmp/ccD5TFDe.s: Assembler messages:
> /tmp/ccD5TFDe.s:991: Error: unknown or missing operation name at 
> operand 1 -- `tlbi rvae1is,x0'
> /tmp/ccD5TFDe.s:1012: Error: unknown or missing operation name at 
> operand 1 -- `tlbi rvae1is,x0'
> /tmp/ccD5TFDe.s:1794: Error: unknown or missing operation name at 
> operand 1 -- `tlbi rvae1is,x0'
> /tmp/ccD5TFDe.s:1815: Error: unknown or missing operation name at 
> operand 1 -- `tlbi rvae1is,x0'
> /tmp/ccD5TFDe.s:2398: Error: unknown or missing operation name at 
> operand 1 -- `tlbi rvae1is,x0'
> /tmp/ccD5TFDe.s:2419: Error: unknown or missing operation name at 
> operand 1 -- `tlbi rvae1is,x0'
> /tmp/ccD5TFDe.s:3155: Error: unknown or missing operation name at 
> operand 1 -- `tlbi rvae1is,x0'
> /tmp/ccD5TFDe.s:3176: Error: unknown or missing operation name at 
> operand 1 -- `tlbi rvae1is,x0'
> /tmp/ccD5TFDe.s:1016: Error: attempt to move .org backwards
> /tmp/ccD5TFDe.s:1819: Error: attempt to move .org backwards
> /tmp/ccD5TFDe.s:2423: Error: attempt to move .org backwards
> /tmp/ccD5TFDe.s:3180: Error: attempt to move .org backwards
> make[2]: *** [arch/arm64/mm/hugetlbpage.o] Error 1
> make[1]: *** [arch/arm64/mm] Error 2
> make: *** [sub-make] Error 2
>

... These are assembler messages from gas.

These system registers should be supported in more recent binutils versions.

They were added with 
https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=793a194839bc8add71fdc7429c58b10f0667a6f6

I suggest you update your binutils to a later version to get the support.

Thanks,

Kyrill


> GCC version is as follow:
> gcc (GCC) 9.2.0
> Copyright (C) 2019 Free Software Foundation, Inc.
> This is free software; see the source for copying conditions.  There is NO
> warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR 
> PURPOSE.
>
> It seems that GCC doesn't support this new instruction and I checked 
> that LLVM has already supported
> this instruction,
> https://github.com/llvm-mirror/llvm/blob/master/lib/Target/AArch64/AArch64SystemOperands.td
>
> So my question is that does GCC have the plan to support this 
> instruction recently?
> If not, can you give me some suggestion to do it? I'm not the expert 
> on it  ;-)
>
> Thanks in advance,
> Shaokun
>

  reply	other threads:[~2019-09-17 11:25 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-09-17 11:17 Shaokun Zhang
2019-09-17 11:25 ` Kyrill Tkachov [this message]
2019-09-17 11:56   ` Shaokun Zhang

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