From: Jeff Law <jeffreyalaw@gmail.com>
To: Edwin Lu <ewlu@rivosinc.com>, gcc-patches@gcc.gnu.org
Cc: gnu-toolchain@rivosinc.com, kito.cheng@gmail.com
Subject: Re: [PATCH 1/3][RFC] RISC-V: Add non-vector types to pipelines
Date: Wed, 20 Dec 2023 23:59:17 -0700 [thread overview]
Message-ID: <f994ea31-b21f-4439-bce3-33d5f3952519@gmail.com> (raw)
In-Reply-To: <9a30c4b3-3b78-41f4-8e72-994275d68e26@rivosinc.com>
On 12/20/23 15:11, Edwin Lu wrote:
>>
>>
>>> (define_insn_reservation "generic_xfer" 3
>>> (and (eq_attr "tune" "generic")
>>> - (eq_attr "type" "mfc,mtc,fcvt,fmove,fcmp"))
>>> + (eq_attr "type" "mfc,mtc,fcvt,fmove,fcmp,cbo"))
>>> "alu")
>> cbo is probably closer to a load/store than it is a transfer operation.
>>
> That makes sense. I wasn't sure where exactly to put it since we have
> two separate insn reservations for load and store and from my
> understanding, the same type cannot be in two separate insn
> reservations. Would a new insn reservation like
> (define_insn_reservation "generic_load_store" 2 ...) work?
I'd probably just treat cbo instructions as stores. In fact, you could
probably get away with using "store" as the type and dropping the cbo
type entirely.
>
>>> (define_insn_reservation "generic_branch" 1
>>> (and (eq_attr "tune" "generic")
>>> - (eq_attr "type" "branch,jump,call,jalr"))
>>> + (eq_attr "type" "branch,jump,call,jalr,ret,trap,pushpop"))
>>> + "alu")
>> pushpop are a mix of some pure memory operations and some mixed memory
>> + branch.
>>
>> However, from a scheduling standpoint the branch isn't particularly
>> interesting. So I'd have pushpop as a load/store.
So for these I think those which do pushes you could legitimately change
to the "store" type and pops could be changed to a "load" type. If
something does both just call it a load. That's going to be the most
useful from a scheduling standpoint I suspect.
Jeff
next prev parent reply other threads:[~2023-12-21 6:59 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-12-15 18:53 [PATCH 0/3][RFC] RISC-V: Associate typed insns to dfa reservation Edwin Lu
2023-12-15 18:53 ` [PATCH 1/3][RFC] RISC-V: Add non-vector types to pipelines Edwin Lu
2023-12-20 18:50 ` Jeff Law
2023-12-20 22:11 ` Edwin Lu
2023-12-20 22:11 ` Edwin Lu
2023-12-21 6:59 ` Jeff Law [this message]
2023-12-15 18:53 ` [PATCH 2/3][RFC] RISC-V: Add vector related reservations Edwin Lu
2023-12-20 18:57 ` Jeff Law
2023-12-20 22:55 ` Edwin Lu
2023-12-20 22:55 ` Edwin Lu
2023-12-26 21:21 ` Edwin Lu
2023-12-15 18:53 ` [PATCH 3/3][RFC] RISC-V: Enable assert for insn_has_dfa_reservation Edwin Lu
2023-12-20 18:57 ` Jeff Law
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