Hi This patch is part of a series that enables ARMv8.5-A in GCC and adds Branch Target Identification Mechanism. (https://developer.arm.com/products/architecture/cpu-architecture/a-profile/exploration-tools) This patch adds a new pass called "bti" which is triggered by the command line argument -mbranch-protection whenever "bti" is turned on. The pass iterates through the instructions and adds appropriated BTI instructions based on the following: * Add a new "BTI C" at the beginning of a function, unless its already protected by a "PACIASP/PACIBSP". We exempt the functions that are only called directly. * Add a new "BTI J" for every target of an indirect jump, jump table targets, non-local goto targets or labels that might be referenced by variables, constant pools, etc (NOTE_INSN_DELETED_LABEL) Since we have already changed the use of indirect tail calls to only x16 and x17, we do not have to use "BTI JC". (check patch 3/6). Bootstrapped and regression tested with aarch64-none-linux-gnu. Added new tests. Is this ok for trunk? Thanks Sudi *** gcc/ChangeLog *** 2018-xx-xx Sudakshina Das Ramana Radhakrishnan * config.gcc (aarch64*-*-*): Add aarch64-bti-insert.o. * gcc/config/aarch64/aarch64.h: Update comment for TRAMPOLINE_SIZE. * config/aarch64/aarch64.c (aarch64_asm_trampoline_template): Update if bti is enabled. * config/aarch64/aarch64-bti-insert.c: New file. * config/aarch64/aarch64-passes.def (INSERT_PASS_BEFORE): Insert bti pass. * config/aarch64/aarch64-protos.h (make_pass_insert_bti): Declare the new bti pass. * config/aarch64/aarch64.md (bti_nop): Define. * config/aarch64/t-aarch64: Add rule for aarch64-bti-insert.o. *** gcc/testsuite/ChangeLog *** 2018-xx-xx Sudakshina Das * gcc.target/aarch64/bti-1.c: New test. * gcc.target/aarch64/bti-2.c: New test. * lib/target-supports.exp (check_effective_target_aarch64_bti_hw): Add new check for BTI hw.