Re: [arm][RFC] PR target/88469 fix incorrect argument passing with 64-bit bitfields

["Richard Earnshaw (lists)" <Richard.Earnshaw@arm.com>]

On 28/02/2019 14:51, Bernd Edlinger wrote:
> On 2/28/19 1:10 PM, Richard Earnshaw (lists) wrote:
>> On 27/01/2019 11:20, Bernd Edlinger wrote:
>>>
>>> $ arm-linux-gnueabihf-gcc -march=armv5te -O3 -S test.c
>>> $ cat test.s
>>> f:
>>> 	@ args = 12, pretend = 0, frame = 0
>>> 	@ frame_needed = 0, uses_anonymous_args = 0
>>> 	@ link register save eliminated.
>>> 	push	{r4, r5}
>>> 	mov	r0, #8
>>> 	ldrd	r4, [sp, #12]
>>
>> So this is wrong; before the compiler can use 'f' it has to copy it to a
>> suitably aligned location; it can't directly reuse the value on the
>> stack as that is not sufficiently aligned for the type.
>>
> 
> Yes, meanwhile I found out that the value would be copied in a new place
> if an address was taken, but there is an issue with
> output_move_double not checking the value's MEM_ALIGN.

I think that's a symptom of an earlier problem: why is gen_movdi being
called with a 32-bit aligned DImode memory object?

R.

> 
>>>
>>> So isn't this wrong code, returning 8 for alignof when it is really 4,
>>> and wouldn't it crash on armv5 and armv6 with SCTLR.U=0 ?
>>
>> Returning 8 is correct; since that is the alignment of the type; but GCC
>> does need to copy underaligned types to suitably aligned memory before
>> it uses them; it must not use the *value* that is passed directly,
>> unless it can prove that doing so is safe (and as you point out, on
>> armv5 it is not).
>>
>> I think technically, this is separate bug from the PCS one that was
>> fixed, so needs a new PR.
>>
> 
> Could you have a look at the patch I sent to fix the wrong code issue:
> https://gcc.gnu.org/ml/gcc-patches/2019-02/msg00248.html
> 
> Is there a chance that this can still go into gcc-9?
> Or do I have to to open a PR for it first?
> 
> 
> Thanks
> Bernd.
>