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From: Xi Ruoyao To: chenxiaolong , YunQiang Su Cc: gcc-patches@gcc.gnu.org, i@xen0n.name, xuchenghua@loongson.cn, chenglulu@loongson.cn, schwab@linux-m68k.org, ci_notify@linaro.org Date: Tue, 16 Jan 2024 12:58:01 +0800 In-Reply-To: <6e608699db17a4f37b4bddf156d5c59759672e34.camel@loongson.cn> References: <20240113072817.31932-1-chenxiaolong@loongson.cn> <36fa3e47dfb106a150f113a300ecff6a7c869237.camel@xry111.site> <8654a1de861c86eda083dced141bc928df3930f4.camel@loongson.cn> <7b74e3f09cd083e489850774f2c85079bd470301.camel@xry111.site> <72675360c53a3d73a2171ca9e45d7e3049025c25.camel@loongson.cn> <870c3b36f3d88d56f38cbdeeb7c4301e6fa32cb2.camel@xry111.site> <6e608699db17a4f37b4bddf156d5c59759672e34.camel@loongson.cn> Autocrypt: addr=xry111@xry111.site; prefer-encrypt=mutual; keydata=mDMEYnkdPhYJKwYBBAHaRw8BAQdAsY+HvJs3EVKpwIu2gN89cQT/pnrbQtlvd6Yfq7egugi0HlhpIFJ1b3lhbyA8eHJ5MTExQHhyeTExMS5zaXRlPoiTBBMWCgA7FiEEkdD1djAfkk197dzorKrSDhnnEOMFAmJ5HT4CGwMFCwkIBwICIgIGFQoJCAsCBBYCAwECHgcCF4AACgkQrKrSDhnnEOPHFgD8D9vUToTd1MF5bng9uPJq5y3DfpcxDp+LD3joA3U2TmwA/jZtN9xLH7CGDHeClKZK/ZYELotWfJsqRcthOIGjsdAPuDgEYnkdPhIKKwYBBAGXVQEFAQEHQG+HnNiPZseiBkzYBHwq/nN638o0NPwgYwH70wlKMZhRAwEIB4h4BBgWCgAgFiEEkdD1djAfkk197dzorKrSDhnnEOMFAmJ5HT4CGwwACgkQrKrSDhnnEOPjXgD/euD64cxwqDIqckUaisT3VCst11RcnO5iRHm6meNIwj0BALLmWplyi7beKrOlqKfuZtCLbiAPywGfCNg8LOTt4iMD Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable User-Agent: Evolution 3.50.3 MIME-Version: 1.0 X-Spam-Status: No, score=-0.3 required=5.0 tests=BAYES_00,BODY_8BITS,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,LIKELY_SPAM_FROM,SPF_HELO_PASS,SPF_PASS,TXREP,T_SCC_BODY_TEXT_LINE autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: On Tue, 2024-01-16 at 10:57 +0800, chenxiaolong wrote: > =E5=9C=A8 2024-01-15=E4=B8=80=E7=9A=84 15:50 +0800=EF=BC=8CXi Ruoyao=E5= =86=99=E9=81=93=EF=BC=9A > > On Mon, 2024-01-15 at 15:10 +0800, chenxiaolong wrote: > > > At 14:42 +0800 on the first day of 2024-01-15, Xi Ruoyao wrote=EF=BC= =9A > > > > On Mon, 2024-01-15 at 14:32 +0800, YunQiang Su wrote: > > > > > Xi Ruoyao wrote at 12:11pm on Monday, > > > > > January > > > > > 15, 2024=EF=BC=9A > > > > > > On Mon, 2024-01-15 at 09:29 +0800, chenxiaolong wrote: > > > > > > > At 21:13 +0800 on Saturday, 2024-01-13, Xi Ruoyao wrote=EF=BC= =9A > > > > > > > > At 15:28 +0800 on Saturday 2024-01-13, chenxiaolong > > > > > > > > wrote=EF=BC=9A > > > > > > > > > gcc/testsuite/ChangeLog: > > > > > > > > >=20 > > > > > > > > > =C2=A0=C2=A0=C2=A0 * gcc.dg/pr104992.c: Added additional = "-mlsx" > > > > > > > > > compilation > > > > > > > > > options. > > > > > > > > > =C2=A0=C2=A0=C2=A0 * gcc.dg/signbit-2.c: Dito. > > > > > > > > > =C2=A0=C2=A0=C2=A0 * gcc.dg/tree-ssa/scev-16.c: Dito. > > > > > > > > > =C2=A0=C2=A0=C2=A0 * gfortran.dg/graphite/vect-pr40979.f9= 0: Dito. > > > > > > > > > =C2=A0=C2=A0=C2=A0 * gfortran.dg/vect/fast-math-mgrid-res= id.f: Dito. > > > > > > > >=20 > > > > > > > > I don't feel it right about the changes to pr104992.c and > > > > > > > > scev-16.c > > > > > > > > because no other architectures add special options > > > > > > > > there.=20 > > > > > > > > Why are we > > > > > > > > so special? > > > > > > > Because on the LoongArch architecture, GCC requires the > > > > > > > addition of > > > > > > > vectorization options in order to generate vector code. Use > > > > > > > the > > > > > > > check_effective_target_vect_cmdline_needed command in the > > > > > > > lib/target- > > > > > > > supports.exp file to set whether the command line option is > > > > > > > needed to > > > > > > > enable vectorizations. For example, ia64,x86,aarch64, and > > > > > > > riscv > > > > > > > architectures, vectorization is enabled by default. > > > > > >=20 > > > > > > But no.=C2=A0 The default baseline of 32-bit x86 is i686, which= is > > > > > > basically > > > > > > a Pentium III launched in 1999 without any vector > > > > > > instructions. > > > > > >=20 > > > > > > We are still missing something here. > > > > > >=20 > > > > > There is a line > > > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 #define vector > > > > > __attribute__((vector_size(4*sizeof(int)))) > > > > > I guess it is the syntax needs to be supported. > > > >=20 > > > > This is always supported.=C2=A0 If the target does not have vector > > > > instructions GCC will just expand vector arithmetic as a loop. > > > >=20 > > > > Maybe we should just move this test into gcc.dg/vect where the > > > > framework > > > > automatically add options like -mlsx or -msse2? > > > >=20 > > >=20 > > > The "-mlsx" option is turned on by default after vectorization > > > testing > > > is turned on. However, the use of dg-options in some files resets > > > the > > > compilation options for testing this file. Therefore, to detect > > > vectorization on LoongArch, it is necessary to add an additional "- > > > mlsx" option. > >=20 > > Then it should use dg-additional-options instead of dg-options. > >=20 > According to your advice, I have tried the following two ways: >=20 > (1)Replace dg-options directly with dg-additional-options. The "-ansi- > pedantic-errors" set in the dg.exp file is used, and the following > problems occur: >=20 > gcc.dg/pr104992.c:ISO C90 does not support complex types. > gcc.dg/tree-ssa/scev-16.c:=E2=80=98for=E2=80=99 loop initial declarations= are only > allowed in C99 or C11 mode >=20 > Note: The ISO required by the program is inconsistent with the default > standard, resulting in an error. We can add -std=3Dc11 into dg-additional-options as well. > (2)Move pr104992.c and scev-16.c to the gcc.dg/vect directory and > replace dg-options with dg-additional-options. The problems are as > follows: >=20 > gcc.dg/vect/scev-16.c: Because there is no test rule starting with > scev* in the vect.exp file, you need to add a new test rule or change > the file name before the test can be performed. >=20 > Summary: It is more appropriate to add the additional "-mlsx" option > directly to the pr104992.c and scev-16.c files. This supports > vectorization=C2=A0 testing of the LoongArch architecture and does not > modify the testing behavior of other architectures. No, "not modifying the other architectures" may not be a good thing in some cases. There are only two possibilities here: (1) The test is broken for all architectures where vectorization needs additional options. Then we should fix it for all the architectures. (2) The test is only broken on LoongArch, then on other architectures some mechanism is already adding the proper options for vectorization.=20 Then we should implement the same mechanism for LoongArch. For either case adding -mlsx only for LoongArch is only papering over the real issue. I'll run these tests on some other architectures and see what's happening... --=20 Xi Ruoyao School of Aerospace Science and Technology, Xidian University