From: Jeff Law <jeffreyalaw@gmail.com>
To: Christoph Muellner <christoph.muellner@vrull.eu>,
gcc-patches@gcc.gnu.org, Kito Cheng <kito.cheng@sifive.com>,
Jim Wilson <jim.wilson.gcc@gmail.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Andrew Waterman <andrew@sifive.com>,
Philipp Tomsich <philipp.tomsich@vrull.eu>,
Cooper Qu <cooper.qu@linux.alibaba.com>,
Lifang Xia <lifang_xia@linux.alibaba.com>,
Yunhai Shang <yunhai@linux.alibaba.com>,
Zhiwei Liu <zhiwei_liu@linux.alibaba.com>
Subject: Re: [PATCH] riscv: thead: Add sign/zero extension support for th.ext and th.extu
Date: Fri, 21 Apr 2023 14:38:59 -0600 [thread overview]
Message-ID: <ff1045dd-7e5c-483f-7c82-1c5d65cfd8c2@gmail.com> (raw)
In-Reply-To: <20230315122448.3394353-1-christoph.muellner@vrull.eu>
On 3/15/23 06:24, Christoph Muellner wrote:
> From: Christoph Müllner <christoph.muellner@vrull.eu>
>
> The current support of the bitfield-extraction instructions
> th.ext and th.extu (XTheadBb extension) only covers sign_extract
> and zero_extract. This patch add support for sign_extend and
> zero_extend to avoid any shifts for sign or zero extensions.
>
> gcc/ChangeLog:
>
> * config/riscv/riscv.md:
> * config/riscv/thead.md (*extend<SHORT:mode><SUPERQI:mode>2_th_ext):
> (*zero_extendsidi2_th_extu):
> (*zero_extendhi<GPR:mode>2_th_extu):
>
> gcc/testsuite/ChangeLog:
>
> * gcc.target/riscv/xtheadbb-ext-1.c: New test.
> * gcc.target/riscv/xtheadbb-extu-1.c: New test.
OK. Though the main part of the ChangeLog needs some content ;-)
jeff
prev parent reply other threads:[~2023-04-21 20:39 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-03-15 12:24 Christoph Muellner
2023-04-21 20:38 ` Jeff Law [this message]
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