From: Richard Sandiford <richard.sandiford@linaro.org>
To: Richard Earnshaw <rearnsha@arm.com>
Cc: gcc-patches@gcc.gnu.org, patches@linaro.org
Subject: Re: PR target/46329: Reject Neon structure constants
Date: Mon, 18 Apr 2011 10:47:00 -0000 [thread overview]
Message-ID: <g4fwpfamwd.fsf@linaro.org> (raw)
In-Reply-To: <1303119516.15603.6.camel@e102346-lin.cambridge.arm.com> (Richard Earnshaw's message of "Mon, 18 Apr 2011 10:38:36 +0100")
Richard Earnshaw <rearnsha@arm.com> writes:
> I'm uncomfortable about this. Generally the ARM port doesn't work well
> with the target-independent constant pool and it's better to assert that
> this is empty when it comes to final assembly generation. Can you
> clarify by way of example how this patch is working please (ie some
> sample output).
Sure, for the testcase in the PR, we get:
ldr r8, .L3
vldmia r8, {d16-d19}
...
.L3:
.word .LC0
...
.LC0:
.word 0
[x 7]
(this is at -O0). With -fPIC we get:
ldr r3, .L3
.LPIC0:
add r3, pc, r3
vldmia r3, {d16-d19}
...
.L3:
.word .LC0-(.LPIC0+8)
Richard
next prev parent reply other threads:[~2011-04-18 10:13 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-04-04 10:35 Richard Sandiford
2011-04-18 10:40 ` Richard Earnshaw
2011-04-18 10:47 ` Richard Sandiford [this message]
2011-04-19 9:52 ` Richard Earnshaw
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