From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 32663 invoked by alias); 27 Sep 2012 14:25:44 -0000 Received: (qmail 32645 invoked by uid 22791); 27 Sep 2012 14:25:40 -0000 X-SWARE-Spam-Status: No, hits=-4.3 required=5.0 tests=AWL,BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FROM,KHOP_RCVD_TRUST,RCVD_IN_DNSWL_LOW,RCVD_IN_HOSTKARMA_YE,TW_IB,TW_ZJ X-Spam-Check-By: sourceware.org Received: from mail-bk0-f47.google.com (HELO mail-bk0-f47.google.com) (209.85.214.47) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Thu, 27 Sep 2012 14:25:36 +0000 Received: by bkcjk7 with SMTP id jk7so1793949bkc.20 for ; Thu, 27 Sep 2012 07:25:34 -0700 (PDT) Received: by 10.204.136.197 with SMTP id s5mr2248643bkt.88.1348755934779; Thu, 27 Sep 2012 07:25:34 -0700 (PDT) Received: from richards-thinkpad.stglab.manchester.uk.ibm.com ([2.26.188.227]) by mx.google.com with ESMTPS id n17sm4839541bks.6.2012.09.27.07.25.30 (version=TLSv1/SSLv3 cipher=OTHER); Thu, 27 Sep 2012 07:25:31 -0700 (PDT) From: Richard Sandiford To: Uros Bizjak Mail-Followup-To: Uros Bizjak ,Eric Botcazou , gcc-patches@gcc.gnu.org, rdsandiford@googlemail.com Cc: Eric Botcazou , gcc-patches@gcc.gnu.org Subject: Re: [PATCH, rtl-optimization]: Fix PR54457, [x32] Fail to combine 64bit index + constant In-Reply-To: (Uros Bizjak's message of "Thu, 27 Sep 2012 15:04:39 +0200") References: <877grgu0yt.fsf@talisman.home> <3730255.NiV98gQJ1a@polaris> User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/23.3 (gnu/linux) Date: Thu, 27 Sep 2012 16:10:00 -0000 Message-ID: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org X-SW-Source: 2012-09/txt/msg01842.txt.bz2 Uros Bizjak writes: > On Wed, Sep 26, 2012 at 11:22 PM, Eric Botcazou wrote: >>> I agree (subreg:M (op:N A C) 0) to (op:M (subreg:N (A 0)) C) is >>> a good transformation, but why do we need to handle as special >>> the case where the subreg is itself the operand of a plus or minus? >>> I think it should happen regardless of where the subreg occurs. >> >> Don't we need to restrict this to the low part though? > > I have tried this approach with attached patch. Unfortunately, > although it survived bootstrap without libjava on x86_64, it failed > building libjava with: > > /home/uros/gcc-svn/trunk/libjava/classpath/javax/swing/plaf/basic/BasicSliderUI.java:1299:0: > error: insn does not satisfy its constraints: > } > ^ > (insn 237 398 399 7 (set (reg:SI 1 dx [125]) > (plus:SI (subreg:SI (mult:DI (reg:DI 1 dx [orig:72 D.78627 ] [72]) > (const_int 2 [0x2])) 0) > (reg:SI 5 di))) > /home/uros/gcc-svn/trunk/libjava/classpath/javax/swing/plaf/basic/BasicSliderUI.java:1271 > 240 {*leasi} > (expr_list:REG_DEAD (reg:DI 5 di) > (nil))) > > Original RTX was (subreg:SI (plus:DI (mult:DI (...) reg:DI))), which > is valid RTX pattern for lea insn, the above is not. > > Due to these problems, I think the safer approach is to limit the > transformation to (plus:SI (subreg:SI (plus:DI (...) 0)) RTXes, as was > the case with original patch. This approach would fix a specific > problem where simplify_plus_minus is not able to simplify the combined > RTX at combine time. Please note, that combined RTXes are always > checked for correctness at combine pass. I think instead the (subreg (plus ...)) handling should be applied to (subreg (mult ...)) too. IMO the correct form of the above address ought to be: (set (reg:SI 1 dx [125]) (plus:SI (mult:SI (reg:SI 1 dx [orig:72 D.78627 ] [72]) (const_int 2 [0x2])) (reg:SI 5 di)) Richard