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Fri, 17 Dec 2021 17:22:57 +0000 From: Andrea Corallo To: Richard Earnshaw CC: , nd , Richard Earnshaw Subject: Re: [PATCH] [1/2] arm: Implement cortex-M return signing address codegen References: <1145487a-afa0-9b05-aeb0-91ae92f99891@foss.arm.com> <58ad5af0-03c7-f158-fc91-549d547deff3@foss.arm.com> Date: Fri, 17 Dec 2021 18:22:56 +0100 In-Reply-To: <58ad5af0-03c7-f158-fc91-549d547deff3@foss.arm.com> (Richard Earnshaw's message of "Fri, 17 Dec 2021 16:55:51 +0000") Message-ID: User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/28.0.90 (gnu/linux) MIME-Version: 1.0 Content-Type: text/plain X-EOPAttributedMessage: 1 X-MS-Office365-Filtering-Correlation-Id: ce0a281f-133f-4f69-2d08-08d9c181e4da X-MS-TrafficTypeDiagnostic: PAXPR08MB6985:EE_|VE1EUR03FT004:EE_|AM8PR08MB6322:EE_ X-Microsoft-Antispam-PRVS: x-checkrecipientrouted: true NoDisclaimer: true X-MS-Oob-TLC-OOBClassifiers: OLM:10000;OLM:10000; X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam-Untrusted: BCL:0; X-Microsoft-Antispam-Message-Info-Original: KFy9+GiBAufG0Gc2yypGR9pAJqNEqUh5tdHc3sy3Cvd3WAE15mf35sGDxtqOZ+mrFgeVTcZwvORr8vYUGC11A6NzoRhpo4C01laBVgLGOCsn3QnSp0CZ5I5TtIzeXvPHjGvoCdzHC8MSyxrjdEkcByuPFu/oZno8X8yhd7kSTd74wKevM0Tse45Y4uzv2q6iRLwObZlzVLXLqxzk1GAolcZxMRRC9lCwiIEoCXV01DpEOe0rZtaiIoNyJ9AuS3NaoaQaAjiNmBpLZdcIUN+ZWCnj15mnG2qhVnBf54Mx5i1/MSeEdMJHOl/JnuNVKlyDttWLe7N9GafTW7l0UakDPJjVWuTs2m3VvoY7dEgAI7pyv9MGoO1ubQZQ/fxh1FrnCgete+9ripZW8KKV2WD10uxpWX/354C/2CM2CU3tqAaG75BqajGXcZHqkV+8BIOWGazwrJgiZx4roz92cisiUyCEAanAedWG6jtQqjD2UQwr7sbUdWtSBzWpVohbTSC1QznZOqHhwnc0lSbR2PPDaAjvEZNJvxXDhLXbhlq51vxouJGcXig7TrkB5M6aV02yMw5kjPo/9o8qtDsV12SmF1ZJNT2A08oeFknCMtTSgSY1Wr2b2G1L6k3vBSfPv38YhR1vDjoZBeyC38Whq3HUHA+lwoekmWX8r25jXAN0zKRiGVESaB23a+LtkAmoEj7usQZ+lYFFlqPDL79xenyV1WCpUheaASWDhaf2zVvlVxqx/Vgp55YvjmLJhEwY1g9bNAGYB25fyT6Erx7Eimqb58jPOBhTApejoySSmQGwsEk= X-Forefront-Antispam-Report-Untrusted: CIP:40.67.248.234; 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Some comments inline. >> Richard Earnshaw writes: >>> On 05/11/2021 08:52, Andrea Corallo via Gcc-patches wrote: >>>> Hi all, >>>> this patch enables address return signature and verification based >>>> on >>>> Armv8.1-M Pointer Authentication [1]. >>>> To sign the return address, we use the PAC R12, LR, SP instruction >>>> upon function entry. This is signing LR using SP and storing the >>>> result in R12. R12 will be pushed into the stack. >>>> During function epilogue R12 will be popped and AUT R12, LR, SP will >>>> be used to verify that the content of LR is still valid before return. >>>> Here an example of PAC instrumented function prologue and epilogue: >>>> pac r12, lr, sp >>>> push {r3, r7, lr} >>>> push {r12} >>>> sub sp, sp, #4 >>> >>> Which, as shown here, generates a stack which does not preserve 8-byte >>> alignment. >> I'm probably catastrofically wrong but shouldn't the stack be "all >> times >> be aligned to a word boundary" [1]? > > At a function boundary it must be 8-byte aligned (same reference). I > don't think GCC really optimizes leaf functions to permit sub 8-byte > alignment, but since you omitted the body of your function I might be > wrong in this case. I see thanks. >> >>> Also, what's wrong with >>> >>> pac r12, lr, sp >>> push {r3, r7, ip, lr} >>> ? >> AFAIK the AAPCS32 defines the Frame Record to be 2 consecutive >> 32-bit >> values of LR and FP on the stack so that's the reason. > > GCC does not currently support AAPCS frame chains as that's a > relatively new feature in the AAPCS; so it's not something you need to > be concerned about right now. The AAPCS frame chain uses R11 as the > frame-chain register anyway. However, you are right that this does > affect -mtpcs-frame and will become relevant when we do add support > for AAPCS frame chains. Do you think would be better to go for the "push {r3, r7, ip, lr}" solution even if we decide -mtpcs-frame is not compatible with pac instrumentation or we want to stay with the proposed approach for future compatibility? Thanks Andrea