From 79f2c990553a1f793e08b9a0c4abb7dae8de7120 Mon Sep 17 00:00:00 2001 From: Andrea Corallo Date: Thu, 17 Nov 2022 11:06:29 +0100 Subject: [PATCH] arm: improve tests for vsetq_lane* gcc/testsuite/ChangeLog: * gcc.target/arm/mve/intrinsics/vsetq_lane_f16.c: Improve test. * gcc.target/arm/mve/intrinsics/vsetq_lane_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vsetq_lane_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vsetq_lane_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vsetq_lane_s64.c: Likewise. * gcc.target/arm/mve/intrinsics/vsetq_lane_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vsetq_lane_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vsetq_lane_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vsetq_lane_u64.c: Likewise. * gcc.target/arm/mve/intrinsics/vsetq_lane_u8.c: Likewise. --- .../arm/mve/intrinsics/vsetq_lane_f16.c | 36 +++++++++++++++-- .../arm/mve/intrinsics/vsetq_lane_f32.c | 36 +++++++++++++++-- .../arm/mve/intrinsics/vsetq_lane_s16.c | 24 ++++++++++-- .../arm/mve/intrinsics/vsetq_lane_s32.c | 24 ++++++++++-- .../arm/mve/intrinsics/vsetq_lane_s64.c | 27 ++++++++++--- .../arm/mve/intrinsics/vsetq_lane_s8.c | 24 ++++++++++-- .../arm/mve/intrinsics/vsetq_lane_u16.c | 36 +++++++++++++++-- .../arm/mve/intrinsics/vsetq_lane_u32.c | 36 +++++++++++++++-- .../arm/mve/intrinsics/vsetq_lane_u64.c | 39 ++++++++++++++++--- .../arm/mve/intrinsics/vsetq_lane_u8.c | 36 +++++++++++++++-- 10 files changed, 284 insertions(+), 34 deletions(-) diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_f16.c index e03e9620528..6b148a4b03d 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_f16.c @@ -1,15 +1,45 @@ -/* { dg-skip-if "Incompatible float ABI" { *-*-* } { "-mfloat-abi=soft" } {""} } */ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmov.16 q[0-9]+\[1\], (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ float16x8_t foo (float16_t a, float16x8_t b) { - return vsetq_lane_f16 (a, b, 0); + return vsetq_lane_f16 (a, b, 1); } -/* { dg-final { scan-assembler "vmov.16" } } */ +/* +**foo1: +** ... +** vmov.16 q[0-9]+\[1\], (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ +float16x8_t +foo1 (float16_t a, float16x8_t b) +{ + return vsetq_lane (a, b, 1); +} + +/* +**foo2: +** ... +** vmov.16 q[0-9]+\[1\], (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ +float16x8_t +foo2 (float16x8_t b) +{ + return vsetq_lane (1.1, b, 1); +} + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_f32.c index 2b9f1a7e627..e4e7f892e97 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_f32.c @@ -1,15 +1,45 @@ -/* { dg-skip-if "Incompatible float ABI" { *-*-* } { "-mfloat-abi=soft" } {""} } */ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmov.32 q[0-9]+\[1\], (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ float32x4_t foo (float32_t a, float32x4_t b) { - return vsetq_lane_f32 (a, b, 0); + return vsetq_lane_f32 (a, b, 1); } -/* { dg-final { scan-assembler "vmov.32" } } */ +/* +**foo1: +** ... +** vmov.32 q[0-9]+\[1\], (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ +float32x4_t +foo1 (float32_t a, float32x4_t b) +{ + return vsetq_lane (a, b, 1); +} + +/* +**foo2: +** ... +** vmov.32 q[0-9]+\[1\], (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ +float32x4_t +foo2 (float32x4_t b) +{ + return vsetq_lane (1.1, b, 1); +} + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s16.c index 92ad0dd16a8..950cd016b76 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s16.c @@ -1,15 +1,33 @@ -/* { dg-skip-if "Incompatible float ABI" { *-*-* } { "-mfloat-abi=soft" } {""} } */ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmov.16 q[0-9]+\[1\], (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int16x8_t foo (int16_t a, int16x8_t b) { - return vsetq_lane_s16 (a, b, 0); + return vsetq_lane_s16 (a, b, 1); } -/* { dg-final { scan-assembler "vmov.16" } } */ +/* +**foo1: +** ... +** vmov.16 q[0-9]+\[1\], (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ +int16x8_t +foo1 (int16_t a, int16x8_t b) +{ + return vsetq_lane (a, b, 1); +} + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s32.c index e60c8f26700..6b49ccd91e4 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s32.c @@ -1,15 +1,33 @@ -/* { dg-skip-if "Incompatible float ABI" { *-*-* } { "-mfloat-abi=soft" } {""} } */ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmov.32 q[0-9]+\[1\], (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int32x4_t foo (int32_t a, int32x4_t b) { - return vsetq_lane_s32 (a, b, 0); + return vsetq_lane_s32 (a, b, 1); } -/* { dg-final { scan-assembler "vmov.32" } } */ +/* +**foo1: +** ... +** vmov.32 q[0-9]+\[1\], (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ +int32x4_t +foo1 (int32_t a, int32x4_t b) +{ + return vsetq_lane (a, b, 1); +} + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s64.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s64.c index 430df669f2a..95ba4da1f51 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s64.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s64.c @@ -1,16 +1,33 @@ -/* { dg-skip-if "Incompatible float ABI" { *-*-* } { "-mfloat-abi=soft" } {""} } */ -/* { dg-require-effective-target arm_hard_ok } */ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ -/* { dg-additional-options "-mfloat-abi=hard -O2" } */ +/* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmov d[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int64x2_t foo (int64_t a, int64x2_t b) { - return vsetq_lane_s64 (a, b, 0); + return vsetq_lane_s64 (a, b, 1); } -/* { dg-final { scan-assembler {vmov\td0, r[1-9]*[0-9], r[1-9]*[0-9]} } } */ +/* +**foo1: +** ... +** vmov d[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ +int64x2_t +foo1 (int64_t a, int64x2_t b) +{ + return vsetq_lane (a, b, 1); +} + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s8.c index d8ccbb524fd..91a5baee55f 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s8.c @@ -1,15 +1,33 @@ -/* { dg-skip-if "Incompatible float ABI" { *-*-* } { "-mfloat-abi=soft" } {""} } */ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmov.8 q[0-9]+\[1\], (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int8x16_t foo (int8_t a, int8x16_t b) { - return vsetq_lane_s8 (a, b, 0); + return vsetq_lane_s8 (a, b, 1); } -/* { dg-final { scan-assembler "vmov.8" } } */ +/* +**foo1: +** ... +** vmov.8 q[0-9]+\[1\], (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ +int8x16_t +foo1 (int8_t a, int8x16_t b) +{ + return vsetq_lane (a, b, 1); +} + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u16.c index 156a5d1de1b..53986a5c1b1 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u16.c @@ -1,15 +1,45 @@ -/* { dg-skip-if "Incompatible float ABI" { *-*-* } { "-mfloat-abi=soft" } {""} } */ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmov.16 q[0-9]+\[1\], (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ uint16x8_t foo (uint16_t a, uint16x8_t b) { - return vsetq_lane_u16 (a, b, 0); + return vsetq_lane_u16 (a, b, 1); } -/* { dg-final { scan-assembler "vmov.16" } } */ +/* +**foo1: +** ... +** vmov.16 q[0-9]+\[1\], (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ +uint16x8_t +foo1 (uint16_t a, uint16x8_t b) +{ + return vsetq_lane (a, b, 1); +} + +/* +**foo2: +** ... +** vmov.16 q[0-9]+\[1\], (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ +uint16x8_t +foo2 (uint16x8_t b) +{ + return vsetq_lane (1, b, 1); +} + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u32.c index e9575483cc9..3f17db9623a 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u32.c @@ -1,15 +1,45 @@ -/* { dg-skip-if "Incompatible float ABI" { *-*-* } { "-mfloat-abi=soft" } {""} } */ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmov.32 q[0-9]+\[1\], (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ uint32x4_t foo (uint32_t a, uint32x4_t b) { - return vsetq_lane_u32 (a, b, 0); + return vsetq_lane_u32 (a, b, 1); } -/* { dg-final { scan-assembler "vmov.32" } } */ +/* +**foo1: +** ... +** vmov.32 q[0-9]+\[1\], (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ +uint32x4_t +foo1 (uint32_t a, uint32x4_t b) +{ + return vsetq_lane (a, b, 1); +} + +/* +**foo2: +** ... +** vmov.32 q[0-9]+\[1\], (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ +uint32x4_t +foo2 (uint32x4_t b) +{ + return vsetq_lane (1, b, 1); +} + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u64.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u64.c index 0e040121cf0..5ce4c544c25 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u64.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u64.c @@ -1,16 +1,45 @@ -/* { dg-skip-if "Incompatible float ABI" { *-*-* } { "-mfloat-abi=soft" } {""} } */ -/* { dg-require-effective-target arm_hard_ok } */ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ -/* { dg-additional-options "-mfloat-abi=hard -O2" } */ +/* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmov d[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ uint64x2_t foo (uint64_t a, uint64x2_t b) { - return vsetq_lane_u64 (a, b, 0); + return vsetq_lane_u64 (a, b, 1); } -/* { dg-final { scan-assembler {vmov\td0, r[1-9]*[0-9], r[1-9]*[0-9]} } } */ +/* +**foo1: +** ... +** vmov d[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ +uint64x2_t +foo1 (uint64_t a, uint64x2_t b) +{ + return vsetq_lane (a, b, 1); +} + +/* +**foo2: +** ... +** vmov d[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ +uint64x2_t +foo2 (uint64x2_t b) +{ + return vsetq_lane (1, b, 1); +} + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u8.c index 668b3fea953..58e932b85e8 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u8.c @@ -1,15 +1,45 @@ -/* { dg-skip-if "Incompatible float ABI" { *-*-* } { "-mfloat-abi=soft" } {""} } */ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmov.8 q[0-9]+\[1\], (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ uint8x16_t foo (uint8_t a, uint8x16_t b) { - return vsetq_lane_u8 (a, b, 0); + return vsetq_lane_u8 (a, b, 1); } -/* { dg-final { scan-assembler "vmov.8" } } */ +/* +**foo1: +** ... +** vmov.8 q[0-9]+\[1\], (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ +uint8x16_t +foo1 (uint8_t a, uint8x16_t b) +{ + return vsetq_lane (a, b, 1); +} + +/* +**foo2: +** ... +** vmov.8 q[0-9]+\[1\], (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ +uint8x16_t +foo2 (uint8x16_t b) +{ + return vsetq_lane (1, b, 1); +} + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file -- 2.25.1