From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 113762 invoked by alias); 6 Aug 2018 10:53:43 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 113752 invoked by uid 89); 6 Aug 2018 10:53:42 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-27.6 required=5.0 tests=BAYES_00,GIT_PATCH_0,GIT_PATCH_1,GIT_PATCH_2,GIT_PATCH_3,RCVD_IN_DNSWL_LOW,SPF_PASS autolearn=ham version=3.3.2 spammy=assumed X-HELO: esa1.microchip.iphmx.com Received: from esa1.microchip.iphmx.com (HELO esa1.microchip.iphmx.com) (68.232.147.91) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Mon, 06 Aug 2018 10:53:41 +0000 Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa1.microchip.iphmx.com with ESMTP/TLS/DHE-RSA-AES256-SHA; 06 Aug 2018 03:53:39 -0700 Received: from jaguar.local.microchip.com (10.10.76.4) by chn-sv-exch07.mchp-main.com (10.10.76.108) with Microsoft SMTP Server id 14.3.352.0; Mon, 6 Aug 2018 03:53:33 -0700 References: User-agent: mu4e 0.9.18; emacs 26.1 From: Senthil Kumar Selvaraj To: CC: Subject: Re: [Patch, avr, PR85624] - Fix ICE when initializing 128-byte aligned array In-Reply-To: Date: Mon, 06 Aug 2018 10:53:00 -0000 Message-ID: MIME-Version: 1.0 Content-Type: text/plain Return-Path: senthilkumar.selvaraj@microchip.com X-SW-Source: 2018-08/txt/msg00393.txt.bz2 Ping! Regards Senthil Senthil Kumar Selvaraj writes: > Hi, > > The below patch fixes an ICE for the avr target when the setmemhi > expander is involved. > > The setmemhi expander generated RTL ends up as an unrecognized insn > if the alignment of the destination exceeds that of a QI > mode const_int (127), AND the number of bytes to set fits in a QI > mode const_int. The second condition prevents *clrmemhi from matching, > and *clrmemqi does not match because it expects operand 3 (the alignment > const_int rtx) to be QI mode, and a value of 128 or greater does not fit. > > The patch fixes this by changing the *clrmemqi pattern to match a HI > mode const_int, and also adds a testcase. > > Regression test showed no new failures, ok to commit to trunk? > > Regards > Senthil > > gcc/ChangeLog: > > 2018-07-18 Senthil Kumar Selvaraj > > PR target/85624 > * config/avr/avr.md (*clrmemqi): Change mode of operands[2] > from QI to HI. > > gcc/testsuite/ChangeLog: > > 2018-07-18 Senthil Kumar Selvaraj > > PR target/85624 > * gcc.target/avr/pr85624.c: New test. > > diff --git gcc/config/avr/avr.md gcc/config/avr/avr.md > index e619e695418..644e3cfabc5 100644 > --- gcc/config/avr/avr.md > +++ gcc/config/avr/avr.md > @@ -1095,7 +1095,7 @@ > [(set (mem:BLK (match_operand:HI 0 "register_operand" "e")) > (const_int 0)) > (use (match_operand:QI 1 "register_operand" "r")) > - (use (match_operand:QI 2 "const_int_operand" "n")) > + (use (match_operand:HI 2 "const_int_operand" "n")) > (clobber (match_scratch:HI 3 "=0")) > (clobber (match_scratch:QI 4 "=&1"))] > "" > diff --git gcc/testsuite/gcc.target/avr/pr85624.c gcc/testsuite/gcc.target/avr/pr85624.c > new file mode 100644 > index 00000000000..ede2e80216a > --- /dev/null > +++ gcc/testsuite/gcc.target/avr/pr85624.c > @@ -0,0 +1,13 @@ > +/* { dg-do compile } */ > +/* { dg-options "-O3" } */ > + > +/* This testcase exposes PR85624. An alignment directive with > + a value greater than 127 on an array with dimensions that fit > + QImode causes an 'unrecognizable insn' ICE. Turns out clrmemqi > + did not match the pattern expanded by setmemhi, because it > + assumed the alignment val will fit in a QI. */ > + > +int foo() { > + volatile int arr[3] __attribute__((aligned(128))) = {0}; > + return arr[2]; > +}