From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 23466 invoked by alias); 26 May 2011 16:13:06 -0000 Received: (qmail 23457 invoked by uid 22791); 26 May 2011 16:13:06 -0000 X-SWARE-Spam-Status: No, hits=-6.9 required=5.0 tests=AWL,BAYES_00,RCVD_IN_DNSWL_HI X-Spam-Check-By: sourceware.org Received: from mga11.intel.com (HELO mga11.intel.com) (192.55.52.93) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Thu, 26 May 2011 16:12:52 +0000 Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga102.fm.intel.com with ESMTP; 26 May 2011 09:12:51 -0700 X-ExtLoop1: 1 Received: from tassilo.jf.intel.com ([10.7.201.108]) by fmsmga002.fm.intel.com with ESMTP; 26 May 2011 09:12:51 -0700 Received: by tassilo.jf.intel.com (Postfix, from userid 501) id 731C0242B3D; Thu, 26 May 2011 09:12:06 -0700 (PDT) From: Andi Kleen To: Basile Starynkevitch Cc: Andrew Haley , gcc-patches@gcc.gnu.org Subject: Re: PATCH: Add pause intrinsic References: <4DDCD96B.90402@redhat.com> <20110525211726.23ca1d2b.basile@starynkevitch.net> Date: Thu, 26 May 2011 17:37:00 -0000 In-Reply-To: <20110525211726.23ca1d2b.basile@starynkevitch.net> (Basile Starynkevitch's message of "Wed, 25 May 2011 21:17:26 +0200") Message-ID: User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/23.2 (gnu/linux) MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org X-SW-Source: 2011-05/txt/msg02068.txt.bz2 Basile Starynkevitch writes: > > Perhaps the doc might explain why is it necessary to have a builtin for > two independent roles: first, the full compiler memory barrier (which > probably means to spill all the registers on the stack - definitely a > task for a compiler); second, to "pause" the processor (which might > also mean to flush or invalidate some data caches). In particular, I > would naively imagine that we might have a more generic builtin for the > compiler memory barrier (which probably could be independent of the > particular ia32 target), and in that case which can't we just implement > the pause ia32 builtin as builtin_compiler_barrier(); asm ("pause")? Because a pause() which can be freely moved around is pretty much useless. Think about it. And a memory barrier is the standard way to prevent moving around in relation to other code. You would always need to combine those too. -Andi -- ak@linux.intel.com -- Speaking for myself only