From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 22608 invoked by alias); 26 May 2011 16:11:34 -0000 Received: (qmail 22597 invoked by uid 22791); 26 May 2011 16:11:33 -0000 X-SWARE-Spam-Status: No, hits=-1.7 required=5.0 tests=AWL,BAYES_00 X-Spam-Check-By: sourceware.org Received: from mga09.intel.com (HELO mga09.intel.com) (134.134.136.24) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Thu, 26 May 2011 16:11:18 +0000 Received: from orsmga002.jf.intel.com ([10.7.209.21]) by orsmga102.jf.intel.com with ESMTP; 26 May 2011 09:11:18 -0700 X-ExtLoop1: 1 Received: from tassilo.jf.intel.com ([10.7.201.108]) by orsmga002.jf.intel.com with ESMTP; 26 May 2011 09:11:17 -0700 Received: by tassilo.jf.intel.com (Postfix, from userid 501) id B811D242B3D; Thu, 26 May 2011 09:10:32 -0700 (PDT) From: Andi Kleen To: Richard Guenther Cc: Andrew Haley , "H.J. Lu" , gcc-patches@gcc.gnu.org Subject: Re: PATCH: Add pause intrinsic References: <4DDCD96B.90402@redhat.com> <4DDD13E3.6070103@redhat.com> <4DDD1835.50007@redhat.com> <4DDD1BB8.4080307@redhat.com> <4DDD31C2.2010607@redhat.com> <4DDE55E0.2050908@redhat.com> <4DDE5B64.5070101@redhat.com> Date: Thu, 26 May 2011 17:36:00 -0000 In-Reply-To: (Richard Guenther's message of "Thu, 26 May 2011 16:29:50 +0200") Message-ID: User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/23.2 (gnu/linux) MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org X-SW-Source: 2011-05/txt/msg02067.txt.bz2 Richard Guenther writes: > > To make it a compiler memory barrier you have to "expand" the > builtin already in the frontend and present the middle-end with > __asm__ ("...." : : : "memory"). That will serve as a compiler Those are the intended semantics (at least those I asked for :-). For all practical purposes the same as asm volatile("pause" ::: "memory") HJ? Can it be expanded earlier? As for why having a builtin: one reason would be portability. Various other architectures have a similar instruction (e.g. PPC). They could be added later to this as a next step. Then it also seems cleaner to me to cover the instruction set with builtins like the others. -Andi -- ak@linux.intel.com -- Speaking for myself only