* Re: [patch] make -fstrict-volatile-bitfields the default for m32c, rx, sh, h8
@ 2010-07-13 15:44 Nick Clifton
0 siblings, 0 replies; 8+ messages in thread
From: Nick Clifton @ 2010-07-13 15:44 UTC (permalink / raw)
To: dj; +Cc: gcc-patches
Hi DJ,
> This change has been requested by Renesas for their chips, some of
> which require this functionality and the rest for consistency. Ok to
> apply? (obviously, I'm asking for the sh, h8, and rx targets - I'm
> the m32c maintainer :)
> * config/rx/rx.h (OVERRIDE_OPTIONS): Define.
> * config/rx/rx-protos.h (rx_override_options): Declare.
> * config/rx/rx.c (rx_override_options): New.
Approved for RX.
Cheers
Nick
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [patch] make -fstrict-volatile-bitfields the default for m32c, rx, sh, h8
2010-07-13 10:47 ` Kaz Kojima
2010-07-13 14:59 ` Jeff Law
@ 2010-07-13 19:43 ` DJ Delorie
1 sibling, 0 replies; 8+ messages in thread
From: DJ Delorie @ 2010-07-13 19:43 UTC (permalink / raw)
To: Kaz Kojima, Jeff Law, Nick Clifton; +Cc: gcc-patches
> SH part is OK. Sorry for the delay.
> H8 is OK too.
> Approved for RX.
Thanks! Committed as 162149.
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [patch] make -fstrict-volatile-bitfields the default for m32c, rx, sh, h8
2010-07-13 10:47 ` Kaz Kojima
@ 2010-07-13 14:59 ` Jeff Law
2010-07-13 19:43 ` DJ Delorie
1 sibling, 0 replies; 8+ messages in thread
From: Jeff Law @ 2010-07-13 14:59 UTC (permalink / raw)
To: Kaz Kojima; +Cc: dj, gcc-patches
On 07/13/10 04:46, Kaz Kojima wrote:
> DJ Delorie<dj@redhat.com> wrote:
>
>> This change has been requested by Renesas for their chips, some of
>> which require this functionality and the rest for consistency. Ok to
>> apply? (obviously, I'm asking for the sh, h8, and rx targets - I'm
>> the m32c maintainer :)
>>
> [snip]
>
>> * config/sh/sh.c (sh_override_options): Default to
>> -fstrict_volatile_bitfields.
>>
> SH part is OK. Sorry for the delay.
>
H8 is OK too.
jeff
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [patch] make -fstrict-volatile-bitfields the default for m32c, rx, sh, h8
2010-07-09 22:46 DJ Delorie
2010-07-09 23:27 ` Nathan Froyd
@ 2010-07-13 10:47 ` Kaz Kojima
2010-07-13 14:59 ` Jeff Law
2010-07-13 19:43 ` DJ Delorie
1 sibling, 2 replies; 8+ messages in thread
From: Kaz Kojima @ 2010-07-13 10:47 UTC (permalink / raw)
To: dj; +Cc: gcc-patches
DJ Delorie <dj@redhat.com> wrote:
> This change has been requested by Renesas for their chips, some of
> which require this functionality and the rest for consistency. Ok to
> apply? (obviously, I'm asking for the sh, h8, and rx targets - I'm
> the m32c maintainer :)
[snip]
> * config/sh/sh.c (sh_override_options): Default to
> -fstrict_volatile_bitfields.
SH part is OK. Sorry for the delay.
Regards,
kaz
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [patch] make -fstrict-volatile-bitfields the default for m32c, rx, sh, h8
2010-07-10 0:00 ` DJ Delorie
@ 2010-07-12 13:39 ` Nathan Froyd
0 siblings, 0 replies; 8+ messages in thread
From: Nathan Froyd @ 2010-07-12 13:39 UTC (permalink / raw)
To: DJ Delorie; +Cc: gcc-patches
On Fri, Jul 09, 2010 at 08:00:09PM -0400, DJ Delorie wrote:
> Like this?
>
> +#undef TARGET_OPTION_OVERRIDE
> +#define TARGET_OPTION_OVERRIDE rx_option_override
Yup, that's great, thank you!
-Nathan
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [patch] make -fstrict-volatile-bitfields the default for m32c, rx, sh, h8
2010-07-09 23:27 ` Nathan Froyd
@ 2010-07-10 0:00 ` DJ Delorie
2010-07-12 13:39 ` Nathan Froyd
0 siblings, 1 reply; 8+ messages in thread
From: DJ Delorie @ 2010-07-10 0:00 UTC (permalink / raw)
To: Nathan Froyd; +Cc: gcc-patches
Like this?
Index: rx.c
===================================================================
--- rx.c (revision 162014)
+++ rx.c (working copy)
@@ -2187,12 +2187,20 @@ rx_set_optimization_options (void)
if (saved_allow_rx_fpu != ALLOW_RX_FPU_INSNS)
error ("Changing the FPU insns/math optimizations pairing is not supported");
}
}
+static void
+rx_option_override (void)
+{
+ /* This target defaults to strict volatile bitfields. */
+ if (flag_strict_volatile_bitfields < 0)
+ flag_strict_volatile_bitfields = 1;
+}
+
\f
static bool
rx_allocate_stack_slots_for_args (void)
{
/* Naked functions should not allocate stack slots for arguments. */
return ! is_naked_func (NULL_TREE);
@@ -2775,9 +2783,12 @@ rx_memory_move_cost (enum machine_mode m
#undef TARGET_CC_MODES_COMPATIBLE
#define TARGET_CC_MODES_COMPATIBLE rx_cc_modes_compatible
#undef TARGET_MEMORY_MOVE_COST
#define TARGET_MEMORY_MOVE_COST rx_memory_move_cost
+#undef TARGET_OPTION_OVERRIDE
+#define TARGET_OPTION_OVERRIDE rx_option_override
+
struct gcc_target targetm = TARGET_INITIALIZER;
/* #include "gt-rx.h" */
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [patch] make -fstrict-volatile-bitfields the default for m32c, rx, sh, h8
2010-07-09 22:46 DJ Delorie
@ 2010-07-09 23:27 ` Nathan Froyd
2010-07-10 0:00 ` DJ Delorie
2010-07-13 10:47 ` Kaz Kojima
1 sibling, 1 reply; 8+ messages in thread
From: Nathan Froyd @ 2010-07-09 23:27 UTC (permalink / raw)
To: DJ Delorie; +Cc: gcc-patches
On Fri, Jul 09, 2010 at 06:46:26PM -0400, DJ Delorie wrote:
> Index: config/rx/rx.h
> ===================================================================
> --- config/rx/rx.h (revision 162014)
> +++ config/rx/rx.h (working copy)
> @@ -87,12 +87,14 @@ extern enum rx_cpu_types rx_cpu_type;
> --end-group \
> %{!T*: %{msim*:%Trx-sim.ld}%{!msim*:%Trx.ld}} \
> "
>
> #undef LINK_SPEC
> #define LINK_SPEC "%{mbig-endian-data:--oformat elf32-rx-be} %{mrelax:-relax}"
> +
> +#define OVERRIDE_OPTIONS rx_override_options ()
Could you please use TARGET_OVERRIDE_OPTIONS here?
-Nathan
^ permalink raw reply [flat|nested] 8+ messages in thread
* [patch] make -fstrict-volatile-bitfields the default for m32c, rx, sh, h8
@ 2010-07-09 22:46 DJ Delorie
2010-07-09 23:27 ` Nathan Froyd
2010-07-13 10:47 ` Kaz Kojima
0 siblings, 2 replies; 8+ messages in thread
From: DJ Delorie @ 2010-07-09 22:46 UTC (permalink / raw)
To: gcc-patches
This change has been requested by Renesas for their chips, some of
which require this functionality and the rest for consistency. Ok to
apply? (obviously, I'm asking for the sh, h8, and rx targets - I'm
the m32c maintainer :)
* config/h8300/h8300.c (h8300_init_once): Default to
-fstrict_volatile_bitfields.
* config/sh/sh.c (sh_override_options): Default to
-fstrict_volatile_bitfields.
* config/rx/rx.h (OVERRIDE_OPTIONS): Define.
* config/rx/rx-protos.h (rx_override_options): Declare.
* config/rx/rx.c (rx_override_options): New.
* config/m32c/m32c.c (m32c_override_options): Default to
-fstrict_volatile_bitfields.
Index: config/m32c/m32c.c
===================================================================
--- config/m32c/m32c.c (revision 162014)
+++ config/m32c/m32c.c (working copy)
@@ -428,12 +428,16 @@ m32c_override_options (void)
}
else
target_memregs = 16;
if (TARGET_A24)
flag_ivopts = 0;
+
+ /* This target defaults to strict volatile bitfields. */
+ if (flag_strict_volatile_bitfields < 0)
+ flag_strict_volatile_bitfields = 1;
}
/* Defining data structures for per-function information */
/* The usual; we set up our machine_function data. */
static struct machine_function *
Index: config/rx/rx.h
===================================================================
--- config/rx/rx.h (revision 162014)
+++ config/rx/rx.h (working copy)
@@ -87,12 +87,14 @@ extern enum rx_cpu_types rx_cpu_type;
--end-group \
%{!T*: %{msim*:%Trx-sim.ld}%{!msim*:%Trx.ld}} \
"
#undef LINK_SPEC
#define LINK_SPEC "%{mbig-endian-data:--oformat elf32-rx-be} %{mrelax:-relax}"
+
+#define OVERRIDE_OPTIONS rx_override_options ()
\f
#define BITS_BIG_ENDIAN 0
#define BYTES_BIG_ENDIAN TARGET_BIG_ENDIAN_DATA
#define WORDS_BIG_ENDIAN TARGET_BIG_ENDIAN_DATA
Index: config/rx/rx-protos.h
===================================================================
--- config/rx/rx-protos.h (revision 162014)
+++ config/rx/rx-protos.h (working copy)
@@ -26,12 +26,13 @@
#define Fargs CUMULATIVE_ARGS
\f
extern void rx_conditional_register_usage (void);
extern void rx_expand_prologue (void);
extern int rx_initial_elimination_offset (int, int);
extern void rx_set_optimization_options (void);
+extern void rx_override_options (void);
#ifdef RTX_CODE
extern bool rx_compare_redundant (rtx);
extern void rx_emit_stack_popm (rtx *, bool);
extern void rx_emit_stack_pushm (rtx *);
extern void rx_expand_epilogue (bool);
Index: config/rx/rx.c
===================================================================
--- config/rx/rx.c (revision 162014)
+++ config/rx/rx.c (working copy)
@@ -2187,12 +2187,21 @@ rx_set_optimization_options (void)
if (saved_allow_rx_fpu != ALLOW_RX_FPU_INSNS)
error ("Changing the FPU insns/math optimizations pairing is not supported");
}
}
+/* Implements OVERRIDE_OPTIONS. */
+void
+rx_override_options (void)
+{
+ /* This target defaults to strict volatile bitfields. */
+ if (flag_strict_volatile_bitfields < 0)
+ flag_strict_volatile_bitfields = 1;
+}
+
\f
static bool
rx_allocate_stack_slots_for_args (void)
{
/* Naked functions should not allocate stack slots for arguments. */
return ! is_naked_func (NULL_TREE);
Index: config/sh/sh.c
===================================================================
--- config/sh/sh.c (revision 162014)
+++ config/sh/sh.c (working copy)
@@ -970,12 +970,16 @@ sh_override_options (void)
if (align_functions < min_align)
align_functions = min_align;
}
if (sh_fixed_range_str)
sh_fix_range (sh_fixed_range_str);
+
+ /* This target defaults to strict volatile bitfields. */
+ if (flag_strict_volatile_bitfields < 0)
+ flag_strict_volatile_bitfields = 1;
}
\f
/* Print the operand address in x to the stream. */
static void
sh_print_operand_address (FILE *stream, rtx x)
Index: config/h8300/h8300.c
===================================================================
--- config/h8300/h8300.c (revision 162014)
+++ config/h8300/h8300.c (working copy)
@@ -400,12 +400,16 @@ h8300_init_once (void)
{
/* We use movmd sequences for some moves since it can be quicker
than calling memcpy(). The sequences will need to save and
restore er6 though, so bump up the cost. */
h8300_move_ratio = 6;
}
+
+ /* This target defaults to strict volatile bitfields. */
+ if (flag_strict_volatile_bitfields < 0)
+ flag_strict_volatile_bitfields = 1;
}
/* Implement REG_CLASS_FROM_LETTER.
Some patterns need to use er6 as a scratch register. This is
difficult to arrange since er6 is the frame pointer and usually
^ permalink raw reply [flat|nested] 8+ messages in thread
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2010-07-09 22:46 DJ Delorie
2010-07-09 23:27 ` Nathan Froyd
2010-07-10 0:00 ` DJ Delorie
2010-07-12 13:39 ` Nathan Froyd
2010-07-13 10:47 ` Kaz Kojima
2010-07-13 14:59 ` Jeff Law
2010-07-13 19:43 ` DJ Delorie
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