Commit: RX: Add peepholes to remove redundant extensions

[Nick Clifton <nickc@redhat.com>]

Hi Guys,

  I am applying the patch below to add a couple of peephole
  optimizations to the RX backend.  It seems that GCC does not cope very
  well with the RX's ability to perform either sign-extending loads or
  zero-extending loads and so sometimes it can generate an extending
  load followed by a register to register extension.  The peepholes
  match these cases and delete the unnecessary extension where possible.

Cheers
  Nick

gcc/ChangeLog
2011-05-17  Nick Clifton  <nickc@redhat.com>

	* config/rx/rx.md: Add peephole to remove redundant extensions
	after loads.

Index: gcc/config/rx/rx.md
===================================================================
--- gcc/config/rx/rx.md	(revision 173819)
+++ gcc/config/rx/rx.md	(working copy)
@@ -1701,6 +1701,35 @@
 		    (extend_types:SI (match_dup 1))))]
 )
 
+;; Convert:
+;;   (set (reg1) (sign_extend (mem))
+;;   (set (reg2) (zero_extend (reg1))
+;; into
+;;   (set (reg2) (zero_extend (mem)))
+(define_peephole2
+  [(set (match_operand:SI                              0 "register_operand")
+	(sign_extend:SI (match_operand:small_int_modes 1 "memory_operand")))
+   (set (match_operand:SI                              2 "register_operand")
+	(zero_extend:SI (match_operand:small_int_modes 3 "register_operand")))]
+  "REGNO (operands[0]) == REGNO (operands[3])
+   && (REGNO (operands[0]) == REGNO (operands[2])
+       || peep2_regno_dead_p (2, REGNO (operands[0])))"
+  [(set (match_dup 2)
+	(zero_extend:SI (match_dup 1)))]
+)
+
+;; Remove the redundant sign extension from:
+;;   (set (reg) (extend (mem)))
+;;   (set (reg) (extend (reg)))
+(define_peephole2
+  [(set (match_operand:SI                               0 "register_operand")
+	(extend_types:SI (match_operand:small_int_modes 1 "memory_operand")))
+   (set (match_dup 0)
+	(extend_types:SI (match_operand:small_int_modes 2 "register_operand")))]
+  "REGNO (operands[0]) == REGNO (operands[2])"
+  [(set (match_dup 0) (extend_types:SI (match_dup 1)))]
+)
+
 (define_insn "comparesi3_<extend_types:code><small_int_modes:mode>"
   [(set (reg:CC CC_REG)
 	(compare:CC (match_operand:SI                               0 "register_operand" "=r")