From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 118469 invoked by alias); 20 Mar 2017 16:43:35 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 118387 invoked by uid 89); 20 Mar 2017 16:43:34 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-25.3 required=5.0 tests=AWL,BAYES_00,GIT_PATCH_0,GIT_PATCH_1,GIT_PATCH_2,GIT_PATCH_3,RCVD_IN_DNSWL_NONE,RCVD_IN_SORBS_SPAM,SPF_PASS autolearn=ham version=3.3.2 spammy= X-HELO: mail-pg0-f67.google.com Received: from mail-pg0-f67.google.com (HELO mail-pg0-f67.google.com) (74.125.83.67) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Mon, 20 Mar 2017 16:43:31 +0000 Received: by mail-pg0-f67.google.com with SMTP id b5so20910060pgg.1 for ; Mon, 20 Mar 2017 09:43:32 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:subject:in-reply-to:message-id :mime-version; bh=035Jxj/G0/Vhce/J7Sba6vzei9gdyuA65azEKd+Acls=; b=ShCPaU8QWFAKPrgZZuMsKP2hFG534uzGHCWiIpyrclKyoH0oSPGf1rsdBCX/9Igc22 aon704gVs8yt16t/HxLmhmvZCn98x8shd+5aVZLIDptTpAYhfDD8aOGtVlhu8ssRi8yb B28lYyLTI7feLz7IvEVTlFZlEHt1LJ6F9g2inONc5z3LjHT/Dy93cWbtjp8K2hYjMFF9 2fRNwmGLCB8+YV+CIwM8BFIJVQys9+/tLEzehEvU2EiL7kXSOlak8St1QPFneo98BIaI F0BcCjTV3kTSSqc67UplQ+UTkyJH82lT6ZvXZ5t3h0B+AKRumz8JVpvFQllOtvhUIrAH 4PSg== X-Gm-Message-State: AFeK/H2OmVnpYWOCpBU4JaBxzGZIRYgaHNMixc5X4UkURfOO6q8XtrQjjGL6v25q5De3Hw== X-Received: by 10.98.103.75 with SMTP id b72mr33780238pfc.105.1490028211203; Mon, 20 Mar 2017 09:43:31 -0700 (PDT) Received: from localhost ([216.38.154.21]) by smtp.gmail.com with ESMTPSA id c22sm34595855pgn.43.2017.03.20.09.43.30 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 20 Mar 2017 09:43:30 -0700 (PDT) Date: Mon, 20 Mar 2017 16:43:00 -0000 X-Google-Original-Date: Mon, 20 Mar 2017 09:41:42 PDT (-0700) From: Palmer Dabbelt To: gcc-patches@gcc.gnu.org Subject: Re: [PATCH] Use more conservative fences on RISC-V In-Reply-To: <20170317225254.19182-1-palmer@dabbelt.com> Message-ID: Mime-Version: 1.0 (MHng) X-IsSubscribed: yes X-SW-Source: 2017-03/txt/msg01031.txt.bz2 On Fri, 17 Mar 2017 15:52:54 PDT (-0700), Palmer Dabbelt wrote: > The RISC-V memory model is still in the process of being formally > specified, so for now we're going to be safe and add the I/O bits to > userspace fences because there's no way to know if userspace is touching > memory-mapped I/O regions at compile time. > > This will have no impact on existing microarchitecutres because they > treat all fences conservatively. > > gcc/ChangeLog: > > 2017-03-17 Palmer Dabbelt > > * config/riscv/riscv.c (riscv_print_operand): Use "fence > iorw,ow". > * config/riscv/sync.mc (mem_thread_fence_1): Use "fence > iorw,iorw". > --- > gcc/ChangeLog | 7 +++++++ > gcc/config/riscv/riscv.c | 2 +- > gcc/config/riscv/sync.md | 2 +- > 3 files changed, 9 insertions(+), 2 deletions(-) > > diff --git a/gcc/ChangeLog b/gcc/ChangeLog > index 3e108dd..de32689 100644 > --- a/gcc/ChangeLog > +++ b/gcc/ChangeLog > @@ -1,3 +1,10 @@ > +2017-03-17 Palmer Dabbelt > + > + * config/riscv/riscv.c (riscv_print_operand): Use "fence > + iorw,ow". > + * config/riscv/sync.mc (mem_thread_fence_1): Use "fence > + iorw,iorw". > + > 2017-03-17 Palmer Dabbelt > * doc/install.texi (Specific) : Add riscv32-*-elf, > diff --git a/gcc/config/riscv/riscv.c b/gcc/config/riscv/riscv.c > index 25cc803..fa93c3c 100644 > --- a/gcc/config/riscv/riscv.c > +++ b/gcc/config/riscv/riscv.c > @@ -2794,7 +2794,7 @@ riscv_print_operand (FILE *file, rtx op, int letter) > > case 'F': > if (riscv_memmodel_needs_release_fence ((enum memmodel) INTVAL (op))) > - fputs ("fence rw,w; ", file); > + fputs ("fence iorw,ow; ", file); > break; > > default: > diff --git a/gcc/config/riscv/sync.md b/gcc/config/riscv/sync.md > index 09970b9..cde19e3 100644 > --- a/gcc/config/riscv/sync.md > +++ b/gcc/config/riscv/sync.md > @@ -53,7 +53,7 @@ > (unspec:BLK [(match_dup 0)] UNSPEC_MEMORY_BARRIER)) > (match_operand:SI 1 "const_int_operand" "")] ;; model > "" > - "fence\trw,rw") > + "fence\tiorw,iorw") > > ;; Atomic memory operations. Committed.