From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-ej1-x629.google.com (mail-ej1-x629.google.com [IPv6:2a00:1450:4864:20::629]) by sourceware.org (Postfix) with ESMTPS id 13EEF3857C72 for ; Sat, 17 Sep 2022 21:07:27 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 13EEF3857C72 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=dabbelt.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=dabbelt.com Received: by mail-ej1-x629.google.com with SMTP id dv25so56472748ejb.12 for ; Sat, 17 Sep 2022 14:07:27 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=dabbelt-com.20210112.gappssmtp.com; s=20210112; h=content-transfer-encoding:mime-version:message-id:to:from:cc :in-reply-to:subject:date:from:to:cc:subject:date; bh=ZTfDlPigFL4JfLXucFPkS0jbDsFAbxsnoIzPc7y+8tQ=; b=ZkoqnOKkf/0BviDQt+VA279m51mj0g17BkdVK6ssAaSQ8YJ55Foe4pMeHFPp9wIEoF uMAE+USq/s9wr0Y2Ri2OB0WMQDrVyraosHpT5sA1MRKV5PKihw8KI0jXR+lRZ3i7Or/x LgP8eMd/REEwg3TA7XjtFFSryNXlf1YBCT1Q0sLK5oC55CUDWaSSYCkL3hD/ku6bB3a9 t/4jgi8r20Agp3eKoGVCztOazMy49RO17js7CbxTBUA9pi9kPmcdYrRTU1pO21aSULBr 0RSNjg2/0lKMGSWsMXKw8FkaiUVryCOeq3YpXlGwsgrt9I/XiodhI1n7rZqEte5++nvb 5ZoA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:message-id:to:from:cc :in-reply-to:subject:date:x-gm-message-state:from:to:cc:subject:date; bh=ZTfDlPigFL4JfLXucFPkS0jbDsFAbxsnoIzPc7y+8tQ=; b=2RIhdzWF2u7YsOcQcOxx1+BQclqIX3hAAxjuZcpa4bDj4Z1zP6+lzHzvBro0WjB0UA fmQkXZNu9BTl5kqRs+7Oe7db6gCOPmih187QleeVBmvTIIVrq4vwZ9Rj4GzD9y6jc2xW 7Ij1ULHzObDdRl6dwqsERkbfadk9PYAqg/COQ/bPwZElQ+ZrxfL2jCE9RrQJENBcQN1+ ovJA/YrwlDjbTpqRwvYGurQd/gFFlj2y7mi8ZWtgbC0sV8QfnM36K+f0wFf6JoQ6Ppbw hUS9/YgEwbi9wMerDNYWs9dery/HjkuENWF2kEUer7LauGWWQejRT7C0SDFdVALP5Mzn x8dw== X-Gm-Message-State: ACrzQf2bfhVGr0HF8cpo1b4y+v3uFvkLzQQLhGHxzTW6SIfQcBpJC360 j3F/8nh4WD1afN5bQdux8vo4HoUOqrxC7LzHFNJRZA== X-Google-Smtp-Source: AMsMyM4YglfZn9U6FoVJnCL24/s2T2bEp+79eipWm9AOirMWaVsis39JktIS/7U0kyFgxVz/N+/K8A== X-Received: by 2002:a17:907:ea6:b0:77e:156d:b07b with SMTP id ho38-20020a1709070ea600b0077e156db07bmr7575856ejc.435.1663448845166; Sat, 17 Sep 2022 14:07:25 -0700 (PDT) Received: from localhost ([185.176.138.242]) by smtp.gmail.com with ESMTPSA id v11-20020a1709061dcb00b0078034812bc7sm5889648ejh.200.2022.09.17.14.07.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 17 Sep 2022 14:07:24 -0700 (PDT) Date: Sat, 17 Sep 2022 14:07:24 -0700 (PDT) X-Google-Original-Date: Sat, 17 Sep 2022 08:17:26 PDT (-0700) Subject: Re: [PATCH] RISC-V missing __builtin_lceil and __builtin_lfloor In-Reply-To: CC: gcc-patches@gcc.gnu.org From: Palmer Dabbelt To: kevinl@rivosinc.com Message-ID: Mime-Version: 1.0 (MHng) Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-11.6 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,GIT_PATCH_0,KAM_SHORT,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: On Mon, 15 Aug 2022 17:44:35 PDT (-0700), kevinl@rivosinc.com wrote: > Hello, > Currently, __builtin_lceil and __builtin_lfloor doesn't generate an > existing instruction fcvt, but rather calls ceil and floor from the > library. This patch adds the missing iterator and attributes for lceil and > lfloor to produce the optimized code. > The test cases check the correct generation of the fcvt instruction for > float/double to int/long/long long. Passed the test in riscv-linux. > Could this patch be committed? Reviewed-by: Palmer Dabbelt Acked-by: Palmer Dabbelt Not sure if Kito had any comments for this one, but it looks good to me. > gcc/ChangeLog: > Michael Collison > * config/riscv/riscv.md (RINT): Add iterator for lceil and lround. > (rint_pattern): Add ceil and floor. > (rint_rm): Add rup and rdn. > > gcc/testsuite/ChangeLog: > Kevin Lee > * gcc.target/riscv/lfloor-lceil.c: New test. > --- > gcc/config/riscv/riscv.md | 13 ++- > gcc/testsuite/gcc.target/riscv/lfloor-lceil.c | 79 +++++++++++++++++++ > 2 files changed, 88 insertions(+), 4 deletions(-) > create mode 100644 gcc/testsuite/gcc.target/riscv/lfloor-lceil.c > > diff --git a/gcc/config/riscv/riscv.md b/gcc/config/riscv/riscv.md > index c6399b1389e..070004fa7fe 100644 > --- a/gcc/config/riscv/riscv.md > +++ b/gcc/config/riscv/riscv.md > @@ -43,6 +43,9 @@ (define_c_enum "unspec" [ > UNSPEC_LRINT > UNSPEC_LROUND > > + UNSPEC_LCEIL > + UNSPEC_LFLOOR > + > ;; Stack tie > UNSPEC_TIE > ]) > @@ -345,10 +348,12 @@ (define_mode_attr UNITMODE [(SF "SF") (DF "DF")]) > ;; the controlling mode. > (define_mode_attr HALFMODE [(DF "SI") (DI "SI") (TF "DI")]) > > -;; Iterator and attributes for floating-point rounding instructions. > -(define_int_iterator RINT [UNSPEC_LRINT UNSPEC_LROUND]) > -(define_int_attr rint_pattern [(UNSPEC_LRINT "rint") (UNSPEC_LROUND > "round")]) > -(define_int_attr rint_rm [(UNSPEC_LRINT "dyn") (UNSPEC_LROUND "rmm")]) > +;; Iterator and attributes for floating-point rounding instructions.f > +(define_int_iterator RINT [UNSPEC_LRINT UNSPEC_LROUND UNSPEC_LCEIL > UNSPEC_LFLOOR]) > +(define_int_attr rint_pattern [(UNSPEC_LRINT "rint") (UNSPEC_LROUND > "round") > + (UNSPEC_LCEIL "ceil") (UNSPEC_LFLOOR > "floor")]) > +(define_int_attr rint_rm [(UNSPEC_LRINT "dyn") (UNSPEC_LROUND "rmm") > + (UNSPEC_LCEIL "rup") (UNSPEC_LFLOOR "rdn")]) > > ;; Iterator and attributes for quiet comparisons. > (define_int_iterator QUIET_COMPARISON [UNSPEC_FLT_QUIET UNSPEC_FLE_QUIET]) > diff --git a/gcc/testsuite/gcc.target/riscv/lfloor-lceil.c > b/gcc/testsuite/gcc.target/riscv/lfloor-lceil.c > new file mode 100644 > index 00000000000..4d81c12cefa > --- /dev/null > +++ b/gcc/testsuite/gcc.target/riscv/lfloor-lceil.c > @@ -0,0 +1,79 @@ > +/* { dg-do compile } */ > +/* { dg-options "-march=rv64gc -mabi=lp64d" } */ > +/* { dg-skip-if "" { *-*-* } { "-O0" "-Og" } } */ > + > +int > +ceil1(float i) > +{ > + return __builtin_lceil(i); > +} > + > +long > +ceil2(float i) > +{ > + return __builtin_lceil(i); > +} > + > +long long > +ceil3(float i) > +{ > + return __builtin_lceil(i); > +} > + > +int > +ceil4(double i) > +{ > + return __builtin_lceil(i); > +} > + > +long > +ceil5(double i) > +{ > + return __builtin_lceil(i); > +} > + > +long long > +ceil6(double i) > +{ > + return __builtin_lceil(i); > +} > + > +int > +floor1(float i) > +{ > + return __builtin_lfloor(i); > +} > + > +long > +floor2(float i) > +{ > + return __builtin_lfloor(i); > +} > + > +long long > +floor3(float i) > +{ > + return __builtin_lfloor(i); > +} > + > +int > +floor4(double i) > +{ > + return __builtin_lfloor(i); > +} > + > +long > +floor5(double i) > +{ > + return __builtin_lfloor(i); > +} > + > +long long > +floor6(double i) > +{ > + return __builtin_lfloor(i); > +} > + > +/* { dg-final { scan-assembler-times "fcvt.l.s" 6 } } */ > +/* { dg-final { scan-assembler-times "fcvt.l.d" 6 } } */ > +/* { dg-final { scan-assembler-not "call" } } */