From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-pf1-x42c.google.com (mail-pf1-x42c.google.com [IPv6:2607:f8b0:4864:20::42c]) by sourceware.org (Postfix) with ESMTPS id 764BB3858D1E for ; Wed, 17 May 2023 03:11:19 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 764BB3858D1E Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=rivosinc.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=rivosinc.com Received: by mail-pf1-x42c.google.com with SMTP id d2e1a72fcca58-64ac461af60so231005b3a.3 for ; Tue, 16 May 2023 20:11:19 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20221208.gappssmtp.com; s=20221208; t=1684293078; x=1686885078; h=content-transfer-encoding:mime-version:message-id:to:from:cc :in-reply-to:subject:date:from:to:cc:subject:date:message-id :reply-to; bh=E4Jvsv1PI4gnRaMaJs75M3pna1pn2tOf73fjRrBqPLg=; b=Cj/PO25d5IgUMq40Qp7sUHY56NMcGuruf7Ik0YtDxB4hb+tJi+XIH0nMpvKyudxy06 Bi1iVBx38QGcIt2LbDeae4EjkUrVQL8mj7Q/J7+jlAziXO6QRoZA7acYLgZAAO192kjE kkyLeYdfcNKBmo6IYMPvyO9L885tp+iYqDovk/6HY+myRcC9mcdmSlAdH9Ru7G7Cd2v1 iV4QScNwDx4aclCqNI3/OArY7BscSoW9T9AXJeIN5Fs3pFAOtKSAHasqAa2U2y9zYejD OwVOKKkJy5LG3ZncqPHiV5Kmic1qnbAVvq92KgKtWTwH20GdnqwMoXx1LHrQi5nDZ4y6 s14w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1684293078; x=1686885078; h=content-transfer-encoding:mime-version:message-id:to:from:cc :in-reply-to:subject:date:x-gm-message-state:from:to:cc:subject:date :message-id:reply-to; bh=E4Jvsv1PI4gnRaMaJs75M3pna1pn2tOf73fjRrBqPLg=; b=eRvKBe+/wGLEk2Mj74JN0x9SjuwghLOtkWVH5Ms2P7EB5aSyTxl8buZKTz/nmkVqVJ 7VBc1UiUO7ER5D5eArkbhjg25h269AtrsNkjrvRU41xU3OPvVa5LUECuyT9SloVJHRSk 9ze4hy9sDnco2v0N080JtgSc94YFWoQ6r2Su6gkQY+HZzjepYED+T+IzFZbFvvLs2Z8D Vk4jCRFIb7tLxLngWVnY42eGBJCmYyyWcdWw9NoJaQjAONzW6d1+bbemz5/TqZwOfy1j 0J962zVhTD3PjZW7Brz/ZMOs6vgngjyLcDh7eO8C2NlXdBmiRjCYvHXQ3f/OANTPAmuz jExA== X-Gm-Message-State: AC+VfDwoMBvfXJOINGzD3JY/+CkjCyjzjzry6W8ilpu9Tifc3N9XnGHJ d71xC0Prf8TwrygXgiVymbt3vA== X-Google-Smtp-Source: ACHHUZ4DFi/vD0r6/ux9oqn3DaGXQyB/ik9sLHFmksJymLU2hy/tAIME8vu0kbEgq+e7Ezl9Aa41Mw== X-Received: by 2002:a05:6a00:1882:b0:643:b8c2:b577 with SMTP id x2-20020a056a00188200b00643b8c2b577mr51836546pfh.22.1684293078451; Tue, 16 May 2023 20:11:18 -0700 (PDT) Received: from localhost ([50.221.140.188]) by smtp.gmail.com with ESMTPSA id x5-20020aa784c5000000b0064394d63458sm4875853pfn.78.2023.05.16.20.11.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 May 2023 20:11:18 -0700 (PDT) Date: Tue, 16 May 2023 20:11:18 -0700 (PDT) X-Google-Original-Date: Tue, 16 May 2023 20:10:53 PDT (-0700) Subject: Re: RISC-V Test Errors and Failures In-Reply-To: <3b558713-1fef-3a68-5132-3d4feeed193a@rivosinc.com> CC: Patrick O'Neill , kito.cheng@sifive.com, juzhe.zhong@rivai.ai, pinskia@gmail.com, gcc-patches@gcc.gnu.org From: Palmer Dabbelt To: Vineet Gupta Message-ID: Mime-Version: 1.0 (MHng) Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-11.2 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,GIT_PATCH_0,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,TXREP,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: On Tue, 16 May 2023 20:08:26 PDT (-0700), Vineet Gupta wrote: > > On 5/16/23 19:53, Palmer Dabbelt wrote: >> >> Probably, I'll go try and bump stuff and see if it works... > > Word of caution: Best to not disturb your existing setup, a try a fresh > checkout first Even easier, I think I can get away with just diff --git a/scripts/wrapper/qemu/riscv64-unknown-linux-gnu-run b/scripts/wrapper/qemu/riscv64-unknown-linux-gnu-run index 94d6ec5..efc3a80 100755 --- a/scripts/wrapper/qemu/riscv64-unknown-linux-gnu-run +++ b/scripts/wrapper/qemu/riscv64-unknown-linux-gnu-run @@ -12,4 +12,4 @@ done xlen="$(readelf -h $1 | grep 'Class' | cut -d: -f 2 | xargs echo | sed 's/^ELF//')" -qemu-riscv$xlen -r 5.10 "${qemu_args[@]}" -L ${RISC_V_SYSROOT} -cpu rv$xlen,zba=on,zbb=on,zbc=on,zbs=on "$@" +qemu-riscv$xlen -r 5.10 "${qemu_args[@]}" -L ${RISC_V_SYSROOT} -cpu rv$xlen,zba=on,zbb=on,zbc=on,zbs=on,v=on "$@" for now. I'm going to throw together hwprobe for qemu-user, from looking at the AVX stuff it should be pretty easy to plumb that into DG and then get the detection going.